diff options
author | Anson Huang <b20788@freescale.com> | 2014-05-06 02:01:27 -0400 |
---|---|---|
committer | Anson Huang <b20788@freescale.com> | 2014-05-08 02:32:09 -0400 |
commit | 01efa96c7d4d578525098b42abc0ea1ce983084c (patch) | |
tree | 52c0124bbb3bd34b99b0ae2bf31a7605e18d8b9e /arch/arm/boot/dts | |
parent | 84babc7fa0a56f6620f8b04a86baece620297dda (diff) |
ENGR00311992-1 ARM: dts: imx6sx: enable cpufreq
Add cpufreq related opp info to support cpufreq
driver for i.MX6SX.
Signed-off-by: Anson Huang <b20788@freescale.com>
Diffstat (limited to 'arch/arm/boot/dts')
-rw-r--r-- | arch/arm/boot/dts/imx6sx.dtsi | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi index 77f565e94a09..1ddbbc98f4eb 100644 --- a/arch/arm/boot/dts/imx6sx.dtsi +++ b/arch/arm/boot/dts/imx6sx.dtsi | |||
@@ -44,6 +44,25 @@ | |||
44 | device_type = "cpu"; | 44 | device_type = "cpu"; |
45 | reg = <0>; | 45 | reg = <0>; |
46 | next-level-cache = <&L2>; | 46 | next-level-cache = <&L2>; |
47 | operating-points = < | ||
48 | /* kHz uV */ | ||
49 | 996000 1250000 | ||
50 | 792000 1175000 | ||
51 | 396000 1075000 | ||
52 | >; | ||
53 | fsl,soc-operating-points = < | ||
54 | /* ARM kHz SOC uV */ | ||
55 | 996000 1175000 | ||
56 | 792000 1175000 | ||
57 | 396000 1175000 | ||
58 | >; | ||
59 | clock-latency = <61036>; /* two CLK32 periods */ | ||
60 | clocks = <&clks IMX6SX_CLK_ARM>, <&clks IMX6SX_CLK_PLL2_PFD2>, <&clks IMX6SX_CLK_STEP>, | ||
61 | <&clks IMX6SX_CLK_PLL1_SW>, <&clks IMX6SX_CLK_PLL1_SYS>; | ||
62 | clock-names = "arm", "pll2_pfd2_396m", "step", | ||
63 | "pll1_sw", "pll1_sys"; | ||
64 | arm-supply = <®_arm>; | ||
65 | soc-supply = <®_soc>; | ||
47 | }; | 66 | }; |
48 | }; | 67 | }; |
49 | 68 | ||