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path: root/drivers/video/omap2
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-rw-r--r--drivers/video/omap2/dss/dpi.c4
-rw-r--r--drivers/video/omap2/dss/dsi.c9
-rw-r--r--drivers/video/omap2/dss/dss.c42
-rw-r--r--drivers/video/omap2/dss/dss.h14
4 files changed, 51 insertions, 18 deletions
diff --git a/drivers/video/omap2/dss/dpi.c b/drivers/video/omap2/dss/dpi.c
index 69ce31ae2a2f..c5091ed12a7d 100644
--- a/drivers/video/omap2/dss/dpi.c
+++ b/drivers/video/omap2/dss/dpi.c
@@ -57,7 +57,7 @@ static int dpi_set_dsi_clk(bool is_tft, unsigned long pck_req,
57 if (r) 57 if (r)
58 return r; 58 return r;
59 59
60 dss_select_clk_source(0, 1); 60 dss_select_dispc_clk_source(DSS_SRC_DSI1_PLL_FCLK);
61 61
62 r = dispc_set_clock_div(&dispc_cinfo); 62 r = dispc_set_clock_div(&dispc_cinfo);
63 if (r) 63 if (r)
@@ -238,7 +238,7 @@ static void dpi_display_disable(struct omap_dss_device *dssdev)
238 dispc_enable_lcd_out(0); 238 dispc_enable_lcd_out(0);
239 239
240#ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL 240#ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
241 dss_select_clk_source(0, 0); 241 dss_select_dispc_clk_source(DSS_SRC_DSS1_ALWON_FCLK);
242 dsi_pll_uninit(); 242 dsi_pll_uninit();
243 dss_clk_disable(DSS_CLK_FCK2); 243 dss_clk_disable(DSS_CLK_FCK2);
244#endif 244#endif
diff --git a/drivers/video/omap2/dss/dsi.c b/drivers/video/omap2/dss/dsi.c
index 036f4221e3df..4fdb628427e0 100644
--- a/drivers/video/omap2/dss/dsi.c
+++ b/drivers/video/omap2/dss/dsi.c
@@ -3203,7 +3203,8 @@ static int dsi_display_init_dsi(struct omap_dss_device *dssdev)
3203 if (r) 3203 if (r)
3204 goto err1; 3204 goto err1;
3205 3205
3206 dss_select_clk_source(true, true); 3206 dss_select_dispc_clk_source(DSS_SRC_DSI1_PLL_FCLK);
3207 dss_select_dsi_clk_source(DSS_SRC_DSI2_PLL_FCLK);
3207 3208
3208 DSSDBG("PLL OK\n"); 3209 DSSDBG("PLL OK\n");
3209 3210
@@ -3247,7 +3248,8 @@ err4:
3247err3: 3248err3:
3248 dsi_complexio_uninit(); 3249 dsi_complexio_uninit();
3249err2: 3250err2:
3250 dss_select_clk_source(false, false); 3251 dss_select_dispc_clk_source(DSS_SRC_DSS1_ALWON_FCLK);
3252 dss_select_dsi_clk_source(DSS_SRC_DSS1_ALWON_FCLK);
3251err1: 3253err1:
3252 dsi_pll_uninit(); 3254 dsi_pll_uninit();
3253err0: 3255err0:
@@ -3259,7 +3261,8 @@ static void dsi_display_uninit_dsi(struct omap_dss_device *dssdev)
3259 if (dssdev->driver->disable) 3261 if (dssdev->driver->disable)
3260 dssdev->driver->disable(dssdev); 3262 dssdev->driver->disable(dssdev);
3261 3263
3262 dss_select_clk_source(false, false); 3264 dss_select_dispc_clk_source(DSS_SRC_DSS1_ALWON_FCLK);
3265 dss_select_dsi_clk_source(DSS_SRC_DSS1_ALWON_FCLK);
3263 dsi_complexio_uninit(); 3266 dsi_complexio_uninit();
3264 dsi_pll_uninit(); 3267 dsi_pll_uninit();
3265} 3268}
diff --git a/drivers/video/omap2/dss/dss.c b/drivers/video/omap2/dss/dss.c
index 0a26b7d84d41..8254a4232a53 100644
--- a/drivers/video/omap2/dss/dss.c
+++ b/drivers/video/omap2/dss/dss.c
@@ -68,6 +68,9 @@ static struct {
68 struct dss_clock_info cache_dss_cinfo; 68 struct dss_clock_info cache_dss_cinfo;
69 struct dispc_clock_info cache_dispc_cinfo; 69 struct dispc_clock_info cache_dispc_cinfo;
70 70
71 enum dss_clk_source dsi_clk_source;
72 enum dss_clk_source dispc_clk_source;
73
71 u32 ctx[DSS_SZ_REGS / sizeof(u32)]; 74 u32 ctx[DSS_SZ_REGS / sizeof(u32)];
72} dss; 75} dss;
73 76
@@ -247,23 +250,42 @@ void dss_dump_regs(struct seq_file *s)
247#undef DUMPREG 250#undef DUMPREG
248} 251}
249 252
250void dss_select_clk_source(bool dsi, bool dispc) 253void dss_select_dispc_clk_source(enum dss_clk_source clk_src)
254{
255 int b;
256
257 BUG_ON(clk_src != DSS_SRC_DSI1_PLL_FCLK &&
258 clk_src != DSS_SRC_DSS1_ALWON_FCLK);
259
260 b = clk_src == DSS_SRC_DSS1_ALWON_FCLK ? 0 : 1;
261
262 REG_FLD_MOD(DSS_CONTROL, b, 0, 0); /* DISPC_CLK_SWITCH */
263
264 dss.dispc_clk_source = clk_src;
265}
266
267void dss_select_dsi_clk_source(enum dss_clk_source clk_src)
251{ 268{
252 u32 r; 269 int b;
253 r = dss_read_reg(DSS_CONTROL); 270
254 r = FLD_MOD(r, dsi, 1, 1); /* DSI_CLK_SWITCH */ 271 BUG_ON(clk_src != DSS_SRC_DSI2_PLL_FCLK &&
255 r = FLD_MOD(r, dispc, 0, 0); /* DISPC_CLK_SWITCH */ 272 clk_src != DSS_SRC_DSS1_ALWON_FCLK);
256 dss_write_reg(DSS_CONTROL, r); 273
274 b = clk_src == DSS_SRC_DSS1_ALWON_FCLK ? 0 : 1;
275
276 REG_FLD_MOD(DSS_CONTROL, b, 1, 1); /* DSI_CLK_SWITCH */
277
278 dss.dsi_clk_source = clk_src;
257} 279}
258 280
259int dss_get_dsi_clk_source(void) 281enum dss_clk_source dss_get_dispc_clk_source(void)
260{ 282{
261 return FLD_GET(dss_read_reg(DSS_CONTROL), 1, 1); 283 return dss.dispc_clk_source;
262} 284}
263 285
264int dss_get_dispc_clk_source(void) 286enum dss_clk_source dss_get_dsi_clk_source(void)
265{ 287{
266 return FLD_GET(dss_read_reg(DSS_CONTROL), 0, 0); 288 return dss.dsi_clk_source;
267} 289}
268 290
269/* calculate clock rates using dividers in cinfo */ 291/* calculate clock rates using dividers in cinfo */
diff --git a/drivers/video/omap2/dss/dss.h b/drivers/video/omap2/dss/dss.h
index 41145af36353..3713dc698259 100644
--- a/drivers/video/omap2/dss/dss.h
+++ b/drivers/video/omap2/dss/dss.h
@@ -119,6 +119,12 @@ enum dss_clock {
119 DSS_CLK_96M = 1 << 4, 119 DSS_CLK_96M = 1 << 4,
120}; 120};
121 121
122enum dss_clk_source {
123 DSS_SRC_DSI1_PLL_FCLK,
124 DSS_SRC_DSI2_PLL_FCLK,
125 DSS_SRC_DSS1_ALWON_FCLK,
126};
127
122struct dss_clock_info { 128struct dss_clock_info {
123 /* rates that we get with dividers below */ 129 /* rates that we get with dividers below */
124 unsigned long fck; 130 unsigned long fck;
@@ -219,9 +225,11 @@ void dss_sdi_init(u8 datapairs);
219int dss_sdi_enable(void); 225int dss_sdi_enable(void);
220void dss_sdi_disable(void); 226void dss_sdi_disable(void);
221 227
222void dss_select_clk_source(bool dsi, bool dispc); 228void dss_select_dispc_clk_source(enum dss_clk_source clk_src);
223int dss_get_dsi_clk_source(void); 229void dss_select_dsi_clk_source(enum dss_clk_source clk_src);
224int dss_get_dispc_clk_source(void); 230enum dss_clk_source dss_get_dispc_clk_source(void);
231enum dss_clk_source dss_get_dsi_clk_source(void);
232
225void dss_set_venc_output(enum omap_dss_venc_type type); 233void dss_set_venc_output(enum omap_dss_venc_type type);
226void dss_set_dac_pwrdn_bgz(bool enable); 234void dss_set_dac_pwrdn_bgz(bool enable);
227 235