diff options
Diffstat (limited to 'drivers/video/omap2/dss/dss.c')
-rw-r--r-- | drivers/video/omap2/dss/dss.c | 42 |
1 files changed, 32 insertions, 10 deletions
diff --git a/drivers/video/omap2/dss/dss.c b/drivers/video/omap2/dss/dss.c index 0a26b7d84d41..8254a4232a53 100644 --- a/drivers/video/omap2/dss/dss.c +++ b/drivers/video/omap2/dss/dss.c | |||
@@ -68,6 +68,9 @@ static struct { | |||
68 | struct dss_clock_info cache_dss_cinfo; | 68 | struct dss_clock_info cache_dss_cinfo; |
69 | struct dispc_clock_info cache_dispc_cinfo; | 69 | struct dispc_clock_info cache_dispc_cinfo; |
70 | 70 | ||
71 | enum dss_clk_source dsi_clk_source; | ||
72 | enum dss_clk_source dispc_clk_source; | ||
73 | |||
71 | u32 ctx[DSS_SZ_REGS / sizeof(u32)]; | 74 | u32 ctx[DSS_SZ_REGS / sizeof(u32)]; |
72 | } dss; | 75 | } dss; |
73 | 76 | ||
@@ -247,23 +250,42 @@ void dss_dump_regs(struct seq_file *s) | |||
247 | #undef DUMPREG | 250 | #undef DUMPREG |
248 | } | 251 | } |
249 | 252 | ||
250 | void dss_select_clk_source(bool dsi, bool dispc) | 253 | void dss_select_dispc_clk_source(enum dss_clk_source clk_src) |
254 | { | ||
255 | int b; | ||
256 | |||
257 | BUG_ON(clk_src != DSS_SRC_DSI1_PLL_FCLK && | ||
258 | clk_src != DSS_SRC_DSS1_ALWON_FCLK); | ||
259 | |||
260 | b = clk_src == DSS_SRC_DSS1_ALWON_FCLK ? 0 : 1; | ||
261 | |||
262 | REG_FLD_MOD(DSS_CONTROL, b, 0, 0); /* DISPC_CLK_SWITCH */ | ||
263 | |||
264 | dss.dispc_clk_source = clk_src; | ||
265 | } | ||
266 | |||
267 | void dss_select_dsi_clk_source(enum dss_clk_source clk_src) | ||
251 | { | 268 | { |
252 | u32 r; | 269 | int b; |
253 | r = dss_read_reg(DSS_CONTROL); | 270 | |
254 | r = FLD_MOD(r, dsi, 1, 1); /* DSI_CLK_SWITCH */ | 271 | BUG_ON(clk_src != DSS_SRC_DSI2_PLL_FCLK && |
255 | r = FLD_MOD(r, dispc, 0, 0); /* DISPC_CLK_SWITCH */ | 272 | clk_src != DSS_SRC_DSS1_ALWON_FCLK); |
256 | dss_write_reg(DSS_CONTROL, r); | 273 | |
274 | b = clk_src == DSS_SRC_DSS1_ALWON_FCLK ? 0 : 1; | ||
275 | |||
276 | REG_FLD_MOD(DSS_CONTROL, b, 1, 1); /* DSI_CLK_SWITCH */ | ||
277 | |||
278 | dss.dsi_clk_source = clk_src; | ||
257 | } | 279 | } |
258 | 280 | ||
259 | int dss_get_dsi_clk_source(void) | 281 | enum dss_clk_source dss_get_dispc_clk_source(void) |
260 | { | 282 | { |
261 | return FLD_GET(dss_read_reg(DSS_CONTROL), 1, 1); | 283 | return dss.dispc_clk_source; |
262 | } | 284 | } |
263 | 285 | ||
264 | int dss_get_dispc_clk_source(void) | 286 | enum dss_clk_source dss_get_dsi_clk_source(void) |
265 | { | 287 | { |
266 | return FLD_GET(dss_read_reg(DSS_CONTROL), 0, 0); | 288 | return dss.dsi_clk_source; |
267 | } | 289 | } |
268 | 290 | ||
269 | /* calculate clock rates using dividers in cinfo */ | 291 | /* calculate clock rates using dividers in cinfo */ |