diff options
Diffstat (limited to 'arch/arm/mach-s3c2410')
-rw-r--r-- | arch/arm/mach-s3c2410/mach-bast.c | 22 | ||||
-rw-r--r-- | arch/arm/mach-s3c2410/mach-vr1000.c | 24 | ||||
-rw-r--r-- | arch/arm/mach-s3c2410/s3c2410.c | 6 |
3 files changed, 6 insertions, 46 deletions
diff --git a/arch/arm/mach-s3c2410/mach-bast.c b/arch/arm/mach-s3c2410/mach-bast.c index a20ae1ad4062..71b955877793 100644 --- a/arch/arm/mach-s3c2410/mach-bast.c +++ b/arch/arm/mach-s3c2410/mach-bast.c | |||
@@ -164,22 +164,6 @@ static struct map_desc bast_iodesc[] __initdata = { | |||
164 | #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB | 164 | #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB |
165 | #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE | 165 | #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE |
166 | 166 | ||
167 | static struct s3c24xx_uart_clksrc bast_serial_clocks[] = { | ||
168 | [0] = { | ||
169 | .name = "uclk", | ||
170 | .divisor = 1, | ||
171 | .min_baud = 0, | ||
172 | .max_baud = 0, | ||
173 | }, | ||
174 | [1] = { | ||
175 | .name = "pclk", | ||
176 | .divisor = 1, | ||
177 | .min_baud = 0, | ||
178 | .max_baud = 0, | ||
179 | } | ||
180 | }; | ||
181 | |||
182 | |||
183 | static struct s3c2410_uartcfg bast_uartcfgs[] __initdata = { | 167 | static struct s3c2410_uartcfg bast_uartcfgs[] __initdata = { |
184 | [0] = { | 168 | [0] = { |
185 | .hwport = 0, | 169 | .hwport = 0, |
@@ -187,8 +171,6 @@ static struct s3c2410_uartcfg bast_uartcfgs[] __initdata = { | |||
187 | .ucon = UCON, | 171 | .ucon = UCON, |
188 | .ulcon = ULCON, | 172 | .ulcon = ULCON, |
189 | .ufcon = UFCON, | 173 | .ufcon = UFCON, |
190 | .clocks = bast_serial_clocks, | ||
191 | .clocks_size = ARRAY_SIZE(bast_serial_clocks), | ||
192 | }, | 174 | }, |
193 | [1] = { | 175 | [1] = { |
194 | .hwport = 1, | 176 | .hwport = 1, |
@@ -196,8 +178,6 @@ static struct s3c2410_uartcfg bast_uartcfgs[] __initdata = { | |||
196 | .ucon = UCON, | 178 | .ucon = UCON, |
197 | .ulcon = ULCON, | 179 | .ulcon = ULCON, |
198 | .ufcon = UFCON, | 180 | .ufcon = UFCON, |
199 | .clocks = bast_serial_clocks, | ||
200 | .clocks_size = ARRAY_SIZE(bast_serial_clocks), | ||
201 | }, | 181 | }, |
202 | /* port 2 is not actually used */ | 182 | /* port 2 is not actually used */ |
203 | [2] = { | 183 | [2] = { |
@@ -206,8 +186,6 @@ static struct s3c2410_uartcfg bast_uartcfgs[] __initdata = { | |||
206 | .ucon = UCON, | 186 | .ucon = UCON, |
207 | .ulcon = ULCON, | 187 | .ulcon = ULCON, |
208 | .ufcon = UFCON, | 188 | .ufcon = UFCON, |
209 | .clocks = bast_serial_clocks, | ||
210 | .clocks_size = ARRAY_SIZE(bast_serial_clocks), | ||
211 | } | 189 | } |
212 | }; | 190 | }; |
213 | 191 | ||
diff --git a/arch/arm/mach-s3c2410/mach-vr1000.c b/arch/arm/mach-s3c2410/mach-vr1000.c index df47e8e90065..0f0a9a1795e9 100644 --- a/arch/arm/mach-s3c2410/mach-vr1000.c +++ b/arch/arm/mach-s3c2410/mach-vr1000.c | |||
@@ -109,23 +109,6 @@ static struct map_desc vr1000_iodesc[] __initdata = { | |||
109 | #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB | 109 | #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB |
110 | #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE | 110 | #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE |
111 | 111 | ||
112 | /* uart clock source(s) */ | ||
113 | |||
114 | static struct s3c24xx_uart_clksrc vr1000_serial_clocks[] = { | ||
115 | [0] = { | ||
116 | .name = "uclk", | ||
117 | .divisor = 1, | ||
118 | .min_baud = 0, | ||
119 | .max_baud = 0, | ||
120 | }, | ||
121 | [1] = { | ||
122 | .name = "pclk", | ||
123 | .divisor = 1, | ||
124 | .min_baud = 0, | ||
125 | .max_baud = 0. | ||
126 | } | ||
127 | }; | ||
128 | |||
129 | static struct s3c2410_uartcfg vr1000_uartcfgs[] __initdata = { | 112 | static struct s3c2410_uartcfg vr1000_uartcfgs[] __initdata = { |
130 | [0] = { | 113 | [0] = { |
131 | .hwport = 0, | 114 | .hwport = 0, |
@@ -133,8 +116,6 @@ static struct s3c2410_uartcfg vr1000_uartcfgs[] __initdata = { | |||
133 | .ucon = UCON, | 116 | .ucon = UCON, |
134 | .ulcon = ULCON, | 117 | .ulcon = ULCON, |
135 | .ufcon = UFCON, | 118 | .ufcon = UFCON, |
136 | .clocks = vr1000_serial_clocks, | ||
137 | .clocks_size = ARRAY_SIZE(vr1000_serial_clocks), | ||
138 | }, | 119 | }, |
139 | [1] = { | 120 | [1] = { |
140 | .hwport = 1, | 121 | .hwport = 1, |
@@ -142,8 +123,6 @@ static struct s3c2410_uartcfg vr1000_uartcfgs[] __initdata = { | |||
142 | .ucon = UCON, | 123 | .ucon = UCON, |
143 | .ulcon = ULCON, | 124 | .ulcon = ULCON, |
144 | .ufcon = UFCON, | 125 | .ufcon = UFCON, |
145 | .clocks = vr1000_serial_clocks, | ||
146 | .clocks_size = ARRAY_SIZE(vr1000_serial_clocks), | ||
147 | }, | 126 | }, |
148 | /* port 2 is not actually used */ | 127 | /* port 2 is not actually used */ |
149 | [2] = { | 128 | [2] = { |
@@ -152,9 +131,6 @@ static struct s3c2410_uartcfg vr1000_uartcfgs[] __initdata = { | |||
152 | .ucon = UCON, | 131 | .ucon = UCON, |
153 | .ulcon = ULCON, | 132 | .ulcon = ULCON, |
154 | .ufcon = UFCON, | 133 | .ufcon = UFCON, |
155 | .clocks = vr1000_serial_clocks, | ||
156 | .clocks_size = ARRAY_SIZE(vr1000_serial_clocks), | ||
157 | |||
158 | } | 134 | } |
159 | }; | 135 | }; |
160 | 136 | ||
diff --git a/arch/arm/mach-s3c2410/s3c2410.c b/arch/arm/mach-s3c2410/s3c2410.c index 3d7ebc557a72..af74927bca14 100644 --- a/arch/arm/mach-s3c2410/s3c2410.c +++ b/arch/arm/mach-s3c2410/s3c2410.c | |||
@@ -123,12 +123,18 @@ static struct clk s3c2410_armclk = { | |||
123 | .id = -1, | 123 | .id = -1, |
124 | }; | 124 | }; |
125 | 125 | ||
126 | static struct clk_lookup s3c2410_clk_lookup[] = { | ||
127 | CLKDEV_INIT(NULL, "clk_uart_baud0", &clk_p), | ||
128 | CLKDEV_INIT(NULL, "clk_uart_baud1", &s3c24xx_uclk), | ||
129 | }; | ||
130 | |||
126 | void __init s3c2410_init_clocks(int xtal) | 131 | void __init s3c2410_init_clocks(int xtal) |
127 | { | 132 | { |
128 | s3c24xx_register_baseclocks(xtal); | 133 | s3c24xx_register_baseclocks(xtal); |
129 | s3c2410_setup_clocks(); | 134 | s3c2410_setup_clocks(); |
130 | s3c2410_baseclk_add(); | 135 | s3c2410_baseclk_add(); |
131 | s3c24xx_register_clock(&s3c2410_armclk); | 136 | s3c24xx_register_clock(&s3c2410_armclk); |
137 | clkdev_add_table(s3c2410_clk_lookup, ARRAY_SIZE(s3c2410_clk_lookup)); | ||
132 | } | 138 | } |
133 | 139 | ||
134 | struct sysdev_class s3c2410_sysclass = { | 140 | struct sysdev_class s3c2410_sysclass = { |