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authorMike Frysinger <vapier@gentoo.org>2011-05-23 08:17:09 -0400
committerDavid S. Miller <davem@davemloft.net>2011-05-24 01:13:11 -0400
commit229de618ba6ff36e382b908b7637fe56c25ae9f1 (patch)
treeb9896ce90de6c2138dc9d8966507454d614c456d /drivers/net/irda/bfin_sir.h
parent6ac3f6649223d916bbdf1e823926f8f3b34b5d99 (diff)
net/irda: convert bfin_sir to common Blackfin UART header
No need to duplicate these defines now that the common Blackfin code has unified these for all UART devices. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Cc: Samuel Ortiz <samuel@sortiz.org> Cc: David Miller <davem@davemloft.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/irda/bfin_sir.h')
-rw-r--r--drivers/net/irda/bfin_sir.h63
1 files changed, 4 insertions, 59 deletions
diff --git a/drivers/net/irda/bfin_sir.h b/drivers/net/irda/bfin_sir.h
index e3b285a67734..29cbde8501ed 100644
--- a/drivers/net/irda/bfin_sir.h
+++ b/drivers/net/irda/bfin_sir.h
@@ -26,7 +26,6 @@
26#include <asm/cacheflush.h> 26#include <asm/cacheflush.h>
27#include <asm/dma.h> 27#include <asm/dma.h>
28#include <asm/portmux.h> 28#include <asm/portmux.h>
29#include <mach/bfin_serial_5xx.h>
30#undef DRIVER_NAME 29#undef DRIVER_NAME
31 30
32#ifdef CONFIG_SIR_BFIN_DMA 31#ifdef CONFIG_SIR_BFIN_DMA
@@ -83,64 +82,10 @@ struct bfin_sir_self {
83 82
84#define DRIVER_NAME "bfin_sir" 83#define DRIVER_NAME "bfin_sir"
85 84
86#define SIR_UART_GET_CHAR(port) bfin_read16((port)->membase + OFFSET_RBR) 85#define port_membase(port) (((struct bfin_sir_port *)(port))->membase)
87#define SIR_UART_GET_DLL(port) bfin_read16((port)->membase + OFFSET_DLL) 86#define get_lsr_cache(port) (((struct bfin_sir_port *)(port))->lsr)
88#define SIR_UART_GET_DLH(port) bfin_read16((port)->membase + OFFSET_DLH) 87#define put_lsr_cache(port, v) (((struct bfin_sir_port *)(port))->lsr = (v))
89#define SIR_UART_GET_LCR(port) bfin_read16((port)->membase + OFFSET_LCR) 88#include <asm/bfin_serial.h>
90#define SIR_UART_GET_GCTL(port) bfin_read16((port)->membase + OFFSET_GCTL)
91
92#define SIR_UART_PUT_CHAR(port, v) bfin_write16(((port)->membase + OFFSET_THR), v)
93#define SIR_UART_PUT_DLL(port, v) bfin_write16(((port)->membase + OFFSET_DLL), v)
94#define SIR_UART_PUT_DLH(port, v) bfin_write16(((port)->membase + OFFSET_DLH), v)
95#define SIR_UART_PUT_LCR(port, v) bfin_write16(((port)->membase + OFFSET_LCR), v)
96#define SIR_UART_PUT_GCTL(port, v) bfin_write16(((port)->membase + OFFSET_GCTL), v)
97
98#ifdef CONFIG_BF54x
99#define SIR_UART_GET_LSR(port) bfin_read16((port)->membase + OFFSET_LSR)
100#define SIR_UART_GET_IER(port) bfin_read16((port)->membase + OFFSET_IER_SET)
101#define SIR_UART_SET_IER(port, v) bfin_write16(((port)->membase + OFFSET_IER_SET), v)
102#define SIR_UART_CLEAR_IER(port, v) bfin_write16(((port)->membase + OFFSET_IER_CLEAR), v)
103#define SIR_UART_PUT_LSR(port, v) bfin_write16(((port)->membase + OFFSET_LSR), v)
104#define SIR_UART_CLEAR_LSR(port) bfin_write16(((port)->membase + OFFSET_LSR), -1)
105
106#define SIR_UART_SET_DLAB(port)
107#define SIR_UART_CLEAR_DLAB(port)
108
109#define SIR_UART_ENABLE_INTS(port, v) SIR_UART_SET_IER(port, v)
110#define SIR_UART_DISABLE_INTS(port) SIR_UART_CLEAR_IER(port, 0xF)
111#define SIR_UART_STOP_TX(port) do { SIR_UART_PUT_LSR(port, TFI); SIR_UART_CLEAR_IER(port, ETBEI); } while (0)
112#define SIR_UART_ENABLE_TX(port) do { SIR_UART_SET_IER(port, ETBEI); } while (0)
113#define SIR_UART_STOP_RX(port) do { SIR_UART_CLEAR_IER(port, ERBFI); } while (0)
114#define SIR_UART_ENABLE_RX(port) do { SIR_UART_SET_IER(port, ERBFI); } while (0)
115#else
116
117#define SIR_UART_GET_IIR(port) bfin_read16((port)->membase + OFFSET_IIR)
118#define SIR_UART_GET_IER(port) bfin_read16((port)->membase + OFFSET_IER)
119#define SIR_UART_PUT_IER(port, v) bfin_write16(((port)->membase + OFFSET_IER), v)
120
121#define SIR_UART_SET_DLAB(port) do { SIR_UART_PUT_LCR(port, SIR_UART_GET_LCR(port) | DLAB); } while (0)
122#define SIR_UART_CLEAR_DLAB(port) do { SIR_UART_PUT_LCR(port, SIR_UART_GET_LCR(port) & ~DLAB); } while (0)
123
124#define SIR_UART_ENABLE_INTS(port, v) SIR_UART_PUT_IER(port, v)
125#define SIR_UART_DISABLE_INTS(port) SIR_UART_PUT_IER(port, 0)
126#define SIR_UART_STOP_TX(port) do { SIR_UART_PUT_IER(port, SIR_UART_GET_IER(port) & ~ETBEI); } while (0)
127#define SIR_UART_ENABLE_TX(port) do { SIR_UART_PUT_IER(port, SIR_UART_GET_IER(port) | ETBEI); } while (0)
128#define SIR_UART_STOP_RX(port) do { SIR_UART_PUT_IER(port, SIR_UART_GET_IER(port) & ~ERBFI); } while (0)
129#define SIR_UART_ENABLE_RX(port) do { SIR_UART_PUT_IER(port, SIR_UART_GET_IER(port) | ERBFI); } while (0)
130
131static inline unsigned int SIR_UART_GET_LSR(struct bfin_sir_port *port)
132{
133 unsigned int lsr = bfin_read16(port->membase + OFFSET_LSR);
134 port->lsr |= (lsr & (BI|FE|PE|OE));
135 return lsr | port->lsr;
136}
137
138static inline void SIR_UART_CLEAR_LSR(struct bfin_sir_port *port)
139{
140 port->lsr = 0;
141 bfin_read16(port->membase + OFFSET_LSR);
142}
143#endif
144 89
145static const unsigned short per[][4] = { 90static const unsigned short per[][4] = {
146 /* rx pin tx pin NULL uart_number */ 91 /* rx pin tx pin NULL uart_number */