diff options
author | Alex Deucher <alexdeucher@gmail.com> | 2009-12-23 03:23:21 -0500 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2010-02-08 18:31:10 -0500 |
commit | 40bacf1631a3e8654b1128aa9b72e73ca801c9e4 (patch) | |
tree | 9d4dc63b4dfb124203335dd4e541c657417960ce /drivers/gpu/drm/radeon/radeon_reg.h | |
parent | 5a6f98f5bff7f975c61d56b5c756b5a96c4db167 (diff) |
drm/radeon/kms: add support for hw i2c on r1xx-r5xx
wire hw i2c support into radeon i2c algo.
fixes merged:
- handle bus probing correctly
- use meaningful error numbers
- abort if transaction fails
- The line mapping is different depending on the asic.
- protect hw i2c engine with a mutex
- rs300 doesn't have a pin select bit
- r200 has a different pin select setup
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_reg.h')
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_reg.h | 48 |
1 files changed, 27 insertions, 21 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_reg.h b/drivers/gpu/drm/radeon/radeon_reg.h index 6d0a009dd4a1..b4a06676fff6 100644 --- a/drivers/gpu/drm/radeon/radeon_reg.h +++ b/drivers/gpu/drm/radeon/radeon_reg.h | |||
@@ -1060,32 +1060,38 @@ | |||
1060 | 1060 | ||
1061 | /* Multimedia I2C bus */ | 1061 | /* Multimedia I2C bus */ |
1062 | #define RADEON_I2C_CNTL_0 0x0090 | 1062 | #define RADEON_I2C_CNTL_0 0x0090 |
1063 | #define RADEON_I2C_DONE (1 << 0) | 1063 | # define RADEON_I2C_DONE (1 << 0) |
1064 | #define RADEON_I2C_NACK (1 << 1) | 1064 | # define RADEON_I2C_NACK (1 << 1) |
1065 | #define RADEON_I2C_HALT (1 << 2) | 1065 | # define RADEON_I2C_HALT (1 << 2) |
1066 | #define RADEON_I2C_SOFT_RST (1 << 5) | 1066 | # define RADEON_I2C_SOFT_RST (1 << 5) |
1067 | #define RADEON_I2C_DRIVE_EN (1 << 6) | 1067 | # define RADEON_I2C_DRIVE_EN (1 << 6) |
1068 | #define RADEON_I2C_DRIVE_SEL (1 << 7) | 1068 | # define RADEON_I2C_DRIVE_SEL (1 << 7) |
1069 | #define RADEON_I2C_START (1 << 8) | 1069 | # define RADEON_I2C_START (1 << 8) |
1070 | #define RADEON_I2C_STOP (1 << 9) | 1070 | # define RADEON_I2C_STOP (1 << 9) |
1071 | #define RADEON_I2C_RECEIVE (1 << 10) | 1071 | # define RADEON_I2C_RECEIVE (1 << 10) |
1072 | #define RADEON_I2C_ABORT (1 << 11) | 1072 | # define RADEON_I2C_ABORT (1 << 11) |
1073 | #define RADEON_I2C_GO (1 << 12) | 1073 | # define RADEON_I2C_GO (1 << 12) |
1074 | #define RADEON_I2C_PRESCALE_SHIFT 16 | 1074 | # define RADEON_I2C_PRESCALE_SHIFT 16 |
1075 | #define RADEON_I2C_CNTL_1 0x0094 | 1075 | #define RADEON_I2C_CNTL_1 0x0094 |
1076 | #define RADEON_I2C_DATA_COUNT_SHIFT 0 | 1076 | # define RADEON_I2C_DATA_COUNT_SHIFT 0 |
1077 | #define RADEON_I2C_ADDR_COUNT_SHIFT 4 | 1077 | # define RADEON_I2C_ADDR_COUNT_SHIFT 4 |
1078 | #define RADEON_I2C_INTRA_BYTE_DELAY_SHIFT 8 | 1078 | # define RADEON_I2C_INTRA_BYTE_DELAY_SHIFT 8 |
1079 | #define RADEON_I2C_SEL (1 << 16) | 1079 | # define RADEON_I2C_SEL (1 << 16) |
1080 | #define RADEON_I2C_EN (1 << 17) | 1080 | # define RADEON_I2C_EN (1 << 17) |
1081 | #define RADEON_I2C_TIME_LIMIT_SHIFT 24 | 1081 | # define RADEON_I2C_TIME_LIMIT_SHIFT 24 |
1082 | #define RADEON_I2C_DATA 0x0098 | 1082 | #define RADEON_I2C_DATA 0x0098 |
1083 | 1083 | ||
1084 | #define RADEON_DVI_I2C_CNTL_0 0x02e0 | 1084 | #define RADEON_DVI_I2C_CNTL_0 0x02e0 |
1085 | # define R200_DVI_I2C_PIN_SEL(x) ((x) << 3) | 1085 | # define R200_DVI_I2C_PIN_SEL(x) ((x) << 3) |
1086 | # define R200_SEL_DDC1 0 /* 0x60 - VGA_DDC */ | 1086 | # define R200_SEL_DDC1 0 /* depends on asic */ |
1087 | # define R200_SEL_DDC2 1 /* 0x64 - DVI_DDC */ | 1087 | # define R200_SEL_DDC2 1 /* depends on asic */ |
1088 | # define R200_SEL_DDC3 2 /* 0x68 - MONID_DDC */ | 1088 | # define R200_SEL_DDC3 2 /* depends on asic */ |
1089 | # define RADEON_SW_WANTS_TO_USE_DVI_I2C (1 << 13) | ||
1090 | # define RADEON_SW_CAN_USE_DVI_I2C (1 << 13) | ||
1091 | # define RADEON_SW_DONE_USING_DVI_I2C (1 << 14) | ||
1092 | # define RADEON_HW_NEEDS_DVI_I2C (1 << 14) | ||
1093 | # define RADEON_ABORT_HW_DVI_I2C (1 << 15) | ||
1094 | # define RADEON_HW_USING_DVI_I2C (1 << 15) | ||
1089 | #define RADEON_DVI_I2C_CNTL_1 0x02e4 | 1095 | #define RADEON_DVI_I2C_CNTL_1 0x02e4 |
1090 | #define RADEON_DVI_I2C_DATA 0x02e8 | 1096 | #define RADEON_DVI_I2C_DATA 0x02e8 |
1091 | 1097 | ||