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authorKuninori Morimoto <kuninori.morimoto.gx@renesas.com>2013-03-21 06:02:38 -0400
committerSimon Horman <horms+renesas@verge.net.au>2013-04-01 21:58:24 -0400
commitdb331fc8fc715fa6af05bf5e9d428be2ec306475 (patch)
treece9e8b2221d7237ca0d92ad7da8762e9844c9daf /arch
parentccb7cc749f78166178184f77dd95ea24db9d5bb0 (diff)
ARM: shmobile: r8a7778 SCIF support
Add SCIF serial port support to the r8a7778 SoC by adding platform devices together with clock bindings. DT device description is excluded at this point since such bindings are still under development. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-shmobile/clock-r8a7778.c13
-rw-r--r--arch/arm/mach-shmobile/setup-r8a7778.c26
2 files changed, 39 insertions, 0 deletions
diff --git a/arch/arm/mach-shmobile/clock-r8a7778.c b/arch/arm/mach-shmobile/clock-r8a7778.c
index 387e3b74cc8c..f1277f45381e 100644
--- a/arch/arm/mach-shmobile/clock-r8a7778.c
+++ b/arch/arm/mach-shmobile/clock-r8a7778.c
@@ -58,16 +58,29 @@ static struct clk *main_clks[] = {
58}; 58};
59 59
60enum { 60enum {
61 MSTP026, MSTP025, MSTP024, MSTP023, MSTP022, MSTP021,
61 MSTP016, MSTP015, 62 MSTP016, MSTP015,
62 MSTP_NR }; 63 MSTP_NR };
63 64
64static struct clk mstp_clks[MSTP_NR] = { 65static struct clk mstp_clks[MSTP_NR] = {
66 [MSTP026] = SH_CLK_MSTP32(&clkp, MSTPCR0, 26, 0), /* SCIF0 */
67 [MSTP025] = SH_CLK_MSTP32(&clkp, MSTPCR0, 25, 0), /* SCIF1 */
68 [MSTP024] = SH_CLK_MSTP32(&clkp, MSTPCR0, 24, 0), /* SCIF2 */
69 [MSTP023] = SH_CLK_MSTP32(&clkp, MSTPCR0, 23, 0), /* SCIF3 */
70 [MSTP022] = SH_CLK_MSTP32(&clkp, MSTPCR0, 22, 0), /* SCIF4 */
71 [MSTP021] = SH_CLK_MSTP32(&clkp, MSTPCR0, 21, 0), /* SCIF5 */
65 [MSTP016] = SH_CLK_MSTP32(&clkp, MSTPCR0, 16, 0), /* TMU0 */ 72 [MSTP016] = SH_CLK_MSTP32(&clkp, MSTPCR0, 16, 0), /* TMU0 */
66 [MSTP015] = SH_CLK_MSTP32(&clkp, MSTPCR0, 15, 0), /* TMU1 */ 73 [MSTP015] = SH_CLK_MSTP32(&clkp, MSTPCR0, 15, 0), /* TMU1 */
67}; 74};
68 75
69static struct clk_lookup lookups[] = { 76static struct clk_lookup lookups[] = {
70 /* MSTP32 clocks */ 77 /* MSTP32 clocks */
78 CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP026]), /* SCIF0 */
79 CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP025]), /* SCIF1 */
80 CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP024]), /* SCIF2 */
81 CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[MSTP023]), /* SCIF3 */
82 CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP022]), /* SCIF4 */
83 CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP021]), /* SCIF6 */
71 CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP016]), /* TMU00 */ 84 CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP016]), /* TMU00 */
72 CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP015]), /* TMU01 */ 85 CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP015]), /* TMU01 */
73}; 86};
diff --git a/arch/arm/mach-shmobile/setup-r8a7778.c b/arch/arm/mach-shmobile/setup-r8a7778.c
index 811ccf3c77a4..01c62bedf9cf 100644
--- a/arch/arm/mach-shmobile/setup-r8a7778.c
+++ b/arch/arm/mach-shmobile/setup-r8a7778.c
@@ -25,6 +25,7 @@
25#include <linux/of_platform.h> 25#include <linux/of_platform.h>
26#include <linux/platform_device.h> 26#include <linux/platform_device.h>
27#include <linux/irqchip.h> 27#include <linux/irqchip.h>
28#include <linux/serial_sci.h>
28#include <linux/sh_timer.h> 29#include <linux/sh_timer.h>
29#include <mach/irqs.h> 30#include <mach/irqs.h>
30#include <mach/r8a7778.h> 31#include <mach/r8a7778.h>
@@ -32,6 +33,26 @@
32#include <asm/mach/arch.h> 33#include <asm/mach/arch.h>
33#include <asm/hardware/cache-l2x0.h> 34#include <asm/hardware/cache-l2x0.h>
34 35
36/* SCIF */
37#define SCIF_INFO(baseaddr, irq) \
38{ \
39 .mapbase = baseaddr, \
40 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \
41 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, \
42 .scbrr_algo_id = SCBRR_ALGO_2, \
43 .type = PORT_SCIF, \
44 .irqs = SCIx_IRQ_MUXED(irq), \
45}
46
47static struct plat_sci_port scif_platform_data[] = {
48 SCIF_INFO(0xffe40000, gic_iid(0x66)),
49 SCIF_INFO(0xffe41000, gic_iid(0x67)),
50 SCIF_INFO(0xffe42000, gic_iid(0x68)),
51 SCIF_INFO(0xffe43000, gic_iid(0x69)),
52 SCIF_INFO(0xffe44000, gic_iid(0x6a)),
53 SCIF_INFO(0xffe45000, gic_iid(0x6b)),
54};
55
35/* TMU */ 56/* TMU */
36static struct resource sh_tmu0_resources[] = { 57static struct resource sh_tmu0_resources[] = {
37 DEFINE_RES_MEM(0xffd80008, 12), 58 DEFINE_RES_MEM(0xffd80008, 12),
@@ -88,6 +109,11 @@ void __init r8a7778_add_standard_devices(void)
88 } 109 }
89#endif 110#endif
90 111
112 for (i = 0; i < ARRAY_SIZE(scif_platform_data); i++)
113 platform_device_register_data(&platform_bus, "sh-sci", i,
114 &scif_platform_data[i],
115 sizeof(struct plat_sci_port));
116
91 for (i = 0; i < ARRAY_SIZE(platform_devinfo); i++) 117 for (i = 0; i < ARRAY_SIZE(platform_devinfo); i++)
92 platform_device_register_full(&platform_devinfo[i]); 118 platform_device_register_full(&platform_devinfo[i]);
93} 119}