diff options
author | Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> | 2013-03-21 06:01:36 -0400 |
---|---|---|
committer | Simon Horman <horms+renesas@verge.net.au> | 2013-04-01 21:58:23 -0400 |
commit | ccb7cc749f78166178184f77dd95ea24db9d5bb0 (patch) | |
tree | 65a0e92f478c3981f521b758b0b1aece96c3d854 /arch | |
parent | 7653c318b73d8553d4c13bb7e371878ddc19f80d (diff) |
ARM: shmobile: add R8A7778 basis support
Add initial support for the R8A7778 R-Car M1A SoC.
No static virtual mappings are used, all the components
make use of ioremap().
DT_MACHINE_START is still wrapped
in CONFIG_USE_OF to match other mach-shmobile code.
It is based on v1.0 datasheet
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/boot/dts/r8a7778.dtsi | 35 | ||||
-rw-r--r-- | arch/arm/mach-shmobile/Kconfig | 6 | ||||
-rw-r--r-- | arch/arm/mach-shmobile/Makefile | 1 | ||||
-rw-r--r-- | arch/arm/mach-shmobile/clock-r8a7778.c | 91 | ||||
-rw-r--r-- | arch/arm/mach-shmobile/include/mach/r8a7778.h | 28 | ||||
-rw-r--r-- | arch/arm/mach-shmobile/setup-r8a7778.c | 167 |
6 files changed, 328 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r8a7778.dtsi b/arch/arm/boot/dts/r8a7778.dtsi new file mode 100644 index 000000000000..474373559bdc --- /dev/null +++ b/arch/arm/boot/dts/r8a7778.dtsi | |||
@@ -0,0 +1,35 @@ | |||
1 | /* | ||
2 | * Device Tree Source for Renesas r8a7778 | ||
3 | * | ||
4 | * Copyright (C) 2013 Renesas Solutions Corp. | ||
5 | * Copyright (C) 2013 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> | ||
6 | * | ||
7 | * based on r8a7779 | ||
8 | * | ||
9 | * Copyright (C) 2013 Renesas Solutions Corp. | ||
10 | * Copyright (C) 2013 Simon Horman | ||
11 | * | ||
12 | * This file is licensed under the terms of the GNU General Public License | ||
13 | * version 2. This program is licensed "as is" without any warranty of any | ||
14 | * kind, whether express or implied. | ||
15 | */ | ||
16 | |||
17 | /include/ "skeleton.dtsi" | ||
18 | |||
19 | / { | ||
20 | compatible = "renesas,r8a7778"; | ||
21 | |||
22 | cpus { | ||
23 | cpu@0 { | ||
24 | compatible = "arm,cortex-a9"; | ||
25 | }; | ||
26 | }; | ||
27 | |||
28 | gic: interrupt-controller@fe438000 { | ||
29 | compatible = "arm,cortex-a9-gic"; | ||
30 | #interrupt-cells = <3>; | ||
31 | interrupt-controller; | ||
32 | reg = <0xfe438000 0x1000>, | ||
33 | <0xfe430000 0x100>; | ||
34 | }; | ||
35 | }; | ||
diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig index 0e4a820bcbe8..49cba4a511df 100644 --- a/arch/arm/mach-shmobile/Kconfig +++ b/arch/arm/mach-shmobile/Kconfig | |||
@@ -33,6 +33,12 @@ config ARCH_R8A7740 | |||
33 | select CPU_V7 | 33 | select CPU_V7 |
34 | select SH_CLK_CPG | 34 | select SH_CLK_CPG |
35 | 35 | ||
36 | config ARCH_R8A7778 | ||
37 | bool "R-Car M1 (R8A77780)" | ||
38 | select CPU_V7 | ||
39 | select SH_CLK_CPG | ||
40 | select ARM_GIC | ||
41 | |||
36 | config ARCH_R8A7779 | 42 | config ARCH_R8A7779 |
37 | bool "R-Car H1 (R8A77790)" | 43 | bool "R-Car H1 (R8A77790)" |
38 | select ARCH_WANT_OPTIONAL_GPIOLIB | 44 | select ARCH_WANT_OPTIONAL_GPIOLIB |
diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile index c5a43ef7cebf..2d42de46db8d 100644 --- a/arch/arm/mach-shmobile/Makefile +++ b/arch/arm/mach-shmobile/Makefile | |||
@@ -10,6 +10,7 @@ obj-$(CONFIG_ARCH_SH7372) += setup-sh7372.o clock-sh7372.o intc-sh7372.o | |||
10 | obj-$(CONFIG_ARCH_SH73A0) += setup-sh73a0.o clock-sh73a0.o intc-sh73a0.o | 10 | obj-$(CONFIG_ARCH_SH73A0) += setup-sh73a0.o clock-sh73a0.o intc-sh73a0.o |
11 | obj-$(CONFIG_ARCH_R8A73A4) += setup-r8a73a4.o clock-r8a73a4.o | 11 | obj-$(CONFIG_ARCH_R8A73A4) += setup-r8a73a4.o clock-r8a73a4.o |
12 | obj-$(CONFIG_ARCH_R8A7740) += setup-r8a7740.o clock-r8a7740.o intc-r8a7740.o | 12 | obj-$(CONFIG_ARCH_R8A7740) += setup-r8a7740.o clock-r8a7740.o intc-r8a7740.o |
13 | obj-$(CONFIG_ARCH_R8A7778) += setup-r8a7778.o clock-r8a7778.o | ||
13 | obj-$(CONFIG_ARCH_R8A7779) += setup-r8a7779.o clock-r8a7779.o intc-r8a7779.o | 14 | obj-$(CONFIG_ARCH_R8A7779) += setup-r8a7779.o clock-r8a7779.o intc-r8a7779.o |
14 | obj-$(CONFIG_ARCH_EMEV2) += setup-emev2.o clock-emev2.o | 15 | obj-$(CONFIG_ARCH_EMEV2) += setup-emev2.o clock-emev2.o |
15 | 16 | ||
diff --git a/arch/arm/mach-shmobile/clock-r8a7778.c b/arch/arm/mach-shmobile/clock-r8a7778.c new file mode 100644 index 000000000000..387e3b74cc8c --- /dev/null +++ b/arch/arm/mach-shmobile/clock-r8a7778.c | |||
@@ -0,0 +1,91 @@ | |||
1 | /* | ||
2 | * r8a7778 clock framework support | ||
3 | * | ||
4 | * Copyright (C) 2013 Renesas Solutions Corp. | ||
5 | * Copyright (C) 2013 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> | ||
6 | * | ||
7 | * based on r8a7779 | ||
8 | * | ||
9 | * Copyright (C) 2011 Renesas Solutions Corp. | ||
10 | * Copyright (C) 2011 Magnus Damm | ||
11 | * | ||
12 | * This program is free software; you can redistribute it and/or modify | ||
13 | * it under the terms of the GNU General Public License as published by | ||
14 | * the Free Software Foundation; either version 2 of the License | ||
15 | * | ||
16 | * This program is distributed in the hope that it will be useful, | ||
17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
19 | * GNU General Public License for more details. | ||
20 | * | ||
21 | * You should have received a copy of the GNU General Public License | ||
22 | * along with this program; if not, write to the Free Software | ||
23 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
24 | */ | ||
25 | |||
26 | #include <linux/io.h> | ||
27 | #include <linux/sh_clk.h> | ||
28 | #include <linux/clkdev.h> | ||
29 | #include <mach/common.h> | ||
30 | |||
31 | #define MSTPCR0 IOMEM(0xffc80030) | ||
32 | #define MSTPCR1 IOMEM(0xffc80034) | ||
33 | #define MSTPCR3 IOMEM(0xffc8003c) | ||
34 | #define MSTPSR1 IOMEM(0xffc80044) | ||
35 | #define MSTPSR4 IOMEM(0xffc80048) | ||
36 | #define MSTPSR6 IOMEM(0xffc8004c) | ||
37 | #define MSTPCR4 IOMEM(0xffc80050) | ||
38 | #define MSTPCR5 IOMEM(0xffc80054) | ||
39 | #define MSTPCR6 IOMEM(0xffc80058) | ||
40 | |||
41 | /* ioremap() through clock mapping mandatory to avoid | ||
42 | * collision with ARM coherent DMA virtual memory range. | ||
43 | */ | ||
44 | |||
45 | static struct clk_mapping cpg_mapping = { | ||
46 | .phys = 0xffc80000, | ||
47 | .len = 0x80, | ||
48 | }; | ||
49 | |||
50 | static struct clk clkp = { | ||
51 | .rate = 62500000, /* FIXME: shortcut */ | ||
52 | .flags = CLK_ENABLE_ON_INIT, | ||
53 | .mapping = &cpg_mapping, | ||
54 | }; | ||
55 | |||
56 | static struct clk *main_clks[] = { | ||
57 | &clkp, | ||
58 | }; | ||
59 | |||
60 | enum { | ||
61 | MSTP016, MSTP015, | ||
62 | MSTP_NR }; | ||
63 | |||
64 | static struct clk mstp_clks[MSTP_NR] = { | ||
65 | [MSTP016] = SH_CLK_MSTP32(&clkp, MSTPCR0, 16, 0), /* TMU0 */ | ||
66 | [MSTP015] = SH_CLK_MSTP32(&clkp, MSTPCR0, 15, 0), /* TMU1 */ | ||
67 | }; | ||
68 | |||
69 | static struct clk_lookup lookups[] = { | ||
70 | /* MSTP32 clocks */ | ||
71 | CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP016]), /* TMU00 */ | ||
72 | CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP015]), /* TMU01 */ | ||
73 | }; | ||
74 | |||
75 | void __init r8a7778_clock_init(void) | ||
76 | { | ||
77 | int k, ret = 0; | ||
78 | |||
79 | for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++) | ||
80 | ret = clk_register(main_clks[k]); | ||
81 | |||
82 | if (!ret) | ||
83 | ret = sh_clk_mstp_register(mstp_clks, MSTP_NR); | ||
84 | |||
85 | clkdev_add_table(lookups, ARRAY_SIZE(lookups)); | ||
86 | |||
87 | if (!ret) | ||
88 | shmobile_clk_init(); | ||
89 | else | ||
90 | panic("failed to setup r8a7778 clocks\n"); | ||
91 | } | ||
diff --git a/arch/arm/mach-shmobile/include/mach/r8a7778.h b/arch/arm/mach-shmobile/include/mach/r8a7778.h new file mode 100644 index 000000000000..a755dcafef4d --- /dev/null +++ b/arch/arm/mach-shmobile/include/mach/r8a7778.h | |||
@@ -0,0 +1,28 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2013 Renesas Solutions Corp. | ||
3 | * Copyright (C) 2013 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify | ||
6 | * it under the terms of the GNU General Public License as published by | ||
7 | * the Free Software Foundation; version 2 of the License. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, | ||
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | * GNU General Public License for more details. | ||
13 | * | ||
14 | * You should have received a copy of the GNU General Public License | ||
15 | * along with this program; if not, write to the Free Software | ||
16 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
17 | */ | ||
18 | #ifndef __ASM_R8A7778_H__ | ||
19 | #define __ASM_R8A7778_H__ | ||
20 | |||
21 | extern void r8a7778_add_standard_devices(void); | ||
22 | extern void r8a7778_add_standard_devices_dt(void); | ||
23 | extern void r8a7778_init_delay(void); | ||
24 | extern void r8a7778_init_irq(void); | ||
25 | extern void r8a7778_init_irq_dt(void); | ||
26 | extern void r8a7778_clock_init(void); | ||
27 | |||
28 | #endif /* __ASM_R8A7778_H__ */ | ||
diff --git a/arch/arm/mach-shmobile/setup-r8a7778.c b/arch/arm/mach-shmobile/setup-r8a7778.c new file mode 100644 index 000000000000..811ccf3c77a4 --- /dev/null +++ b/arch/arm/mach-shmobile/setup-r8a7778.c | |||
@@ -0,0 +1,167 @@ | |||
1 | /* | ||
2 | * r8a7778 processor support | ||
3 | * | ||
4 | * Copyright (C) 2013 Renesas Solutions Corp. | ||
5 | * Copyright (C) 2013 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; version 2 of the License. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
19 | */ | ||
20 | |||
21 | #include <linux/kernel.h> | ||
22 | #include <linux/io.h> | ||
23 | #include <linux/irqchip/arm-gic.h> | ||
24 | #include <linux/of.h> | ||
25 | #include <linux/of_platform.h> | ||
26 | #include <linux/platform_device.h> | ||
27 | #include <linux/irqchip.h> | ||
28 | #include <linux/sh_timer.h> | ||
29 | #include <mach/irqs.h> | ||
30 | #include <mach/r8a7778.h> | ||
31 | #include <mach/common.h> | ||
32 | #include <asm/mach/arch.h> | ||
33 | #include <asm/hardware/cache-l2x0.h> | ||
34 | |||
35 | /* TMU */ | ||
36 | static struct resource sh_tmu0_resources[] = { | ||
37 | DEFINE_RES_MEM(0xffd80008, 12), | ||
38 | DEFINE_RES_IRQ(gic_iid(0x40)), | ||
39 | }; | ||
40 | |||
41 | static struct sh_timer_config sh_tmu0_platform_data = { | ||
42 | .name = "TMU00", | ||
43 | .channel_offset = 0x4, | ||
44 | .timer_bit = 0, | ||
45 | .clockevent_rating = 200, | ||
46 | }; | ||
47 | |||
48 | static struct resource sh_tmu1_resources[] = { | ||
49 | DEFINE_RES_MEM(0xffd80014, 12), | ||
50 | DEFINE_RES_IRQ(gic_iid(0x41)), | ||
51 | }; | ||
52 | |||
53 | static struct sh_timer_config sh_tmu1_platform_data = { | ||
54 | .name = "TMU01", | ||
55 | .channel_offset = 0x10, | ||
56 | .timer_bit = 1, | ||
57 | .clocksource_rating = 200, | ||
58 | }; | ||
59 | |||
60 | #define PLATFORM_INFO(n, i) \ | ||
61 | { \ | ||
62 | .parent = &platform_bus, \ | ||
63 | .name = #n, \ | ||
64 | .id = i, \ | ||
65 | .res = n ## i ## _resources, \ | ||
66 | .num_res = ARRAY_SIZE(n ## i ##_resources), \ | ||
67 | .data = &n ## i ##_platform_data, \ | ||
68 | .size_data = sizeof(n ## i ## _platform_data), \ | ||
69 | } | ||
70 | |||
71 | struct platform_device_info platform_devinfo[] = { | ||
72 | PLATFORM_INFO(sh_tmu, 0), | ||
73 | PLATFORM_INFO(sh_tmu, 1), | ||
74 | }; | ||
75 | |||
76 | void __init r8a7778_add_standard_devices(void) | ||
77 | { | ||
78 | int i; | ||
79 | |||
80 | #ifdef CONFIG_CACHE_L2X0 | ||
81 | void __iomem *base = ioremap_nocache(0xf0100000, 0x1000); | ||
82 | if (base) { | ||
83 | /* | ||
84 | * Early BRESP enable, Shared attribute override enable, 64K*16way | ||
85 | * don't call iounmap(base) | ||
86 | */ | ||
87 | l2x0_init(base, 0x40470000, 0x82000fff); | ||
88 | } | ||
89 | #endif | ||
90 | |||
91 | for (i = 0; i < ARRAY_SIZE(platform_devinfo); i++) | ||
92 | platform_device_register_full(&platform_devinfo[i]); | ||
93 | } | ||
94 | |||
95 | #define INT2SMSKCR0 0x82288 /* 0xfe782288 */ | ||
96 | #define INT2SMSKCR1 0x8228c /* 0xfe78228c */ | ||
97 | |||
98 | #define INT2NTSR0 0x00018 /* 0xfe700018 */ | ||
99 | #define INT2NTSR1 0x0002c /* 0xfe70002c */ | ||
100 | static void __init r8a7778_init_irq_common(void) | ||
101 | { | ||
102 | void __iomem *base = ioremap_nocache(0xfe700000, 0x00100000); | ||
103 | |||
104 | BUG_ON(!base); | ||
105 | |||
106 | /* route all interrupts to ARM */ | ||
107 | __raw_writel(0x73ffffff, base + INT2NTSR0); | ||
108 | __raw_writel(0xffffffff, base + INT2NTSR1); | ||
109 | |||
110 | /* unmask all known interrupts in INTCS2 */ | ||
111 | __raw_writel(0x08330773, base + INT2SMSKCR0); | ||
112 | __raw_writel(0x00311110, base + INT2SMSKCR1); | ||
113 | |||
114 | iounmap(base); | ||
115 | } | ||
116 | |||
117 | void __init r8a7778_init_irq(void) | ||
118 | { | ||
119 | void __iomem *gic_dist_base; | ||
120 | void __iomem *gic_cpu_base; | ||
121 | |||
122 | gic_dist_base = ioremap_nocache(0xfe438000, PAGE_SIZE); | ||
123 | gic_cpu_base = ioremap_nocache(0xfe430000, PAGE_SIZE); | ||
124 | BUG_ON(!gic_dist_base || !gic_cpu_base); | ||
125 | |||
126 | /* use GIC to handle interrupts */ | ||
127 | gic_init(0, 29, gic_dist_base, gic_cpu_base); | ||
128 | |||
129 | r8a7778_init_irq_common(); | ||
130 | } | ||
131 | |||
132 | void __init r8a7778_init_delay(void) | ||
133 | { | ||
134 | shmobile_setup_delay(800, 1, 3); /* Cortex-A9 @ 800MHz */ | ||
135 | } | ||
136 | |||
137 | #ifdef CONFIG_USE_OF | ||
138 | void __init r8a7778_init_irq_dt(void) | ||
139 | { | ||
140 | irqchip_init(); | ||
141 | r8a7778_init_irq_common(); | ||
142 | } | ||
143 | |||
144 | static const struct of_dev_auxdata r8a7778_auxdata_lookup[] __initconst = { | ||
145 | {}, | ||
146 | }; | ||
147 | |||
148 | void __init r8a7778_add_standard_devices_dt(void) | ||
149 | { | ||
150 | of_platform_populate(NULL, of_default_bus_match_table, | ||
151 | r8a7778_auxdata_lookup, NULL); | ||
152 | } | ||
153 | |||
154 | static const char *r8a7778_compat_dt[] __initdata = { | ||
155 | "renesas,r8a7778", | ||
156 | NULL, | ||
157 | }; | ||
158 | |||
159 | DT_MACHINE_START(R8A7778_DT, "Generic R8A7778 (Flattened Device Tree)") | ||
160 | .init_early = r8a7778_init_delay, | ||
161 | .init_irq = r8a7778_init_irq_dt, | ||
162 | .init_machine = r8a7778_add_standard_devices_dt, | ||
163 | .init_time = shmobile_timer_init, | ||
164 | .dt_compat = r8a7778_compat_dt, | ||
165 | MACHINE_END | ||
166 | |||
167 | #endif /* CONFIG_USE_OF */ | ||