ENGR00276845-2 ARM: imx6sl: move the clock init code to appropriate place

It's a cleanup. Move the PLL5_VIDEO clock init code to the clock init
code group to avoid the code messed up.

Signed-off-by: Robby Cai <R63905@freescale.com>

1 files changed, 6 insertions, 6 deletions

diff --git a/arch/arm/mach-imx/clk-imx6sl.c b/arch/arm/mach-imx/clk-imx6sl.c
index b634990362ab..267de6142029 100644
--- a/arch/arm/mach-imx/clk-imx6sl.c
+++ b/arch/arm/mach-imx/clk-imx6sl.c
@@ -273,6 +273,12 @@ static void __init imx6sl_clocks_init(struct device_node *ccm_node)
                 clks[IMX6SL_CLK_PLL2_BUS]);
         clk_set_parent(clks[IMX6SL_CLK_GPU2D_SEL], clks[IMX6SL_CLK_PLL2_BUS]);
 
+        /* Initialize Video PLLs to valid frequency (650MHz). */
+        clk_set_rate(clks[IMX6SL_CLK_PLL5_VIDEO], 650000000);
+        /* set PLL5 video as lcdif pix parent clock */
+        clk_set_parent(clks[IMX6SL_CLK_LCDIF_PIX_SEL],
+                        clks[IMX6SL_CLK_PLL5_VIDEO_DIV]);
+
         /* set perclk to source from OSC 24MHz */
         clk_set_parent(clks[IMX6SL_CLK_PERCLK_SEL], clks[IMX6SL_CLK_OSC]);
         np = of_find_compatible_node(NULL, NULL, "fsl,imx6sl-gpt");
@@ -280,11 +286,5 @@ static void __init imx6sl_clocks_init(struct device_node *ccm_node)
         WARN_ON(!base);
         irq = irq_of_parse_and_map(np, 0);
         mxc_timer_init(base, irq);
-
-        /* Initialize Video PLLs to valid frequency (650MHz). */
-        clk_set_rate(clks[IMX6SL_CLK_PLL5_VIDEO_DIV], 650000000);
-        /* set PLL5 video as lcdif pix parent clock */
-        clk_set_parent(clks[IMX6SL_CLK_LCDIF_PIX_SEL],
-                        clks[IMX6SL_CLK_PLL5_VIDEO_DIV]);
 }
 CLK_OF_DECLARE(imx6sl, "fsl,imx6sl-ccm", imx6sl_clocks_init);