ENGR00276845-1 ARM: imx: No need to wait for PLL lock when PLL is power down

Add the check for PLL power status before wait for PLL to be locked.
It will not do further operation when PLL is powered down.

Signed-off-by: Anson Huang <b20788@freescale.com>

1 files changed, 12 insertions, 7 deletions

diff --git a/arch/arm/mach-imx/clk-pllv3.c b/arch/arm/mach-imx/clk-pllv3.c
index f98674c63270..21f64e0a7d5a 100644
--- a/arch/arm/mach-imx/clk-pllv3.c
+++ b/arch/arm/mach-imx/clk-pllv3.c
@@ -45,19 +45,24 @@ struct clk_pllv3 {
 
 #define to_clk_pllv3(_hw) container_of(_hw, struct clk_pllv3, hw)
 
-static int clk_pllv3_wait_for_lock(void __iomem *base, u32 timeout_ms)
+static int clk_pllv3_wait_for_lock(struct clk_pllv3 *pll, u32 timeout_ms)
 {
         unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms);
+        u32 val = readl_relaxed(pll->base) & BM_PLL_POWER;
+
+        /* No need to wait for lock when pll is power down */
+        if ((pll->powerup_set && !val) || (!pll->powerup_set && val))
+                return 0;
 
         /* Wait for PLL to lock */
         do {
-                if (readl_relaxed(base) & BM_PLL_LOCK)
+                if (readl_relaxed(pll->base) & BM_PLL_LOCK)
                         break;
                 if (time_after(jiffies, timeout))
                         break;
         } while (1);
 
-        if (readl_relaxed(base) & BM_PLL_LOCK)
+        if (readl_relaxed(pll->base) & BM_PLL_LOCK)
                 return 0;
         else
                 return -ETIMEDOUT;
@@ -76,7 +81,7 @@ static int clk_pllv3_prepare(struct clk_hw *hw)
                 val &= ~BM_PLL_POWER;
         writel_relaxed(val, pll->base);
 
-        return clk_pllv3_wait_for_lock(pll->base, 10);
+        return clk_pllv3_wait_for_lock(pll, 10);
 }
 
 static void clk_pllv3_unprepare(struct clk_hw *hw)
@@ -151,7 +156,7 @@ static int clk_pllv3_set_rate(struct clk_hw *hw, unsigned long rate,
         val |= div;
         writel_relaxed(val, pll->base);
 
-        return clk_pllv3_wait_for_lock(pll->base, 10);
+        return clk_pllv3_wait_for_lock(pll, 10);
 }
 
 static const struct clk_ops clk_pllv3_ops = {
@@ -207,7 +212,7 @@ static int clk_pllv3_sys_set_rate(struct clk_hw *hw, unsigned long rate,
         val |= div;
         writel_relaxed(val, pll->base);
 
-        return clk_pllv3_wait_for_lock(pll->base, 10);
+        return clk_pllv3_wait_for_lock(pll, 10);
 }
 
 static const struct clk_ops clk_pllv3_sys_ops = {
@@ -281,7 +286,7 @@ static int clk_pllv3_av_set_rate(struct clk_hw *hw, unsigned long rate,
         writel_relaxed(mfn, pll->base + PLL_NUM_OFFSET);
         writel_relaxed(mfd, pll->base + PLL_DENOM_OFFSET);
 
-        return clk_pllv3_wait_for_lock(pll->base, 10);
+        return clk_pllv3_wait_for_lock(pll, 10);
 }
 
 static const struct clk_ops clk_pllv3_av_ops = {