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authorRobby Cai <R63905@freescale.com>2013-08-22 02:39:42 -0400
committerNitin Garg <nitin.garg@freescale.com>2014-04-16 09:01:28 -0400
commit39645c36d7e3caaf03f3d82f8918eee2215f32fe (patch)
tree9f0945093ddad81227996df545f1a6f212a3e961 /arch
parent423273b4437f3df3201856afa93fd93e87d44c67 (diff)
ENGR00275031-2 ARM: dts: add lcdif and backlight support
Add dts for lcdif, backlight(pwm). - use display timing dts bindings for lcd timing setting. - add an axi clock node for mx23/mx28 to accommadate the change in driver Signed-off-by: Robby Cai <R63905@freescale.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/imx23.dtsi3
-rw-r--r--arch/arm/boot/dts/imx28.dtsi3
-rw-r--r--arch/arm/boot/dts/imx6sl-evk.dts58
-rw-r--r--arch/arm/boot/dts/imx6sl.dtsi54
4 files changed, 116 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/imx23.dtsi b/arch/arm/boot/dts/imx23.dtsi
index 587ceef81e45..cc1084e8d8f3 100644
--- a/arch/arm/boot/dts/imx23.dtsi
+++ b/arch/arm/boot/dts/imx23.dtsi
@@ -360,7 +360,8 @@
360 compatible = "fsl,imx23-lcdif"; 360 compatible = "fsl,imx23-lcdif";
361 reg = <0x80030000 2000>; 361 reg = <0x80030000 2000>;
362 interrupts = <46 45>; 362 interrupts = <46 45>;
363 clocks = <&clks 38>; 363 clocks = <&clks 38>, <&clks 38>;
364 clock-names = "pix", "axi";
364 status = "disabled"; 365 status = "disabled";
365 }; 366 };
366 367
diff --git a/arch/arm/boot/dts/imx28.dtsi b/arch/arm/boot/dts/imx28.dtsi
index 4c10a1968c0e..3d10b3b6e5d4 100644
--- a/arch/arm/boot/dts/imx28.dtsi
+++ b/arch/arm/boot/dts/imx28.dtsi
@@ -727,7 +727,8 @@
727 compatible = "fsl,imx28-lcdif"; 727 compatible = "fsl,imx28-lcdif";
728 reg = <0x80030000 0x2000>; 728 reg = <0x80030000 0x2000>;
729 interrupts = <38 86>; 729 interrupts = <38 86>;
730 clocks = <&clks 55>; 730 clocks = <&clks 55>, <&clks 55>;
731 clock-names = "pix", "axi";
731 dmas = <&dma_apbh 13>; 732 dmas = <&dma_apbh 13>;
732 dma-names = "rx"; 733 dma-names = "rx";
733 status = "disabled"; 734 status = "disabled";
diff --git a/arch/arm/boot/dts/imx6sl-evk.dts b/arch/arm/boot/dts/imx6sl-evk.dts
index 1e5f30b64b8d..8c8938d5cd04 100644
--- a/arch/arm/boot/dts/imx6sl-evk.dts
+++ b/arch/arm/boot/dts/imx6sl-evk.dts
@@ -17,6 +17,24 @@
17 memory { 17 memory {
18 reg = <0x80000000 0x40000000>; 18 reg = <0x80000000 0x40000000>;
19 }; 19 };
20
21 regulators {
22 compatible = "simple-bus";
23
24 reg_lcd_3v3: lcd-3v3 {
25 compatible = "regulator-fixed";
26 regulator-name = "lcd-3v3";
27 gpio = <&gpio4 3 0>;
28 enable-active-high;
29 };
30 };
31
32 backlight {
33 compatible = "pwm-backlight";
34 pwms = <&pwm1 0 5000000>;
35 brightness-levels = <0 4 8 16 32 64 128 255>;
36 default-brightness-level = <6>;
37 };
20}; 38};
21 39
22&fec { 40&fec {
@@ -67,11 +85,51 @@
67 MX6SL_PAD_SD2_DAT6__GPIO4_IO29 0x17059 85 MX6SL_PAD_SD2_DAT6__GPIO4_IO29 0x17059
68 MX6SL_PAD_REF_CLK_32K__GPIO3_IO22 0x17059 86 MX6SL_PAD_REF_CLK_32K__GPIO3_IO22 0x17059
69 MX6SL_PAD_FEC_TX_CLK__GPIO4_IO21 0x80000000 87 MX6SL_PAD_FEC_TX_CLK__GPIO4_IO21 0x80000000
88 MX6SL_PAD_KEY_ROW5__GPIO4_IO03 0x80000000
70 >; 89 >;
71 }; 90 };
72 }; 91 };
73}; 92};
74 93
94&lcdif {
95 pinctrl-names = "default";
96 pinctrl-0 = <&pinctrl_lcdif_dat_0
97 &pinctrl_lcdif_ctrl_0>;
98 lcd-supply = <&reg_lcd_3v3>;
99 display = <&display>;
100 status = "okay";
101
102 display: display {
103 bits-per-pixel = <16>;
104 bus-width = <24>;
105
106 display-timings {
107 native-mode = <&timing0>;
108 timing0: timing0 {
109 clock-frequency = <33500000>;
110 hactive = <800>;
111 vactive = <480>;
112 hback-porch = <89>;
113 hfront-porch = <164>;
114 vback-porch = <23>;
115 vfront-porch = <10>;
116 hsync-len = <10>;
117 vsync-len = <10>;
118 hsync-active = <0>;
119 vsync-active = <0>;
120 de-active = <1>;
121 pixelclk-active = <0>;
122 };
123 };
124 };
125};
126
127&pwm1 {
128 pinctrl-names = "default";
129 pinctrl-0 = <&pinctrl_pwm1_0>;
130 status = "okay";
131};
132
75&uart1 { 133&uart1 {
76 pinctrl-names = "default"; 134 pinctrl-names = "default";
77 pinctrl-0 = <&pinctrl_uart1_1>; 135 pinctrl-0 = <&pinctrl_uart1_1>;
diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi
index d043843ac96c..8a532a3657bb 100644
--- a/arch/arm/boot/dts/imx6sl.dtsi
+++ b/arch/arm/boot/dts/imx6sl.dtsi
@@ -666,6 +666,55 @@
666 >; 666 >;
667 }; 667 };
668 }; 668 };
669
670 lcdif {
671 pinctrl_lcdif_dat_0: lcdifdatgrp-0 {
672 fsl,pins = <
673 MX6SL_PAD_LCD_DAT0__LCD_DATA00 0x1b0b0
674 MX6SL_PAD_LCD_DAT1__LCD_DATA01 0x1b0b0
675 MX6SL_PAD_LCD_DAT2__LCD_DATA02 0x1b0b0
676 MX6SL_PAD_LCD_DAT3__LCD_DATA03 0x1b0b0
677 MX6SL_PAD_LCD_DAT4__LCD_DATA04 0x1b0b0
678 MX6SL_PAD_LCD_DAT5__LCD_DATA05 0x1b0b0
679 MX6SL_PAD_LCD_DAT6__LCD_DATA06 0x1b0b0
680 MX6SL_PAD_LCD_DAT7__LCD_DATA07 0x1b0b0
681 MX6SL_PAD_LCD_DAT8__LCD_DATA08 0x1b0b0
682 MX6SL_PAD_LCD_DAT9__LCD_DATA09 0x1b0b0
683 MX6SL_PAD_LCD_DAT10__LCD_DATA10 0x1b0b0
684 MX6SL_PAD_LCD_DAT11__LCD_DATA11 0x1b0b0
685 MX6SL_PAD_LCD_DAT12__LCD_DATA12 0x1b0b0
686 MX6SL_PAD_LCD_DAT13__LCD_DATA13 0x1b0b0
687 MX6SL_PAD_LCD_DAT14__LCD_DATA14 0x1b0b0
688 MX6SL_PAD_LCD_DAT15__LCD_DATA15 0x1b0b0
689 MX6SL_PAD_LCD_DAT16__LCD_DATA16 0x1b0b0
690 MX6SL_PAD_LCD_DAT17__LCD_DATA17 0x1b0b0
691 MX6SL_PAD_LCD_DAT18__LCD_DATA18 0x1b0b0
692 MX6SL_PAD_LCD_DAT19__LCD_DATA19 0x1b0b0
693 MX6SL_PAD_LCD_DAT20__LCD_DATA20 0x1b0b0
694 MX6SL_PAD_LCD_DAT21__LCD_DATA21 0x1b0b0
695 MX6SL_PAD_LCD_DAT22__LCD_DATA22 0x1b0b0
696 MX6SL_PAD_LCD_DAT23__LCD_DATA23 0x1b0b0
697 >;
698 };
699
700 pinctrl_lcdif_ctrl_0: lcdifctrlgrp-0 {
701 fsl,pins = <
702 MX6SL_PAD_LCD_CLK__LCD_CLK 0x1b0b0
703 MX6SL_PAD_LCD_ENABLE__LCD_ENABLE 0x1b0b0
704 MX6SL_PAD_LCD_HSYNC__LCD_HSYNC 0x1b0b0
705 MX6SL_PAD_LCD_VSYNC__LCD_VSYNC 0x1b0b0
706 MX6SL_PAD_LCD_RESET__LCD_RESET 0x1b0b0
707 >;
708 };
709 };
710
711 pwm1 {
712 pinctrl_pwm1_0: pwm1grp-0 {
713 fsl,pins = <
714 MX6SL_PAD_PWM1__PWM1_OUT 0x110b0
715 >;
716 };
717 };
669 }; 718 };
670 719
671 csi: csi@020e4000 { 720 csi: csi@020e4000 {
@@ -705,8 +754,13 @@
705 }; 754 };
706 755
707 lcdif: lcdif@020f8000 { 756 lcdif: lcdif@020f8000 {
757 compatible = "fsl,imx6sl-lcdif", "fsl,imx28-lcdif";
708 reg = <0x020f8000 0x4000>; 758 reg = <0x020f8000 0x4000>;
709 interrupts = <0 39 0x04>; 759 interrupts = <0 39 0x04>;
760 clocks = <&clks IMX6SL_CLK_LCDIF_PIX>,
761 <&clks IMX6SL_CLK_LCDIF_AXI>;
762 clock-names = "pix", "axi";
763 status = "disabled";
710 }; 764 };
711 765
712 dcp: dcp@020fc000 { 766 dcp: dcp@020fc000 {