ENGR00275031-1 mx6sl fb: support lcdif framebuffer on 3.10

re-use the upstreaming mxsfb.c code.
- add the lcdif axi clock for register and dram access
- set the lcdif pix's parent as pll5_video to get most accurate pix clock
- add binding doc for lcdif dts

Signed-off-by: Robby Cai <R63905@freescale.com>

1 files changed, 6 insertions, 0 deletions

diff --git a/arch/arm/mach-imx/clk-imx6sl.c b/arch/arm/mach-imx/clk-imx6sl.c
index 4c367f4711fc..b634990362ab 100644
--- a/arch/arm/mach-imx/clk-imx6sl.c
+++ b/arch/arm/mach-imx/clk-imx6sl.c
@@ -280,5 +280,11 @@ static void __init imx6sl_clocks_init(struct device_node *ccm_node)
         WARN_ON(!base);
         irq = irq_of_parse_and_map(np, 0);
         mxc_timer_init(base, irq);
+
+        /* Initialize Video PLLs to valid frequency (650MHz). */
+        clk_set_rate(clks[IMX6SL_CLK_PLL5_VIDEO_DIV], 650000000);
+        /* set PLL5 video as lcdif pix parent clock */
+        clk_set_parent(clks[IMX6SL_CLK_LCDIF_PIX_SEL],
+                        clks[IMX6SL_CLK_PLL5_VIDEO_DIV]);
 }
 CLK_OF_DECLARE(imx6sl, "fsl,imx6sl-ccm", imx6sl_clocks_init);