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authorJon Hunter <jon-hunter@ti.com>2012-09-23 19:28:27 -0400
committerPaul Walmsley <paul@pwsan.com>2012-09-23 19:28:27 -0400
commit5c3e4ec48586f6dfb482f1c524748948ba14021e (patch)
treed515924d76f922a368832d4e5d389f831700d39e /arch/arm/mach-omap2/omap_hwmod_44xx_data.c
parentfe47c58ba82c967729c76869a5f10a94c38754f3 (diff)
ARM: OMAP: Add a timer attribute for timers that can interrupt the DSP
Some instances of the DMTIMER peripheral on OMAP devices have the ability to interrupt the on-chip DSP in addition to the ARM CPU. Add a DMTIMER attribute to indicate which timers can interrupt the DSP. By using the omap_dm_timer_request_by_cap() API, driver will now be able to allocate a DMTIMER that can interrupt the DSP based upon this attribute and not require the driver to know which instance has this capability. DMTIMERs that have the ability to interrupt the DSP on OMAP devices are as follows ... - OMAP1 (OMAP5912/16xx/17xx) devices - All 8 DMTIMERs - OMAP2/3/4 devices - DMTIMERs 5-8 Please note that for OMAP3+, timer8 has the ability to interrupt the DSP and generate a PWM output. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
Diffstat (limited to 'arch/arm/mach-omap2/omap_hwmod_44xx_data.c')
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_44xx_data.c15
1 files changed, 14 insertions, 1 deletions
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 46fd80c29a02..17ab2dbc8931 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -3097,6 +3097,16 @@ static struct omap_timer_capability_dev_attr capability_pwm_dev_attr = {
3097 .timer_capability = OMAP_TIMER_HAS_PWM, 3097 .timer_capability = OMAP_TIMER_HAS_PWM,
3098}; 3098};
3099 3099
3100/* timers with DSP interrupt dev attribute */
3101static struct omap_timer_capability_dev_attr capability_dsp_dev_attr = {
3102 .timer_capability = OMAP_TIMER_HAS_DSP_IRQ,
3103};
3104
3105/* pwm timers with DSP interrupt dev attribute */
3106static struct omap_timer_capability_dev_attr capability_dsp_pwm_dev_attr = {
3107 .timer_capability = OMAP_TIMER_HAS_DSP_IRQ | OMAP_TIMER_HAS_PWM,
3108};
3109
3100/* timer1 */ 3110/* timer1 */
3101static struct omap_hwmod_irq_info omap44xx_timer1_irqs[] = { 3111static struct omap_hwmod_irq_info omap44xx_timer1_irqs[] = {
3102 { .irq = 37 + OMAP44XX_IRQ_GIC_START }, 3112 { .irq = 37 + OMAP44XX_IRQ_GIC_START },
@@ -3201,6 +3211,7 @@ static struct omap_hwmod omap44xx_timer5_hwmod = {
3201 .modulemode = MODULEMODE_SWCTRL, 3211 .modulemode = MODULEMODE_SWCTRL,
3202 }, 3212 },
3203 }, 3213 },
3214 .dev_attr = &capability_dsp_dev_attr,
3204}; 3215};
3205 3216
3206/* timer6 */ 3217/* timer6 */
@@ -3223,6 +3234,7 @@ static struct omap_hwmod omap44xx_timer6_hwmod = {
3223 .modulemode = MODULEMODE_SWCTRL, 3234 .modulemode = MODULEMODE_SWCTRL,
3224 }, 3235 },
3225 }, 3236 },
3237 .dev_attr = &capability_dsp_dev_attr,
3226}; 3238};
3227 3239
3228/* timer7 */ 3240/* timer7 */
@@ -3244,6 +3256,7 @@ static struct omap_hwmod omap44xx_timer7_hwmod = {
3244 .modulemode = MODULEMODE_SWCTRL, 3256 .modulemode = MODULEMODE_SWCTRL,
3245 }, 3257 },
3246 }, 3258 },
3259 .dev_attr = &capability_dsp_dev_attr,
3247}; 3260};
3248 3261
3249/* timer8 */ 3262/* timer8 */
@@ -3265,7 +3278,7 @@ static struct omap_hwmod omap44xx_timer8_hwmod = {
3265 .modulemode = MODULEMODE_SWCTRL, 3278 .modulemode = MODULEMODE_SWCTRL,
3266 }, 3279 },
3267 }, 3280 },
3268 .dev_attr = &capability_pwm_dev_attr, 3281 .dev_attr = &capability_dsp_pwm_dev_attr,
3269}; 3282};
3270 3283
3271/* timer9 */ 3284/* timer9 */