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authorMaxime Ripard <maxime.ripard@free-electrons.com>2013-03-24 06:49:25 -0400
committerMaxime Ripard <maxime.ripard@free-electrons.com>2013-04-08 15:42:11 -0400
commit119fd635e383c1a58990e5805acc29f48ed3e360 (patch)
tree91595c46243cb8e4033a2476a40b5655b69a2130 /Documentation
parentea71d9a600e769ca669f4ba3e25ffdecdeede240 (diff)
clocksource: sunxi: Rename sunxi to sun4i
During the introduction of the Allwinner SoC platforms, sunxi was initially meant as a generic name for all the variants of the Allwinner SoC. It was ok at the time of the support of only the A10 and A13 that looks pretty much the same, but it's beginning to be troublesome with the future addition of the Allwinner A31 (sun6i) that is quite different, and would introduce some weird logic, where sunxi would actually mean in some case sun4i and sun5i but without sun6i... Moreover, it makes the compatible strings naming scheme not consistent with other architectures, where usually for this kind of compability, we just use the oldest SoC name that has this IP, so let's do just this. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/timer/allwinner,sun4i-timer.txt (renamed from Documentation/devicetree/bindings/timer/allwinner,sunxi-timer.txt)4
1 files changed, 2 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/timer/allwinner,sunxi-timer.txt b/Documentation/devicetree/bindings/timer/allwinner,sun4i-timer.txt
index 0c7b64e95a61..48aeb7884ed3 100644
--- a/Documentation/devicetree/bindings/timer/allwinner,sunxi-timer.txt
+++ b/Documentation/devicetree/bindings/timer/allwinner,sun4i-timer.txt
@@ -2,7 +2,7 @@ Allwinner A1X SoCs Timer Controller
2 2
3Required properties: 3Required properties:
4 4
5- compatible : should be "allwinner,sunxi-timer" 5- compatible : should be "allwinner,sun4i-timer"
6- reg : Specifies base physical address and size of the registers. 6- reg : Specifies base physical address and size of the registers.
7- interrupts : The interrupt of the first timer 7- interrupts : The interrupt of the first timer
8- clocks: phandle to the source clock (usually a 24 MHz fixed clock) 8- clocks: phandle to the source clock (usually a 24 MHz fixed clock)
@@ -10,7 +10,7 @@ Required properties:
10Example: 10Example:
11 11
12timer { 12timer {
13 compatible = "allwinner,sunxi-timer"; 13 compatible = "allwinner,sun4i-timer";
14 reg = <0x01c20c00 0x400>; 14 reg = <0x01c20c00 0x400>;
15 interrupts = <22>; 15 interrupts = <22>;
16 clocks = <&osc>; 16 clocks = <&osc>;