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-rw-r--r--Documentation/devicetree/bindings/timer/allwinner,sun4i-timer.txt (renamed from Documentation/devicetree/bindings/timer/allwinner,sunxi-timer.txt)4
-rw-r--r--arch/arm/mach-sunxi/Kconfig4
-rw-r--r--drivers/clocksource/Kconfig2
-rw-r--r--drivers/clocksource/Makefile2
-rw-r--r--drivers/clocksource/sun4i_timer.c (renamed from drivers/clocksource/sunxi_timer.c)34
5 files changed, 23 insertions, 23 deletions
diff --git a/Documentation/devicetree/bindings/timer/allwinner,sunxi-timer.txt b/Documentation/devicetree/bindings/timer/allwinner,sun4i-timer.txt
index 0c7b64e95a61..48aeb7884ed3 100644
--- a/Documentation/devicetree/bindings/timer/allwinner,sunxi-timer.txt
+++ b/Documentation/devicetree/bindings/timer/allwinner,sun4i-timer.txt
@@ -2,7 +2,7 @@ Allwinner A1X SoCs Timer Controller
2 2
3Required properties: 3Required properties:
4 4
5- compatible : should be "allwinner,sunxi-timer" 5- compatible : should be "allwinner,sun4i-timer"
6- reg : Specifies base physical address and size of the registers. 6- reg : Specifies base physical address and size of the registers.
7- interrupts : The interrupt of the first timer 7- interrupts : The interrupt of the first timer
8- clocks: phandle to the source clock (usually a 24 MHz fixed clock) 8- clocks: phandle to the source clock (usually a 24 MHz fixed clock)
@@ -10,7 +10,7 @@ Required properties:
10Example: 10Example:
11 11
12timer { 12timer {
13 compatible = "allwinner,sunxi-timer"; 13 compatible = "allwinner,sun4i-timer";
14 reg = <0x01c20c00 0x400>; 14 reg = <0x01c20c00 0x400>;
15 interrupts = <22>; 15 interrupts = <22>;
16 clocks = <&osc>; 16 clocks = <&osc>;
diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
index 06c28945357d..d259c782d742 100644
--- a/arch/arm/mach-sunxi/Kconfig
+++ b/arch/arm/mach-sunxi/Kconfig
@@ -7,5 +7,5 @@ config ARCH_SUNXI
7 select GENERIC_IRQ_CHIP 7 select GENERIC_IRQ_CHIP
8 select PINCTRL 8 select PINCTRL
9 select SPARSE_IRQ 9 select SPARSE_IRQ
10 select SUNXI_TIMER 10 select SUN4I_TIMER
11 select PINCTRL_SUNXI \ No newline at end of file 11 select PINCTRL_SUNXI
diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index e507ab7df60b..9002185a0a1a 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -25,7 +25,7 @@ config DW_APB_TIMER_OF
25config ARMADA_370_XP_TIMER 25config ARMADA_370_XP_TIMER
26 bool 26 bool
27 27
28config SUNXI_TIMER 28config SUN4I_TIMER
29 bool 29 bool
30 30
31config VT8500_TIMER 31config VT8500_TIMER
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index 4d8283aec5b5..7d5d23a591d9 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -16,7 +16,7 @@ obj-$(CONFIG_CLKSRC_NOMADIK_MTU) += nomadik-mtu.o
16obj-$(CONFIG_CLKSRC_DBX500_PRCMU) += clksrc-dbx500-prcmu.o 16obj-$(CONFIG_CLKSRC_DBX500_PRCMU) += clksrc-dbx500-prcmu.o
17obj-$(CONFIG_ARMADA_370_XP_TIMER) += time-armada-370-xp.o 17obj-$(CONFIG_ARMADA_370_XP_TIMER) += time-armada-370-xp.o
18obj-$(CONFIG_ARCH_BCM2835) += bcm2835_timer.o 18obj-$(CONFIG_ARCH_BCM2835) += bcm2835_timer.o
19obj-$(CONFIG_SUNXI_TIMER) += sunxi_timer.o 19obj-$(CONFIG_SUN4I_TIMER) += sun4i_timer.o
20obj-$(CONFIG_ARCH_TEGRA) += tegra20_timer.o 20obj-$(CONFIG_ARCH_TEGRA) += tegra20_timer.o
21obj-$(CONFIG_VT8500_TIMER) += vt8500_timer.o 21obj-$(CONFIG_VT8500_TIMER) += vt8500_timer.o
22 22
diff --git a/drivers/clocksource/sunxi_timer.c b/drivers/clocksource/sun4i_timer.c
index 308bbe328318..d4674e78ef35 100644
--- a/drivers/clocksource/sunxi_timer.c
+++ b/drivers/clocksource/sun4i_timer.c
@@ -37,7 +37,7 @@
37 37
38static void __iomem *timer_base; 38static void __iomem *timer_base;
39 39
40static void sunxi_clkevt_mode(enum clock_event_mode mode, 40static void sun4i_clkevt_mode(enum clock_event_mode mode,
41 struct clock_event_device *clk) 41 struct clock_event_device *clk)
42{ 42{
43 u32 u = readl(timer_base + TIMER_CTL_REG(0)); 43 u32 u = readl(timer_base + TIMER_CTL_REG(0));
@@ -59,7 +59,7 @@ static void sunxi_clkevt_mode(enum clock_event_mode mode,
59 } 59 }
60} 60}
61 61
62static int sunxi_clkevt_next_event(unsigned long evt, 62static int sun4i_clkevt_next_event(unsigned long evt,
63 struct clock_event_device *unused) 63 struct clock_event_device *unused)
64{ 64{
65 u32 u = readl(timer_base + TIMER_CTL_REG(0)); 65 u32 u = readl(timer_base + TIMER_CTL_REG(0));
@@ -70,16 +70,16 @@ static int sunxi_clkevt_next_event(unsigned long evt,
70 return 0; 70 return 0;
71} 71}
72 72
73static struct clock_event_device sunxi_clockevent = { 73static struct clock_event_device sun4i_clockevent = {
74 .name = "sunxi_tick", 74 .name = "sun4i_tick",
75 .rating = 300, 75 .rating = 300,
76 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, 76 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
77 .set_mode = sunxi_clkevt_mode, 77 .set_mode = sun4i_clkevt_mode,
78 .set_next_event = sunxi_clkevt_next_event, 78 .set_next_event = sun4i_clkevt_next_event,
79}; 79};
80 80
81 81
82static irqreturn_t sunxi_timer_interrupt(int irq, void *dev_id) 82static irqreturn_t sun4i_timer_interrupt(int irq, void *dev_id)
83{ 83{
84 struct clock_event_device *evt = (struct clock_event_device *)dev_id; 84 struct clock_event_device *evt = (struct clock_event_device *)dev_id;
85 85
@@ -89,14 +89,14 @@ static irqreturn_t sunxi_timer_interrupt(int irq, void *dev_id)
89 return IRQ_HANDLED; 89 return IRQ_HANDLED;
90} 90}
91 91
92static struct irqaction sunxi_timer_irq = { 92static struct irqaction sun4i_timer_irq = {
93 .name = "sunxi_timer0", 93 .name = "sun4i_timer0",
94 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, 94 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
95 .handler = sunxi_timer_interrupt, 95 .handler = sun4i_timer_interrupt,
96 .dev_id = &sunxi_clockevent, 96 .dev_id = &sun4i_clockevent,
97}; 97};
98 98
99static void __init sunxi_timer_init(struct device_node *node) 99static void __init sun4i_timer_init(struct device_node *node)
100{ 100{
101 unsigned long rate = 0; 101 unsigned long rate = 0;
102 struct clk *clk; 102 struct clk *clk;
@@ -131,7 +131,7 @@ static void __init sunxi_timer_init(struct device_node *node)
131 val = readl(timer_base + TIMER_CTL_REG(0)); 131 val = readl(timer_base + TIMER_CTL_REG(0));
132 writel(val | TIMER_CTL_AUTORELOAD, timer_base + TIMER_CTL_REG(0)); 132 writel(val | TIMER_CTL_AUTORELOAD, timer_base + TIMER_CTL_REG(0));
133 133
134 ret = setup_irq(irq, &sunxi_timer_irq); 134 ret = setup_irq(irq, &sun4i_timer_irq);
135 if (ret) 135 if (ret)
136 pr_warn("failed to setup irq %d\n", irq); 136 pr_warn("failed to setup irq %d\n", irq);
137 137
@@ -139,10 +139,10 @@ static void __init sunxi_timer_init(struct device_node *node)
139 val = readl(timer_base + TIMER_IRQ_EN_REG); 139 val = readl(timer_base + TIMER_IRQ_EN_REG);
140 writel(val | TIMER_IRQ_EN(0), timer_base + TIMER_IRQ_EN_REG); 140 writel(val | TIMER_IRQ_EN(0), timer_base + TIMER_IRQ_EN_REG);
141 141
142 sunxi_clockevent.cpumask = cpumask_of(0); 142 sun4i_clockevent.cpumask = cpumask_of(0);
143 143
144 clockevents_config_and_register(&sunxi_clockevent, rate / TIMER_SCAL, 144 clockevents_config_and_register(&sun4i_clockevent, rate / TIMER_SCAL,
145 0x1, 0xff); 145 0x1, 0xff);
146} 146}
147CLOCKSOURCE_OF_DECLARE(sunxi, "allwinner,sunxi-timer", 147CLOCKSOURCE_OF_DECLARE(sun4i, "allwinner,sun4i-timer",
148 sunxi_timer_init); 148 sun4i_timer_init);