diff options
author | Lars-Peter Clausen <lars@metafoo.de> | 2012-08-10 12:36:00 -0400 |
---|---|---|
committer | Jonathan Cameron <jic23@kernel.org> | 2012-08-27 13:10:40 -0400 |
commit | 3f7c3306cf385d015d84c741e5433781f83d9254 (patch) | |
tree | 020f9c452b08f6ca3e58832db459926866d40ec5 | |
parent | 1abec6ac69fe5aea1013c1e8f764d9e71a8e64c4 (diff) |
staging:iio:ad7192: Use common Sigma Delta library
Convert the ad7192 driver to make use of the new common code for devices from
the Analog Devices Sigma Delta family.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
-rw-r--r-- | drivers/staging/iio/adc/Kconfig | 3 | ||||
-rw-r--r-- | drivers/staging/iio/adc/ad7192.c | 508 |
2 files changed, 62 insertions, 449 deletions
diff --git a/drivers/staging/iio/adc/Kconfig b/drivers/staging/iio/adc/Kconfig index f7d7e44af672..3f1f2c341dff 100644 --- a/drivers/staging/iio/adc/Kconfig +++ b/drivers/staging/iio/adc/Kconfig | |||
@@ -131,8 +131,7 @@ config AD7816 | |||
131 | config AD7192 | 131 | config AD7192 |
132 | tristate "Analog Devices AD7190 AD7192 AD7195 ADC driver" | 132 | tristate "Analog Devices AD7190 AD7192 AD7195 ADC driver" |
133 | depends on SPI | 133 | depends on SPI |
134 | select IIO_BUFFER | 134 | select AD_SIGMA_DELTA |
135 | select IIO_TRIGGERED_BUFFER | ||
136 | help | 135 | help |
137 | Say yes here to build support for Analog Devices AD7190, | 136 | Say yes here to build support for Analog Devices AD7190, |
138 | AD7192 or AD7195 SPI analog to digital converters (ADC). | 137 | AD7192 or AD7195 SPI analog to digital converters (ADC). |
diff --git a/drivers/staging/iio/adc/ad7192.c b/drivers/staging/iio/adc/ad7192.c index cdb4fc4ef820..189d9519f6c3 100644 --- a/drivers/staging/iio/adc/ad7192.c +++ b/drivers/staging/iio/adc/ad7192.c | |||
@@ -23,6 +23,7 @@ | |||
23 | #include <linux/iio/trigger.h> | 23 | #include <linux/iio/trigger.h> |
24 | #include <linux/iio/trigger_consumer.h> | 24 | #include <linux/iio/trigger_consumer.h> |
25 | #include <linux/iio/triggered_buffer.h> | 25 | #include <linux/iio/triggered_buffer.h> |
26 | #include <linux/iio/adc/ad_sigma_delta.h> | ||
26 | 27 | ||
27 | #include "ad7192.h" | 28 | #include "ad7192.h" |
28 | 29 | ||
@@ -57,6 +58,7 @@ | |||
57 | 58 | ||
58 | /* Mode Register Bit Designations (AD7192_REG_MODE) */ | 59 | /* Mode Register Bit Designations (AD7192_REG_MODE) */ |
59 | #define AD7192_MODE_SEL(x) (((x) & 0x7) << 21) /* Operation Mode Select */ | 60 | #define AD7192_MODE_SEL(x) (((x) & 0x7) << 21) /* Operation Mode Select */ |
61 | #define AD7192_MODE_SEL_MASK (0x7 << 21) /* Operation Mode Select Mask */ | ||
60 | #define AD7192_MODE_DAT_STA (1 << 20) /* Status Register transmission */ | 62 | #define AD7192_MODE_DAT_STA (1 << 20) /* Status Register transmission */ |
61 | #define AD7192_MODE_CLKSRC(x) (((x) & 0x3) << 18) /* Clock Source Select */ | 63 | #define AD7192_MODE_CLKSRC(x) (((x) & 0x3) << 18) /* Clock Source Select */ |
62 | #define AD7192_MODE_SINC3 (1 << 15) /* SINC3 Filter Select */ | 64 | #define AD7192_MODE_SINC3 (1 << 15) /* SINC3 Filter Select */ |
@@ -91,7 +93,8 @@ | |||
91 | 93 | ||
92 | #define AD7192_CONF_CHOP (1 << 23) /* CHOP enable */ | 94 | #define AD7192_CONF_CHOP (1 << 23) /* CHOP enable */ |
93 | #define AD7192_CONF_REFSEL (1 << 20) /* REFIN1/REFIN2 Reference Select */ | 95 | #define AD7192_CONF_REFSEL (1 << 20) /* REFIN1/REFIN2 Reference Select */ |
94 | #define AD7192_CONF_CHAN(x) (((x) & 0xFF) << 8) /* Channel select */ | 96 | #define AD7192_CONF_CHAN(x) (((1 << (x)) & 0xFF) << 8) /* Channel select */ |
97 | #define AD7192_CONF_CHAN_MASK (0xFF << 8) /* Channel select mask */ | ||
95 | #define AD7192_CONF_BURN (1 << 7) /* Burnout current enable */ | 98 | #define AD7192_CONF_BURN (1 << 7) /* Burnout current enable */ |
96 | #define AD7192_CONF_REFDET (1 << 6) /* Reference detect enable */ | 99 | #define AD7192_CONF_REFDET (1 << 6) /* Reference detect enable */ |
97 | #define AD7192_CONF_BUF (1 << 4) /* Buffered Mode Enable */ | 100 | #define AD7192_CONF_BUF (1 << 4) /* Buffered Mode Enable */ |
@@ -133,12 +136,7 @@ | |||
133 | */ | 136 | */ |
134 | 137 | ||
135 | struct ad7192_state { | 138 | struct ad7192_state { |
136 | struct spi_device *spi; | ||
137 | struct iio_trigger *trig; | ||
138 | struct regulator *reg; | 139 | struct regulator *reg; |
139 | wait_queue_head_t wq_data_avail; | ||
140 | bool done; | ||
141 | bool irq_dis; | ||
142 | u16 int_vref_mv; | 140 | u16 int_vref_mv; |
143 | u32 mclk; | 141 | u32 mclk; |
144 | u32 f_order; | 142 | u32 f_order; |
@@ -147,178 +145,45 @@ struct ad7192_state { | |||
147 | u32 scale_avail[8][2]; | 145 | u32 scale_avail[8][2]; |
148 | u8 gpocon; | 146 | u8 gpocon; |
149 | u8 devid; | 147 | u8 devid; |
150 | /* | ||
151 | * DMA (thus cache coherency maintenance) requires the | ||
152 | * transfer buffers to live in their own cache lines. | ||
153 | */ | ||
154 | u8 data[4] ____cacheline_aligned; | ||
155 | }; | ||
156 | |||
157 | static int __ad7192_write_reg(struct ad7192_state *st, bool locked, | ||
158 | bool cs_change, unsigned char reg, | ||
159 | unsigned size, unsigned val) | ||
160 | { | ||
161 | u8 *data = st->data; | ||
162 | struct spi_transfer t = { | ||
163 | .tx_buf = data, | ||
164 | .len = size + 1, | ||
165 | .cs_change = cs_change, | ||
166 | }; | ||
167 | struct spi_message m; | ||
168 | |||
169 | data[0] = AD7192_COMM_WRITE | AD7192_COMM_ADDR(reg); | ||
170 | |||
171 | switch (size) { | ||
172 | case 3: | ||
173 | data[1] = val >> 16; | ||
174 | data[2] = val >> 8; | ||
175 | data[3] = val; | ||
176 | break; | ||
177 | case 2: | ||
178 | data[1] = val >> 8; | ||
179 | data[2] = val; | ||
180 | break; | ||
181 | case 1: | ||
182 | data[1] = val; | ||
183 | break; | ||
184 | default: | ||
185 | return -EINVAL; | ||
186 | } | ||
187 | 148 | ||
188 | spi_message_init(&m); | 149 | struct ad_sigma_delta sd; |
189 | spi_message_add_tail(&t, &m); | 150 | }; |
190 | |||
191 | if (locked) | ||
192 | return spi_sync_locked(st->spi, &m); | ||
193 | else | ||
194 | return spi_sync(st->spi, &m); | ||
195 | } | ||
196 | 151 | ||
197 | static int ad7192_write_reg(struct ad7192_state *st, | 152 | static struct ad7192_state *ad_sigma_delta_to_ad7192(struct ad_sigma_delta *sd) |
198 | unsigned reg, unsigned size, unsigned val) | ||
199 | { | 153 | { |
200 | return __ad7192_write_reg(st, false, false, reg, size, val); | 154 | return container_of(sd, struct ad7192_state, sd); |
201 | } | 155 | } |
202 | 156 | ||
203 | static int __ad7192_read_reg(struct ad7192_state *st, bool locked, | 157 | static int ad7192_set_channel(struct ad_sigma_delta *sd, unsigned int channel) |
204 | bool cs_change, unsigned char reg, | ||
205 | int *val, unsigned size) | ||
206 | { | 158 | { |
207 | u8 *data = st->data; | 159 | struct ad7192_state *st = ad_sigma_delta_to_ad7192(sd); |
208 | int ret; | ||
209 | struct spi_transfer t[] = { | ||
210 | { | ||
211 | .tx_buf = data, | ||
212 | .len = 1, | ||
213 | }, { | ||
214 | .rx_buf = data, | ||
215 | .len = size, | ||
216 | .cs_change = cs_change, | ||
217 | }, | ||
218 | }; | ||
219 | struct spi_message m; | ||
220 | |||
221 | data[0] = AD7192_COMM_READ | AD7192_COMM_ADDR(reg); | ||
222 | |||
223 | spi_message_init(&m); | ||
224 | spi_message_add_tail(&t[0], &m); | ||
225 | spi_message_add_tail(&t[1], &m); | ||
226 | |||
227 | if (locked) | ||
228 | ret = spi_sync_locked(st->spi, &m); | ||
229 | else | ||
230 | ret = spi_sync(st->spi, &m); | ||
231 | 160 | ||
232 | if (ret < 0) | 161 | st->conf &= ~AD7192_CONF_CHAN_MASK; |
233 | return ret; | 162 | st->conf |= AD7192_CONF_CHAN(channel); |
234 | 163 | ||
235 | switch (size) { | 164 | return ad_sd_write_reg(&st->sd, AD7192_REG_CONF, 3, st->conf); |
236 | case 3: | ||
237 | *val = data[0] << 16 | data[1] << 8 | data[2]; | ||
238 | break; | ||
239 | case 2: | ||
240 | *val = data[0] << 8 | data[1]; | ||
241 | break; | ||
242 | case 1: | ||
243 | *val = data[0]; | ||
244 | break; | ||
245 | default: | ||
246 | return -EINVAL; | ||
247 | } | ||
248 | |||
249 | return 0; | ||
250 | } | 165 | } |
251 | 166 | ||
252 | static int ad7192_read_reg(struct ad7192_state *st, | 167 | static int ad7192_set_mode(struct ad_sigma_delta *sd, |
253 | unsigned reg, int *val, unsigned size) | 168 | enum ad_sigma_delta_mode mode) |
254 | { | 169 | { |
255 | return __ad7192_read_reg(st, 0, 0, reg, val, size); | 170 | struct ad7192_state *st = ad_sigma_delta_to_ad7192(sd); |
256 | } | ||
257 | |||
258 | static int ad7192_read(struct ad7192_state *st, unsigned ch, | ||
259 | unsigned len, int *val) | ||
260 | { | ||
261 | int ret; | ||
262 | st->conf = (st->conf & ~AD7192_CONF_CHAN(-1)) | | ||
263 | AD7192_CONF_CHAN(1 << ch); | ||
264 | st->mode = (st->mode & ~AD7192_MODE_SEL(-1)) | | ||
265 | AD7192_MODE_SEL(AD7192_MODE_SINGLE); | ||
266 | |||
267 | ad7192_write_reg(st, AD7192_REG_CONF, 3, st->conf); | ||
268 | 171 | ||
269 | spi_bus_lock(st->spi->master); | 172 | st->mode &= ~AD7192_MODE_SEL_MASK; |
270 | st->done = false; | 173 | st->mode |= AD7192_MODE_SEL(mode); |
271 | 174 | ||
272 | ret = __ad7192_write_reg(st, 1, 1, AD7192_REG_MODE, 3, st->mode); | 175 | return ad_sd_write_reg(&st->sd, AD7192_REG_MODE, 3, st->mode); |
273 | if (ret < 0) | ||
274 | goto out; | ||
275 | |||
276 | st->irq_dis = false; | ||
277 | enable_irq(st->spi->irq); | ||
278 | wait_event_interruptible(st->wq_data_avail, st->done); | ||
279 | |||
280 | ret = __ad7192_read_reg(st, 1, 0, AD7192_REG_DATA, val, len); | ||
281 | out: | ||
282 | spi_bus_unlock(st->spi->master); | ||
283 | |||
284 | return ret; | ||
285 | } | 176 | } |
286 | 177 | ||
287 | static int ad7192_calibrate(struct ad7192_state *st, unsigned mode, unsigned ch) | 178 | static const struct ad_sigma_delta_info ad7192_sigma_delta_info = { |
288 | { | 179 | .set_channel = ad7192_set_channel, |
289 | int ret; | 180 | .set_mode = ad7192_set_mode, |
290 | 181 | .has_registers = true, | |
291 | st->conf = (st->conf & ~AD7192_CONF_CHAN(-1)) | | 182 | .addr_shift = 3, |
292 | AD7192_CONF_CHAN(1 << ch); | 183 | .read_mask = BIT(6), |
293 | st->mode = (st->mode & ~AD7192_MODE_SEL(-1)) | AD7192_MODE_SEL(mode); | 184 | }; |
294 | |||
295 | ad7192_write_reg(st, AD7192_REG_CONF, 3, st->conf); | ||
296 | |||
297 | spi_bus_lock(st->spi->master); | ||
298 | st->done = false; | ||
299 | |||
300 | ret = __ad7192_write_reg(st, 1, 1, AD7192_REG_MODE, 3, | ||
301 | (st->devid != ID_AD7195) ? | ||
302 | st->mode | AD7192_MODE_CLKDIV : | ||
303 | st->mode); | ||
304 | if (ret < 0) | ||
305 | goto out; | ||
306 | |||
307 | st->irq_dis = false; | ||
308 | enable_irq(st->spi->irq); | ||
309 | wait_event_interruptible(st->wq_data_avail, st->done); | ||
310 | |||
311 | st->mode = (st->mode & ~AD7192_MODE_SEL(-1)) | | ||
312 | AD7192_MODE_SEL(AD7192_MODE_IDLE); | ||
313 | |||
314 | ret = __ad7192_write_reg(st, 1, 0, AD7192_REG_MODE, 3, st->mode); | ||
315 | out: | ||
316 | spi_bus_unlock(st->spi->master); | ||
317 | |||
318 | return ret; | ||
319 | } | ||
320 | 185 | ||
321 | static const u8 ad7192_calib_arr[8][2] = { | 186 | static const struct ad_sd_calib_data ad7192_calib_arr[8] = { |
322 | {AD7192_MODE_CAL_INT_ZERO, AD7192_CH_AIN1}, | 187 | {AD7192_MODE_CAL_INT_ZERO, AD7192_CH_AIN1}, |
323 | {AD7192_MODE_CAL_INT_FULL, AD7192_CH_AIN1}, | 188 | {AD7192_MODE_CAL_INT_FULL, AD7192_CH_AIN1}, |
324 | {AD7192_MODE_CAL_INT_ZERO, AD7192_CH_AIN2}, | 189 | {AD7192_MODE_CAL_INT_ZERO, AD7192_CH_AIN2}, |
@@ -331,45 +196,34 @@ static const u8 ad7192_calib_arr[8][2] = { | |||
331 | 196 | ||
332 | static int ad7192_calibrate_all(struct ad7192_state *st) | 197 | static int ad7192_calibrate_all(struct ad7192_state *st) |
333 | { | 198 | { |
334 | int i, ret; | 199 | return ad_sd_calibrate_all(&st->sd, ad7192_calib_arr, |
335 | 200 | ARRAY_SIZE(ad7192_calib_arr)); | |
336 | for (i = 0; i < ARRAY_SIZE(ad7192_calib_arr); i++) { | ||
337 | ret = ad7192_calibrate(st, ad7192_calib_arr[i][0], | ||
338 | ad7192_calib_arr[i][1]); | ||
339 | if (ret) | ||
340 | goto out; | ||
341 | } | ||
342 | |||
343 | return 0; | ||
344 | out: | ||
345 | dev_err(&st->spi->dev, "Calibration failed\n"); | ||
346 | return ret; | ||
347 | } | 201 | } |
348 | 202 | ||
349 | static int ad7192_setup(struct ad7192_state *st, | 203 | static int ad7192_setup(struct ad7192_state *st, |
350 | const struct ad7192_platform_data *pdata) | 204 | const struct ad7192_platform_data *pdata) |
351 | { | 205 | { |
352 | struct iio_dev *indio_dev = spi_get_drvdata(st->spi); | 206 | struct iio_dev *indio_dev = spi_get_drvdata(st->sd.spi); |
353 | unsigned long long scale_uv; | 207 | unsigned long long scale_uv; |
354 | int i, ret, id; | 208 | int i, ret, id; |
355 | u8 ones[6]; | 209 | u8 ones[6]; |
356 | 210 | ||
357 | /* reset the serial interface */ | 211 | /* reset the serial interface */ |
358 | memset(&ones, 0xFF, 6); | 212 | memset(&ones, 0xFF, 6); |
359 | ret = spi_write(st->spi, &ones, 6); | 213 | ret = spi_write(st->sd.spi, &ones, 6); |
360 | if (ret < 0) | 214 | if (ret < 0) |
361 | goto out; | 215 | goto out; |
362 | msleep(1); /* Wait for at least 500us */ | 216 | msleep(1); /* Wait for at least 500us */ |
363 | 217 | ||
364 | /* write/read test for device presence */ | 218 | /* write/read test for device presence */ |
365 | ret = ad7192_read_reg(st, AD7192_REG_ID, &id, 1); | 219 | ret = ad_sd_read_reg(&st->sd, AD7192_REG_ID, 1, &id); |
366 | if (ret) | 220 | if (ret) |
367 | goto out; | 221 | goto out; |
368 | 222 | ||
369 | id &= AD7192_ID_MASK; | 223 | id &= AD7192_ID_MASK; |
370 | 224 | ||
371 | if (id != st->devid) | 225 | if (id != st->devid) |
372 | dev_warn(&st->spi->dev, "device ID query failed (0x%X)\n", id); | 226 | dev_warn(&st->sd.spi->dev, "device ID query failed (0x%X)\n", id); |
373 | 227 | ||
374 | switch (pdata->clock_source_sel) { | 228 | switch (pdata->clock_source_sel) { |
375 | case AD7192_CLK_EXT_MCLK1_2: | 229 | case AD7192_CLK_EXT_MCLK1_2: |
@@ -422,11 +276,11 @@ static int ad7192_setup(struct ad7192_state *st, | |||
422 | if (pdata->burnout_curr_en) | 276 | if (pdata->burnout_curr_en) |
423 | st->conf |= AD7192_CONF_BURN; | 277 | st->conf |= AD7192_CONF_BURN; |
424 | 278 | ||
425 | ret = ad7192_write_reg(st, AD7192_REG_MODE, 3, st->mode); | 279 | ret = ad_sd_write_reg(&st->sd, AD7192_REG_MODE, 3, st->mode); |
426 | if (ret) | 280 | if (ret) |
427 | goto out; | 281 | goto out; |
428 | 282 | ||
429 | ret = ad7192_write_reg(st, AD7192_REG_CONF, 3, st->conf); | 283 | ret = ad_sd_write_reg(&st->sd, AD7192_REG_CONF, 3, st->conf); |
430 | if (ret) | 284 | if (ret) |
431 | goto out; | 285 | goto out; |
432 | 286 | ||
@@ -447,181 +301,10 @@ static int ad7192_setup(struct ad7192_state *st, | |||
447 | 301 | ||
448 | return 0; | 302 | return 0; |
449 | out: | 303 | out: |
450 | dev_err(&st->spi->dev, "setup failed\n"); | 304 | dev_err(&st->sd.spi->dev, "setup failed\n"); |
451 | return ret; | 305 | return ret; |
452 | } | 306 | } |
453 | 307 | ||
454 | static int ad7192_ring_preenable(struct iio_dev *indio_dev) | ||
455 | { | ||
456 | struct ad7192_state *st = iio_priv(indio_dev); | ||
457 | unsigned channel; | ||
458 | int ret; | ||
459 | |||
460 | if (bitmap_empty(indio_dev->active_scan_mask, indio_dev->masklength)) | ||
461 | return -EINVAL; | ||
462 | |||
463 | ret = iio_sw_buffer_preenable(indio_dev); | ||
464 | if (ret < 0) | ||
465 | return ret; | ||
466 | |||
467 | channel = find_first_bit(indio_dev->active_scan_mask, | ||
468 | indio_dev->masklength); | ||
469 | |||
470 | st->mode = (st->mode & ~AD7192_MODE_SEL(-1)) | | ||
471 | AD7192_MODE_SEL(AD7192_MODE_CONT); | ||
472 | st->conf = (st->conf & ~AD7192_CONF_CHAN(-1)) | | ||
473 | AD7192_CONF_CHAN(1 << indio_dev->channels[channel].address); | ||
474 | |||
475 | ad7192_write_reg(st, AD7192_REG_CONF, 3, st->conf); | ||
476 | |||
477 | spi_bus_lock(st->spi->master); | ||
478 | __ad7192_write_reg(st, 1, 1, AD7192_REG_MODE, 3, st->mode); | ||
479 | |||
480 | st->irq_dis = false; | ||
481 | enable_irq(st->spi->irq); | ||
482 | |||
483 | return 0; | ||
484 | } | ||
485 | |||
486 | static int ad7192_ring_postdisable(struct iio_dev *indio_dev) | ||
487 | { | ||
488 | struct ad7192_state *st = iio_priv(indio_dev); | ||
489 | |||
490 | st->mode = (st->mode & ~AD7192_MODE_SEL(-1)) | | ||
491 | AD7192_MODE_SEL(AD7192_MODE_IDLE); | ||
492 | |||
493 | st->done = false; | ||
494 | wait_event_interruptible(st->wq_data_avail, st->done); | ||
495 | |||
496 | if (!st->irq_dis) | ||
497 | disable_irq_nosync(st->spi->irq); | ||
498 | |||
499 | __ad7192_write_reg(st, 1, 0, AD7192_REG_MODE, 3, st->mode); | ||
500 | |||
501 | return spi_bus_unlock(st->spi->master); | ||
502 | } | ||
503 | |||
504 | /** | ||
505 | * ad7192_trigger_handler() bh of trigger launched polling to ring buffer | ||
506 | **/ | ||
507 | static irqreturn_t ad7192_trigger_handler(int irq, void *p) | ||
508 | { | ||
509 | struct iio_poll_func *pf = p; | ||
510 | struct iio_dev *indio_dev = pf->indio_dev; | ||
511 | struct iio_buffer *ring = indio_dev->buffer; | ||
512 | struct ad7192_state *st = iio_priv(indio_dev); | ||
513 | s64 dat64[2]; | ||
514 | s32 *dat32 = (s32 *)dat64; | ||
515 | |||
516 | if (!bitmap_empty(indio_dev->active_scan_mask, indio_dev->masklength)) | ||
517 | __ad7192_read_reg(st, 1, 1, AD7192_REG_DATA, | ||
518 | dat32, | ||
519 | indio_dev->channels[0].scan_type.realbits/8); | ||
520 | |||
521 | /* Guaranteed to be aligned with 8 byte boundary */ | ||
522 | if (indio_dev->scan_timestamp) | ||
523 | dat64[1] = pf->timestamp; | ||
524 | |||
525 | ring->access->store_to(ring, (u8 *)dat64, pf->timestamp); | ||
526 | |||
527 | iio_trigger_notify_done(indio_dev->trig); | ||
528 | st->irq_dis = false; | ||
529 | enable_irq(st->spi->irq); | ||
530 | |||
531 | return IRQ_HANDLED; | ||
532 | } | ||
533 | |||
534 | static const struct iio_buffer_setup_ops ad7192_ring_setup_ops = { | ||
535 | .preenable = &ad7192_ring_preenable, | ||
536 | .postenable = &iio_triggered_buffer_postenable, | ||
537 | .predisable = &iio_triggered_buffer_predisable, | ||
538 | .postdisable = &ad7192_ring_postdisable, | ||
539 | .validate_scan_mask = &iio_validate_scan_mask_onehot, | ||
540 | }; | ||
541 | |||
542 | static int ad7192_register_ring_funcs_and_init(struct iio_dev *indio_dev) | ||
543 | { | ||
544 | return iio_triggered_buffer_setup(indio_dev, &iio_pollfunc_store_time, | ||
545 | &ad7192_trigger_handler, &ad7192_ring_setup_ops); | ||
546 | } | ||
547 | |||
548 | static void ad7192_ring_cleanup(struct iio_dev *indio_dev) | ||
549 | { | ||
550 | iio_triggered_buffer_cleanup(indio_dev); | ||
551 | } | ||
552 | |||
553 | /** | ||
554 | * ad7192_data_rdy_trig_poll() the event handler for the data rdy trig | ||
555 | **/ | ||
556 | static irqreturn_t ad7192_data_rdy_trig_poll(int irq, void *private) | ||
557 | { | ||
558 | struct ad7192_state *st = iio_priv(private); | ||
559 | |||
560 | st->done = true; | ||
561 | wake_up_interruptible(&st->wq_data_avail); | ||
562 | disable_irq_nosync(irq); | ||
563 | st->irq_dis = true; | ||
564 | iio_trigger_poll(st->trig, iio_get_time_ns()); | ||
565 | |||
566 | return IRQ_HANDLED; | ||
567 | } | ||
568 | |||
569 | static struct iio_trigger_ops ad7192_trigger_ops = { | ||
570 | .owner = THIS_MODULE, | ||
571 | }; | ||
572 | |||
573 | static int ad7192_probe_trigger(struct iio_dev *indio_dev) | ||
574 | { | ||
575 | struct ad7192_state *st = iio_priv(indio_dev); | ||
576 | int ret; | ||
577 | |||
578 | st->trig = iio_trigger_alloc("%s-dev%d", | ||
579 | spi_get_device_id(st->spi)->name, | ||
580 | indio_dev->id); | ||
581 | if (st->trig == NULL) { | ||
582 | ret = -ENOMEM; | ||
583 | goto error_ret; | ||
584 | } | ||
585 | st->trig->ops = &ad7192_trigger_ops; | ||
586 | ret = request_irq(st->spi->irq, | ||
587 | ad7192_data_rdy_trig_poll, | ||
588 | IRQF_TRIGGER_LOW, | ||
589 | spi_get_device_id(st->spi)->name, | ||
590 | indio_dev); | ||
591 | if (ret) | ||
592 | goto error_free_trig; | ||
593 | |||
594 | disable_irq_nosync(st->spi->irq); | ||
595 | st->irq_dis = true; | ||
596 | st->trig->dev.parent = &st->spi->dev; | ||
597 | st->trig->private_data = indio_dev; | ||
598 | |||
599 | ret = iio_trigger_register(st->trig); | ||
600 | |||
601 | /* select default trigger */ | ||
602 | indio_dev->trig = st->trig; | ||
603 | if (ret) | ||
604 | goto error_free_irq; | ||
605 | |||
606 | return 0; | ||
607 | |||
608 | error_free_irq: | ||
609 | free_irq(st->spi->irq, indio_dev); | ||
610 | error_free_trig: | ||
611 | iio_trigger_free(st->trig); | ||
612 | error_ret: | ||
613 | return ret; | ||
614 | } | ||
615 | |||
616 | static void ad7192_remove_trigger(struct iio_dev *indio_dev) | ||
617 | { | ||
618 | struct ad7192_state *st = iio_priv(indio_dev); | ||
619 | |||
620 | iio_trigger_unregister(st->trig); | ||
621 | free_irq(st->spi->irq, indio_dev); | ||
622 | iio_trigger_free(st->trig); | ||
623 | } | ||
624 | |||
625 | static ssize_t ad7192_read_frequency(struct device *dev, | 308 | static ssize_t ad7192_read_frequency(struct device *dev, |
626 | struct device_attribute *attr, | 309 | struct device_attribute *attr, |
627 | char *buf) | 310 | char *buf) |
@@ -661,7 +344,7 @@ static ssize_t ad7192_write_frequency(struct device *dev, | |||
661 | 344 | ||
662 | st->mode &= ~AD7192_MODE_RATE(-1); | 345 | st->mode &= ~AD7192_MODE_RATE(-1); |
663 | st->mode |= AD7192_MODE_RATE(div); | 346 | st->mode |= AD7192_MODE_RATE(div); |
664 | ad7192_write_reg(st, AD7192_REG_MODE, 3, st->mode); | 347 | ad_sd_write_reg(&st->sd, AD7192_REG_MODE, 3, st->mode); |
665 | 348 | ||
666 | out: | 349 | out: |
667 | mutex_unlock(&indio_dev->mlock); | 350 | mutex_unlock(&indio_dev->mlock); |
@@ -673,7 +356,6 @@ static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO, | |||
673 | ad7192_read_frequency, | 356 | ad7192_read_frequency, |
674 | ad7192_write_frequency); | 357 | ad7192_write_frequency); |
675 | 358 | ||
676 | |||
677 | static ssize_t ad7192_show_scale_available(struct device *dev, | 359 | static ssize_t ad7192_show_scale_available(struct device *dev, |
678 | struct device_attribute *attr, char *buf) | 360 | struct device_attribute *attr, char *buf) |
679 | { | 361 | { |
@@ -745,7 +427,7 @@ static ssize_t ad7192_set(struct device *dev, | |||
745 | else | 427 | else |
746 | st->gpocon &= ~AD7192_GPOCON_BPDSW; | 428 | st->gpocon &= ~AD7192_GPOCON_BPDSW; |
747 | 429 | ||
748 | ad7192_write_reg(st, AD7192_REG_GPOCON, 1, st->gpocon); | 430 | ad_sd_write_reg(&st->sd, AD7192_REG_GPOCON, 1, st->gpocon); |
749 | break; | 431 | break; |
750 | case AD7192_REG_MODE: | 432 | case AD7192_REG_MODE: |
751 | if (val) | 433 | if (val) |
@@ -753,7 +435,7 @@ static ssize_t ad7192_set(struct device *dev, | |||
753 | else | 435 | else |
754 | st->mode &= ~AD7192_MODE_ACX; | 436 | st->mode &= ~AD7192_MODE_ACX; |
755 | 437 | ||
756 | ad7192_write_reg(st, AD7192_REG_MODE, 3, st->mode); | 438 | ad_sd_write_reg(&st->sd, AD7192_REG_MODE, 3, st->mode); |
757 | break; | 439 | break; |
758 | default: | 440 | default: |
759 | ret = -EINVAL; | 441 | ret = -EINVAL; |
@@ -809,27 +491,11 @@ static int ad7192_read_raw(struct iio_dev *indio_dev, | |||
809 | long m) | 491 | long m) |
810 | { | 492 | { |
811 | struct ad7192_state *st = iio_priv(indio_dev); | 493 | struct ad7192_state *st = iio_priv(indio_dev); |
812 | int ret, smpl = 0; | ||
813 | bool unipolar = !!(st->conf & AD7192_CONF_UNIPOLAR); | 494 | bool unipolar = !!(st->conf & AD7192_CONF_UNIPOLAR); |
814 | 495 | ||
815 | switch (m) { | 496 | switch (m) { |
816 | case IIO_CHAN_INFO_RAW: | 497 | case IIO_CHAN_INFO_RAW: |
817 | mutex_lock(&indio_dev->mlock); | 498 | return ad_sigma_delta_single_conversion(indio_dev, chan, val); |
818 | if (iio_buffer_enabled(indio_dev)) | ||
819 | ret = -EBUSY; | ||
820 | else | ||
821 | ret = ad7192_read(st, chan->address, | ||
822 | chan->scan_type.realbits / 8, &smpl); | ||
823 | mutex_unlock(&indio_dev->mlock); | ||
824 | |||
825 | if (ret < 0) | ||
826 | return ret; | ||
827 | |||
828 | *val = (smpl >> chan->scan_type.shift) & | ||
829 | ((1 << (chan->scan_type.realbits)) - 1); | ||
830 | |||
831 | return IIO_VAL_INT; | ||
832 | |||
833 | case IIO_CHAN_INFO_SCALE: | 499 | case IIO_CHAN_INFO_SCALE: |
834 | switch (chan->type) { | 500 | switch (chan->type) { |
835 | case IIO_VOLTAGE: | 501 | case IIO_VOLTAGE: |
@@ -880,16 +546,16 @@ static int ad7192_write_raw(struct iio_dev *indio_dev, | |||
880 | ret = -EINVAL; | 546 | ret = -EINVAL; |
881 | for (i = 0; i < ARRAY_SIZE(st->scale_avail); i++) | 547 | for (i = 0; i < ARRAY_SIZE(st->scale_avail); i++) |
882 | if (val2 == st->scale_avail[i][1]) { | 548 | if (val2 == st->scale_avail[i][1]) { |
549 | ret = 0; | ||
883 | tmp = st->conf; | 550 | tmp = st->conf; |
884 | st->conf &= ~AD7192_CONF_GAIN(-1); | 551 | st->conf &= ~AD7192_CONF_GAIN(-1); |
885 | st->conf |= AD7192_CONF_GAIN(i); | 552 | st->conf |= AD7192_CONF_GAIN(i); |
886 | 553 | if (tmp == st->conf) | |
887 | if (tmp != st->conf) { | 554 | break; |
888 | ad7192_write_reg(st, AD7192_REG_CONF, | 555 | ad_sd_write_reg(&st->sd, AD7192_REG_CONF, |
889 | 3, st->conf); | 556 | 3, st->conf); |
890 | ad7192_calibrate_all(st); | 557 | ad7192_calibrate_all(st); |
891 | } | 558 | break; |
892 | ret = 0; | ||
893 | } | 559 | } |
894 | break; | 560 | break; |
895 | default: | 561 | default: |
@@ -901,15 +567,6 @@ static int ad7192_write_raw(struct iio_dev *indio_dev, | |||
901 | return ret; | 567 | return ret; |
902 | } | 568 | } |
903 | 569 | ||
904 | static int ad7192_validate_trigger(struct iio_dev *indio_dev, | ||
905 | struct iio_trigger *trig) | ||
906 | { | ||
907 | if (indio_dev->trig != trig) | ||
908 | return -EINVAL; | ||
909 | |||
910 | return 0; | ||
911 | } | ||
912 | |||
913 | static int ad7192_write_raw_get_fmt(struct iio_dev *indio_dev, | 570 | static int ad7192_write_raw_get_fmt(struct iio_dev *indio_dev, |
914 | struct iio_chan_spec const *chan, | 571 | struct iio_chan_spec const *chan, |
915 | long mask) | 572 | long mask) |
@@ -922,7 +579,7 @@ static const struct iio_info ad7192_info = { | |||
922 | .write_raw = &ad7192_write_raw, | 579 | .write_raw = &ad7192_write_raw, |
923 | .write_raw_get_fmt = &ad7192_write_raw_get_fmt, | 580 | .write_raw_get_fmt = &ad7192_write_raw_get_fmt, |
924 | .attrs = &ad7192_attribute_group, | 581 | .attrs = &ad7192_attribute_group, |
925 | .validate_trigger = ad7192_validate_trigger, | 582 | .validate_trigger = ad_sd_validate_trigger, |
926 | .driver_module = THIS_MODULE, | 583 | .driver_module = THIS_MODULE, |
927 | }; | 584 | }; |
928 | 585 | ||
@@ -931,54 +588,19 @@ static const struct iio_info ad7195_info = { | |||
931 | .write_raw = &ad7192_write_raw, | 588 | .write_raw = &ad7192_write_raw, |
932 | .write_raw_get_fmt = &ad7192_write_raw_get_fmt, | 589 | .write_raw_get_fmt = &ad7192_write_raw_get_fmt, |
933 | .attrs = &ad7195_attribute_group, | 590 | .attrs = &ad7195_attribute_group, |
934 | .validate_trigger = ad7192_validate_trigger, | 591 | .validate_trigger = ad_sd_validate_trigger, |
935 | .driver_module = THIS_MODULE, | 592 | .driver_module = THIS_MODULE, |
936 | }; | 593 | }; |
937 | 594 | ||
938 | #define AD7192_CHAN_DIFF(_chan, _chan2, _name, _address, _si) \ | ||
939 | { .type = IIO_VOLTAGE, \ | ||
940 | .differential = 1, \ | ||
941 | .indexed = 1, \ | ||
942 | .extend_name = _name, \ | ||
943 | .channel = _chan, \ | ||
944 | .channel2 = _chan2, \ | ||
945 | .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \ | ||
946 | IIO_CHAN_INFO_SCALE_SHARED_BIT | \ | ||
947 | IIO_CHAN_INFO_OFFSET_SHARED_BIT, \ | ||
948 | .address = _address, \ | ||
949 | .scan_index = _si, \ | ||
950 | .scan_type = IIO_ST('u', 24, 32, 0)} | ||
951 | |||
952 | #define AD7192_CHAN(_chan, _address, _si) \ | ||
953 | { .type = IIO_VOLTAGE, \ | ||
954 | .indexed = 1, \ | ||
955 | .channel = _chan, \ | ||
956 | .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \ | ||
957 | IIO_CHAN_INFO_SCALE_SHARED_BIT | \ | ||
958 | IIO_CHAN_INFO_OFFSET_SHARED_BIT, \ | ||
959 | .address = _address, \ | ||
960 | .scan_index = _si, \ | ||
961 | .scan_type = IIO_ST('u', 24, 32, 0)} | ||
962 | |||
963 | #define AD7192_CHAN_TEMP(_chan, _address, _si) \ | ||
964 | { .type = IIO_TEMP, \ | ||
965 | .indexed = 1, \ | ||
966 | .channel = _chan, \ | ||
967 | .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \ | ||
968 | IIO_CHAN_INFO_SCALE_SEPARATE_BIT, \ | ||
969 | .address = _address, \ | ||
970 | .scan_index = _si, \ | ||
971 | .scan_type = IIO_ST('u', 24, 32, 0)} | ||
972 | |||
973 | static const struct iio_chan_spec ad7192_channels[] = { | 595 | static const struct iio_chan_spec ad7192_channels[] = { |
974 | AD7192_CHAN_DIFF(1, 2, NULL, AD7192_CH_AIN1P_AIN2M, 0), | 596 | AD_SD_DIFF_CHANNEL(0, 1, 2, AD7192_CH_AIN1P_AIN2M, 24, 32, 0), |
975 | AD7192_CHAN_DIFF(3, 4, NULL, AD7192_CH_AIN3P_AIN4M, 1), | 597 | AD_SD_DIFF_CHANNEL(1, 3, 4, AD7192_CH_AIN3P_AIN4M, 24, 32, 0), |
976 | AD7192_CHAN_TEMP(0, AD7192_CH_TEMP, 2), | 598 | AD_SD_TEMP_CHANNEL(2, AD7192_CH_TEMP, 24, 32, 0), |
977 | AD7192_CHAN_DIFF(2, 2, "shorted", AD7192_CH_AIN2P_AIN2M, 3), | 599 | AD_SD_SHORTED_CHANNEL(3, 2, AD7192_CH_AIN2P_AIN2M, 24, 32, 0), |
978 | AD7192_CHAN(1, AD7192_CH_AIN1, 4), | 600 | AD_SD_CHANNEL(4, 1, AD7192_CH_AIN1, 24, 32, 0), |
979 | AD7192_CHAN(2, AD7192_CH_AIN2, 5), | 601 | AD_SD_CHANNEL(5, 2, AD7192_CH_AIN2, 24, 32, 0), |
980 | AD7192_CHAN(3, AD7192_CH_AIN3, 6), | 602 | AD_SD_CHANNEL(6, 3, AD7192_CH_AIN3, 24, 32, 0), |
981 | AD7192_CHAN(4, AD7192_CH_AIN4, 7), | 603 | AD_SD_CHANNEL(7, 4, AD7192_CH_AIN4, 24, 32, 0), |
982 | IIO_CHAN_SOFT_TIMESTAMP(8), | 604 | IIO_CHAN_SOFT_TIMESTAMP(8), |
983 | }; | 605 | }; |
984 | 606 | ||
@@ -1022,7 +644,6 @@ static int __devinit ad7192_probe(struct spi_device *spi) | |||
1022 | dev_warn(&spi->dev, "reference voltage undefined\n"); | 644 | dev_warn(&spi->dev, "reference voltage undefined\n"); |
1023 | 645 | ||
1024 | spi_set_drvdata(spi, indio_dev); | 646 | spi_set_drvdata(spi, indio_dev); |
1025 | st->spi = spi; | ||
1026 | st->devid = spi_get_device_id(spi)->driver_data; | 647 | st->devid = spi_get_device_id(spi)->driver_data; |
1027 | indio_dev->dev.parent = &spi->dev; | 648 | indio_dev->dev.parent = &spi->dev; |
1028 | indio_dev->name = spi_get_device_id(spi)->name; | 649 | indio_dev->name = spi_get_device_id(spi)->name; |
@@ -1034,16 +655,12 @@ static int __devinit ad7192_probe(struct spi_device *spi) | |||
1034 | else | 655 | else |
1035 | indio_dev->info = &ad7192_info; | 656 | indio_dev->info = &ad7192_info; |
1036 | 657 | ||
1037 | init_waitqueue_head(&st->wq_data_avail); | 658 | ad_sd_init(&st->sd, indio_dev, spi, &ad7192_sigma_delta_info); |
1038 | 659 | ||
1039 | ret = ad7192_register_ring_funcs_and_init(indio_dev); | 660 | ret = ad_sd_setup_buffer_and_trigger(indio_dev); |
1040 | if (ret) | 661 | if (ret) |
1041 | goto error_disable_reg; | 662 | goto error_disable_reg; |
1042 | 663 | ||
1043 | ret = ad7192_probe_trigger(indio_dev); | ||
1044 | if (ret) | ||
1045 | goto error_ring_cleanup; | ||
1046 | |||
1047 | ret = ad7192_setup(st, pdata); | 664 | ret = ad7192_setup(st, pdata); |
1048 | if (ret) | 665 | if (ret) |
1049 | goto error_remove_trigger; | 666 | goto error_remove_trigger; |
@@ -1054,9 +671,7 @@ static int __devinit ad7192_probe(struct spi_device *spi) | |||
1054 | return 0; | 671 | return 0; |
1055 | 672 | ||
1056 | error_remove_trigger: | 673 | error_remove_trigger: |
1057 | ad7192_remove_trigger(indio_dev); | 674 | ad_sd_cleanup_buffer_and_trigger(indio_dev); |
1058 | error_ring_cleanup: | ||
1059 | ad7192_ring_cleanup(indio_dev); | ||
1060 | error_disable_reg: | 675 | error_disable_reg: |
1061 | if (!IS_ERR(st->reg)) | 676 | if (!IS_ERR(st->reg)) |
1062 | regulator_disable(st->reg); | 677 | regulator_disable(st->reg); |
@@ -1075,8 +690,7 @@ static int ad7192_remove(struct spi_device *spi) | |||
1075 | struct ad7192_state *st = iio_priv(indio_dev); | 690 | struct ad7192_state *st = iio_priv(indio_dev); |
1076 | 691 | ||
1077 | iio_device_unregister(indio_dev); | 692 | iio_device_unregister(indio_dev); |
1078 | ad7192_remove_trigger(indio_dev); | 693 | ad_sd_cleanup_buffer_and_trigger(indio_dev); |
1079 | ad7192_ring_cleanup(indio_dev); | ||
1080 | 694 | ||
1081 | if (!IS_ERR(st->reg)) { | 695 | if (!IS_ERR(st->reg)) { |
1082 | regulator_disable(st->reg); | 696 | regulator_disable(st->reg); |