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path: root/drivers/gpu/drm/i915/intel_dpll_mgr.c
Commit message (Expand)AuthorAge
* drm/i915/icl: Fix crash when getting DPLL of a MST encoder in TC portsJosé Roberto de Souza2018-10-31
* drm/i915/icl: Refactor icl pll functionsVandita Kulkarni2018-10-16
* drm/i915/icl: Use helper functions to classify the portsVandita Kulkarni2018-10-16
* drm/i915/icl: Refactor get_ddi_pll using helper funcVandita Kulkarni2018-10-16
* drm/i915: Fixup kernel doc for param name changesChris Wilson2018-10-08
* drm/i915: Make shared dpll functions take crtc_state, v3.Maarten Lankhorst2018-10-05
* drm/i915: Fix ICL+ HDMI clock readoutVille Syrjälä2018-09-04
* drm/i915/icl: Implement HSDIV_RATIO of MG_CLKTOP2_HSCLKCTL_PORT reg as separa...Manasi Navare2018-08-20
* drm/i915/icl: Add TBT checks for PLL calculationsAnusha Srivatsa2018-07-27
* Merge drm/drm-next into drm-intel-next-queuedRodrigo Vivi2018-07-23
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| * Merge tag 'drm-intel-next-2018-07-09' of git://anongit.freedesktop.org/drm/dr...Dave Airlie2018-07-18
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| * | drm/i915: Use drm_plane_mask() & co.Ville Syrjälä2018-07-02
* | | drm/i915/icl: compute the TBT PLL registersPaulo Zanoni2018-07-19
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* | drm/i915: Mark expected switch fall-throughsGustavo A. R. Silva2018-07-05
* | drm/i915/icl: Do read-modify-write as needed during MG PLL programmingImre Deak2018-06-21
* | drm/i915/icl: Fix MG PLL setup when refclk is 38.4MHzImre Deak2018-06-21
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* drm/i915/icl: start adding the TBT pllPaulo Zanoni2018-06-14
* drm/i915/icl: Get DDI clock for ICL based on PLLs.Manasi Navare2018-06-01
* drm/i915/icl: compute the MG PLL registersPaulo Zanoni2018-05-07
* drm/i915/icl: compute the combo PHY (DPLL) DP registersPaulo Zanoni2018-05-07
* drm/i915/icl: compute the combo PHY (DPLL) HDMI registersPaulo Zanoni2018-05-07
* drm/i915/icl: add basic support for the ICL clocksPaulo Zanoni2018-05-07
* drm/i915: reorder dpll_info membersLucas De Marchi2018-03-27
* drm/i915: use flags from dpll_info embedded in intel_shared_dpllLucas De Marchi2018-03-27
* drm/i915: use id from intel_shared_dpll.infoLucas De Marchi2018-03-27
* drm/i915: use name from intel_shared_dpll.infoLucas De Marchi2018-03-27
* drm/i915: use funcs from intel_shared_dpll.infoLucas De Marchi2018-03-27
* drm/i915: add dpll_info inside intel_shared_dpllLucas De Marchi2018-03-27
* drm/i915: move dpll_info to headerLucas De Marchi2018-03-27
* drm/i915/cnl: Simplify dco_fraction calculation.Rodrigo Vivi2017-11-16
* drm/i915/cnl: Don't blindly replace qdiv.Rodrigo Vivi2017-11-16
* drm/i915/cnl: Fix wrpll math for higher freqs.Rodrigo Vivi2017-11-16
* drm/i915/cnl: Fix, simplify and unify wrpll variable sizes.Rodrigo Vivi2017-11-16
* drm/i915/cnl: Remove useless conversion.Rodrigo Vivi2017-11-16
* drm/i915/cnl: Remove spurious central_freq.Rodrigo Vivi2017-11-16
* drm/i915: Replace dig_port->port with encoder port for BXT DPLL selectionVille Syrjälä2017-11-09
* drm/i915: Start using output_types for DPLL selectionVille Syrjälä2017-10-27
* drm/i915: Adjust system agent voltage on CNL if required by DDI portsVille Syrjälä2017-10-25
* drm/i915/cnl: Fix PLL initialization for HDMI.Rodrigo Vivi2017-10-16
* drm/i915/cnl: Dump the right pll registers when dumping pipe config.Rodrigo Vivi2017-08-11
* drm/i915/cnl: make function cnl_ddi_dp_set_dpll_hw_state staticColin Ian King2017-06-15
* drm/i915/cnl: Enable wrpll computation for CNLKahola, Mika2017-06-12
* drm/i915/cnl: Initialize PLLsRodrigo Vivi2017-06-12
* drm/i915: Remove unused function intel_ddi_get_link_dpll()Ander Conselvan de Oliveira2017-02-10
* drm/i915/bxt: Add MST support when do DPLL calculationLee, Shawn C2017-02-03
* drm/i915: Introduce IS_GEN9_BC for Skylake and Kabylake.Rodrigo Vivi2017-01-24
* drm/i915: Move intel_atomic_get_shared_dpll_state() to intel_dpll_mgr.cAnder Conselvan de Oliveira2017-01-02
* drm/i915: Add dpll entrypoint for dumping hw stateAnder Conselvan de Oliveira2016-12-30
* drm/i915: Update kerneldoc for intel_dpll_mgr.cAnder Conselvan de Oliveira2016-12-30
* drm/i915: Rename intel_shared_dpll->mode_set() to prepare()Ander Conselvan de Oliveira2016-12-30
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