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path: root/arch/mips/include/asm/mipsregs.h
Commit message (Expand)AuthorAge
* MIPS: cpu-features: Add cpu_has_ftlbJames Hogan2015-09-22
* MIPS: Rearrange ENTRYLO field definitionsJames Hogan2015-09-03
* MIPS: Treat CP1 control registers as unsigned ints.Ralf Baechle2015-09-03
* MIPS: Use unsigned int when reading CP0 registersChris Packham2015-09-03
* MIPS: Set up FTLB probability for I6400Markos Chandras2015-08-26
* MIPS: R12000: Enable branch prediction global historyJoshua Kinard2015-06-21
* MIPS: mipsregs.h: Add EntryLo bit definitionsJames Hogan2015-06-21
* MIPS: math-emu: Define IEEE 754-2008 feature control bitsMaciej W. Rozycki2015-04-07
* MIPS: math-emu: Implement the FCCR, FEXR and FENR registersMaciej W. Rozycki2015-04-07
* MIPS: mipsregs.h: Reindent CP0 Cause macrosMaciej W. Rozycki2015-04-07
* MIPS: mipsregs.h: Move TX39 macros out of the wayMaciej W. Rozycki2015-04-07
* MIPS: mipsregs.h: Reorder CP1 macro definitionsMaciej W. Rozycki2015-04-07
* MIPS: mipsregs.h: Remove broken commentsMaciej W. Rozycki2015-04-07
* MIPS: Add architectural FDC IRQ fieldsJames Hogan2015-03-31
* MIPS: Add arch CDMM definitions and probingJames Hogan2015-03-31
* Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds2015-02-21
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| * MIPS: Add set/clear CP0 macros for PageGrain registerSteven J. Hill2015-02-20
| * MIPS: asm: mipsregs: Add support for the LLADDR registerMarkos Chandras2015-02-17
| * MIPS: Add LLB bit and related feature for the Config 5 CP0 registerMarkos Chandras2015-02-17
* | MIPS: mipsregs.h: Add write_32bit_cp1_register()James Hogan2015-01-30
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* Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds2014-12-11
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| * MIPS: Add CP0 macros for extended EntryLo registersSteven J. Hill2014-11-24
| * MIPS: define bits introduced for hybrid FPRsPaul Burton2014-11-24
* | MIPS: cpu-probe: Set the FTLB probability bit on supported coresMarkos Chandras2014-11-24
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* MIPS: Fix build with binutils 2.24.51+Manuel Lauss2014-11-07
* MIPS: mipsreg: remove duplicate MIPS_CONF4_FTLBSETS_SHIFTDan Carpenter2014-08-01
* MIPS: define MAAR register accessors & bitsPaul Burton2014-08-01
* MIPS: kernel: cpu-probe: Detect unique RI/XI exceptionsLeonid Yegoshin2014-08-01
* MIPS: asm: Add register definitions for Hardware Table WalkerMarkos Chandras2014-08-01
* MIPS: Add function get_ebase_cpunumDavid Daney2014-05-30
* MIPS: MT: Remove SMTC supportRalf Baechle2014-05-23
* MIPS: Disable MIPS16/microMIPS crap for platforms not supporting these ASEs.Ralf Baechle2014-05-23
* MIPS: Add MSA register definitions & accessPaul Burton2014-03-26
* MIPS: Add CP0 CMGCRBase definitions & accessorPaul Burton2014-03-06
* MIPS: Define Config1 cache field shifts & sizesPaul Burton2014-03-06
* MIPS: mm: c-r4k: Detect instruction cache aliasesMarkos Chandras2014-03-06
* MIPS: include linux/types.hQais Yousef2014-01-23
* MIPS: Add support for FTLBsLeonid Yegoshin2014-01-22
* MIPS: Add function for flushing the TLB using the TLBINV instructionLeonid Yegoshin2014-01-22
* MIPS: features: Add initial support for Segmentation Control registersSteven J. Hill2014-01-22
* MIPS: Add missing bits for Config registersLeonid Yegoshin2014-01-22
* MIPS: Add MIPS R5 config5 register.Ralf Baechle2013-09-19
* MIPS: microMIPS: Fix improper definition of ISA exception bit.Steven J. Hill2013-07-01
* MIPS: microMIPS: Add support for exception handling.Steven J. Hill2013-05-09
* MIPS: microMIPS: Add instruction utility macros.Steven J. Hill2013-05-01
* MIPS: Fix code generation for non-DSP capable CPUsFlorian Fainelli2013-03-19
* Merge branch 'mips-next-3.9' of git://git.linux-mips.org/pub/scm/john/linux-j...Ralf Baechle2013-02-21
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| * MIPS: Probe for and report hardware virtualization support.David Daney2013-02-19
| * MIPS: dsp: Simplify the DSP macros.Steven J. Hill2013-02-16
| * MIPS: dsp: Support toolchains without DSP ASE and microMIPS.Steven J. Hill2013-02-16
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