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path: root/arch/mips/include/asm/mipsregs.h
Commit message (Expand)AuthorAge
* MIPS: Mask out limit field when calculating wired entry countPaul Burton2016-11-24
* MIPS: Stop setting I6400 FTLBPPaul Burton2016-09-29
* MIPS: Add define for Config.VI (virtual icache) bitJames Hogan2016-06-15
* MIPS: Clean up RDHWR handlingJames Hogan2016-06-15
* MIPS: Add 64-bit HTW fieldsJames Hogan2016-05-28
* MIPS: Simplify DSP instruction encoding macrosJames Hogan2016-05-28
* MIPS: Add missing tlbinvf/XPA microMIPS encodingsJames Hogan2016-05-28
* MIPS: Add missing VZ accessor microMIPS encodingsJames Hogan2016-05-28
* MIPS: Add inline asm encoding helpersJames Hogan2016-05-28
* MIPS: Fix write_gc0_* macros when writing zeroJames Hogan2016-05-28
* MIPS: Add definitions of SegCtl registers and use themMatt Redfearn2016-05-28
* MIPS: Fix VZ probe gas errors with binutils <2.24James Hogan2016-05-17
* MIPS: Add guest CP0 accessorsJames Hogan2016-05-13
* MIPS: Add register definitions for VZ ASE registersJames Hogan2016-05-13
* MIPS: Avoid magic numbers probing kscratch_maskJames Hogan2016-05-13
* MIPS: Add defs & probing of [X]ContextConfigJames Hogan2016-05-13
* MIPS: Add defs & probing of BadInstr[P] registersJames Hogan2016-05-13
* MIPS: Add defs & probing of extended CP0_EBaseJames Hogan2016-05-13
* MIPS: Define & use CP0_EBase bit definitionsJames Hogan2016-05-13
* MIPS: Add & use CP0_EntryHi ASID definitionsJames Hogan2016-05-13
* MIPS: Loongson-3: Fast TLB refill handlerHuacai Chen2016-05-13
* MIPS: Loongson: Invalidate special TLBs when neededHuacai Chen2016-05-13
* MIPS: Loongson: Add Loongson-3A R2 basic supportHuacai Chen2016-05-13
* MIPS: Add and use watch register field definitionsJames Hogan2016-05-13
* MIPS: Add and use CAUSEF_WP definitionJames Hogan2016-05-13
* MIPS: Detect MIPSr6 Virtual Processor supportPaul Burton2016-05-13
* MIPS: Update trap codesJames Hogan2016-01-23
* MIPS: Move Cause.ExcCode trap codes to mipsregs.hJames Hogan2016-01-23
* MIPS: Move definition of DC bit to mipsregs.hJames Hogan2016-01-23
* MIPS: Tidy EntryLo bit definitions, add PFNPaul Burton2015-11-11
* MIPS: CPS: Early debug using an ns16550-compatible UARTPaul Burton2015-11-11
* MIPS: Fix duplicate CP0_* definitions.James Hogan2015-11-11
* MIPS: cpu-features: Add cpu_has_ftlbJames Hogan2015-09-22
* MIPS: Rearrange ENTRYLO field definitionsJames Hogan2015-09-03
* MIPS: Treat CP1 control registers as unsigned ints.Ralf Baechle2015-09-03
* MIPS: Use unsigned int when reading CP0 registersChris Packham2015-09-03
* MIPS: Set up FTLB probability for I6400Markos Chandras2015-08-26
* MIPS: R12000: Enable branch prediction global historyJoshua Kinard2015-06-21
* MIPS: mipsregs.h: Add EntryLo bit definitionsJames Hogan2015-06-21
* MIPS: math-emu: Define IEEE 754-2008 feature control bitsMaciej W. Rozycki2015-04-07
* MIPS: math-emu: Implement the FCCR, FEXR and FENR registersMaciej W. Rozycki2015-04-07
* MIPS: mipsregs.h: Reindent CP0 Cause macrosMaciej W. Rozycki2015-04-07
* MIPS: mipsregs.h: Move TX39 macros out of the wayMaciej W. Rozycki2015-04-07
* MIPS: mipsregs.h: Reorder CP1 macro definitionsMaciej W. Rozycki2015-04-07
* MIPS: mipsregs.h: Remove broken commentsMaciej W. Rozycki2015-04-07
* MIPS: Add architectural FDC IRQ fieldsJames Hogan2015-03-31
* MIPS: Add arch CDMM definitions and probingJames Hogan2015-03-31
* Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds2015-02-21
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| * MIPS: Add set/clear CP0 macros for PageGrain registerSteven J. Hill2015-02-20
| * MIPS: asm: mipsregs: Add support for the LLADDR registerMarkos Chandras2015-02-17
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