diff options
Diffstat (limited to 'drivers/gpu/drm')
38 files changed, 356 insertions, 282 deletions
diff --git a/drivers/gpu/drm/arm/hdlcd_drv.c b/drivers/gpu/drm/arm/hdlcd_drv.c index 0ed1cde98cf8..dfad8d06d108 100644 --- a/drivers/gpu/drm/arm/hdlcd_drv.c +++ b/drivers/gpu/drm/arm/hdlcd_drv.c | |||
| @@ -103,7 +103,6 @@ setup_fail: | |||
| 103 | 103 | ||
| 104 | static const struct drm_mode_config_funcs hdlcd_mode_config_funcs = { | 104 | static const struct drm_mode_config_funcs hdlcd_mode_config_funcs = { |
| 105 | .fb_create = drm_gem_fb_create, | 105 | .fb_create = drm_gem_fb_create, |
| 106 | .output_poll_changed = drm_fb_helper_output_poll_changed, | ||
| 107 | .atomic_check = drm_atomic_helper_check, | 106 | .atomic_check = drm_atomic_helper_check, |
| 108 | .atomic_commit = drm_atomic_helper_commit, | 107 | .atomic_commit = drm_atomic_helper_commit, |
| 109 | }; | 108 | }; |
| @@ -233,7 +232,6 @@ static struct drm_driver hdlcd_driver = { | |||
| 233 | .driver_features = DRIVER_HAVE_IRQ | DRIVER_GEM | | 232 | .driver_features = DRIVER_HAVE_IRQ | DRIVER_GEM | |
| 234 | DRIVER_MODESET | DRIVER_PRIME | | 233 | DRIVER_MODESET | DRIVER_PRIME | |
| 235 | DRIVER_ATOMIC, | 234 | DRIVER_ATOMIC, |
| 236 | .lastclose = drm_fb_helper_lastclose, | ||
| 237 | .irq_handler = hdlcd_irq, | 235 | .irq_handler = hdlcd_irq, |
| 238 | .irq_preinstall = hdlcd_irq_preinstall, | 236 | .irq_preinstall = hdlcd_irq_preinstall, |
| 239 | .irq_postinstall = hdlcd_irq_postinstall, | 237 | .irq_postinstall = hdlcd_irq_postinstall, |
| @@ -308,19 +306,15 @@ static int hdlcd_drm_bind(struct device *dev) | |||
| 308 | drm_mode_config_reset(drm); | 306 | drm_mode_config_reset(drm); |
| 309 | drm_kms_helper_poll_init(drm); | 307 | drm_kms_helper_poll_init(drm); |
| 310 | 308 | ||
| 311 | ret = drm_fb_cma_fbdev_init(drm, 32, 0); | ||
| 312 | if (ret) | ||
| 313 | goto err_fbdev; | ||
| 314 | |||
| 315 | ret = drm_dev_register(drm, 0); | 309 | ret = drm_dev_register(drm, 0); |
| 316 | if (ret) | 310 | if (ret) |
| 317 | goto err_register; | 311 | goto err_register; |
| 318 | 312 | ||
| 313 | drm_fbdev_generic_setup(drm, 32); | ||
| 314 | |||
| 319 | return 0; | 315 | return 0; |
| 320 | 316 | ||
| 321 | err_register: | 317 | err_register: |
| 322 | drm_fb_cma_fbdev_fini(drm); | ||
| 323 | err_fbdev: | ||
| 324 | drm_kms_helper_poll_fini(drm); | 318 | drm_kms_helper_poll_fini(drm); |
| 325 | err_vblank: | 319 | err_vblank: |
| 326 | pm_runtime_disable(drm->dev); | 320 | pm_runtime_disable(drm->dev); |
| @@ -346,7 +340,6 @@ static void hdlcd_drm_unbind(struct device *dev) | |||
| 346 | struct hdlcd_drm_private *hdlcd = drm->dev_private; | 340 | struct hdlcd_drm_private *hdlcd = drm->dev_private; |
| 347 | 341 | ||
| 348 | drm_dev_unregister(drm); | 342 | drm_dev_unregister(drm); |
| 349 | drm_fb_cma_fbdev_fini(drm); | ||
| 350 | drm_kms_helper_poll_fini(drm); | 343 | drm_kms_helper_poll_fini(drm); |
| 351 | component_unbind_all(dev, drm); | 344 | component_unbind_all(dev, drm); |
| 352 | of_node_put(hdlcd->crtc.port); | 345 | of_node_put(hdlcd->crtc.port); |
diff --git a/drivers/gpu/drm/arm/malidp_drv.c b/drivers/gpu/drm/arm/malidp_drv.c index 08b5bb219816..3171ffaadd77 100644 --- a/drivers/gpu/drm/arm/malidp_drv.c +++ b/drivers/gpu/drm/arm/malidp_drv.c | |||
| @@ -260,7 +260,6 @@ static const struct drm_mode_config_helper_funcs malidp_mode_config_helpers = { | |||
| 260 | 260 | ||
| 261 | static const struct drm_mode_config_funcs malidp_mode_config_funcs = { | 261 | static const struct drm_mode_config_funcs malidp_mode_config_funcs = { |
| 262 | .fb_create = drm_gem_fb_create, | 262 | .fb_create = drm_gem_fb_create, |
| 263 | .output_poll_changed = drm_fb_helper_output_poll_changed, | ||
| 264 | .atomic_check = drm_atomic_helper_check, | 263 | .atomic_check = drm_atomic_helper_check, |
| 265 | .atomic_commit = drm_atomic_helper_commit, | 264 | .atomic_commit = drm_atomic_helper_commit, |
| 266 | }; | 265 | }; |
| @@ -450,7 +449,6 @@ static int malidp_debugfs_init(struct drm_minor *minor) | |||
| 450 | static struct drm_driver malidp_driver = { | 449 | static struct drm_driver malidp_driver = { |
| 451 | .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC | | 450 | .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC | |
| 452 | DRIVER_PRIME, | 451 | DRIVER_PRIME, |
| 453 | .lastclose = drm_fb_helper_lastclose, | ||
| 454 | .gem_free_object_unlocked = drm_gem_cma_free_object, | 452 | .gem_free_object_unlocked = drm_gem_cma_free_object, |
| 455 | .gem_vm_ops = &drm_gem_cma_vm_ops, | 453 | .gem_vm_ops = &drm_gem_cma_vm_ops, |
| 456 | .dumb_create = malidp_dumb_create, | 454 | .dumb_create = malidp_dumb_create, |
| @@ -762,22 +760,18 @@ static int malidp_bind(struct device *dev) | |||
| 762 | 760 | ||
| 763 | drm_mode_config_reset(drm); | 761 | drm_mode_config_reset(drm); |
| 764 | 762 | ||
| 765 | ret = drm_fb_cma_fbdev_init(drm, 32, 0); | ||
| 766 | if (ret) | ||
| 767 | goto fbdev_fail; | ||
| 768 | |||
| 769 | drm_kms_helper_poll_init(drm); | 763 | drm_kms_helper_poll_init(drm); |
| 770 | 764 | ||
| 771 | ret = drm_dev_register(drm, 0); | 765 | ret = drm_dev_register(drm, 0); |
| 772 | if (ret) | 766 | if (ret) |
| 773 | goto register_fail; | 767 | goto register_fail; |
| 774 | 768 | ||
| 769 | drm_fbdev_generic_setup(drm, 32); | ||
| 770 | |||
| 775 | return 0; | 771 | return 0; |
| 776 | 772 | ||
| 777 | register_fail: | 773 | register_fail: |
| 778 | drm_fb_cma_fbdev_fini(drm); | ||
| 779 | drm_kms_helper_poll_fini(drm); | 774 | drm_kms_helper_poll_fini(drm); |
| 780 | fbdev_fail: | ||
| 781 | pm_runtime_get_sync(dev); | 775 | pm_runtime_get_sync(dev); |
| 782 | vblank_fail: | 776 | vblank_fail: |
| 783 | malidp_se_irq_fini(hwdev); | 777 | malidp_se_irq_fini(hwdev); |
| @@ -814,7 +808,6 @@ static void malidp_unbind(struct device *dev) | |||
| 814 | struct malidp_hw_device *hwdev = malidp->dev; | 808 | struct malidp_hw_device *hwdev = malidp->dev; |
| 815 | 809 | ||
| 816 | drm_dev_unregister(drm); | 810 | drm_dev_unregister(drm); |
| 817 | drm_fb_cma_fbdev_fini(drm); | ||
| 818 | drm_kms_helper_poll_fini(drm); | 811 | drm_kms_helper_poll_fini(drm); |
| 819 | pm_runtime_get_sync(dev); | 812 | pm_runtime_get_sync(dev); |
| 820 | drm_crtc_vblank_off(&malidp->crtc); | 813 | drm_crtc_vblank_off(&malidp->crtc); |
diff --git a/drivers/gpu/drm/bochs/bochs.h b/drivers/gpu/drm/bochs/bochs.h index b4f6bb521900..e7a69077e45a 100644 --- a/drivers/gpu/drm/bochs/bochs.h +++ b/drivers/gpu/drm/bochs/bochs.h | |||
| @@ -58,6 +58,7 @@ struct bochs_device { | |||
| 58 | void __iomem *fb_map; | 58 | void __iomem *fb_map; |
| 59 | unsigned long fb_base; | 59 | unsigned long fb_base; |
| 60 | unsigned long fb_size; | 60 | unsigned long fb_size; |
| 61 | unsigned long qext_size; | ||
| 61 | 62 | ||
| 62 | /* mode */ | 63 | /* mode */ |
| 63 | u16 xres; | 64 | u16 xres; |
| @@ -121,7 +122,8 @@ int bochs_hw_init(struct drm_device *dev); | |||
| 121 | void bochs_hw_fini(struct drm_device *dev); | 122 | void bochs_hw_fini(struct drm_device *dev); |
| 122 | 123 | ||
| 123 | void bochs_hw_setmode(struct bochs_device *bochs, | 124 | void bochs_hw_setmode(struct bochs_device *bochs, |
| 124 | struct drm_display_mode *mode); | 125 | struct drm_display_mode *mode, |
| 126 | const struct drm_format_info *format); | ||
| 125 | void bochs_hw_setbase(struct bochs_device *bochs, | 127 | void bochs_hw_setbase(struct bochs_device *bochs, |
| 126 | int x, int y, u64 addr); | 128 | int x, int y, u64 addr); |
| 127 | 129 | ||
diff --git a/drivers/gpu/drm/bochs/bochs_fbdev.c b/drivers/gpu/drm/bochs/bochs_fbdev.c index 8f4d6c052f7b..dd3c7df267da 100644 --- a/drivers/gpu/drm/bochs/bochs_fbdev.c +++ b/drivers/gpu/drm/bochs/bochs_fbdev.c | |||
| @@ -63,9 +63,8 @@ static int bochsfb_create(struct drm_fb_helper *helper, | |||
| 63 | 63 | ||
| 64 | mode_cmd.width = sizes->surface_width; | 64 | mode_cmd.width = sizes->surface_width; |
| 65 | mode_cmd.height = sizes->surface_height; | 65 | mode_cmd.height = sizes->surface_height; |
| 66 | mode_cmd.pitches[0] = mode_cmd.width * ((sizes->surface_bpp + 7) / 8); | 66 | mode_cmd.pitches[0] = sizes->surface_width * 4; |
| 67 | mode_cmd.pixel_format = drm_mode_legacy_fb_format(sizes->surface_bpp, | 67 | mode_cmd.pixel_format = DRM_FORMAT_HOST_XRGB8888; |
| 68 | sizes->surface_depth); | ||
| 69 | size = mode_cmd.pitches[0] * mode_cmd.height; | 68 | size = mode_cmd.pitches[0] * mode_cmd.height; |
| 70 | 69 | ||
| 71 | /* alloc, pin & map bo */ | 70 | /* alloc, pin & map bo */ |
| @@ -137,8 +136,19 @@ static const struct drm_fb_helper_funcs bochs_fb_helper_funcs = { | |||
| 137 | .fb_probe = bochsfb_create, | 136 | .fb_probe = bochsfb_create, |
| 138 | }; | 137 | }; |
| 139 | 138 | ||
| 139 | static struct drm_framebuffer * | ||
| 140 | bochs_gem_fb_create(struct drm_device *dev, struct drm_file *file, | ||
| 141 | const struct drm_mode_fb_cmd2 *mode_cmd) | ||
| 142 | { | ||
| 143 | if (mode_cmd->pixel_format != DRM_FORMAT_XRGB8888 && | ||
| 144 | mode_cmd->pixel_format != DRM_FORMAT_BGRX8888) | ||
| 145 | return ERR_PTR(-EINVAL); | ||
| 146 | |||
| 147 | return drm_gem_fb_create(dev, file, mode_cmd); | ||
| 148 | } | ||
| 149 | |||
| 140 | const struct drm_mode_config_funcs bochs_mode_funcs = { | 150 | const struct drm_mode_config_funcs bochs_mode_funcs = { |
| 141 | .fb_create = drm_gem_fb_create, | 151 | .fb_create = bochs_gem_fb_create, |
| 142 | }; | 152 | }; |
| 143 | 153 | ||
| 144 | int bochs_fbdev_init(struct bochs_device *bochs) | 154 | int bochs_fbdev_init(struct bochs_device *bochs) |
diff --git a/drivers/gpu/drm/bochs/bochs_hw.c b/drivers/gpu/drm/bochs/bochs_hw.c index 16e4f1caccca..cacff73a64ab 100644 --- a/drivers/gpu/drm/bochs/bochs_hw.c +++ b/drivers/gpu/drm/bochs/bochs_hw.c | |||
| @@ -47,11 +47,33 @@ static void bochs_dispi_write(struct bochs_device *bochs, u16 reg, u16 val) | |||
| 47 | } | 47 | } |
| 48 | } | 48 | } |
| 49 | 49 | ||
| 50 | static void bochs_hw_set_big_endian(struct bochs_device *bochs) | ||
| 51 | { | ||
| 52 | if (bochs->qext_size < 8) | ||
| 53 | return; | ||
| 54 | |||
| 55 | writel(0xbebebebe, bochs->mmio + 0x604); | ||
| 56 | } | ||
| 57 | |||
| 58 | static void bochs_hw_set_little_endian(struct bochs_device *bochs) | ||
| 59 | { | ||
| 60 | if (bochs->qext_size < 8) | ||
| 61 | return; | ||
| 62 | |||
| 63 | writel(0x1e1e1e1e, bochs->mmio + 0x604); | ||
| 64 | } | ||
| 65 | |||
| 66 | #ifdef __BIG_ENDIAN | ||
| 67 | #define bochs_hw_set_native_endian(_b) bochs_hw_set_big_endian(_b) | ||
| 68 | #else | ||
| 69 | #define bochs_hw_set_native_endian(_b) bochs_hw_set_little_endian(_b) | ||
| 70 | #endif | ||
| 71 | |||
| 50 | int bochs_hw_init(struct drm_device *dev) | 72 | int bochs_hw_init(struct drm_device *dev) |
| 51 | { | 73 | { |
| 52 | struct bochs_device *bochs = dev->dev_private; | 74 | struct bochs_device *bochs = dev->dev_private; |
| 53 | struct pci_dev *pdev = dev->pdev; | 75 | struct pci_dev *pdev = dev->pdev; |
| 54 | unsigned long addr, size, mem, ioaddr, iosize, qext_size; | 76 | unsigned long addr, size, mem, ioaddr, iosize; |
| 55 | u16 id; | 77 | u16 id; |
| 56 | 78 | ||
| 57 | if (pdev->resource[2].flags & IORESOURCE_MEM) { | 79 | if (pdev->resource[2].flags & IORESOURCE_MEM) { |
| @@ -117,19 +139,14 @@ int bochs_hw_init(struct drm_device *dev) | |||
| 117 | ioaddr); | 139 | ioaddr); |
| 118 | 140 | ||
| 119 | if (bochs->mmio && pdev->revision >= 2) { | 141 | if (bochs->mmio && pdev->revision >= 2) { |
| 120 | qext_size = readl(bochs->mmio + 0x600); | 142 | bochs->qext_size = readl(bochs->mmio + 0x600); |
| 121 | if (qext_size < 4 || qext_size > iosize) | 143 | if (bochs->qext_size < 4 || bochs->qext_size > iosize) { |
| 144 | bochs->qext_size = 0; | ||
| 122 | goto noext; | 145 | goto noext; |
| 123 | DRM_DEBUG("Found qemu ext regs, size %ld\n", qext_size); | ||
| 124 | if (qext_size >= 8) { | ||
| 125 | #ifdef __BIG_ENDIAN | ||
| 126 | writel(0xbebebebe, bochs->mmio + 0x604); | ||
| 127 | #else | ||
| 128 | writel(0x1e1e1e1e, bochs->mmio + 0x604); | ||
| 129 | #endif | ||
| 130 | DRM_DEBUG(" qext endian: 0x%x\n", | ||
| 131 | readl(bochs->mmio + 0x604)); | ||
| 132 | } | 146 | } |
| 147 | DRM_DEBUG("Found qemu ext regs, size %ld\n", | ||
| 148 | bochs->qext_size); | ||
| 149 | bochs_hw_set_native_endian(bochs); | ||
| 133 | } | 150 | } |
| 134 | 151 | ||
| 135 | noext: | 152 | noext: |
| @@ -150,7 +167,8 @@ void bochs_hw_fini(struct drm_device *dev) | |||
| 150 | } | 167 | } |
| 151 | 168 | ||
| 152 | void bochs_hw_setmode(struct bochs_device *bochs, | 169 | void bochs_hw_setmode(struct bochs_device *bochs, |
| 153 | struct drm_display_mode *mode) | 170 | struct drm_display_mode *mode, |
| 171 | const struct drm_format_info *format) | ||
| 154 | { | 172 | { |
| 155 | bochs->xres = mode->hdisplay; | 173 | bochs->xres = mode->hdisplay; |
| 156 | bochs->yres = mode->vdisplay; | 174 | bochs->yres = mode->vdisplay; |
| @@ -158,8 +176,12 @@ void bochs_hw_setmode(struct bochs_device *bochs, | |||
| 158 | bochs->stride = mode->hdisplay * (bochs->bpp / 8); | 176 | bochs->stride = mode->hdisplay * (bochs->bpp / 8); |
| 159 | bochs->yres_virtual = bochs->fb_size / bochs->stride; | 177 | bochs->yres_virtual = bochs->fb_size / bochs->stride; |
| 160 | 178 | ||
| 161 | DRM_DEBUG_DRIVER("%dx%d @ %d bpp, vy %d\n", | 179 | DRM_DEBUG_DRIVER("%dx%d @ %d bpp, format %c%c%c%c, vy %d\n", |
| 162 | bochs->xres, bochs->yres, bochs->bpp, | 180 | bochs->xres, bochs->yres, bochs->bpp, |
| 181 | (format->format >> 0) & 0xff, | ||
| 182 | (format->format >> 8) & 0xff, | ||
| 183 | (format->format >> 16) & 0xff, | ||
| 184 | (format->format >> 24) & 0xff, | ||
| 163 | bochs->yres_virtual); | 185 | bochs->yres_virtual); |
| 164 | 186 | ||
| 165 | bochs_vga_writeb(bochs, 0x3c0, 0x20); /* unblank */ | 187 | bochs_vga_writeb(bochs, 0x3c0, 0x20); /* unblank */ |
| @@ -177,6 +199,20 @@ void bochs_hw_setmode(struct bochs_device *bochs, | |||
| 177 | 199 | ||
| 178 | bochs_dispi_write(bochs, VBE_DISPI_INDEX_ENABLE, | 200 | bochs_dispi_write(bochs, VBE_DISPI_INDEX_ENABLE, |
| 179 | VBE_DISPI_ENABLED | VBE_DISPI_LFB_ENABLED); | 201 | VBE_DISPI_ENABLED | VBE_DISPI_LFB_ENABLED); |
| 202 | |||
| 203 | switch (format->format) { | ||
| 204 | case DRM_FORMAT_XRGB8888: | ||
| 205 | bochs_hw_set_little_endian(bochs); | ||
| 206 | break; | ||
| 207 | case DRM_FORMAT_BGRX8888: | ||
| 208 | bochs_hw_set_big_endian(bochs); | ||
| 209 | break; | ||
| 210 | default: | ||
| 211 | /* should not happen */ | ||
| 212 | DRM_ERROR("%s: Huh? Got framebuffer format 0x%x", | ||
| 213 | __func__, format->format); | ||
| 214 | break; | ||
| 215 | }; | ||
| 180 | } | 216 | } |
| 181 | 217 | ||
| 182 | void bochs_hw_setbase(struct bochs_device *bochs, | 218 | void bochs_hw_setbase(struct bochs_device *bochs, |
diff --git a/drivers/gpu/drm/bochs/bochs_kms.c b/drivers/gpu/drm/bochs/bochs_kms.c index ea9a43d31bf1..9bc5b438aefd 100644 --- a/drivers/gpu/drm/bochs/bochs_kms.c +++ b/drivers/gpu/drm/bochs/bochs_kms.c | |||
| @@ -77,7 +77,10 @@ static int bochs_crtc_mode_set(struct drm_crtc *crtc, | |||
| 77 | struct bochs_device *bochs = | 77 | struct bochs_device *bochs = |
| 78 | container_of(crtc, struct bochs_device, crtc); | 78 | container_of(crtc, struct bochs_device, crtc); |
| 79 | 79 | ||
| 80 | bochs_hw_setmode(bochs, mode); | 80 | if (WARN_ON(crtc->primary->fb == NULL)) |
| 81 | return -EINVAL; | ||
| 82 | |||
| 83 | bochs_hw_setmode(bochs, mode, crtc->primary->fb->format); | ||
| 81 | bochs_crtc_mode_set_base(crtc, x, y, old_fb); | 84 | bochs_crtc_mode_set_base(crtc, x, y, old_fb); |
| 82 | return 0; | 85 | return 0; |
| 83 | } | 86 | } |
| @@ -126,12 +129,44 @@ static const struct drm_crtc_helper_funcs bochs_helper_funcs = { | |||
| 126 | .commit = bochs_crtc_commit, | 129 | .commit = bochs_crtc_commit, |
| 127 | }; | 130 | }; |
| 128 | 131 | ||
| 132 | static const uint32_t bochs_formats[] = { | ||
| 133 | DRM_FORMAT_XRGB8888, | ||
| 134 | DRM_FORMAT_BGRX8888, | ||
| 135 | }; | ||
| 136 | |||
| 137 | static struct drm_plane *bochs_primary_plane(struct drm_device *dev) | ||
| 138 | { | ||
| 139 | struct drm_plane *primary; | ||
| 140 | int ret; | ||
| 141 | |||
| 142 | primary = kzalloc(sizeof(*primary), GFP_KERNEL); | ||
| 143 | if (primary == NULL) { | ||
| 144 | DRM_DEBUG_KMS("Failed to allocate primary plane\n"); | ||
| 145 | return NULL; | ||
| 146 | } | ||
| 147 | |||
| 148 | ret = drm_universal_plane_init(dev, primary, 0, | ||
| 149 | &drm_primary_helper_funcs, | ||
| 150 | bochs_formats, | ||
| 151 | ARRAY_SIZE(bochs_formats), | ||
| 152 | NULL, | ||
| 153 | DRM_PLANE_TYPE_PRIMARY, NULL); | ||
| 154 | if (ret) { | ||
| 155 | kfree(primary); | ||
| 156 | primary = NULL; | ||
| 157 | } | ||
| 158 | |||
| 159 | return primary; | ||
| 160 | } | ||
| 161 | |||
| 129 | static void bochs_crtc_init(struct drm_device *dev) | 162 | static void bochs_crtc_init(struct drm_device *dev) |
| 130 | { | 163 | { |
| 131 | struct bochs_device *bochs = dev->dev_private; | 164 | struct bochs_device *bochs = dev->dev_private; |
| 132 | struct drm_crtc *crtc = &bochs->crtc; | 165 | struct drm_crtc *crtc = &bochs->crtc; |
| 166 | struct drm_plane *primary = bochs_primary_plane(dev); | ||
| 133 | 167 | ||
| 134 | drm_crtc_init(dev, crtc, &bochs_crtc_funcs); | 168 | drm_crtc_init_with_planes(dev, crtc, primary, NULL, |
| 169 | &bochs_crtc_funcs, NULL); | ||
| 135 | drm_crtc_helper_add(crtc, &bochs_helper_funcs); | 170 | drm_crtc_helper_add(crtc, &bochs_helper_funcs); |
| 136 | } | 171 | } |
| 137 | 172 | ||
| @@ -250,6 +285,7 @@ int bochs_kms_init(struct bochs_device *bochs) | |||
| 250 | bochs->dev->mode_config.fb_base = bochs->fb_base; | 285 | bochs->dev->mode_config.fb_base = bochs->fb_base; |
| 251 | bochs->dev->mode_config.preferred_depth = 24; | 286 | bochs->dev->mode_config.preferred_depth = 24; |
| 252 | bochs->dev->mode_config.prefer_shadow = 0; | 287 | bochs->dev->mode_config.prefer_shadow = 0; |
| 288 | bochs->dev->mode_config.quirk_addfb_prefer_host_byte_order = true; | ||
| 253 | 289 | ||
| 254 | bochs->dev->mode_config.funcs = &bochs_mode_funcs; | 290 | bochs->dev->mode_config.funcs = &bochs_mode_funcs; |
| 255 | 291 | ||
diff --git a/drivers/gpu/drm/drm_atomic_helper.c b/drivers/gpu/drm/drm_atomic_helper.c index 3cf1aa132778..e49b22381048 100644 --- a/drivers/gpu/drm/drm_atomic_helper.c +++ b/drivers/gpu/drm/drm_atomic_helper.c | |||
| @@ -3569,9 +3569,7 @@ void __drm_atomic_helper_plane_reset(struct drm_plane *plane, | |||
| 3569 | state->plane = plane; | 3569 | state->plane = plane; |
| 3570 | state->rotation = DRM_MODE_ROTATE_0; | 3570 | state->rotation = DRM_MODE_ROTATE_0; |
| 3571 | 3571 | ||
| 3572 | /* Reset the alpha value to fully opaque if it matters */ | 3572 | state->alpha = DRM_BLEND_ALPHA_OPAQUE; |
| 3573 | if (plane->alpha_property) | ||
| 3574 | state->alpha = plane->alpha_property->values[1]; | ||
| 3575 | state->pixel_blend_mode = DRM_MODE_BLEND_PREMULTI; | 3573 | state->pixel_blend_mode = DRM_MODE_BLEND_PREMULTI; |
| 3576 | 3574 | ||
| 3577 | plane->state = state; | 3575 | plane->state = state; |
diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c index 66493178ffcf..a504a5e05676 100644 --- a/drivers/gpu/drm/drm_fb_helper.c +++ b/drivers/gpu/drm/drm_fb_helper.c | |||
| @@ -2843,7 +2843,7 @@ int drm_fb_helper_fbdev_setup(struct drm_device *dev, | |||
| 2843 | if (!max_conn_count) | 2843 | if (!max_conn_count) |
| 2844 | max_conn_count = dev->mode_config.num_connector; | 2844 | max_conn_count = dev->mode_config.num_connector; |
| 2845 | if (!max_conn_count) { | 2845 | if (!max_conn_count) { |
| 2846 | DRM_DEV_ERROR(dev->dev, "No connectors\n"); | 2846 | DRM_DEV_ERROR(dev->dev, "fbdev: No connectors\n"); |
| 2847 | return -EINVAL; | 2847 | return -EINVAL; |
| 2848 | } | 2848 | } |
| 2849 | 2849 | ||
| @@ -2851,13 +2851,13 @@ int drm_fb_helper_fbdev_setup(struct drm_device *dev, | |||
| 2851 | 2851 | ||
| 2852 | ret = drm_fb_helper_init(dev, fb_helper, max_conn_count); | 2852 | ret = drm_fb_helper_init(dev, fb_helper, max_conn_count); |
| 2853 | if (ret < 0) { | 2853 | if (ret < 0) { |
| 2854 | DRM_DEV_ERROR(dev->dev, "Failed to initialize fbdev helper\n"); | 2854 | DRM_DEV_ERROR(dev->dev, "fbdev: Failed to initialize (ret=%d)\n", ret); |
| 2855 | return ret; | 2855 | return ret; |
| 2856 | } | 2856 | } |
| 2857 | 2857 | ||
| 2858 | ret = drm_fb_helper_single_add_all_connectors(fb_helper); | 2858 | ret = drm_fb_helper_single_add_all_connectors(fb_helper); |
| 2859 | if (ret < 0) { | 2859 | if (ret < 0) { |
| 2860 | DRM_DEV_ERROR(dev->dev, "Failed to add connectors\n"); | 2860 | DRM_DEV_ERROR(dev->dev, "fbdev: Failed to add connectors (ret=%d)\n", ret); |
| 2861 | goto err_drm_fb_helper_fini; | 2861 | goto err_drm_fb_helper_fini; |
| 2862 | } | 2862 | } |
| 2863 | 2863 | ||
| @@ -2866,7 +2866,7 @@ int drm_fb_helper_fbdev_setup(struct drm_device *dev, | |||
| 2866 | 2866 | ||
| 2867 | ret = drm_fb_helper_initial_config(fb_helper, preferred_bpp); | 2867 | ret = drm_fb_helper_initial_config(fb_helper, preferred_bpp); |
| 2868 | if (ret < 0) { | 2868 | if (ret < 0) { |
| 2869 | DRM_DEV_ERROR(dev->dev, "Failed to set fbdev configuration\n"); | 2869 | DRM_DEV_ERROR(dev->dev, "fbdev: Failed to set configuration (ret=%d)\n", ret); |
| 2870 | goto err_drm_fb_helper_fini; | 2870 | goto err_drm_fb_helper_fini; |
| 2871 | } | 2871 | } |
| 2872 | 2872 | ||
diff --git a/drivers/gpu/drm/drm_fourcc.c b/drivers/gpu/drm/drm_fourcc.c index be1d6aaef651..90a1c846fc25 100644 --- a/drivers/gpu/drm/drm_fourcc.c +++ b/drivers/gpu/drm/drm_fourcc.c | |||
| @@ -96,6 +96,41 @@ uint32_t drm_mode_legacy_fb_format(uint32_t bpp, uint32_t depth) | |||
| 96 | EXPORT_SYMBOL(drm_mode_legacy_fb_format); | 96 | EXPORT_SYMBOL(drm_mode_legacy_fb_format); |
| 97 | 97 | ||
| 98 | /** | 98 | /** |
| 99 | * drm_driver_legacy_fb_format - compute drm fourcc code from legacy description | ||
| 100 | * @bpp: bits per pixels | ||
| 101 | * @depth: bit depth per pixel | ||
| 102 | * @native: use host native byte order | ||
| 103 | * | ||
| 104 | * Computes a drm fourcc pixel format code for the given @bpp/@depth values. | ||
| 105 | * Unlike drm_mode_legacy_fb_format() this looks at the drivers mode_config, | ||
| 106 | * and depending on the quirk_addfb_prefer_host_byte_order flag it returns | ||
| 107 | * little endian byte order or host byte order framebuffer formats. | ||
| 108 | */ | ||
| 109 | uint32_t drm_driver_legacy_fb_format(struct drm_device *dev, | ||
| 110 | uint32_t bpp, uint32_t depth) | ||
| 111 | { | ||
| 112 | uint32_t fmt = drm_mode_legacy_fb_format(bpp, depth); | ||
| 113 | |||
| 114 | if (dev->mode_config.quirk_addfb_prefer_host_byte_order) { | ||
| 115 | if (fmt == DRM_FORMAT_XRGB8888) | ||
| 116 | fmt = DRM_FORMAT_HOST_XRGB8888; | ||
| 117 | if (fmt == DRM_FORMAT_ARGB8888) | ||
| 118 | fmt = DRM_FORMAT_HOST_ARGB8888; | ||
| 119 | if (fmt == DRM_FORMAT_RGB565) | ||
| 120 | fmt = DRM_FORMAT_HOST_RGB565; | ||
| 121 | if (fmt == DRM_FORMAT_XRGB1555) | ||
| 122 | fmt = DRM_FORMAT_HOST_XRGB1555; | ||
| 123 | } | ||
| 124 | |||
| 125 | if (dev->mode_config.quirk_addfb_prefer_xbgr_30bpp && | ||
| 126 | fmt == DRM_FORMAT_XRGB2101010) | ||
| 127 | fmt = DRM_FORMAT_XBGR2101010; | ||
| 128 | |||
| 129 | return fmt; | ||
| 130 | } | ||
| 131 | EXPORT_SYMBOL(drm_driver_legacy_fb_format); | ||
| 132 | |||
| 133 | /** | ||
| 99 | * drm_get_format_name - fill a string with a drm fourcc format's name | 134 | * drm_get_format_name - fill a string with a drm fourcc format's name |
| 100 | * @format: format to compute name of | 135 | * @format: format to compute name of |
| 101 | * @buf: caller-supplied buffer | 136 | * @buf: caller-supplied buffer |
diff --git a/drivers/gpu/drm/drm_framebuffer.c b/drivers/gpu/drm/drm_framebuffer.c index 1ee3d6b44280..3bf729d0aae5 100644 --- a/drivers/gpu/drm/drm_framebuffer.c +++ b/drivers/gpu/drm/drm_framebuffer.c | |||
| @@ -116,7 +116,7 @@ int drm_mode_addfb(struct drm_device *dev, struct drm_mode_fb_cmd *or, | |||
| 116 | if (!drm_core_check_feature(dev, DRIVER_MODESET)) | 116 | if (!drm_core_check_feature(dev, DRIVER_MODESET)) |
| 117 | return -EOPNOTSUPP; | 117 | return -EOPNOTSUPP; |
| 118 | 118 | ||
| 119 | r.pixel_format = drm_mode_legacy_fb_format(or->bpp, or->depth); | 119 | r.pixel_format = drm_driver_legacy_fb_format(dev, or->bpp, or->depth); |
| 120 | if (r.pixel_format == DRM_FORMAT_INVALID) { | 120 | if (r.pixel_format == DRM_FORMAT_INVALID) { |
| 121 | DRM_DEBUG("bad {bpp:%d, depth:%d}\n", or->bpp, or->depth); | 121 | DRM_DEBUG("bad {bpp:%d, depth:%d}\n", or->bpp, or->depth); |
| 122 | return -EINVAL; | 122 | return -EINVAL; |
| @@ -129,21 +129,6 @@ int drm_mode_addfb(struct drm_device *dev, struct drm_mode_fb_cmd *or, | |||
| 129 | r.pitches[0] = or->pitch; | 129 | r.pitches[0] = or->pitch; |
| 130 | r.handles[0] = or->handle; | 130 | r.handles[0] = or->handle; |
| 131 | 131 | ||
| 132 | if (dev->mode_config.quirk_addfb_prefer_xbgr_30bpp && | ||
| 133 | r.pixel_format == DRM_FORMAT_XRGB2101010) | ||
| 134 | r.pixel_format = DRM_FORMAT_XBGR2101010; | ||
| 135 | |||
| 136 | if (dev->mode_config.quirk_addfb_prefer_host_byte_order) { | ||
| 137 | if (r.pixel_format == DRM_FORMAT_XRGB8888) | ||
| 138 | r.pixel_format = DRM_FORMAT_HOST_XRGB8888; | ||
| 139 | if (r.pixel_format == DRM_FORMAT_ARGB8888) | ||
| 140 | r.pixel_format = DRM_FORMAT_HOST_ARGB8888; | ||
| 141 | if (r.pixel_format == DRM_FORMAT_RGB565) | ||
| 142 | r.pixel_format = DRM_FORMAT_HOST_RGB565; | ||
| 143 | if (r.pixel_format == DRM_FORMAT_XRGB1555) | ||
| 144 | r.pixel_format = DRM_FORMAT_HOST_XRGB1555; | ||
| 145 | } | ||
| 146 | |||
| 147 | ret = drm_mode_addfb2(dev, &r, file_priv); | 132 | ret = drm_mode_addfb2(dev, &r, file_priv); |
| 148 | if (ret) | 133 | if (ret) |
| 149 | return ret; | 134 | return ret; |
diff --git a/drivers/gpu/drm/drm_gem_framebuffer_helper.c b/drivers/gpu/drm/drm_gem_framebuffer_helper.c index 7607f9cd6f77..ded7a379ac35 100644 --- a/drivers/gpu/drm/drm_gem_framebuffer_helper.c +++ b/drivers/gpu/drm/drm_gem_framebuffer_helper.c | |||
| @@ -316,8 +316,8 @@ drm_gem_fbdev_fb_create(struct drm_device *dev, | |||
| 316 | if (pitch_align) | 316 | if (pitch_align) |
| 317 | mode_cmd.pitches[0] = roundup(mode_cmd.pitches[0], | 317 | mode_cmd.pitches[0] = roundup(mode_cmd.pitches[0], |
| 318 | pitch_align); | 318 | pitch_align); |
| 319 | mode_cmd.pixel_format = drm_mode_legacy_fb_format(sizes->surface_bpp, | 319 | mode_cmd.pixel_format = drm_driver_legacy_fb_format(dev, sizes->surface_bpp, |
| 320 | sizes->surface_depth); | 320 | sizes->surface_depth); |
| 321 | if (obj->size < mode_cmd.pitches[0] * mode_cmd.height) | 321 | if (obj->size < mode_cmd.pitches[0] * mode_cmd.height) |
| 322 | return ERR_PTR(-EINVAL); | 322 | return ERR_PTR(-EINVAL); |
| 323 | 323 | ||
diff --git a/drivers/gpu/drm/drm_ioctl.c b/drivers/gpu/drm/drm_ioctl.c index 60dfbfae6a02..94bd872d56c4 100644 --- a/drivers/gpu/drm/drm_ioctl.c +++ b/drivers/gpu/drm/drm_ioctl.c | |||
| @@ -306,6 +306,12 @@ drm_setclientcap(struct drm_device *dev, void *data, struct drm_file *file_priv) | |||
| 306 | { | 306 | { |
| 307 | struct drm_set_client_cap *req = data; | 307 | struct drm_set_client_cap *req = data; |
| 308 | 308 | ||
| 309 | /* No render-only settable capabilities for now */ | ||
| 310 | |||
| 311 | /* Below caps that only works with KMS drivers */ | ||
| 312 | if (!drm_core_check_feature(dev, DRIVER_MODESET)) | ||
| 313 | return -EOPNOTSUPP; | ||
| 314 | |||
| 309 | switch (req->capability) { | 315 | switch (req->capability) { |
| 310 | case DRM_CLIENT_CAP_STEREO_3D: | 316 | case DRM_CLIENT_CAP_STEREO_3D: |
| 311 | if (req->value > 1) | 317 | if (req->value > 1) |
diff --git a/drivers/gpu/drm/drm_syncobj.c b/drivers/gpu/drm/drm_syncobj.c index 497729202bfe..5bcb3ef9b256 100644 --- a/drivers/gpu/drm/drm_syncobj.c +++ b/drivers/gpu/drm/drm_syncobj.c | |||
| @@ -66,20 +66,9 @@ static const char *drm_syncobj_stub_fence_get_name(struct dma_fence *fence) | |||
| 66 | return "syncobjstub"; | 66 | return "syncobjstub"; |
| 67 | } | 67 | } |
| 68 | 68 | ||
| 69 | static bool drm_syncobj_stub_fence_enable_signaling(struct dma_fence *fence) | ||
| 70 | { | ||
| 71 | return !dma_fence_is_signaled(fence); | ||
| 72 | } | ||
| 73 | |||
| 74 | static void drm_syncobj_stub_fence_release(struct dma_fence *f) | ||
| 75 | { | ||
| 76 | kfree(f); | ||
| 77 | } | ||
| 78 | static const struct dma_fence_ops drm_syncobj_stub_fence_ops = { | 69 | static const struct dma_fence_ops drm_syncobj_stub_fence_ops = { |
| 79 | .get_driver_name = drm_syncobj_stub_fence_get_name, | 70 | .get_driver_name = drm_syncobj_stub_fence_get_name, |
| 80 | .get_timeline_name = drm_syncobj_stub_fence_get_name, | 71 | .get_timeline_name = drm_syncobj_stub_fence_get_name, |
| 81 | .enable_signaling = drm_syncobj_stub_fence_enable_signaling, | ||
| 82 | .release = drm_syncobj_stub_fence_release, | ||
| 83 | }; | 72 | }; |
| 84 | 73 | ||
| 85 | 74 | ||
| @@ -683,7 +672,6 @@ static signed long drm_syncobj_array_wait_timeout(struct drm_syncobj **syncobjs, | |||
| 683 | { | 672 | { |
| 684 | struct syncobj_wait_entry *entries; | 673 | struct syncobj_wait_entry *entries; |
| 685 | struct dma_fence *fence; | 674 | struct dma_fence *fence; |
| 686 | signed long ret; | ||
| 687 | uint32_t signaled_count, i; | 675 | uint32_t signaled_count, i; |
| 688 | 676 | ||
| 689 | entries = kcalloc(count, sizeof(*entries), GFP_KERNEL); | 677 | entries = kcalloc(count, sizeof(*entries), GFP_KERNEL); |
| @@ -703,7 +691,7 @@ static signed long drm_syncobj_array_wait_timeout(struct drm_syncobj **syncobjs, | |||
| 703 | if (flags & DRM_SYNCOBJ_WAIT_FLAGS_WAIT_FOR_SUBMIT) { | 691 | if (flags & DRM_SYNCOBJ_WAIT_FLAGS_WAIT_FOR_SUBMIT) { |
| 704 | continue; | 692 | continue; |
| 705 | } else { | 693 | } else { |
| 706 | ret = -EINVAL; | 694 | timeout = -EINVAL; |
| 707 | goto cleanup_entries; | 695 | goto cleanup_entries; |
| 708 | } | 696 | } |
| 709 | } | 697 | } |
| @@ -715,12 +703,6 @@ static signed long drm_syncobj_array_wait_timeout(struct drm_syncobj **syncobjs, | |||
| 715 | } | 703 | } |
| 716 | } | 704 | } |
| 717 | 705 | ||
| 718 | /* Initialize ret to the max of timeout and 1. That way, the | ||
| 719 | * default return value indicates a successful wait and not a | ||
| 720 | * timeout. | ||
| 721 | */ | ||
| 722 | ret = max_t(signed long, timeout, 1); | ||
| 723 | |||
| 724 | if (signaled_count == count || | 706 | if (signaled_count == count || |
| 725 | (signaled_count > 0 && | 707 | (signaled_count > 0 && |
| 726 | !(flags & DRM_SYNCOBJ_WAIT_FLAGS_WAIT_ALL))) | 708 | !(flags & DRM_SYNCOBJ_WAIT_FLAGS_WAIT_ALL))) |
| @@ -771,18 +753,17 @@ static signed long drm_syncobj_array_wait_timeout(struct drm_syncobj **syncobjs, | |||
| 771 | goto done_waiting; | 753 | goto done_waiting; |
| 772 | 754 | ||
| 773 | if (timeout == 0) { | 755 | if (timeout == 0) { |
| 774 | /* If we are doing a 0 timeout wait and we got | 756 | timeout = -ETIME; |
| 775 | * here, then we just timed out. | ||
| 776 | */ | ||
| 777 | ret = 0; | ||
| 778 | goto done_waiting; | 757 | goto done_waiting; |
| 779 | } | 758 | } |
| 780 | 759 | ||
| 781 | ret = schedule_timeout(ret); | 760 | if (signal_pending(current)) { |
| 761 | timeout = -ERESTARTSYS; | ||
| 762 | goto done_waiting; | ||
| 763 | } | ||
| 782 | 764 | ||
| 783 | if (ret > 0 && signal_pending(current)) | 765 | timeout = schedule_timeout(timeout); |
| 784 | ret = -ERESTARTSYS; | 766 | } while (1); |
| 785 | } while (ret > 0); | ||
| 786 | 767 | ||
| 787 | done_waiting: | 768 | done_waiting: |
| 788 | __set_current_state(TASK_RUNNING); | 769 | __set_current_state(TASK_RUNNING); |
| @@ -799,7 +780,7 @@ cleanup_entries: | |||
| 799 | } | 780 | } |
| 800 | kfree(entries); | 781 | kfree(entries); |
| 801 | 782 | ||
| 802 | return ret; | 783 | return timeout; |
| 803 | } | 784 | } |
| 804 | 785 | ||
| 805 | /** | 786 | /** |
| @@ -840,19 +821,16 @@ static int drm_syncobj_array_wait(struct drm_device *dev, | |||
| 840 | struct drm_syncobj **syncobjs) | 821 | struct drm_syncobj **syncobjs) |
| 841 | { | 822 | { |
| 842 | signed long timeout = drm_timeout_abs_to_jiffies(wait->timeout_nsec); | 823 | signed long timeout = drm_timeout_abs_to_jiffies(wait->timeout_nsec); |
| 843 | signed long ret = 0; | ||
| 844 | uint32_t first = ~0; | 824 | uint32_t first = ~0; |
| 845 | 825 | ||
| 846 | ret = drm_syncobj_array_wait_timeout(syncobjs, | 826 | timeout = drm_syncobj_array_wait_timeout(syncobjs, |
| 847 | wait->count_handles, | 827 | wait->count_handles, |
| 848 | wait->flags, | 828 | wait->flags, |
| 849 | timeout, &first); | 829 | timeout, &first); |
| 850 | if (ret < 0) | 830 | if (timeout < 0) |
| 851 | return ret; | 831 | return timeout; |
| 852 | 832 | ||
| 853 | wait->first_signaled = first; | 833 | wait->first_signaled = first; |
| 854 | if (ret == 0) | ||
| 855 | return -ETIME; | ||
| 856 | return 0; | 834 | return 0; |
| 857 | } | 835 | } |
| 858 | 836 | ||
diff --git a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c index 80232321a244..0496be5212e1 100644 --- a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c +++ b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c | |||
| @@ -353,12 +353,12 @@ static int fsl_dcu_drm_probe(struct platform_device *pdev) | |||
| 353 | 353 | ||
| 354 | ret = drm_dev_register(drm, 0); | 354 | ret = drm_dev_register(drm, 0); |
| 355 | if (ret < 0) | 355 | if (ret < 0) |
| 356 | goto unref; | 356 | goto put; |
| 357 | 357 | ||
| 358 | return 0; | 358 | return 0; |
| 359 | 359 | ||
| 360 | unref: | 360 | put: |
| 361 | drm_dev_unref(drm); | 361 | drm_dev_put(drm); |
| 362 | unregister_pix_clk: | 362 | unregister_pix_clk: |
| 363 | clk_unregister(fsl_dev->pix_clk); | 363 | clk_unregister(fsl_dev->pix_clk); |
| 364 | disable_clk: | 364 | disable_clk: |
| @@ -371,7 +371,7 @@ static int fsl_dcu_drm_remove(struct platform_device *pdev) | |||
| 371 | struct fsl_dcu_drm_device *fsl_dev = platform_get_drvdata(pdev); | 371 | struct fsl_dcu_drm_device *fsl_dev = platform_get_drvdata(pdev); |
| 372 | 372 | ||
| 373 | drm_dev_unregister(fsl_dev->drm); | 373 | drm_dev_unregister(fsl_dev->drm); |
| 374 | drm_dev_unref(fsl_dev->drm); | 374 | drm_dev_put(fsl_dev->drm); |
| 375 | clk_disable_unprepare(fsl_dev->clk); | 375 | clk_disable_unprepare(fsl_dev->clk); |
| 376 | clk_unregister(fsl_dev->pix_clk); | 376 | clk_unregister(fsl_dev->pix_clk); |
| 377 | 377 | ||
diff --git a/drivers/gpu/drm/imx/imx-drm-core.c b/drivers/gpu/drm/imx/imx-drm-core.c index 5ea0c82f9957..a70f3131a377 100644 --- a/drivers/gpu/drm/imx/imx-drm-core.c +++ b/drivers/gpu/drm/imx/imx-drm-core.c | |||
| @@ -86,7 +86,6 @@ static int imx_drm_atomic_check(struct drm_device *dev, | |||
| 86 | 86 | ||
| 87 | static const struct drm_mode_config_funcs imx_drm_mode_config_funcs = { | 87 | static const struct drm_mode_config_funcs imx_drm_mode_config_funcs = { |
| 88 | .fb_create = drm_gem_fb_create, | 88 | .fb_create = drm_gem_fb_create, |
| 89 | .output_poll_changed = drm_fb_helper_output_poll_changed, | ||
| 90 | .atomic_check = imx_drm_atomic_check, | 89 | .atomic_check = imx_drm_atomic_check, |
| 91 | .atomic_commit = drm_atomic_helper_commit, | 90 | .atomic_commit = drm_atomic_helper_commit, |
| 92 | }; | 91 | }; |
| @@ -165,7 +164,6 @@ static const struct drm_ioctl_desc imx_drm_ioctls[] = { | |||
| 165 | static struct drm_driver imx_drm_driver = { | 164 | static struct drm_driver imx_drm_driver = { |
| 166 | .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME | | 165 | .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME | |
| 167 | DRIVER_ATOMIC, | 166 | DRIVER_ATOMIC, |
| 168 | .lastclose = drm_fb_helper_lastclose, | ||
| 169 | .gem_free_object_unlocked = drm_gem_cma_free_object, | 167 | .gem_free_object_unlocked = drm_gem_cma_free_object, |
| 170 | .gem_vm_ops = &drm_gem_cma_vm_ops, | 168 | .gem_vm_ops = &drm_gem_cma_vm_ops, |
| 171 | .dumb_create = drm_gem_cma_dumb_create, | 169 | .dumb_create = drm_gem_cma_dumb_create, |
| @@ -263,30 +261,23 @@ static int imx_drm_bind(struct device *dev) | |||
| 263 | * The fb helper takes copies of key hardware information, so the | 261 | * The fb helper takes copies of key hardware information, so the |
| 264 | * crtcs/connectors/encoders must not change after this point. | 262 | * crtcs/connectors/encoders must not change after this point. |
| 265 | */ | 263 | */ |
| 266 | #if IS_ENABLED(CONFIG_DRM_FBDEV_EMULATION) | ||
| 267 | if (legacyfb_depth != 16 && legacyfb_depth != 32) { | 264 | if (legacyfb_depth != 16 && legacyfb_depth != 32) { |
| 268 | dev_warn(dev, "Invalid legacyfb_depth. Defaulting to 16bpp\n"); | 265 | dev_warn(dev, "Invalid legacyfb_depth. Defaulting to 16bpp\n"); |
| 269 | legacyfb_depth = 16; | 266 | legacyfb_depth = 16; |
| 270 | } | 267 | } |
| 271 | ret = drm_fb_cma_fbdev_init(drm, legacyfb_depth, MAX_CRTC); | ||
| 272 | if (ret) | ||
| 273 | goto err_unbind; | ||
| 274 | #endif | ||
| 275 | 268 | ||
| 276 | drm_kms_helper_poll_init(drm); | 269 | drm_kms_helper_poll_init(drm); |
| 277 | 270 | ||
| 278 | ret = drm_dev_register(drm, 0); | 271 | ret = drm_dev_register(drm, 0); |
| 279 | if (ret) | 272 | if (ret) |
| 280 | goto err_fbhelper; | 273 | goto err_poll_fini; |
| 274 | |||
| 275 | drm_fbdev_generic_setup(drm, legacyfb_depth); | ||
| 281 | 276 | ||
| 282 | return 0; | 277 | return 0; |
| 283 | 278 | ||
| 284 | err_fbhelper: | 279 | err_poll_fini: |
| 285 | drm_kms_helper_poll_fini(drm); | 280 | drm_kms_helper_poll_fini(drm); |
| 286 | #if IS_ENABLED(CONFIG_DRM_FBDEV_EMULATION) | ||
| 287 | drm_fb_cma_fbdev_fini(drm); | ||
| 288 | err_unbind: | ||
| 289 | #endif | ||
| 290 | component_unbind_all(drm->dev, drm); | 281 | component_unbind_all(drm->dev, drm); |
| 291 | err_kms: | 282 | err_kms: |
| 292 | drm_mode_config_cleanup(drm); | 283 | drm_mode_config_cleanup(drm); |
| @@ -303,8 +294,6 @@ static void imx_drm_unbind(struct device *dev) | |||
| 303 | 294 | ||
| 304 | drm_kms_helper_poll_fini(drm); | 295 | drm_kms_helper_poll_fini(drm); |
| 305 | 296 | ||
| 306 | drm_fb_cma_fbdev_fini(drm); | ||
| 307 | |||
| 308 | drm_mode_config_cleanup(drm); | 297 | drm_mode_config_cleanup(drm); |
| 309 | 298 | ||
| 310 | component_unbind_all(drm->dev, drm); | 299 | component_unbind_all(drm->dev, drm); |
diff --git a/drivers/gpu/drm/mxsfb/mxsfb_crtc.c b/drivers/gpu/drm/mxsfb/mxsfb_crtc.c index 0abe77675b76..24b1f0c1432e 100644 --- a/drivers/gpu/drm/mxsfb/mxsfb_crtc.c +++ b/drivers/gpu/drm/mxsfb/mxsfb_crtc.c | |||
| @@ -129,7 +129,6 @@ static void mxsfb_enable_controller(struct mxsfb_drm_private *mxsfb) | |||
| 129 | if (mxsfb->clk_disp_axi) | 129 | if (mxsfb->clk_disp_axi) |
| 130 | clk_prepare_enable(mxsfb->clk_disp_axi); | 130 | clk_prepare_enable(mxsfb->clk_disp_axi); |
| 131 | clk_prepare_enable(mxsfb->clk); | 131 | clk_prepare_enable(mxsfb->clk); |
| 132 | mxsfb_enable_axi_clk(mxsfb); | ||
| 133 | 132 | ||
| 134 | /* If it was disabled, re-enable the mode again */ | 133 | /* If it was disabled, re-enable the mode again */ |
| 135 | writel(CTRL_DOTCLK_MODE, mxsfb->base + LCDC_CTRL + REG_SET); | 134 | writel(CTRL_DOTCLK_MODE, mxsfb->base + LCDC_CTRL + REG_SET); |
| @@ -159,8 +158,6 @@ static void mxsfb_disable_controller(struct mxsfb_drm_private *mxsfb) | |||
| 159 | reg &= ~VDCTRL4_SYNC_SIGNALS_ON; | 158 | reg &= ~VDCTRL4_SYNC_SIGNALS_ON; |
| 160 | writel(reg, mxsfb->base + LCDC_VDCTRL4); | 159 | writel(reg, mxsfb->base + LCDC_VDCTRL4); |
| 161 | 160 | ||
| 162 | mxsfb_disable_axi_clk(mxsfb); | ||
| 163 | |||
| 164 | clk_disable_unprepare(mxsfb->clk); | 161 | clk_disable_unprepare(mxsfb->clk); |
| 165 | if (mxsfb->clk_disp_axi) | 162 | if (mxsfb->clk_disp_axi) |
| 166 | clk_disable_unprepare(mxsfb->clk_disp_axi); | 163 | clk_disable_unprepare(mxsfb->clk_disp_axi); |
| @@ -196,6 +193,21 @@ static int mxsfb_reset_block(void __iomem *reset_addr) | |||
| 196 | return clear_poll_bit(reset_addr, MODULE_CLKGATE); | 193 | return clear_poll_bit(reset_addr, MODULE_CLKGATE); |
| 197 | } | 194 | } |
| 198 | 195 | ||
| 196 | static dma_addr_t mxsfb_get_fb_paddr(struct mxsfb_drm_private *mxsfb) | ||
| 197 | { | ||
| 198 | struct drm_framebuffer *fb = mxsfb->pipe.plane.state->fb; | ||
| 199 | struct drm_gem_cma_object *gem; | ||
| 200 | |||
| 201 | if (!fb) | ||
| 202 | return 0; | ||
| 203 | |||
| 204 | gem = drm_fb_cma_get_gem_obj(fb, 0); | ||
| 205 | if (!gem) | ||
| 206 | return 0; | ||
| 207 | |||
| 208 | return gem->paddr; | ||
| 209 | } | ||
| 210 | |||
| 199 | static void mxsfb_crtc_mode_set_nofb(struct mxsfb_drm_private *mxsfb) | 211 | static void mxsfb_crtc_mode_set_nofb(struct mxsfb_drm_private *mxsfb) |
| 200 | { | 212 | { |
| 201 | struct drm_display_mode *m = &mxsfb->pipe.crtc.state->adjusted_mode; | 213 | struct drm_display_mode *m = &mxsfb->pipe.crtc.state->adjusted_mode; |
| @@ -208,7 +220,6 @@ static void mxsfb_crtc_mode_set_nofb(struct mxsfb_drm_private *mxsfb) | |||
| 208 | * running. This may lead to shifted pictures (FIFO issue?), so | 220 | * running. This may lead to shifted pictures (FIFO issue?), so |
| 209 | * first stop the controller and drain its FIFOs. | 221 | * first stop the controller and drain its FIFOs. |
| 210 | */ | 222 | */ |
| 211 | mxsfb_enable_axi_clk(mxsfb); | ||
| 212 | 223 | ||
| 213 | /* Mandatory eLCDIF reset as per the Reference Manual */ | 224 | /* Mandatory eLCDIF reset as per the Reference Manual */ |
| 214 | err = mxsfb_reset_block(mxsfb->base); | 225 | err = mxsfb_reset_block(mxsfb->base); |
| @@ -269,19 +280,29 @@ static void mxsfb_crtc_mode_set_nofb(struct mxsfb_drm_private *mxsfb) | |||
| 269 | 280 | ||
| 270 | writel(SET_DOTCLK_H_VALID_DATA_CNT(m->hdisplay), | 281 | writel(SET_DOTCLK_H_VALID_DATA_CNT(m->hdisplay), |
| 271 | mxsfb->base + LCDC_VDCTRL4); | 282 | mxsfb->base + LCDC_VDCTRL4); |
| 272 | |||
| 273 | mxsfb_disable_axi_clk(mxsfb); | ||
| 274 | } | 283 | } |
| 275 | 284 | ||
| 276 | void mxsfb_crtc_enable(struct mxsfb_drm_private *mxsfb) | 285 | void mxsfb_crtc_enable(struct mxsfb_drm_private *mxsfb) |
| 277 | { | 286 | { |
| 287 | dma_addr_t paddr; | ||
| 288 | |||
| 289 | mxsfb_enable_axi_clk(mxsfb); | ||
| 278 | mxsfb_crtc_mode_set_nofb(mxsfb); | 290 | mxsfb_crtc_mode_set_nofb(mxsfb); |
| 291 | |||
| 292 | /* Write cur_buf as well to avoid an initial corrupt frame */ | ||
| 293 | paddr = mxsfb_get_fb_paddr(mxsfb); | ||
| 294 | if (paddr) { | ||
| 295 | writel(paddr, mxsfb->base + mxsfb->devdata->cur_buf); | ||
| 296 | writel(paddr, mxsfb->base + mxsfb->devdata->next_buf); | ||
| 297 | } | ||
| 298 | |||
| 279 | mxsfb_enable_controller(mxsfb); | 299 | mxsfb_enable_controller(mxsfb); |
| 280 | } | 300 | } |
| 281 | 301 | ||
| 282 | void mxsfb_crtc_disable(struct mxsfb_drm_private *mxsfb) | 302 | void mxsfb_crtc_disable(struct mxsfb_drm_private *mxsfb) |
| 283 | { | 303 | { |
| 284 | mxsfb_disable_controller(mxsfb); | 304 | mxsfb_disable_controller(mxsfb); |
| 305 | mxsfb_disable_axi_clk(mxsfb); | ||
| 285 | } | 306 | } |
| 286 | 307 | ||
| 287 | void mxsfb_plane_atomic_update(struct mxsfb_drm_private *mxsfb, | 308 | void mxsfb_plane_atomic_update(struct mxsfb_drm_private *mxsfb, |
| @@ -289,12 +310,8 @@ void mxsfb_plane_atomic_update(struct mxsfb_drm_private *mxsfb, | |||
| 289 | { | 310 | { |
| 290 | struct drm_simple_display_pipe *pipe = &mxsfb->pipe; | 311 | struct drm_simple_display_pipe *pipe = &mxsfb->pipe; |
| 291 | struct drm_crtc *crtc = &pipe->crtc; | 312 | struct drm_crtc *crtc = &pipe->crtc; |
| 292 | struct drm_framebuffer *fb = pipe->plane.state->fb; | ||
| 293 | struct drm_pending_vblank_event *event; | 313 | struct drm_pending_vblank_event *event; |
| 294 | struct drm_gem_cma_object *gem; | 314 | dma_addr_t paddr; |
| 295 | |||
| 296 | if (!crtc) | ||
| 297 | return; | ||
| 298 | 315 | ||
| 299 | spin_lock_irq(&crtc->dev->event_lock); | 316 | spin_lock_irq(&crtc->dev->event_lock); |
| 300 | event = crtc->state->event; | 317 | event = crtc->state->event; |
| @@ -309,12 +326,10 @@ void mxsfb_plane_atomic_update(struct mxsfb_drm_private *mxsfb, | |||
| 309 | } | 326 | } |
| 310 | spin_unlock_irq(&crtc->dev->event_lock); | 327 | spin_unlock_irq(&crtc->dev->event_lock); |
| 311 | 328 | ||
| 312 | if (!fb) | 329 | paddr = mxsfb_get_fb_paddr(mxsfb); |
| 313 | return; | 330 | if (paddr) { |
| 314 | 331 | mxsfb_enable_axi_clk(mxsfb); | |
| 315 | gem = drm_fb_cma_get_gem_obj(fb, 0); | 332 | writel(paddr, mxsfb->base + mxsfb->devdata->next_buf); |
| 316 | 333 | mxsfb_disable_axi_clk(mxsfb); | |
| 317 | mxsfb_enable_axi_clk(mxsfb); | 334 | } |
| 318 | writel(gem->paddr, mxsfb->base + mxsfb->devdata->next_buf); | ||
| 319 | mxsfb_disable_axi_clk(mxsfb); | ||
| 320 | } | 335 | } |
diff --git a/drivers/gpu/drm/mxsfb/mxsfb_drv.c b/drivers/gpu/drm/mxsfb/mxsfb_drv.c index ffe5137ccaf8..2393e6d16ffd 100644 --- a/drivers/gpu/drm/mxsfb/mxsfb_drv.c +++ b/drivers/gpu/drm/mxsfb/mxsfb_drv.c | |||
| @@ -98,12 +98,18 @@ static const struct drm_mode_config_funcs mxsfb_mode_config_funcs = { | |||
| 98 | .atomic_commit = drm_atomic_helper_commit, | 98 | .atomic_commit = drm_atomic_helper_commit, |
| 99 | }; | 99 | }; |
| 100 | 100 | ||
| 101 | static const struct drm_mode_config_helper_funcs mxsfb_mode_config_helpers = { | ||
| 102 | .atomic_commit_tail = drm_atomic_helper_commit_tail_rpm, | ||
| 103 | }; | ||
| 104 | |||
| 101 | static void mxsfb_pipe_enable(struct drm_simple_display_pipe *pipe, | 105 | static void mxsfb_pipe_enable(struct drm_simple_display_pipe *pipe, |
| 102 | struct drm_crtc_state *crtc_state, | 106 | struct drm_crtc_state *crtc_state, |
| 103 | struct drm_plane_state *plane_state) | 107 | struct drm_plane_state *plane_state) |
| 104 | { | 108 | { |
| 105 | struct mxsfb_drm_private *mxsfb = drm_pipe_to_mxsfb_drm_private(pipe); | 109 | struct mxsfb_drm_private *mxsfb = drm_pipe_to_mxsfb_drm_private(pipe); |
| 110 | struct drm_device *drm = pipe->plane.dev; | ||
| 106 | 111 | ||
| 112 | pm_runtime_get_sync(drm->dev); | ||
| 107 | drm_panel_prepare(mxsfb->panel); | 113 | drm_panel_prepare(mxsfb->panel); |
| 108 | mxsfb_crtc_enable(mxsfb); | 114 | mxsfb_crtc_enable(mxsfb); |
| 109 | drm_panel_enable(mxsfb->panel); | 115 | drm_panel_enable(mxsfb->panel); |
| @@ -112,10 +118,22 @@ static void mxsfb_pipe_enable(struct drm_simple_display_pipe *pipe, | |||
| 112 | static void mxsfb_pipe_disable(struct drm_simple_display_pipe *pipe) | 118 | static void mxsfb_pipe_disable(struct drm_simple_display_pipe *pipe) |
| 113 | { | 119 | { |
| 114 | struct mxsfb_drm_private *mxsfb = drm_pipe_to_mxsfb_drm_private(pipe); | 120 | struct mxsfb_drm_private *mxsfb = drm_pipe_to_mxsfb_drm_private(pipe); |
| 121 | struct drm_device *drm = pipe->plane.dev; | ||
| 122 | struct drm_crtc *crtc = &pipe->crtc; | ||
| 123 | struct drm_pending_vblank_event *event; | ||
| 115 | 124 | ||
| 116 | drm_panel_disable(mxsfb->panel); | 125 | drm_panel_disable(mxsfb->panel); |
| 117 | mxsfb_crtc_disable(mxsfb); | 126 | mxsfb_crtc_disable(mxsfb); |
| 118 | drm_panel_unprepare(mxsfb->panel); | 127 | drm_panel_unprepare(mxsfb->panel); |
| 128 | pm_runtime_put_sync(drm->dev); | ||
| 129 | |||
| 130 | spin_lock_irq(&drm->event_lock); | ||
| 131 | event = crtc->state->event; | ||
| 132 | if (event) { | ||
| 133 | crtc->state->event = NULL; | ||
| 134 | drm_crtc_send_vblank_event(crtc, event); | ||
| 135 | } | ||
| 136 | spin_unlock_irq(&drm->event_lock); | ||
| 119 | } | 137 | } |
| 120 | 138 | ||
| 121 | static void mxsfb_pipe_update(struct drm_simple_display_pipe *pipe, | 139 | static void mxsfb_pipe_update(struct drm_simple_display_pipe *pipe, |
| @@ -230,6 +248,7 @@ static int mxsfb_load(struct drm_device *drm, unsigned long flags) | |||
| 230 | drm->mode_config.max_width = MXSFB_MAX_XRES; | 248 | drm->mode_config.max_width = MXSFB_MAX_XRES; |
| 231 | drm->mode_config.max_height = MXSFB_MAX_YRES; | 249 | drm->mode_config.max_height = MXSFB_MAX_YRES; |
| 232 | drm->mode_config.funcs = &mxsfb_mode_config_funcs; | 250 | drm->mode_config.funcs = &mxsfb_mode_config_funcs; |
| 251 | drm->mode_config.helper_private = &mxsfb_mode_config_helpers; | ||
| 233 | 252 | ||
| 234 | drm_mode_config_reset(drm); | 253 | drm_mode_config_reset(drm); |
| 235 | 254 | ||
| @@ -414,6 +433,26 @@ static int mxsfb_remove(struct platform_device *pdev) | |||
| 414 | return 0; | 433 | return 0; |
| 415 | } | 434 | } |
| 416 | 435 | ||
| 436 | #ifdef CONFIG_PM_SLEEP | ||
| 437 | static int mxsfb_suspend(struct device *dev) | ||
| 438 | { | ||
| 439 | struct drm_device *drm = dev_get_drvdata(dev); | ||
| 440 | |||
| 441 | return drm_mode_config_helper_suspend(drm); | ||
| 442 | } | ||
| 443 | |||
| 444 | static int mxsfb_resume(struct device *dev) | ||
| 445 | { | ||
| 446 | struct drm_device *drm = dev_get_drvdata(dev); | ||
| 447 | |||
| 448 | return drm_mode_config_helper_resume(drm); | ||
| 449 | } | ||
| 450 | #endif | ||
| 451 | |||
| 452 | static const struct dev_pm_ops mxsfb_pm_ops = { | ||
| 453 | SET_SYSTEM_SLEEP_PM_OPS(mxsfb_suspend, mxsfb_resume) | ||
| 454 | }; | ||
| 455 | |||
| 417 | static struct platform_driver mxsfb_platform_driver = { | 456 | static struct platform_driver mxsfb_platform_driver = { |
| 418 | .probe = mxsfb_probe, | 457 | .probe = mxsfb_probe, |
| 419 | .remove = mxsfb_remove, | 458 | .remove = mxsfb_remove, |
| @@ -421,6 +460,7 @@ static struct platform_driver mxsfb_platform_driver = { | |||
| 421 | .driver = { | 460 | .driver = { |
| 422 | .name = "mxsfb", | 461 | .name = "mxsfb", |
| 423 | .of_match_table = mxsfb_dt_ids, | 462 | .of_match_table = mxsfb_dt_ids, |
| 463 | .pm = &mxsfb_pm_ops, | ||
| 424 | }, | 464 | }, |
| 425 | }; | 465 | }; |
| 426 | 466 | ||
diff --git a/drivers/gpu/drm/pl111/pl111_drv.c b/drivers/gpu/drm/pl111/pl111_drv.c index 47fe30223444..33e0483d62ae 100644 --- a/drivers/gpu/drm/pl111/pl111_drv.c +++ b/drivers/gpu/drm/pl111/pl111_drv.c | |||
| @@ -194,8 +194,6 @@ static int pl111_modeset_init(struct drm_device *dev) | |||
| 194 | 194 | ||
| 195 | drm_mode_config_reset(dev); | 195 | drm_mode_config_reset(dev); |
| 196 | 196 | ||
| 197 | drm_fb_cma_fbdev_init(dev, priv->variant->fb_bpp, 0); | ||
| 198 | |||
| 199 | drm_kms_helper_poll_init(dev); | 197 | drm_kms_helper_poll_init(dev); |
| 200 | 198 | ||
| 201 | goto finish; | 199 | goto finish; |
| @@ -232,7 +230,6 @@ DEFINE_DRM_GEM_CMA_FOPS(drm_fops); | |||
| 232 | static struct drm_driver pl111_drm_driver = { | 230 | static struct drm_driver pl111_drm_driver = { |
| 233 | .driver_features = | 231 | .driver_features = |
| 234 | DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME | DRIVER_ATOMIC, | 232 | DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME | DRIVER_ATOMIC, |
| 235 | .lastclose = drm_fb_helper_lastclose, | ||
| 236 | .ioctls = NULL, | 233 | .ioctls = NULL, |
| 237 | .fops = &drm_fops, | 234 | .fops = &drm_fops, |
| 238 | .name = "pl111", | 235 | .name = "pl111", |
| @@ -332,6 +329,8 @@ static int pl111_amba_probe(struct amba_device *amba_dev, | |||
| 332 | if (ret < 0) | 329 | if (ret < 0) |
| 333 | goto dev_put; | 330 | goto dev_put; |
| 334 | 331 | ||
| 332 | drm_fbdev_generic_setup(drm, priv->variant->fb_bpp); | ||
| 333 | |||
| 335 | return 0; | 334 | return 0; |
| 336 | 335 | ||
| 337 | dev_put: | 336 | dev_put: |
| @@ -348,7 +347,6 @@ static int pl111_amba_remove(struct amba_device *amba_dev) | |||
| 348 | struct pl111_drm_dev_private *priv = drm->dev_private; | 347 | struct pl111_drm_dev_private *priv = drm->dev_private; |
| 349 | 348 | ||
| 350 | drm_dev_unregister(drm); | 349 | drm_dev_unregister(drm); |
| 351 | drm_fb_cma_fbdev_fini(drm); | ||
| 352 | if (priv->panel) | 350 | if (priv->panel) |
| 353 | drm_panel_bridge_remove(priv->bridge); | 351 | drm_panel_bridge_remove(priv->bridge); |
| 354 | drm_mode_config_cleanup(drm); | 352 | drm_mode_config_cleanup(drm); |
diff --git a/drivers/gpu/drm/sti/sti_drv.c b/drivers/gpu/drm/sti/sti_drv.c index 832fc43960ee..6dced8abcf16 100644 --- a/drivers/gpu/drm/sti/sti_drv.c +++ b/drivers/gpu/drm/sti/sti_drv.c | |||
| @@ -121,7 +121,6 @@ err: | |||
| 121 | 121 | ||
| 122 | static const struct drm_mode_config_funcs sti_mode_config_funcs = { | 122 | static const struct drm_mode_config_funcs sti_mode_config_funcs = { |
| 123 | .fb_create = drm_gem_fb_create, | 123 | .fb_create = drm_gem_fb_create, |
| 124 | .output_poll_changed = drm_fb_helper_output_poll_changed, | ||
| 125 | .atomic_check = drm_atomic_helper_check, | 124 | .atomic_check = drm_atomic_helper_check, |
| 126 | .atomic_commit = drm_atomic_helper_commit, | 125 | .atomic_commit = drm_atomic_helper_commit, |
| 127 | }; | 126 | }; |
| @@ -206,7 +205,6 @@ static void sti_cleanup(struct drm_device *ddev) | |||
| 206 | { | 205 | { |
| 207 | struct sti_private *private = ddev->dev_private; | 206 | struct sti_private *private = ddev->dev_private; |
| 208 | 207 | ||
| 209 | drm_fb_cma_fbdev_fini(ddev); | ||
| 210 | drm_kms_helper_poll_fini(ddev); | 208 | drm_kms_helper_poll_fini(ddev); |
| 211 | component_unbind_all(ddev->dev, ddev); | 209 | component_unbind_all(ddev->dev, ddev); |
| 212 | kfree(private); | 210 | kfree(private); |
| @@ -236,11 +234,7 @@ static int sti_bind(struct device *dev) | |||
| 236 | 234 | ||
| 237 | drm_mode_config_reset(ddev); | 235 | drm_mode_config_reset(ddev); |
| 238 | 236 | ||
| 239 | if (ddev->mode_config.num_connector) { | 237 | drm_fbdev_generic_setup(ddev, 32); |
| 240 | ret = drm_fb_cma_fbdev_init(ddev, 32, 0); | ||
| 241 | if (ret) | ||
| 242 | DRM_DEBUG_DRIVER("Warning: fails to create fbdev\n"); | ||
| 243 | } | ||
| 244 | 238 | ||
| 245 | return 0; | 239 | return 0; |
| 246 | 240 | ||
diff --git a/drivers/gpu/drm/sun4i/sun4i_drv.c b/drivers/gpu/drm/sun4i/sun4i_drv.c index 9027ddde4262..1e41c3f5fd6d 100644 --- a/drivers/gpu/drm/sun4i/sun4i_drv.c +++ b/drivers/gpu/drm/sun4i/sun4i_drv.c | |||
| @@ -402,6 +402,7 @@ static const struct of_device_id sun4i_drv_of_table[] = { | |||
| 402 | { .compatible = "allwinner,sun8i-a33-display-engine" }, | 402 | { .compatible = "allwinner,sun8i-a33-display-engine" }, |
| 403 | { .compatible = "allwinner,sun8i-a83t-display-engine" }, | 403 | { .compatible = "allwinner,sun8i-a83t-display-engine" }, |
| 404 | { .compatible = "allwinner,sun8i-h3-display-engine" }, | 404 | { .compatible = "allwinner,sun8i-h3-display-engine" }, |
| 405 | { .compatible = "allwinner,sun8i-r40-display-engine" }, | ||
| 405 | { .compatible = "allwinner,sun8i-v3s-display-engine" }, | 406 | { .compatible = "allwinner,sun8i-v3s-display-engine" }, |
| 406 | { .compatible = "allwinner,sun9i-a80-display-engine" }, | 407 | { .compatible = "allwinner,sun9i-a80-display-engine" }, |
| 407 | { .compatible = "allwinner,sun50i-a64-display-engine" }, | 408 | { .compatible = "allwinner,sun50i-a64-display-engine" }, |
diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/sun8i_mixer.c index 091f6cf40353..8b3d02b146b7 100644 --- a/drivers/gpu/drm/sun4i/sun8i_mixer.c +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c | |||
| @@ -545,6 +545,22 @@ static const struct sun8i_mixer_cfg sun8i_h3_mixer0_cfg = { | |||
| 545 | .vi_num = 1, | 545 | .vi_num = 1, |
| 546 | }; | 546 | }; |
| 547 | 547 | ||
| 548 | static const struct sun8i_mixer_cfg sun8i_r40_mixer0_cfg = { | ||
| 549 | .ccsc = 0, | ||
| 550 | .mod_rate = 297000000, | ||
| 551 | .scaler_mask = 0xf, | ||
| 552 | .ui_num = 3, | ||
| 553 | .vi_num = 1, | ||
| 554 | }; | ||
| 555 | |||
| 556 | static const struct sun8i_mixer_cfg sun8i_r40_mixer1_cfg = { | ||
| 557 | .ccsc = 1, | ||
| 558 | .mod_rate = 297000000, | ||
| 559 | .scaler_mask = 0x3, | ||
| 560 | .ui_num = 1, | ||
| 561 | .vi_num = 1, | ||
| 562 | }; | ||
| 563 | |||
| 548 | static const struct sun8i_mixer_cfg sun8i_v3s_mixer_cfg = { | 564 | static const struct sun8i_mixer_cfg sun8i_v3s_mixer_cfg = { |
| 549 | .vi_num = 2, | 565 | .vi_num = 2, |
| 550 | .ui_num = 1, | 566 | .ui_num = 1, |
| @@ -583,6 +599,14 @@ static const struct of_device_id sun8i_mixer_of_table[] = { | |||
| 583 | .data = &sun8i_h3_mixer0_cfg, | 599 | .data = &sun8i_h3_mixer0_cfg, |
| 584 | }, | 600 | }, |
| 585 | { | 601 | { |
| 602 | .compatible = "allwinner,sun8i-r40-de2-mixer-0", | ||
| 603 | .data = &sun8i_r40_mixer0_cfg, | ||
| 604 | }, | ||
| 605 | { | ||
| 606 | .compatible = "allwinner,sun8i-r40-de2-mixer-1", | ||
| 607 | .data = &sun8i_r40_mixer1_cfg, | ||
| 608 | }, | ||
| 609 | { | ||
| 586 | .compatible = "allwinner,sun8i-v3s-de2-mixer", | 610 | .compatible = "allwinner,sun8i-v3s-de2-mixer", |
| 587 | .data = &sun8i_v3s_mixer_cfg, | 611 | .data = &sun8i_v3s_mixer_cfg, |
| 588 | }, | 612 | }, |
diff --git a/drivers/gpu/drm/sun4i/sun8i_tcon_top.c b/drivers/gpu/drm/sun4i/sun8i_tcon_top.c index 9831a9fe2cf4..3040a79f298f 100644 --- a/drivers/gpu/drm/sun4i/sun8i_tcon_top.c +++ b/drivers/gpu/drm/sun4i/sun8i_tcon_top.c | |||
| @@ -252,6 +252,7 @@ static int sun8i_tcon_top_remove(struct platform_device *pdev) | |||
| 252 | 252 | ||
| 253 | /* sun4i_drv uses this list to check if a device node is a TCON TOP */ | 253 | /* sun4i_drv uses this list to check if a device node is a TCON TOP */ |
| 254 | const struct of_device_id sun8i_tcon_top_of_table[] = { | 254 | const struct of_device_id sun8i_tcon_top_of_table[] = { |
| 255 | { .compatible = "allwinner,sun8i-r40-tcon-top" }, | ||
| 255 | { /* sentinel */ } | 256 | { /* sentinel */ } |
| 256 | }; | 257 | }; |
| 257 | MODULE_DEVICE_TABLE(of, sun8i_tcon_top_of_table); | 258 | MODULE_DEVICE_TABLE(of, sun8i_tcon_top_of_table); |
diff --git a/drivers/gpu/drm/tegra/drm.c b/drivers/gpu/drm/tegra/drm.c index b424bc911b95..8cdb610561ba 100644 --- a/drivers/gpu/drm/tegra/drm.c +++ b/drivers/gpu/drm/tegra/drm.c | |||
| @@ -1189,16 +1189,16 @@ static int host1x_drm_probe(struct host1x_device *dev) | |||
| 1189 | 1189 | ||
| 1190 | err = drm_fb_helper_remove_conflicting_framebuffers(NULL, "tegradrmfb", false); | 1190 | err = drm_fb_helper_remove_conflicting_framebuffers(NULL, "tegradrmfb", false); |
| 1191 | if (err < 0) | 1191 | if (err < 0) |
| 1192 | goto unref; | 1192 | goto put; |
| 1193 | 1193 | ||
| 1194 | err = drm_dev_register(drm, 0); | 1194 | err = drm_dev_register(drm, 0); |
| 1195 | if (err < 0) | 1195 | if (err < 0) |
| 1196 | goto unref; | 1196 | goto put; |
| 1197 | 1197 | ||
| 1198 | return 0; | 1198 | return 0; |
| 1199 | 1199 | ||
| 1200 | unref: | 1200 | put: |
| 1201 | drm_dev_unref(drm); | 1201 | drm_dev_put(drm); |
| 1202 | return err; | 1202 | return err; |
| 1203 | } | 1203 | } |
| 1204 | 1204 | ||
| @@ -1207,7 +1207,7 @@ static int host1x_drm_remove(struct host1x_device *dev) | |||
| 1207 | struct drm_device *drm = dev_get_drvdata(&dev->dev); | 1207 | struct drm_device *drm = dev_get_drvdata(&dev->dev); |
| 1208 | 1208 | ||
| 1209 | drm_dev_unregister(drm); | 1209 | drm_dev_unregister(drm); |
| 1210 | drm_dev_unref(drm); | 1210 | drm_dev_put(drm); |
| 1211 | 1211 | ||
| 1212 | return 0; | 1212 | return 0; |
| 1213 | } | 1213 | } |
diff --git a/drivers/gpu/drm/tve200/tve200_drv.c b/drivers/gpu/drm/tve200/tve200_drv.c index ac344ddb23bc..72efcecb44f7 100644 --- a/drivers/gpu/drm/tve200/tve200_drv.c +++ b/drivers/gpu/drm/tve200/tve200_drv.c | |||
| @@ -126,12 +126,6 @@ static int tve200_modeset_init(struct drm_device *dev) | |||
| 126 | } | 126 | } |
| 127 | 127 | ||
| 128 | drm_mode_config_reset(dev); | 128 | drm_mode_config_reset(dev); |
| 129 | |||
| 130 | /* | ||
| 131 | * Passing in 16 here will make the RGB656 mode the default | ||
| 132 | * Passing in 32 will use XRGB8888 mode | ||
| 133 | */ | ||
| 134 | drm_fb_cma_fbdev_init(dev, 16, 0); | ||
| 135 | drm_kms_helper_poll_init(dev); | 129 | drm_kms_helper_poll_init(dev); |
| 136 | 130 | ||
| 137 | goto finish; | 131 | goto finish; |
| @@ -149,7 +143,6 @@ DEFINE_DRM_GEM_CMA_FOPS(drm_fops); | |||
| 149 | static struct drm_driver tve200_drm_driver = { | 143 | static struct drm_driver tve200_drm_driver = { |
| 150 | .driver_features = | 144 | .driver_features = |
| 151 | DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME | DRIVER_ATOMIC, | 145 | DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME | DRIVER_ATOMIC, |
| 152 | .lastclose = drm_fb_helper_lastclose, | ||
| 153 | .ioctls = NULL, | 146 | .ioctls = NULL, |
| 154 | .fops = &drm_fops, | 147 | .fops = &drm_fops, |
| 155 | .name = "tve200", | 148 | .name = "tve200", |
| @@ -245,6 +238,12 @@ static int tve200_probe(struct platform_device *pdev) | |||
| 245 | if (ret < 0) | 238 | if (ret < 0) |
| 246 | goto clk_disable; | 239 | goto clk_disable; |
| 247 | 240 | ||
| 241 | /* | ||
| 242 | * Passing in 16 here will make the RGB565 mode the default | ||
| 243 | * Passing in 32 will use XRGB8888 mode | ||
| 244 | */ | ||
| 245 | drm_fbdev_generic_setup(drm, 16); | ||
| 246 | |||
| 248 | return 0; | 247 | return 0; |
| 249 | 248 | ||
| 250 | clk_disable: | 249 | clk_disable: |
| @@ -260,7 +259,6 @@ static int tve200_remove(struct platform_device *pdev) | |||
| 260 | struct tve200_drm_dev_private *priv = drm->dev_private; | 259 | struct tve200_drm_dev_private *priv = drm->dev_private; |
| 261 | 260 | ||
| 262 | drm_dev_unregister(drm); | 261 | drm_dev_unregister(drm); |
| 263 | drm_fb_cma_fbdev_fini(drm); | ||
| 264 | if (priv->panel) | 262 | if (priv->panel) |
| 265 | drm_panel_bridge_remove(priv->bridge); | 263 | drm_panel_bridge_remove(priv->bridge); |
| 266 | drm_mode_config_cleanup(drm); | 264 | drm_mode_config_cleanup(drm); |
diff --git a/drivers/gpu/drm/udl/udl_drv.c b/drivers/gpu/drm/udl/udl_drv.c index 9ef515df724b..a63e3011e971 100644 --- a/drivers/gpu/drm/udl/udl_drv.c +++ b/drivers/gpu/drm/udl/udl_drv.c | |||
| @@ -94,7 +94,7 @@ static int udl_usb_probe(struct usb_interface *interface, | |||
| 94 | return 0; | 94 | return 0; |
| 95 | 95 | ||
| 96 | err_free: | 96 | err_free: |
| 97 | drm_dev_unref(dev); | 97 | drm_dev_put(dev); |
| 98 | return r; | 98 | return r; |
| 99 | } | 99 | } |
| 100 | 100 | ||
diff --git a/drivers/gpu/drm/vc4/vc4_drv.c b/drivers/gpu/drm/vc4/vc4_drv.c index e2a15c63a81f..1f1780ccdbdf 100644 --- a/drivers/gpu/drm/vc4/vc4_drv.c +++ b/drivers/gpu/drm/vc4/vc4_drv.c | |||
| @@ -178,7 +178,6 @@ static struct drm_driver vc4_drm_driver = { | |||
| 178 | DRIVER_RENDER | | 178 | DRIVER_RENDER | |
| 179 | DRIVER_PRIME | | 179 | DRIVER_PRIME | |
| 180 | DRIVER_SYNCOBJ), | 180 | DRIVER_SYNCOBJ), |
| 181 | .lastclose = drm_fb_helper_lastclose, | ||
| 182 | .open = vc4_open, | 181 | .open = vc4_open, |
| 183 | .postclose = vc4_close, | 182 | .postclose = vc4_close, |
| 184 | .irq_handler = vc4_irq, | 183 | .irq_handler = vc4_irq, |
| @@ -288,6 +287,8 @@ static int vc4_drm_bind(struct device *dev) | |||
| 288 | 287 | ||
| 289 | vc4_kms_load(drm); | 288 | vc4_kms_load(drm); |
| 290 | 289 | ||
| 290 | drm_fbdev_generic_setup(drm, 32); | ||
| 291 | |||
| 291 | return 0; | 292 | return 0; |
| 292 | 293 | ||
| 293 | unbind_all: | 294 | unbind_all: |
| @@ -307,8 +308,6 @@ static void vc4_drm_unbind(struct device *dev) | |||
| 307 | 308 | ||
| 308 | drm_dev_unregister(drm); | 309 | drm_dev_unregister(drm); |
| 309 | 310 | ||
| 310 | drm_fb_cma_fbdev_fini(drm); | ||
| 311 | |||
| 312 | drm_mode_config_cleanup(drm); | 311 | drm_mode_config_cleanup(drm); |
| 313 | 312 | ||
| 314 | drm_atomic_private_obj_fini(&vc4->ctm_manager); | 313 | drm_atomic_private_obj_fini(&vc4->ctm_manager); |
diff --git a/drivers/gpu/drm/vc4/vc4_kms.c b/drivers/gpu/drm/vc4/vc4_kms.c index ca5aa7fba769..127468785f74 100644 --- a/drivers/gpu/drm/vc4/vc4_kms.c +++ b/drivers/gpu/drm/vc4/vc4_kms.c | |||
| @@ -19,8 +19,6 @@ | |||
| 19 | #include <drm/drm_atomic_helper.h> | 19 | #include <drm/drm_atomic_helper.h> |
| 20 | #include <drm/drm_crtc_helper.h> | 20 | #include <drm/drm_crtc_helper.h> |
| 21 | #include <drm/drm_plane_helper.h> | 21 | #include <drm/drm_plane_helper.h> |
| 22 | #include <drm/drm_fb_helper.h> | ||
| 23 | #include <drm/drm_fb_cma_helper.h> | ||
| 24 | #include <drm/drm_gem_framebuffer_helper.h> | 22 | #include <drm/drm_gem_framebuffer_helper.h> |
| 25 | #include "vc4_drv.h" | 23 | #include "vc4_drv.h" |
| 26 | #include "vc4_regs.h" | 24 | #include "vc4_regs.h" |
| @@ -394,7 +392,6 @@ vc4_atomic_check(struct drm_device *dev, struct drm_atomic_state *state) | |||
| 394 | } | 392 | } |
| 395 | 393 | ||
| 396 | static const struct drm_mode_config_funcs vc4_mode_funcs = { | 394 | static const struct drm_mode_config_funcs vc4_mode_funcs = { |
| 397 | .output_poll_changed = drm_fb_helper_output_poll_changed, | ||
| 398 | .atomic_check = vc4_atomic_check, | 395 | .atomic_check = vc4_atomic_check, |
| 399 | .atomic_commit = vc4_atomic_commit, | 396 | .atomic_commit = vc4_atomic_commit, |
| 400 | .fb_create = vc4_fb_create, | 397 | .fb_create = vc4_fb_create, |
| @@ -434,9 +431,6 @@ int vc4_kms_load(struct drm_device *dev) | |||
| 434 | 431 | ||
| 435 | drm_mode_config_reset(dev); | 432 | drm_mode_config_reset(dev); |
| 436 | 433 | ||
| 437 | if (dev->mode_config.num_connector) | ||
| 438 | drm_fb_cma_fbdev_init(dev, 32, 0); | ||
| 439 | |||
| 440 | drm_kms_helper_poll_init(dev); | 434 | drm_kms_helper_poll_init(dev); |
| 441 | 435 | ||
| 442 | return 0; | 436 | return 0; |
diff --git a/drivers/gpu/drm/virtio/virtgpu_display.c b/drivers/gpu/drm/virtio/virtgpu_display.c index 0379d6897659..8f8fed471e34 100644 --- a/drivers/gpu/drm/virtio/virtgpu_display.c +++ b/drivers/gpu/drm/virtio/virtgpu_display.c | |||
| @@ -307,6 +307,10 @@ virtio_gpu_user_framebuffer_create(struct drm_device *dev, | |||
| 307 | struct virtio_gpu_framebuffer *virtio_gpu_fb; | 307 | struct virtio_gpu_framebuffer *virtio_gpu_fb; |
| 308 | int ret; | 308 | int ret; |
| 309 | 309 | ||
| 310 | if (mode_cmd->pixel_format != DRM_FORMAT_HOST_XRGB8888 && | ||
| 311 | mode_cmd->pixel_format != DRM_FORMAT_HOST_ARGB8888) | ||
| 312 | return ERR_PTR(-ENOENT); | ||
| 313 | |||
| 310 | /* lookup object associated with res handle */ | 314 | /* lookup object associated with res handle */ |
| 311 | obj = drm_gem_object_lookup(file_priv, mode_cmd->handles[0]); | 315 | obj = drm_gem_object_lookup(file_priv, mode_cmd->handles[0]); |
| 312 | if (!obj) | 316 | if (!obj) |
| @@ -355,6 +359,7 @@ int virtio_gpu_modeset_init(struct virtio_gpu_device *vgdev) | |||
| 355 | int i; | 359 | int i; |
| 356 | 360 | ||
| 357 | drm_mode_config_init(vgdev->ddev); | 361 | drm_mode_config_init(vgdev->ddev); |
| 362 | vgdev->ddev->mode_config.quirk_addfb_prefer_host_byte_order = true; | ||
| 358 | vgdev->ddev->mode_config.funcs = &virtio_gpu_mode_funcs; | 363 | vgdev->ddev->mode_config.funcs = &virtio_gpu_mode_funcs; |
| 359 | vgdev->ddev->mode_config.helper_private = &virtio_mode_config_helpers; | 364 | vgdev->ddev->mode_config.helper_private = &virtio_mode_config_helpers; |
| 360 | 365 | ||
diff --git a/drivers/gpu/drm/virtio/virtgpu_drv.h b/drivers/gpu/drm/virtio/virtgpu_drv.h index a2d79e18bda7..d29f0c7c768c 100644 --- a/drivers/gpu/drm/virtio/virtgpu_drv.h +++ b/drivers/gpu/drm/virtio/virtgpu_drv.h | |||
| @@ -270,7 +270,8 @@ void virtio_gpu_cmd_create_resource(struct virtio_gpu_device *vgdev, | |||
| 270 | void virtio_gpu_cmd_unref_resource(struct virtio_gpu_device *vgdev, | 270 | void virtio_gpu_cmd_unref_resource(struct virtio_gpu_device *vgdev, |
| 271 | uint32_t resource_id); | 271 | uint32_t resource_id); |
| 272 | void virtio_gpu_cmd_transfer_to_host_2d(struct virtio_gpu_device *vgdev, | 272 | void virtio_gpu_cmd_transfer_to_host_2d(struct virtio_gpu_device *vgdev, |
| 273 | uint32_t resource_id, uint64_t offset, | 273 | struct virtio_gpu_object *bo, |
| 274 | uint64_t offset, | ||
| 274 | __le32 width, __le32 height, | 275 | __le32 width, __le32 height, |
| 275 | __le32 x, __le32 y, | 276 | __le32 x, __le32 y, |
| 276 | struct virtio_gpu_fence **fence); | 277 | struct virtio_gpu_fence **fence); |
| @@ -316,7 +317,8 @@ void virtio_gpu_cmd_transfer_from_host_3d(struct virtio_gpu_device *vgdev, | |||
| 316 | struct virtio_gpu_box *box, | 317 | struct virtio_gpu_box *box, |
| 317 | struct virtio_gpu_fence **fence); | 318 | struct virtio_gpu_fence **fence); |
| 318 | void virtio_gpu_cmd_transfer_to_host_3d(struct virtio_gpu_device *vgdev, | 319 | void virtio_gpu_cmd_transfer_to_host_3d(struct virtio_gpu_device *vgdev, |
| 319 | uint32_t resource_id, uint32_t ctx_id, | 320 | struct virtio_gpu_object *bo, |
| 321 | uint32_t ctx_id, | ||
| 320 | uint64_t offset, uint32_t level, | 322 | uint64_t offset, uint32_t level, |
| 321 | struct virtio_gpu_box *box, | 323 | struct virtio_gpu_box *box, |
| 322 | struct virtio_gpu_fence **fence); | 324 | struct virtio_gpu_fence **fence); |
| @@ -361,7 +363,8 @@ void virtio_gpu_fence_event_process(struct virtio_gpu_device *vdev, | |||
| 361 | int virtio_gpu_object_create(struct virtio_gpu_device *vgdev, | 363 | int virtio_gpu_object_create(struct virtio_gpu_device *vgdev, |
| 362 | unsigned long size, bool kernel, bool pinned, | 364 | unsigned long size, bool kernel, bool pinned, |
| 363 | struct virtio_gpu_object **bo_ptr); | 365 | struct virtio_gpu_object **bo_ptr); |
| 364 | int virtio_gpu_object_kmap(struct virtio_gpu_object *bo, void **ptr); | 366 | void virtio_gpu_object_kunmap(struct virtio_gpu_object *bo); |
| 367 | int virtio_gpu_object_kmap(struct virtio_gpu_object *bo); | ||
| 365 | int virtio_gpu_object_get_sg_table(struct virtio_gpu_device *qdev, | 368 | int virtio_gpu_object_get_sg_table(struct virtio_gpu_device *qdev, |
| 366 | struct virtio_gpu_object *bo); | 369 | struct virtio_gpu_object *bo); |
| 367 | void virtio_gpu_object_free_sg_table(struct virtio_gpu_object *bo); | 370 | void virtio_gpu_object_free_sg_table(struct virtio_gpu_object *bo); |
diff --git a/drivers/gpu/drm/virtio/virtgpu_fb.c b/drivers/gpu/drm/virtio/virtgpu_fb.c index b9678c4082ac..cea749f4ec39 100644 --- a/drivers/gpu/drm/virtio/virtgpu_fb.c +++ b/drivers/gpu/drm/virtio/virtgpu_fb.c | |||
| @@ -95,7 +95,7 @@ static int virtio_gpu_dirty_update(struct virtio_gpu_framebuffer *fb, | |||
| 95 | 95 | ||
| 96 | offset = (y * fb->base.pitches[0]) + x * bpp; | 96 | offset = (y * fb->base.pitches[0]) + x * bpp; |
| 97 | 97 | ||
| 98 | virtio_gpu_cmd_transfer_to_host_2d(vgdev, obj->hw_res_handle, | 98 | virtio_gpu_cmd_transfer_to_host_2d(vgdev, obj, |
| 99 | offset, | 99 | offset, |
| 100 | cpu_to_le32(w), | 100 | cpu_to_le32(w), |
| 101 | cpu_to_le32(h), | 101 | cpu_to_le32(h), |
| @@ -203,12 +203,6 @@ static struct fb_ops virtio_gpufb_ops = { | |||
| 203 | .fb_imageblit = virtio_gpu_3d_imageblit, | 203 | .fb_imageblit = virtio_gpu_3d_imageblit, |
| 204 | }; | 204 | }; |
| 205 | 205 | ||
| 206 | static int virtio_gpu_vmap_fb(struct virtio_gpu_device *vgdev, | ||
| 207 | struct virtio_gpu_object *obj) | ||
| 208 | { | ||
| 209 | return virtio_gpu_object_kmap(obj, NULL); | ||
| 210 | } | ||
| 211 | |||
| 212 | static int virtio_gpufb_create(struct drm_fb_helper *helper, | 206 | static int virtio_gpufb_create(struct drm_fb_helper *helper, |
| 213 | struct drm_fb_helper_surface_size *sizes) | 207 | struct drm_fb_helper_surface_size *sizes) |
| 214 | { | 208 | { |
| @@ -226,7 +220,7 @@ static int virtio_gpufb_create(struct drm_fb_helper *helper, | |||
| 226 | mode_cmd.width = sizes->surface_width; | 220 | mode_cmd.width = sizes->surface_width; |
| 227 | mode_cmd.height = sizes->surface_height; | 221 | mode_cmd.height = sizes->surface_height; |
| 228 | mode_cmd.pitches[0] = mode_cmd.width * 4; | 222 | mode_cmd.pitches[0] = mode_cmd.width * 4; |
| 229 | mode_cmd.pixel_format = drm_mode_legacy_fb_format(32, 24); | 223 | mode_cmd.pixel_format = DRM_FORMAT_HOST_XRGB8888; |
| 230 | 224 | ||
| 231 | format = virtio_gpu_translate_format(mode_cmd.pixel_format); | 225 | format = virtio_gpu_translate_format(mode_cmd.pixel_format); |
| 232 | if (format == 0) | 226 | if (format == 0) |
| @@ -241,9 +235,9 @@ static int virtio_gpufb_create(struct drm_fb_helper *helper, | |||
| 241 | virtio_gpu_cmd_create_resource(vgdev, resid, format, | 235 | virtio_gpu_cmd_create_resource(vgdev, resid, format, |
| 242 | mode_cmd.width, mode_cmd.height); | 236 | mode_cmd.width, mode_cmd.height); |
| 243 | 237 | ||
| 244 | ret = virtio_gpu_vmap_fb(vgdev, obj); | 238 | ret = virtio_gpu_object_kmap(obj); |
| 245 | if (ret) { | 239 | if (ret) { |
| 246 | DRM_ERROR("failed to vmap fb %d\n", ret); | 240 | DRM_ERROR("failed to kmap fb %d\n", ret); |
| 247 | goto err_obj_vmap; | 241 | goto err_obj_vmap; |
| 248 | } | 242 | } |
| 249 | 243 | ||
diff --git a/drivers/gpu/drm/virtio/virtgpu_gem.c b/drivers/gpu/drm/virtio/virtgpu_gem.c index 0f2768eacaee..82c817f37cf7 100644 --- a/drivers/gpu/drm/virtio/virtgpu_gem.c +++ b/drivers/gpu/drm/virtio/virtgpu_gem.c | |||
| @@ -90,7 +90,10 @@ int virtio_gpu_mode_dumb_create(struct drm_file *file_priv, | |||
| 90 | uint32_t resid; | 90 | uint32_t resid; |
| 91 | uint32_t format; | 91 | uint32_t format; |
| 92 | 92 | ||
| 93 | pitch = args->width * ((args->bpp + 1) / 8); | 93 | if (args->bpp != 32) |
| 94 | return -EINVAL; | ||
| 95 | |||
| 96 | pitch = args->width * 4; | ||
| 94 | args->size = pitch * args->height; | 97 | args->size = pitch * args->height; |
| 95 | args->size = ALIGN(args->size, PAGE_SIZE); | 98 | args->size = ALIGN(args->size, PAGE_SIZE); |
| 96 | 99 | ||
| @@ -99,7 +102,7 @@ int virtio_gpu_mode_dumb_create(struct drm_file *file_priv, | |||
| 99 | if (ret) | 102 | if (ret) |
| 100 | goto fail; | 103 | goto fail; |
| 101 | 104 | ||
| 102 | format = virtio_gpu_translate_format(DRM_FORMAT_XRGB8888); | 105 | format = virtio_gpu_translate_format(DRM_FORMAT_HOST_XRGB8888); |
| 103 | virtio_gpu_resource_id_get(vgdev, &resid); | 106 | virtio_gpu_resource_id_get(vgdev, &resid); |
| 104 | virtio_gpu_cmd_create_resource(vgdev, resid, format, | 107 | virtio_gpu_cmd_create_resource(vgdev, resid, format, |
| 105 | args->width, args->height); | 108 | args->width, args->height); |
diff --git a/drivers/gpu/drm/virtio/virtgpu_ioctl.c b/drivers/gpu/drm/virtio/virtgpu_ioctl.c index 7bdf6f0e58a5..f16b875d6a46 100644 --- a/drivers/gpu/drm/virtio/virtgpu_ioctl.c +++ b/drivers/gpu/drm/virtio/virtgpu_ioctl.c | |||
| @@ -429,11 +429,11 @@ static int virtio_gpu_transfer_to_host_ioctl(struct drm_device *dev, void *data, | |||
| 429 | convert_to_hw_box(&box, &args->box); | 429 | convert_to_hw_box(&box, &args->box); |
| 430 | if (!vgdev->has_virgl_3d) { | 430 | if (!vgdev->has_virgl_3d) { |
| 431 | virtio_gpu_cmd_transfer_to_host_2d | 431 | virtio_gpu_cmd_transfer_to_host_2d |
| 432 | (vgdev, qobj->hw_res_handle, offset, | 432 | (vgdev, qobj, offset, |
| 433 | box.w, box.h, box.x, box.y, NULL); | 433 | box.w, box.h, box.x, box.y, NULL); |
| 434 | } else { | 434 | } else { |
| 435 | virtio_gpu_cmd_transfer_to_host_3d | 435 | virtio_gpu_cmd_transfer_to_host_3d |
| 436 | (vgdev, qobj->hw_res_handle, | 436 | (vgdev, qobj, |
| 437 | vfpriv ? vfpriv->ctx_id : 0, offset, | 437 | vfpriv ? vfpriv->ctx_id : 0, offset, |
| 438 | args->level, &box, &fence); | 438 | args->level, &box, &fence); |
| 439 | reservation_object_add_excl_fence(qobj->tbo.resv, | 439 | reservation_object_add_excl_fence(qobj->tbo.resv, |
diff --git a/drivers/gpu/drm/virtio/virtgpu_object.c b/drivers/gpu/drm/virtio/virtgpu_object.c index 9f2f470efd9b..eca765537470 100644 --- a/drivers/gpu/drm/virtio/virtgpu_object.c +++ b/drivers/gpu/drm/virtio/virtgpu_object.c | |||
| @@ -37,6 +37,8 @@ static void virtio_gpu_ttm_bo_destroy(struct ttm_buffer_object *tbo) | |||
| 37 | virtio_gpu_cmd_unref_resource(vgdev, bo->hw_res_handle); | 37 | virtio_gpu_cmd_unref_resource(vgdev, bo->hw_res_handle); |
| 38 | if (bo->pages) | 38 | if (bo->pages) |
| 39 | virtio_gpu_object_free_sg_table(bo); | 39 | virtio_gpu_object_free_sg_table(bo); |
| 40 | if (bo->vmap) | ||
| 41 | virtio_gpu_object_kunmap(bo); | ||
| 40 | drm_gem_object_release(&bo->gem_base); | 42 | drm_gem_object_release(&bo->gem_base); |
| 41 | kfree(bo); | 43 | kfree(bo); |
| 42 | } | 44 | } |
| @@ -99,22 +101,23 @@ int virtio_gpu_object_create(struct virtio_gpu_device *vgdev, | |||
| 99 | return 0; | 101 | return 0; |
| 100 | } | 102 | } |
| 101 | 103 | ||
| 102 | int virtio_gpu_object_kmap(struct virtio_gpu_object *bo, void **ptr) | 104 | void virtio_gpu_object_kunmap(struct virtio_gpu_object *bo) |
| 105 | { | ||
| 106 | bo->vmap = NULL; | ||
| 107 | ttm_bo_kunmap(&bo->kmap); | ||
| 108 | } | ||
| 109 | |||
| 110 | int virtio_gpu_object_kmap(struct virtio_gpu_object *bo) | ||
| 103 | { | 111 | { |
| 104 | bool is_iomem; | 112 | bool is_iomem; |
| 105 | int r; | 113 | int r; |
| 106 | 114 | ||
| 107 | if (bo->vmap) { | 115 | WARN_ON(bo->vmap); |
| 108 | if (ptr) | 116 | |
| 109 | *ptr = bo->vmap; | ||
| 110 | return 0; | ||
| 111 | } | ||
| 112 | r = ttm_bo_kmap(&bo->tbo, 0, bo->tbo.num_pages, &bo->kmap); | 117 | r = ttm_bo_kmap(&bo->tbo, 0, bo->tbo.num_pages, &bo->kmap); |
| 113 | if (r) | 118 | if (r) |
| 114 | return r; | 119 | return r; |
| 115 | bo->vmap = ttm_kmap_obj_virtual(&bo->kmap, &is_iomem); | 120 | bo->vmap = ttm_kmap_obj_virtual(&bo->kmap, &is_iomem); |
| 116 | if (ptr) | ||
| 117 | *ptr = bo->vmap; | ||
| 118 | return 0; | 121 | return 0; |
| 119 | } | 122 | } |
| 120 | 123 | ||
diff --git a/drivers/gpu/drm/virtio/virtgpu_plane.c b/drivers/gpu/drm/virtio/virtgpu_plane.c index 88f2fb8c61c4..a9f4ae7d4483 100644 --- a/drivers/gpu/drm/virtio/virtgpu_plane.c +++ b/drivers/gpu/drm/virtio/virtgpu_plane.c | |||
| @@ -28,22 +28,11 @@ | |||
| 28 | #include <drm/drm_atomic_helper.h> | 28 | #include <drm/drm_atomic_helper.h> |
| 29 | 29 | ||
| 30 | static const uint32_t virtio_gpu_formats[] = { | 30 | static const uint32_t virtio_gpu_formats[] = { |
| 31 | DRM_FORMAT_XRGB8888, | 31 | DRM_FORMAT_HOST_XRGB8888, |
| 32 | DRM_FORMAT_ARGB8888, | ||
| 33 | DRM_FORMAT_BGRX8888, | ||
| 34 | DRM_FORMAT_BGRA8888, | ||
| 35 | DRM_FORMAT_RGBX8888, | ||
| 36 | DRM_FORMAT_RGBA8888, | ||
| 37 | DRM_FORMAT_XBGR8888, | ||
| 38 | DRM_FORMAT_ABGR8888, | ||
| 39 | }; | 32 | }; |
| 40 | 33 | ||
| 41 | static const uint32_t virtio_gpu_cursor_formats[] = { | 34 | static const uint32_t virtio_gpu_cursor_formats[] = { |
| 42 | #ifdef __BIG_ENDIAN | 35 | DRM_FORMAT_HOST_ARGB8888, |
| 43 | DRM_FORMAT_BGRA8888, | ||
| 44 | #else | ||
| 45 | DRM_FORMAT_ARGB8888, | ||
| 46 | #endif | ||
| 47 | }; | 36 | }; |
| 48 | 37 | ||
| 49 | uint32_t virtio_gpu_translate_format(uint32_t drm_fourcc) | 38 | uint32_t virtio_gpu_translate_format(uint32_t drm_fourcc) |
| @@ -51,32 +40,6 @@ uint32_t virtio_gpu_translate_format(uint32_t drm_fourcc) | |||
| 51 | uint32_t format; | 40 | uint32_t format; |
| 52 | 41 | ||
| 53 | switch (drm_fourcc) { | 42 | switch (drm_fourcc) { |
| 54 | #ifdef __BIG_ENDIAN | ||
| 55 | case DRM_FORMAT_XRGB8888: | ||
| 56 | format = VIRTIO_GPU_FORMAT_X8R8G8B8_UNORM; | ||
| 57 | break; | ||
| 58 | case DRM_FORMAT_ARGB8888: | ||
| 59 | format = VIRTIO_GPU_FORMAT_A8R8G8B8_UNORM; | ||
| 60 | break; | ||
| 61 | case DRM_FORMAT_BGRX8888: | ||
| 62 | format = VIRTIO_GPU_FORMAT_B8G8R8X8_UNORM; | ||
| 63 | break; | ||
| 64 | case DRM_FORMAT_BGRA8888: | ||
| 65 | format = VIRTIO_GPU_FORMAT_B8G8R8A8_UNORM; | ||
| 66 | break; | ||
| 67 | case DRM_FORMAT_RGBX8888: | ||
| 68 | format = VIRTIO_GPU_FORMAT_R8G8B8X8_UNORM; | ||
| 69 | break; | ||
| 70 | case DRM_FORMAT_RGBA8888: | ||
| 71 | format = VIRTIO_GPU_FORMAT_R8G8B8A8_UNORM; | ||
| 72 | break; | ||
| 73 | case DRM_FORMAT_XBGR8888: | ||
| 74 | format = VIRTIO_GPU_FORMAT_X8B8G8R8_UNORM; | ||
| 75 | break; | ||
| 76 | case DRM_FORMAT_ABGR8888: | ||
| 77 | format = VIRTIO_GPU_FORMAT_A8B8G8R8_UNORM; | ||
| 78 | break; | ||
| 79 | #else | ||
| 80 | case DRM_FORMAT_XRGB8888: | 43 | case DRM_FORMAT_XRGB8888: |
| 81 | format = VIRTIO_GPU_FORMAT_B8G8R8X8_UNORM; | 44 | format = VIRTIO_GPU_FORMAT_B8G8R8X8_UNORM; |
| 82 | break; | 45 | break; |
| @@ -89,19 +52,6 @@ uint32_t virtio_gpu_translate_format(uint32_t drm_fourcc) | |||
| 89 | case DRM_FORMAT_BGRA8888: | 52 | case DRM_FORMAT_BGRA8888: |
| 90 | format = VIRTIO_GPU_FORMAT_A8R8G8B8_UNORM; | 53 | format = VIRTIO_GPU_FORMAT_A8R8G8B8_UNORM; |
| 91 | break; | 54 | break; |
| 92 | case DRM_FORMAT_RGBX8888: | ||
| 93 | format = VIRTIO_GPU_FORMAT_X8B8G8R8_UNORM; | ||
| 94 | break; | ||
| 95 | case DRM_FORMAT_RGBA8888: | ||
| 96 | format = VIRTIO_GPU_FORMAT_A8B8G8R8_UNORM; | ||
| 97 | break; | ||
| 98 | case DRM_FORMAT_XBGR8888: | ||
| 99 | format = VIRTIO_GPU_FORMAT_R8G8B8X8_UNORM; | ||
| 100 | break; | ||
| 101 | case DRM_FORMAT_ABGR8888: | ||
| 102 | format = VIRTIO_GPU_FORMAT_R8G8B8A8_UNORM; | ||
| 103 | break; | ||
| 104 | #endif | ||
| 105 | default: | 55 | default: |
| 106 | /* | 56 | /* |
| 107 | * This should not happen, we handle everything listed | 57 | * This should not happen, we handle everything listed |
| @@ -158,7 +108,7 @@ static void virtio_gpu_primary_plane_update(struct drm_plane *plane, | |||
| 158 | handle = bo->hw_res_handle; | 108 | handle = bo->hw_res_handle; |
| 159 | if (bo->dumb) { | 109 | if (bo->dumb) { |
| 160 | virtio_gpu_cmd_transfer_to_host_2d | 110 | virtio_gpu_cmd_transfer_to_host_2d |
| 161 | (vgdev, handle, 0, | 111 | (vgdev, bo, 0, |
| 162 | cpu_to_le32(plane->state->src_w >> 16), | 112 | cpu_to_le32(plane->state->src_w >> 16), |
| 163 | cpu_to_le32(plane->state->src_h >> 16), | 113 | cpu_to_le32(plane->state->src_h >> 16), |
| 164 | cpu_to_le32(plane->state->src_x >> 16), | 114 | cpu_to_le32(plane->state->src_x >> 16), |
| @@ -217,7 +167,7 @@ static void virtio_gpu_cursor_plane_update(struct drm_plane *plane, | |||
| 217 | if (bo && bo->dumb && (plane->state->fb != old_state->fb)) { | 167 | if (bo && bo->dumb && (plane->state->fb != old_state->fb)) { |
| 218 | /* new cursor -- update & wait */ | 168 | /* new cursor -- update & wait */ |
| 219 | virtio_gpu_cmd_transfer_to_host_2d | 169 | virtio_gpu_cmd_transfer_to_host_2d |
| 220 | (vgdev, handle, 0, | 170 | (vgdev, bo, 0, |
| 221 | cpu_to_le32(plane->state->crtc_w), | 171 | cpu_to_le32(plane->state->crtc_w), |
| 222 | cpu_to_le32(plane->state->crtc_h), | 172 | cpu_to_le32(plane->state->crtc_h), |
| 223 | 0, 0, &fence); | 173 | 0, 0, &fence); |
diff --git a/drivers/gpu/drm/virtio/virtgpu_prime.c b/drivers/gpu/drm/virtio/virtgpu_prime.c index d27a1688714f..86ce0ae93f59 100644 --- a/drivers/gpu/drm/virtio/virtgpu_prime.c +++ b/drivers/gpu/drm/virtio/virtgpu_prime.c | |||
| @@ -55,13 +55,18 @@ struct drm_gem_object *virtgpu_gem_prime_import_sg_table( | |||
| 55 | 55 | ||
| 56 | void *virtgpu_gem_prime_vmap(struct drm_gem_object *obj) | 56 | void *virtgpu_gem_prime_vmap(struct drm_gem_object *obj) |
| 57 | { | 57 | { |
| 58 | WARN_ONCE(1, "not implemented"); | 58 | struct virtio_gpu_object *bo = gem_to_virtio_gpu_obj(obj); |
| 59 | return ERR_PTR(-ENODEV); | 59 | int ret; |
| 60 | |||
| 61 | ret = virtio_gpu_object_kmap(bo); | ||
| 62 | if (ret) | ||
| 63 | return NULL; | ||
| 64 | return bo->vmap; | ||
| 60 | } | 65 | } |
| 61 | 66 | ||
| 62 | void virtgpu_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr) | 67 | void virtgpu_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr) |
| 63 | { | 68 | { |
| 64 | WARN_ONCE(1, "not implemented"); | 69 | virtio_gpu_object_kunmap(gem_to_virtio_gpu_obj(obj)); |
| 65 | } | 70 | } |
| 66 | 71 | ||
| 67 | int virtgpu_gem_prime_mmap(struct drm_gem_object *obj, | 72 | int virtgpu_gem_prime_mmap(struct drm_gem_object *obj, |
diff --git a/drivers/gpu/drm/virtio/virtgpu_vq.c b/drivers/gpu/drm/virtio/virtgpu_vq.c index df32811f2c3e..4e2e037aed34 100644 --- a/drivers/gpu/drm/virtio/virtgpu_vq.c +++ b/drivers/gpu/drm/virtio/virtgpu_vq.c | |||
| @@ -483,28 +483,26 @@ void virtio_gpu_cmd_resource_flush(struct virtio_gpu_device *vgdev, | |||
| 483 | } | 483 | } |
| 484 | 484 | ||
| 485 | void virtio_gpu_cmd_transfer_to_host_2d(struct virtio_gpu_device *vgdev, | 485 | void virtio_gpu_cmd_transfer_to_host_2d(struct virtio_gpu_device *vgdev, |
| 486 | uint32_t resource_id, uint64_t offset, | 486 | struct virtio_gpu_object *bo, |
| 487 | uint64_t offset, | ||
| 487 | __le32 width, __le32 height, | 488 | __le32 width, __le32 height, |
| 488 | __le32 x, __le32 y, | 489 | __le32 x, __le32 y, |
| 489 | struct virtio_gpu_fence **fence) | 490 | struct virtio_gpu_fence **fence) |
| 490 | { | 491 | { |
| 491 | struct virtio_gpu_transfer_to_host_2d *cmd_p; | 492 | struct virtio_gpu_transfer_to_host_2d *cmd_p; |
| 492 | struct virtio_gpu_vbuffer *vbuf; | 493 | struct virtio_gpu_vbuffer *vbuf; |
| 493 | struct virtio_gpu_fbdev *vgfbdev = vgdev->vgfbdev; | ||
| 494 | struct virtio_gpu_framebuffer *fb = &vgfbdev->vgfb; | ||
| 495 | struct virtio_gpu_object *obj = gem_to_virtio_gpu_obj(fb->base.obj[0]); | ||
| 496 | bool use_dma_api = !virtio_has_iommu_quirk(vgdev->vdev); | 494 | bool use_dma_api = !virtio_has_iommu_quirk(vgdev->vdev); |
| 497 | 495 | ||
| 498 | if (use_dma_api) | 496 | if (use_dma_api) |
| 499 | dma_sync_sg_for_device(vgdev->vdev->dev.parent, | 497 | dma_sync_sg_for_device(vgdev->vdev->dev.parent, |
| 500 | obj->pages->sgl, obj->pages->nents, | 498 | bo->pages->sgl, bo->pages->nents, |
| 501 | DMA_TO_DEVICE); | 499 | DMA_TO_DEVICE); |
| 502 | 500 | ||
| 503 | cmd_p = virtio_gpu_alloc_cmd(vgdev, &vbuf, sizeof(*cmd_p)); | 501 | cmd_p = virtio_gpu_alloc_cmd(vgdev, &vbuf, sizeof(*cmd_p)); |
| 504 | memset(cmd_p, 0, sizeof(*cmd_p)); | 502 | memset(cmd_p, 0, sizeof(*cmd_p)); |
| 505 | 503 | ||
| 506 | cmd_p->hdr.type = cpu_to_le32(VIRTIO_GPU_CMD_TRANSFER_TO_HOST_2D); | 504 | cmd_p->hdr.type = cpu_to_le32(VIRTIO_GPU_CMD_TRANSFER_TO_HOST_2D); |
| 507 | cmd_p->resource_id = cpu_to_le32(resource_id); | 505 | cmd_p->resource_id = cpu_to_le32(bo->hw_res_handle); |
| 508 | cmd_p->offset = cpu_to_le64(offset); | 506 | cmd_p->offset = cpu_to_le64(offset); |
| 509 | cmd_p->r.width = width; | 507 | cmd_p->r.width = width; |
| 510 | cmd_p->r.height = height; | 508 | cmd_p->r.height = height; |
| @@ -791,21 +789,19 @@ virtio_gpu_cmd_resource_create_3d(struct virtio_gpu_device *vgdev, | |||
| 791 | } | 789 | } |
| 792 | 790 | ||
| 793 | void virtio_gpu_cmd_transfer_to_host_3d(struct virtio_gpu_device *vgdev, | 791 | void virtio_gpu_cmd_transfer_to_host_3d(struct virtio_gpu_device *vgdev, |
| 794 | uint32_t resource_id, uint32_t ctx_id, | 792 | struct virtio_gpu_object *bo, |
| 793 | uint32_t ctx_id, | ||
| 795 | uint64_t offset, uint32_t level, | 794 | uint64_t offset, uint32_t level, |
| 796 | struct virtio_gpu_box *box, | 795 | struct virtio_gpu_box *box, |
| 797 | struct virtio_gpu_fence **fence) | 796 | struct virtio_gpu_fence **fence) |
| 798 | { | 797 | { |
| 799 | struct virtio_gpu_transfer_host_3d *cmd_p; | 798 | struct virtio_gpu_transfer_host_3d *cmd_p; |
| 800 | struct virtio_gpu_vbuffer *vbuf; | 799 | struct virtio_gpu_vbuffer *vbuf; |
| 801 | struct virtio_gpu_fbdev *vgfbdev = vgdev->vgfbdev; | ||
| 802 | struct virtio_gpu_framebuffer *fb = &vgfbdev->vgfb; | ||
| 803 | struct virtio_gpu_object *obj = gem_to_virtio_gpu_obj(fb->base.obj[0]); | ||
| 804 | bool use_dma_api = !virtio_has_iommu_quirk(vgdev->vdev); | 800 | bool use_dma_api = !virtio_has_iommu_quirk(vgdev->vdev); |
| 805 | 801 | ||
| 806 | if (use_dma_api) | 802 | if (use_dma_api) |
| 807 | dma_sync_sg_for_device(vgdev->vdev->dev.parent, | 803 | dma_sync_sg_for_device(vgdev->vdev->dev.parent, |
| 808 | obj->pages->sgl, obj->pages->nents, | 804 | bo->pages->sgl, bo->pages->nents, |
| 809 | DMA_TO_DEVICE); | 805 | DMA_TO_DEVICE); |
| 810 | 806 | ||
| 811 | cmd_p = virtio_gpu_alloc_cmd(vgdev, &vbuf, sizeof(*cmd_p)); | 807 | cmd_p = virtio_gpu_alloc_cmd(vgdev, &vbuf, sizeof(*cmd_p)); |
| @@ -813,7 +809,7 @@ void virtio_gpu_cmd_transfer_to_host_3d(struct virtio_gpu_device *vgdev, | |||
| 813 | 809 | ||
| 814 | cmd_p->hdr.type = cpu_to_le32(VIRTIO_GPU_CMD_TRANSFER_TO_HOST_3D); | 810 | cmd_p->hdr.type = cpu_to_le32(VIRTIO_GPU_CMD_TRANSFER_TO_HOST_3D); |
| 815 | cmd_p->hdr.ctx_id = cpu_to_le32(ctx_id); | 811 | cmd_p->hdr.ctx_id = cpu_to_le32(ctx_id); |
| 816 | cmd_p->resource_id = cpu_to_le32(resource_id); | 812 | cmd_p->resource_id = cpu_to_le32(bo->hw_res_handle); |
| 817 | cmd_p->box = *box; | 813 | cmd_p->box = *box; |
| 818 | cmd_p->offset = cpu_to_le64(offset); | 814 | cmd_p->offset = cpu_to_le64(offset); |
| 819 | cmd_p->level = cpu_to_le32(level); | 815 | cmd_p->level = cpu_to_le32(level); |
diff --git a/drivers/gpu/drm/vkms/vkms_crc.c b/drivers/gpu/drm/vkms/vkms_crc.c index 0a2745646dfa..9d9e8146db90 100644 --- a/drivers/gpu/drm/vkms/vkms_crc.c +++ b/drivers/gpu/drm/vkms/vkms_crc.c | |||
| @@ -125,6 +125,7 @@ static uint32_t _vkms_get_crc(struct vkms_crc_data *primary_crc, | |||
| 125 | mutex_lock(&vkms_obj->pages_lock); | 125 | mutex_lock(&vkms_obj->pages_lock); |
| 126 | if (WARN_ON(!vkms_obj->vaddr)) { | 126 | if (WARN_ON(!vkms_obj->vaddr)) { |
| 127 | mutex_unlock(&vkms_obj->pages_lock); | 127 | mutex_unlock(&vkms_obj->pages_lock); |
| 128 | kfree(vaddr_out); | ||
| 128 | return crc; | 129 | return crc; |
| 129 | } | 130 | } |
| 130 | 131 | ||
diff --git a/drivers/gpu/drm/zte/zx_drm_drv.c b/drivers/gpu/drm/zte/zx_drm_drv.c index 6f4205e80378..11ef17c2d1c1 100644 --- a/drivers/gpu/drm/zte/zx_drm_drv.c +++ b/drivers/gpu/drm/zte/zx_drm_drv.c | |||
| @@ -31,7 +31,6 @@ | |||
| 31 | 31 | ||
| 32 | static const struct drm_mode_config_funcs zx_drm_mode_config_funcs = { | 32 | static const struct drm_mode_config_funcs zx_drm_mode_config_funcs = { |
| 33 | .fb_create = drm_gem_fb_create, | 33 | .fb_create = drm_gem_fb_create, |
| 34 | .output_poll_changed = drm_fb_helper_output_poll_changed, | ||
| 35 | .atomic_check = drm_atomic_helper_check, | 34 | .atomic_check = drm_atomic_helper_check, |
| 36 | .atomic_commit = drm_atomic_helper_commit, | 35 | .atomic_commit = drm_atomic_helper_commit, |
| 37 | }; | 36 | }; |
| @@ -41,7 +40,6 @@ DEFINE_DRM_GEM_CMA_FOPS(zx_drm_fops); | |||
| 41 | static struct drm_driver zx_drm_driver = { | 40 | static struct drm_driver zx_drm_driver = { |
| 42 | .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME | | 41 | .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME | |
| 43 | DRIVER_ATOMIC, | 42 | DRIVER_ATOMIC, |
| 44 | .lastclose = drm_fb_helper_lastclose, | ||
| 45 | .gem_free_object_unlocked = drm_gem_cma_free_object, | 43 | .gem_free_object_unlocked = drm_gem_cma_free_object, |
| 46 | .gem_vm_ops = &drm_gem_cma_vm_ops, | 44 | .gem_vm_ops = &drm_gem_cma_vm_ops, |
| 47 | .dumb_create = drm_gem_cma_dumb_create, | 45 | .dumb_create = drm_gem_cma_dumb_create, |
| @@ -101,20 +99,14 @@ static int zx_drm_bind(struct device *dev) | |||
| 101 | drm_mode_config_reset(drm); | 99 | drm_mode_config_reset(drm); |
| 102 | drm_kms_helper_poll_init(drm); | 100 | drm_kms_helper_poll_init(drm); |
| 103 | 101 | ||
| 104 | ret = drm_fb_cma_fbdev_init(drm, 32, 0); | ||
| 105 | if (ret) { | ||
| 106 | DRM_DEV_ERROR(dev, "failed to init cma fbdev: %d\n", ret); | ||
| 107 | goto out_poll_fini; | ||
| 108 | } | ||
| 109 | |||
| 110 | ret = drm_dev_register(drm, 0); | 102 | ret = drm_dev_register(drm, 0); |
| 111 | if (ret) | 103 | if (ret) |
| 112 | goto out_fbdev_fini; | 104 | goto out_poll_fini; |
| 105 | |||
| 106 | drm_fbdev_generic_setup(drm, 32); | ||
| 113 | 107 | ||
| 114 | return 0; | 108 | return 0; |
| 115 | 109 | ||
| 116 | out_fbdev_fini: | ||
| 117 | drm_fb_cma_fbdev_fini(drm); | ||
| 118 | out_poll_fini: | 110 | out_poll_fini: |
| 119 | drm_kms_helper_poll_fini(drm); | 111 | drm_kms_helper_poll_fini(drm); |
| 120 | drm_mode_config_cleanup(drm); | 112 | drm_mode_config_cleanup(drm); |
| @@ -131,7 +123,6 @@ static void zx_drm_unbind(struct device *dev) | |||
| 131 | struct drm_device *drm = dev_get_drvdata(dev); | 123 | struct drm_device *drm = dev_get_drvdata(dev); |
| 132 | 124 | ||
| 133 | drm_dev_unregister(drm); | 125 | drm_dev_unregister(drm); |
| 134 | drm_fb_cma_fbdev_fini(drm); | ||
| 135 | drm_kms_helper_poll_fini(drm); | 126 | drm_kms_helper_poll_fini(drm); |
| 136 | drm_mode_config_cleanup(drm); | 127 | drm_mode_config_cleanup(drm); |
| 137 | component_unbind_all(dev, drm); | 128 | component_unbind_all(dev, drm); |
| @@ -161,10 +152,8 @@ static int zx_drm_probe(struct platform_device *pdev) | |||
| 161 | if (ret) | 152 | if (ret) |
| 162 | return ret; | 153 | return ret; |
| 163 | 154 | ||
| 164 | for_each_available_child_of_node(parent, child) { | 155 | for_each_available_child_of_node(parent, child) |
| 165 | component_match_add(dev, &match, compare_of, child); | 156 | component_match_add(dev, &match, compare_of, child); |
| 166 | of_node_put(child); | ||
| 167 | } | ||
| 168 | 157 | ||
| 169 | return component_master_add_with_match(dev, &zx_drm_master_ops, match); | 158 | return component_master_add_with_match(dev, &zx_drm_master_ops, match); |
| 170 | } | 159 | } |
