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path: root/drivers/gpu/drm/virtio/virtgpu_plane.c
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Diffstat (limited to 'drivers/gpu/drm/virtio/virtgpu_plane.c')
-rw-r--r--drivers/gpu/drm/virtio/virtgpu_plane.c58
1 files changed, 4 insertions, 54 deletions
diff --git a/drivers/gpu/drm/virtio/virtgpu_plane.c b/drivers/gpu/drm/virtio/virtgpu_plane.c
index 88f2fb8c61c4..a9f4ae7d4483 100644
--- a/drivers/gpu/drm/virtio/virtgpu_plane.c
+++ b/drivers/gpu/drm/virtio/virtgpu_plane.c
@@ -28,22 +28,11 @@
28#include <drm/drm_atomic_helper.h> 28#include <drm/drm_atomic_helper.h>
29 29
30static const uint32_t virtio_gpu_formats[] = { 30static const uint32_t virtio_gpu_formats[] = {
31 DRM_FORMAT_XRGB8888, 31 DRM_FORMAT_HOST_XRGB8888,
32 DRM_FORMAT_ARGB8888,
33 DRM_FORMAT_BGRX8888,
34 DRM_FORMAT_BGRA8888,
35 DRM_FORMAT_RGBX8888,
36 DRM_FORMAT_RGBA8888,
37 DRM_FORMAT_XBGR8888,
38 DRM_FORMAT_ABGR8888,
39}; 32};
40 33
41static const uint32_t virtio_gpu_cursor_formats[] = { 34static const uint32_t virtio_gpu_cursor_formats[] = {
42#ifdef __BIG_ENDIAN 35 DRM_FORMAT_HOST_ARGB8888,
43 DRM_FORMAT_BGRA8888,
44#else
45 DRM_FORMAT_ARGB8888,
46#endif
47}; 36};
48 37
49uint32_t virtio_gpu_translate_format(uint32_t drm_fourcc) 38uint32_t virtio_gpu_translate_format(uint32_t drm_fourcc)
@@ -51,32 +40,6 @@ uint32_t virtio_gpu_translate_format(uint32_t drm_fourcc)
51 uint32_t format; 40 uint32_t format;
52 41
53 switch (drm_fourcc) { 42 switch (drm_fourcc) {
54#ifdef __BIG_ENDIAN
55 case DRM_FORMAT_XRGB8888:
56 format = VIRTIO_GPU_FORMAT_X8R8G8B8_UNORM;
57 break;
58 case DRM_FORMAT_ARGB8888:
59 format = VIRTIO_GPU_FORMAT_A8R8G8B8_UNORM;
60 break;
61 case DRM_FORMAT_BGRX8888:
62 format = VIRTIO_GPU_FORMAT_B8G8R8X8_UNORM;
63 break;
64 case DRM_FORMAT_BGRA8888:
65 format = VIRTIO_GPU_FORMAT_B8G8R8A8_UNORM;
66 break;
67 case DRM_FORMAT_RGBX8888:
68 format = VIRTIO_GPU_FORMAT_R8G8B8X8_UNORM;
69 break;
70 case DRM_FORMAT_RGBA8888:
71 format = VIRTIO_GPU_FORMAT_R8G8B8A8_UNORM;
72 break;
73 case DRM_FORMAT_XBGR8888:
74 format = VIRTIO_GPU_FORMAT_X8B8G8R8_UNORM;
75 break;
76 case DRM_FORMAT_ABGR8888:
77 format = VIRTIO_GPU_FORMAT_A8B8G8R8_UNORM;
78 break;
79#else
80 case DRM_FORMAT_XRGB8888: 43 case DRM_FORMAT_XRGB8888:
81 format = VIRTIO_GPU_FORMAT_B8G8R8X8_UNORM; 44 format = VIRTIO_GPU_FORMAT_B8G8R8X8_UNORM;
82 break; 45 break;
@@ -89,19 +52,6 @@ uint32_t virtio_gpu_translate_format(uint32_t drm_fourcc)
89 case DRM_FORMAT_BGRA8888: 52 case DRM_FORMAT_BGRA8888:
90 format = VIRTIO_GPU_FORMAT_A8R8G8B8_UNORM; 53 format = VIRTIO_GPU_FORMAT_A8R8G8B8_UNORM;
91 break; 54 break;
92 case DRM_FORMAT_RGBX8888:
93 format = VIRTIO_GPU_FORMAT_X8B8G8R8_UNORM;
94 break;
95 case DRM_FORMAT_RGBA8888:
96 format = VIRTIO_GPU_FORMAT_A8B8G8R8_UNORM;
97 break;
98 case DRM_FORMAT_XBGR8888:
99 format = VIRTIO_GPU_FORMAT_R8G8B8X8_UNORM;
100 break;
101 case DRM_FORMAT_ABGR8888:
102 format = VIRTIO_GPU_FORMAT_R8G8B8A8_UNORM;
103 break;
104#endif
105 default: 55 default:
106 /* 56 /*
107 * This should not happen, we handle everything listed 57 * This should not happen, we handle everything listed
@@ -158,7 +108,7 @@ static void virtio_gpu_primary_plane_update(struct drm_plane *plane,
158 handle = bo->hw_res_handle; 108 handle = bo->hw_res_handle;
159 if (bo->dumb) { 109 if (bo->dumb) {
160 virtio_gpu_cmd_transfer_to_host_2d 110 virtio_gpu_cmd_transfer_to_host_2d
161 (vgdev, handle, 0, 111 (vgdev, bo, 0,
162 cpu_to_le32(plane->state->src_w >> 16), 112 cpu_to_le32(plane->state->src_w >> 16),
163 cpu_to_le32(plane->state->src_h >> 16), 113 cpu_to_le32(plane->state->src_h >> 16),
164 cpu_to_le32(plane->state->src_x >> 16), 114 cpu_to_le32(plane->state->src_x >> 16),
@@ -217,7 +167,7 @@ static void virtio_gpu_cursor_plane_update(struct drm_plane *plane,
217 if (bo && bo->dumb && (plane->state->fb != old_state->fb)) { 167 if (bo && bo->dumb && (plane->state->fb != old_state->fb)) {
218 /* new cursor -- update & wait */ 168 /* new cursor -- update & wait */
219 virtio_gpu_cmd_transfer_to_host_2d 169 virtio_gpu_cmd_transfer_to_host_2d
220 (vgdev, handle, 0, 170 (vgdev, bo, 0,
221 cpu_to_le32(plane->state->crtc_w), 171 cpu_to_le32(plane->state->crtc_w),
222 cpu_to_le32(plane->state->crtc_h), 172 cpu_to_le32(plane->state->crtc_h),
223 0, 0, &fence); 173 0, 0, &fence);