diff options
Diffstat (limited to 'drivers/gpu/drm/radeon')
-rw-r--r-- | drivers/gpu/drm/radeon/atom.c | 11 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/atom.h | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/atombios_dp.c | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/atombios_i2c.c | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/cik.c | 7 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/cik_sdma.c | 21 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/evergreen.c | 8 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/kv_dpm.c | 19 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/r100.c | 3 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/r600_dma.c | 20 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/r600_dpm.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_bios.c | 6 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_cs.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_device.c | 1 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_encoders.c | 3 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_ring.c | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_vm.c | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/rs600.c | 3 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/rs690.c | 3 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/rv515.c | 3 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/si.c | 3 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/si_dpm.c | 2 |
22 files changed, 94 insertions, 41 deletions
diff --git a/drivers/gpu/drm/radeon/atom.c b/drivers/gpu/drm/radeon/atom.c index 15da7ef344a4..ec1593a6a561 100644 --- a/drivers/gpu/drm/radeon/atom.c +++ b/drivers/gpu/drm/radeon/atom.c | |||
@@ -1217,7 +1217,7 @@ free: | |||
1217 | return ret; | 1217 | return ret; |
1218 | } | 1218 | } |
1219 | 1219 | ||
1220 | int atom_execute_table(struct atom_context *ctx, int index, uint32_t * params) | 1220 | int atom_execute_table_scratch_unlocked(struct atom_context *ctx, int index, uint32_t * params) |
1221 | { | 1221 | { |
1222 | int r; | 1222 | int r; |
1223 | 1223 | ||
@@ -1238,6 +1238,15 @@ int atom_execute_table(struct atom_context *ctx, int index, uint32_t * params) | |||
1238 | return r; | 1238 | return r; |
1239 | } | 1239 | } |
1240 | 1240 | ||
1241 | int atom_execute_table(struct atom_context *ctx, int index, uint32_t * params) | ||
1242 | { | ||
1243 | int r; | ||
1244 | mutex_lock(&ctx->scratch_mutex); | ||
1245 | r = atom_execute_table_scratch_unlocked(ctx, index, params); | ||
1246 | mutex_unlock(&ctx->scratch_mutex); | ||
1247 | return r; | ||
1248 | } | ||
1249 | |||
1241 | static int atom_iio_len[] = { 1, 2, 3, 3, 3, 3, 4, 4, 4, 3 }; | 1250 | static int atom_iio_len[] = { 1, 2, 3, 3, 3, 3, 4, 4, 4, 3 }; |
1242 | 1251 | ||
1243 | static void atom_index_iio(struct atom_context *ctx, int base) | 1252 | static void atom_index_iio(struct atom_context *ctx, int base) |
diff --git a/drivers/gpu/drm/radeon/atom.h b/drivers/gpu/drm/radeon/atom.h index feba6b8d36b3..6d014ddb6b78 100644 --- a/drivers/gpu/drm/radeon/atom.h +++ b/drivers/gpu/drm/radeon/atom.h | |||
@@ -125,6 +125,7 @@ struct card_info { | |||
125 | struct atom_context { | 125 | struct atom_context { |
126 | struct card_info *card; | 126 | struct card_info *card; |
127 | struct mutex mutex; | 127 | struct mutex mutex; |
128 | struct mutex scratch_mutex; | ||
128 | void *bios; | 129 | void *bios; |
129 | uint32_t cmd_table, data_table; | 130 | uint32_t cmd_table, data_table; |
130 | uint16_t *iio; | 131 | uint16_t *iio; |
@@ -145,6 +146,7 @@ extern int atom_debug; | |||
145 | 146 | ||
146 | struct atom_context *atom_parse(struct card_info *, void *); | 147 | struct atom_context *atom_parse(struct card_info *, void *); |
147 | int atom_execute_table(struct atom_context *, int, uint32_t *); | 148 | int atom_execute_table(struct atom_context *, int, uint32_t *); |
149 | int atom_execute_table_scratch_unlocked(struct atom_context *, int, uint32_t *); | ||
148 | int atom_asic_init(struct atom_context *); | 150 | int atom_asic_init(struct atom_context *); |
149 | void atom_destroy(struct atom_context *); | 151 | void atom_destroy(struct atom_context *); |
150 | bool atom_parse_data_header(struct atom_context *ctx, int index, uint16_t *size, | 152 | bool atom_parse_data_header(struct atom_context *ctx, int index, uint16_t *size, |
diff --git a/drivers/gpu/drm/radeon/atombios_dp.c b/drivers/gpu/drm/radeon/atombios_dp.c index 95d5d4ab3335..11ba9d21b89b 100644 --- a/drivers/gpu/drm/radeon/atombios_dp.c +++ b/drivers/gpu/drm/radeon/atombios_dp.c | |||
@@ -100,6 +100,7 @@ static int radeon_process_aux_ch(struct radeon_i2c_chan *chan, | |||
100 | memset(&args, 0, sizeof(args)); | 100 | memset(&args, 0, sizeof(args)); |
101 | 101 | ||
102 | mutex_lock(&chan->mutex); | 102 | mutex_lock(&chan->mutex); |
103 | mutex_lock(&rdev->mode_info.atom_context->scratch_mutex); | ||
103 | 104 | ||
104 | base = (unsigned char *)(rdev->mode_info.atom_context->scratch + 1); | 105 | base = (unsigned char *)(rdev->mode_info.atom_context->scratch + 1); |
105 | 106 | ||
@@ -113,7 +114,7 @@ static int radeon_process_aux_ch(struct radeon_i2c_chan *chan, | |||
113 | if (ASIC_IS_DCE4(rdev)) | 114 | if (ASIC_IS_DCE4(rdev)) |
114 | args.v2.ucHPD_ID = chan->rec.hpd; | 115 | args.v2.ucHPD_ID = chan->rec.hpd; |
115 | 116 | ||
116 | atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); | 117 | atom_execute_table_scratch_unlocked(rdev->mode_info.atom_context, index, (uint32_t *)&args); |
117 | 118 | ||
118 | *ack = args.v1.ucReplyStatus; | 119 | *ack = args.v1.ucReplyStatus; |
119 | 120 | ||
@@ -147,6 +148,7 @@ static int radeon_process_aux_ch(struct radeon_i2c_chan *chan, | |||
147 | 148 | ||
148 | r = recv_bytes; | 149 | r = recv_bytes; |
149 | done: | 150 | done: |
151 | mutex_unlock(&rdev->mode_info.atom_context->scratch_mutex); | ||
150 | mutex_unlock(&chan->mutex); | 152 | mutex_unlock(&chan->mutex); |
151 | 153 | ||
152 | return r; | 154 | return r; |
diff --git a/drivers/gpu/drm/radeon/atombios_i2c.c b/drivers/gpu/drm/radeon/atombios_i2c.c index 9c570fb15b8c..4157780585a0 100644 --- a/drivers/gpu/drm/radeon/atombios_i2c.c +++ b/drivers/gpu/drm/radeon/atombios_i2c.c | |||
@@ -48,6 +48,7 @@ static int radeon_process_i2c_ch(struct radeon_i2c_chan *chan, | |||
48 | memset(&args, 0, sizeof(args)); | 48 | memset(&args, 0, sizeof(args)); |
49 | 49 | ||
50 | mutex_lock(&chan->mutex); | 50 | mutex_lock(&chan->mutex); |
51 | mutex_lock(&rdev->mode_info.atom_context->scratch_mutex); | ||
51 | 52 | ||
52 | base = (unsigned char *)rdev->mode_info.atom_context->scratch; | 53 | base = (unsigned char *)rdev->mode_info.atom_context->scratch; |
53 | 54 | ||
@@ -82,7 +83,7 @@ static int radeon_process_i2c_ch(struct radeon_i2c_chan *chan, | |||
82 | args.ucSlaveAddr = slave_addr << 1; | 83 | args.ucSlaveAddr = slave_addr << 1; |
83 | args.ucLineNumber = chan->rec.i2c_id; | 84 | args.ucLineNumber = chan->rec.i2c_id; |
84 | 85 | ||
85 | atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); | 86 | atom_execute_table_scratch_unlocked(rdev->mode_info.atom_context, index, (uint32_t *)&args); |
86 | 87 | ||
87 | /* error */ | 88 | /* error */ |
88 | if (args.ucStatus != HW_ASSISTED_I2C_STATUS_SUCCESS) { | 89 | if (args.ucStatus != HW_ASSISTED_I2C_STATUS_SUCCESS) { |
@@ -95,6 +96,7 @@ static int radeon_process_i2c_ch(struct radeon_i2c_chan *chan, | |||
95 | radeon_atom_copy_swap(buf, base, num, false); | 96 | radeon_atom_copy_swap(buf, base, num, false); |
96 | 97 | ||
97 | done: | 98 | done: |
99 | mutex_unlock(&rdev->mode_info.atom_context->scratch_mutex); | ||
98 | mutex_unlock(&chan->mutex); | 100 | mutex_unlock(&chan->mutex); |
99 | 101 | ||
100 | return r; | 102 | return r; |
diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c index 377afa504d2b..89c01fa6dd8e 100644 --- a/drivers/gpu/drm/radeon/cik.c +++ b/drivers/gpu/drm/radeon/cik.c | |||
@@ -4313,8 +4313,8 @@ static int cik_cp_gfx_start(struct radeon_device *rdev) | |||
4313 | /* init the CE partitions. CE only used for gfx on CIK */ | 4313 | /* init the CE partitions. CE only used for gfx on CIK */ |
4314 | radeon_ring_write(ring, PACKET3(PACKET3_SET_BASE, 2)); | 4314 | radeon_ring_write(ring, PACKET3(PACKET3_SET_BASE, 2)); |
4315 | radeon_ring_write(ring, PACKET3_BASE_INDEX(CE_PARTITION_BASE)); | 4315 | radeon_ring_write(ring, PACKET3_BASE_INDEX(CE_PARTITION_BASE)); |
4316 | radeon_ring_write(ring, 0xc000); | 4316 | radeon_ring_write(ring, 0x8000); |
4317 | radeon_ring_write(ring, 0xc000); | 4317 | radeon_ring_write(ring, 0x8000); |
4318 | 4318 | ||
4319 | /* setup clear context state */ | 4319 | /* setup clear context state */ |
4320 | radeon_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0)); | 4320 | radeon_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0)); |
@@ -9447,6 +9447,9 @@ void dce8_bandwidth_update(struct radeon_device *rdev) | |||
9447 | u32 num_heads = 0, lb_size; | 9447 | u32 num_heads = 0, lb_size; |
9448 | int i; | 9448 | int i; |
9449 | 9449 | ||
9450 | if (!rdev->mode_info.mode_config_initialized) | ||
9451 | return; | ||
9452 | |||
9450 | radeon_update_display_priority(rdev); | 9453 | radeon_update_display_priority(rdev); |
9451 | 9454 | ||
9452 | for (i = 0; i < rdev->num_crtc; i++) { | 9455 | for (i = 0; i < rdev->num_crtc; i++) { |
diff --git a/drivers/gpu/drm/radeon/cik_sdma.c b/drivers/gpu/drm/radeon/cik_sdma.c index 4e8432d07f15..d748963af08b 100644 --- a/drivers/gpu/drm/radeon/cik_sdma.c +++ b/drivers/gpu/drm/radeon/cik_sdma.c | |||
@@ -667,17 +667,20 @@ int cik_sdma_ib_test(struct radeon_device *rdev, struct radeon_ring *ring) | |||
667 | { | 667 | { |
668 | struct radeon_ib ib; | 668 | struct radeon_ib ib; |
669 | unsigned i; | 669 | unsigned i; |
670 | unsigned index; | ||
670 | int r; | 671 | int r; |
671 | void __iomem *ptr = (void *)rdev->vram_scratch.ptr; | ||
672 | u32 tmp = 0; | 672 | u32 tmp = 0; |
673 | u64 gpu_addr; | ||
673 | 674 | ||
674 | if (!ptr) { | 675 | if (ring->idx == R600_RING_TYPE_DMA_INDEX) |
675 | DRM_ERROR("invalid vram scratch pointer\n"); | 676 | index = R600_WB_DMA_RING_TEST_OFFSET; |
676 | return -EINVAL; | 677 | else |
677 | } | 678 | index = CAYMAN_WB_DMA1_RING_TEST_OFFSET; |
679 | |||
680 | gpu_addr = rdev->wb.gpu_addr + index; | ||
678 | 681 | ||
679 | tmp = 0xCAFEDEAD; | 682 | tmp = 0xCAFEDEAD; |
680 | writel(tmp, ptr); | 683 | rdev->wb.wb[index/4] = cpu_to_le32(tmp); |
681 | 684 | ||
682 | r = radeon_ib_get(rdev, ring->idx, &ib, NULL, 256); | 685 | r = radeon_ib_get(rdev, ring->idx, &ib, NULL, 256); |
683 | if (r) { | 686 | if (r) { |
@@ -686,8 +689,8 @@ int cik_sdma_ib_test(struct radeon_device *rdev, struct radeon_ring *ring) | |||
686 | } | 689 | } |
687 | 690 | ||
688 | ib.ptr[0] = SDMA_PACKET(SDMA_OPCODE_WRITE, SDMA_WRITE_SUB_OPCODE_LINEAR, 0); | 691 | ib.ptr[0] = SDMA_PACKET(SDMA_OPCODE_WRITE, SDMA_WRITE_SUB_OPCODE_LINEAR, 0); |
689 | ib.ptr[1] = rdev->vram_scratch.gpu_addr & 0xfffffffc; | 692 | ib.ptr[1] = lower_32_bits(gpu_addr); |
690 | ib.ptr[2] = upper_32_bits(rdev->vram_scratch.gpu_addr); | 693 | ib.ptr[2] = upper_32_bits(gpu_addr); |
691 | ib.ptr[3] = 1; | 694 | ib.ptr[3] = 1; |
692 | ib.ptr[4] = 0xDEADBEEF; | 695 | ib.ptr[4] = 0xDEADBEEF; |
693 | ib.length_dw = 5; | 696 | ib.length_dw = 5; |
@@ -704,7 +707,7 @@ int cik_sdma_ib_test(struct radeon_device *rdev, struct radeon_ring *ring) | |||
704 | return r; | 707 | return r; |
705 | } | 708 | } |
706 | for (i = 0; i < rdev->usec_timeout; i++) { | 709 | for (i = 0; i < rdev->usec_timeout; i++) { |
707 | tmp = readl(ptr); | 710 | tmp = le32_to_cpu(rdev->wb.wb[index/4]); |
708 | if (tmp == 0xDEADBEEF) | 711 | if (tmp == 0xDEADBEEF) |
709 | break; | 712 | break; |
710 | DRM_UDELAY(1); | 713 | DRM_UDELAY(1); |
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index a31f1ca40c6a..85995b4e3338 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c | |||
@@ -2345,6 +2345,9 @@ void evergreen_bandwidth_update(struct radeon_device *rdev) | |||
2345 | u32 num_heads = 0, lb_size; | 2345 | u32 num_heads = 0, lb_size; |
2346 | int i; | 2346 | int i; |
2347 | 2347 | ||
2348 | if (!rdev->mode_info.mode_config_initialized) | ||
2349 | return; | ||
2350 | |||
2348 | radeon_update_display_priority(rdev); | 2351 | radeon_update_display_priority(rdev); |
2349 | 2352 | ||
2350 | for (i = 0; i < rdev->num_crtc; i++) { | 2353 | for (i = 0; i < rdev->num_crtc; i++) { |
@@ -2552,6 +2555,7 @@ void evergreen_mc_stop(struct radeon_device *rdev, struct evergreen_mc_save *sav | |||
2552 | WREG32(EVERGREEN_CRTC_UPDATE_LOCK + crtc_offsets[i], 1); | 2555 | WREG32(EVERGREEN_CRTC_UPDATE_LOCK + crtc_offsets[i], 1); |
2553 | tmp |= EVERGREEN_CRTC_BLANK_DATA_EN; | 2556 | tmp |= EVERGREEN_CRTC_BLANK_DATA_EN; |
2554 | WREG32(EVERGREEN_CRTC_BLANK_CONTROL + crtc_offsets[i], tmp); | 2557 | WREG32(EVERGREEN_CRTC_BLANK_CONTROL + crtc_offsets[i], tmp); |
2558 | WREG32(EVERGREEN_CRTC_UPDATE_LOCK + crtc_offsets[i], 0); | ||
2555 | } | 2559 | } |
2556 | } else { | 2560 | } else { |
2557 | tmp = RREG32(EVERGREEN_CRTC_CONTROL + crtc_offsets[i]); | 2561 | tmp = RREG32(EVERGREEN_CRTC_CONTROL + crtc_offsets[i]); |
@@ -3005,7 +3009,7 @@ static void evergreen_gpu_init(struct radeon_device *rdev) | |||
3005 | u32 vgt_cache_invalidation; | 3009 | u32 vgt_cache_invalidation; |
3006 | u32 hdp_host_path_cntl, tmp; | 3010 | u32 hdp_host_path_cntl, tmp; |
3007 | u32 disabled_rb_mask; | 3011 | u32 disabled_rb_mask; |
3008 | int i, j, num_shader_engines, ps_thread_count; | 3012 | int i, j, ps_thread_count; |
3009 | 3013 | ||
3010 | switch (rdev->family) { | 3014 | switch (rdev->family) { |
3011 | case CHIP_CYPRESS: | 3015 | case CHIP_CYPRESS: |
@@ -3303,8 +3307,6 @@ static void evergreen_gpu_init(struct radeon_device *rdev) | |||
3303 | rdev->config.evergreen.tile_config |= | 3307 | rdev->config.evergreen.tile_config |= |
3304 | ((gb_addr_config & 0x30000000) >> 28) << 12; | 3308 | ((gb_addr_config & 0x30000000) >> 28) << 12; |
3305 | 3309 | ||
3306 | num_shader_engines = (gb_addr_config & NUM_SHADER_ENGINES(3) >> 12) + 1; | ||
3307 | |||
3308 | if ((rdev->family >= CHIP_CEDAR) && (rdev->family <= CHIP_HEMLOCK)) { | 3310 | if ((rdev->family >= CHIP_CEDAR) && (rdev->family <= CHIP_HEMLOCK)) { |
3309 | u32 efuse_straps_4; | 3311 | u32 efuse_straps_4; |
3310 | u32 efuse_straps_3; | 3312 | u32 efuse_straps_3; |
diff --git a/drivers/gpu/drm/radeon/kv_dpm.c b/drivers/gpu/drm/radeon/kv_dpm.c index 1dd976f447fa..9b42001295ba 100644 --- a/drivers/gpu/drm/radeon/kv_dpm.c +++ b/drivers/gpu/drm/radeon/kv_dpm.c | |||
@@ -2725,7 +2725,11 @@ int kv_dpm_init(struct radeon_device *rdev) | |||
2725 | 2725 | ||
2726 | pi->sram_end = SMC_RAM_END; | 2726 | pi->sram_end = SMC_RAM_END; |
2727 | 2727 | ||
2728 | pi->enable_nb_dpm = true; | 2728 | /* Enabling nb dpm on an asrock system prevents dpm from working */ |
2729 | if (rdev->pdev->subsystem_vendor == 0x1849) | ||
2730 | pi->enable_nb_dpm = false; | ||
2731 | else | ||
2732 | pi->enable_nb_dpm = true; | ||
2729 | 2733 | ||
2730 | pi->caps_power_containment = true; | 2734 | pi->caps_power_containment = true; |
2731 | pi->caps_cac = true; | 2735 | pi->caps_cac = true; |
@@ -2740,10 +2744,19 @@ int kv_dpm_init(struct radeon_device *rdev) | |||
2740 | pi->caps_sclk_ds = true; | 2744 | pi->caps_sclk_ds = true; |
2741 | pi->enable_auto_thermal_throttling = true; | 2745 | pi->enable_auto_thermal_throttling = true; |
2742 | pi->disable_nb_ps3_in_battery = false; | 2746 | pi->disable_nb_ps3_in_battery = false; |
2743 | if (radeon_bapm == 0) | 2747 | if (radeon_bapm == -1) { |
2748 | /* There are stability issues reported on with | ||
2749 | * bapm enabled on an asrock system. | ||
2750 | */ | ||
2751 | if (rdev->pdev->subsystem_vendor == 0x1849) | ||
2752 | pi->bapm_enable = false; | ||
2753 | else | ||
2754 | pi->bapm_enable = true; | ||
2755 | } else if (radeon_bapm == 0) { | ||
2744 | pi->bapm_enable = false; | 2756 | pi->bapm_enable = false; |
2745 | else | 2757 | } else { |
2746 | pi->bapm_enable = true; | 2758 | pi->bapm_enable = true; |
2759 | } | ||
2747 | pi->voltage_drop_t = 0; | 2760 | pi->voltage_drop_t = 0; |
2748 | pi->caps_sclk_throttle_low_notification = false; | 2761 | pi->caps_sclk_throttle_low_notification = false; |
2749 | pi->caps_fps = false; /* true? */ | 2762 | pi->caps_fps = false; /* true? */ |
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c index 10f8be0ee173..b53b31a7b76f 100644 --- a/drivers/gpu/drm/radeon/r100.c +++ b/drivers/gpu/drm/radeon/r100.c | |||
@@ -3207,6 +3207,9 @@ void r100_bandwidth_update(struct radeon_device *rdev) | |||
3207 | uint32_t pixel_bytes1 = 0; | 3207 | uint32_t pixel_bytes1 = 0; |
3208 | uint32_t pixel_bytes2 = 0; | 3208 | uint32_t pixel_bytes2 = 0; |
3209 | 3209 | ||
3210 | if (!rdev->mode_info.mode_config_initialized) | ||
3211 | return; | ||
3212 | |||
3210 | radeon_update_display_priority(rdev); | 3213 | radeon_update_display_priority(rdev); |
3211 | 3214 | ||
3212 | if (rdev->mode_info.crtcs[0]->base.enabled) { | 3215 | if (rdev->mode_info.crtcs[0]->base.enabled) { |
diff --git a/drivers/gpu/drm/radeon/r600_dma.c b/drivers/gpu/drm/radeon/r600_dma.c index aabc343b9a8f..cf0df45d455e 100644 --- a/drivers/gpu/drm/radeon/r600_dma.c +++ b/drivers/gpu/drm/radeon/r600_dma.c | |||
@@ -338,17 +338,17 @@ int r600_dma_ib_test(struct radeon_device *rdev, struct radeon_ring *ring) | |||
338 | { | 338 | { |
339 | struct radeon_ib ib; | 339 | struct radeon_ib ib; |
340 | unsigned i; | 340 | unsigned i; |
341 | unsigned index; | ||
341 | int r; | 342 | int r; |
342 | void __iomem *ptr = (void *)rdev->vram_scratch.ptr; | ||
343 | u32 tmp = 0; | 343 | u32 tmp = 0; |
344 | u64 gpu_addr; | ||
344 | 345 | ||
345 | if (!ptr) { | 346 | if (ring->idx == R600_RING_TYPE_DMA_INDEX) |
346 | DRM_ERROR("invalid vram scratch pointer\n"); | 347 | index = R600_WB_DMA_RING_TEST_OFFSET; |
347 | return -EINVAL; | 348 | else |
348 | } | 349 | index = CAYMAN_WB_DMA1_RING_TEST_OFFSET; |
349 | 350 | ||
350 | tmp = 0xCAFEDEAD; | 351 | gpu_addr = rdev->wb.gpu_addr + index; |
351 | writel(tmp, ptr); | ||
352 | 352 | ||
353 | r = radeon_ib_get(rdev, ring->idx, &ib, NULL, 256); | 353 | r = radeon_ib_get(rdev, ring->idx, &ib, NULL, 256); |
354 | if (r) { | 354 | if (r) { |
@@ -357,8 +357,8 @@ int r600_dma_ib_test(struct radeon_device *rdev, struct radeon_ring *ring) | |||
357 | } | 357 | } |
358 | 358 | ||
359 | ib.ptr[0] = DMA_PACKET(DMA_PACKET_WRITE, 0, 0, 1); | 359 | ib.ptr[0] = DMA_PACKET(DMA_PACKET_WRITE, 0, 0, 1); |
360 | ib.ptr[1] = rdev->vram_scratch.gpu_addr & 0xfffffffc; | 360 | ib.ptr[1] = lower_32_bits(gpu_addr); |
361 | ib.ptr[2] = upper_32_bits(rdev->vram_scratch.gpu_addr) & 0xff; | 361 | ib.ptr[2] = upper_32_bits(gpu_addr) & 0xff; |
362 | ib.ptr[3] = 0xDEADBEEF; | 362 | ib.ptr[3] = 0xDEADBEEF; |
363 | ib.length_dw = 4; | 363 | ib.length_dw = 4; |
364 | 364 | ||
@@ -374,7 +374,7 @@ int r600_dma_ib_test(struct radeon_device *rdev, struct radeon_ring *ring) | |||
374 | return r; | 374 | return r; |
375 | } | 375 | } |
376 | for (i = 0; i < rdev->usec_timeout; i++) { | 376 | for (i = 0; i < rdev->usec_timeout; i++) { |
377 | tmp = readl(ptr); | 377 | tmp = le32_to_cpu(rdev->wb.wb[index/4]); |
378 | if (tmp == 0xDEADBEEF) | 378 | if (tmp == 0xDEADBEEF) |
379 | break; | 379 | break; |
380 | DRM_UDELAY(1); | 380 | DRM_UDELAY(1); |
diff --git a/drivers/gpu/drm/radeon/r600_dpm.c b/drivers/gpu/drm/radeon/r600_dpm.c index f6309bd23e01..b5c73df8e202 100644 --- a/drivers/gpu/drm/radeon/r600_dpm.c +++ b/drivers/gpu/drm/radeon/r600_dpm.c | |||
@@ -1256,7 +1256,7 @@ int r600_parse_extended_power_table(struct radeon_device *rdev) | |||
1256 | (mode_info->atom_context->bios + data_offset + | 1256 | (mode_info->atom_context->bios + data_offset + |
1257 | le16_to_cpu(ext_hdr->usPowerTuneTableOffset)); | 1257 | le16_to_cpu(ext_hdr->usPowerTuneTableOffset)); |
1258 | rdev->pm.dpm.dyn_state.cac_tdp_table->maximum_power_delivery_limit = | 1258 | rdev->pm.dpm.dyn_state.cac_tdp_table->maximum_power_delivery_limit = |
1259 | ppt->usMaximumPowerDeliveryLimit; | 1259 | le16_to_cpu(ppt->usMaximumPowerDeliveryLimit); |
1260 | pt = &ppt->power_tune_table; | 1260 | pt = &ppt->power_tune_table; |
1261 | } else { | 1261 | } else { |
1262 | ATOM_PPLIB_POWERTUNE_Table *ppt = (ATOM_PPLIB_POWERTUNE_Table *) | 1262 | ATOM_PPLIB_POWERTUNE_Table *ppt = (ATOM_PPLIB_POWERTUNE_Table *) |
diff --git a/drivers/gpu/drm/radeon/radeon_bios.c b/drivers/gpu/drm/radeon/radeon_bios.c index 6a03624fadaa..63ccb8fa799c 100644 --- a/drivers/gpu/drm/radeon/radeon_bios.c +++ b/drivers/gpu/drm/radeon/radeon_bios.c | |||
@@ -658,12 +658,10 @@ bool radeon_get_bios(struct radeon_device *rdev) | |||
658 | r = igp_read_bios_from_vram(rdev); | 658 | r = igp_read_bios_from_vram(rdev); |
659 | if (r == false) | 659 | if (r == false) |
660 | r = radeon_read_bios(rdev); | 660 | r = radeon_read_bios(rdev); |
661 | if (r == false) { | 661 | if (r == false) |
662 | r = radeon_read_disabled_bios(rdev); | 662 | r = radeon_read_disabled_bios(rdev); |
663 | } | 663 | if (r == false) |
664 | if (r == false) { | ||
665 | r = radeon_read_platform_bios(rdev); | 664 | r = radeon_read_platform_bios(rdev); |
666 | } | ||
667 | if (r == false || rdev->bios == NULL) { | 665 | if (r == false || rdev->bios == NULL) { |
668 | DRM_ERROR("Unable to locate a BIOS ROM\n"); | 666 | DRM_ERROR("Unable to locate a BIOS ROM\n"); |
669 | rdev->bios = NULL; | 667 | rdev->bios = NULL; |
diff --git a/drivers/gpu/drm/radeon/radeon_cs.c b/drivers/gpu/drm/radeon/radeon_cs.c index 1c893447d7cd..a3e7aed7e680 100644 --- a/drivers/gpu/drm/radeon/radeon_cs.c +++ b/drivers/gpu/drm/radeon/radeon_cs.c | |||
@@ -450,7 +450,7 @@ static void radeon_cs_parser_fini(struct radeon_cs_parser *parser, int error, bo | |||
450 | kfree(parser->track); | 450 | kfree(parser->track); |
451 | kfree(parser->relocs); | 451 | kfree(parser->relocs); |
452 | kfree(parser->relocs_ptr); | 452 | kfree(parser->relocs_ptr); |
453 | kfree(parser->vm_bos); | 453 | drm_free_large(parser->vm_bos); |
454 | for (i = 0; i < parser->nchunks; i++) | 454 | for (i = 0; i < parser->nchunks; i++) |
455 | drm_free_large(parser->chunks[i].kdata); | 455 | drm_free_large(parser->chunks[i].kdata); |
456 | kfree(parser->chunks); | 456 | kfree(parser->chunks); |
diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c index ea2676954dde..995a8b1770dd 100644 --- a/drivers/gpu/drm/radeon/radeon_device.c +++ b/drivers/gpu/drm/radeon/radeon_device.c | |||
@@ -952,6 +952,7 @@ int radeon_atombios_init(struct radeon_device *rdev) | |||
952 | } | 952 | } |
953 | 953 | ||
954 | mutex_init(&rdev->mode_info.atom_context->mutex); | 954 | mutex_init(&rdev->mode_info.atom_context->mutex); |
955 | mutex_init(&rdev->mode_info.atom_context->scratch_mutex); | ||
955 | radeon_atom_initialize_bios_scratch_regs(rdev->ddev); | 956 | radeon_atom_initialize_bios_scratch_regs(rdev->ddev); |
956 | atom_allocate_fb_scratch(rdev->mode_info.atom_context); | 957 | atom_allocate_fb_scratch(rdev->mode_info.atom_context); |
957 | return 0; | 958 | return 0; |
diff --git a/drivers/gpu/drm/radeon/radeon_encoders.c b/drivers/gpu/drm/radeon/radeon_encoders.c index 9a19e52cc655..6b670b0bc47b 100644 --- a/drivers/gpu/drm/radeon/radeon_encoders.c +++ b/drivers/gpu/drm/radeon/radeon_encoders.c | |||
@@ -179,6 +179,9 @@ static void radeon_encoder_add_backlight(struct radeon_encoder *radeon_encoder, | |||
179 | (rdev->pdev->subsystem_vendor == 0x1734) && | 179 | (rdev->pdev->subsystem_vendor == 0x1734) && |
180 | (rdev->pdev->subsystem_device == 0x1107)) | 180 | (rdev->pdev->subsystem_device == 0x1107)) |
181 | use_bl = false; | 181 | use_bl = false; |
182 | /* disable native backlight control on older asics */ | ||
183 | else if (rdev->family < CHIP_R600) | ||
184 | use_bl = false; | ||
182 | else | 185 | else |
183 | use_bl = true; | 186 | use_bl = true; |
184 | } | 187 | } |
diff --git a/drivers/gpu/drm/radeon/radeon_ring.c b/drivers/gpu/drm/radeon/radeon_ring.c index 3d17af34afa7..2456f69efd23 100644 --- a/drivers/gpu/drm/radeon/radeon_ring.c +++ b/drivers/gpu/drm/radeon/radeon_ring.c | |||
@@ -314,7 +314,7 @@ unsigned radeon_ring_backup(struct radeon_device *rdev, struct radeon_ring *ring | |||
314 | } | 314 | } |
315 | 315 | ||
316 | /* and then save the content of the ring */ | 316 | /* and then save the content of the ring */ |
317 | *data = kmalloc_array(size, sizeof(uint32_t), GFP_KERNEL); | 317 | *data = drm_malloc_ab(size, sizeof(uint32_t)); |
318 | if (!*data) { | 318 | if (!*data) { |
319 | mutex_unlock(&rdev->ring_lock); | 319 | mutex_unlock(&rdev->ring_lock); |
320 | return 0; | 320 | return 0; |
@@ -356,7 +356,7 @@ int radeon_ring_restore(struct radeon_device *rdev, struct radeon_ring *ring, | |||
356 | } | 356 | } |
357 | 357 | ||
358 | radeon_ring_unlock_commit(rdev, ring, false); | 358 | radeon_ring_unlock_commit(rdev, ring, false); |
359 | kfree(data); | 359 | drm_free_large(data); |
360 | return 0; | 360 | return 0; |
361 | } | 361 | } |
362 | 362 | ||
diff --git a/drivers/gpu/drm/radeon/radeon_vm.c b/drivers/gpu/drm/radeon/radeon_vm.c index 4532cc76a0a6..dfde266529e2 100644 --- a/drivers/gpu/drm/radeon/radeon_vm.c +++ b/drivers/gpu/drm/radeon/radeon_vm.c | |||
@@ -132,8 +132,8 @@ struct radeon_cs_reloc *radeon_vm_get_bos(struct radeon_device *rdev, | |||
132 | struct radeon_cs_reloc *list; | 132 | struct radeon_cs_reloc *list; |
133 | unsigned i, idx; | 133 | unsigned i, idx; |
134 | 134 | ||
135 | list = kmalloc_array(vm->max_pde_used + 2, | 135 | list = drm_malloc_ab(vm->max_pde_used + 2, |
136 | sizeof(struct radeon_cs_reloc), GFP_KERNEL); | 136 | sizeof(struct radeon_cs_reloc)); |
137 | if (!list) | 137 | if (!list) |
138 | return NULL; | 138 | return NULL; |
139 | 139 | ||
diff --git a/drivers/gpu/drm/radeon/rs600.c b/drivers/gpu/drm/radeon/rs600.c index 5f6db4629aaa..9acb1c3c005b 100644 --- a/drivers/gpu/drm/radeon/rs600.c +++ b/drivers/gpu/drm/radeon/rs600.c | |||
@@ -879,6 +879,9 @@ void rs600_bandwidth_update(struct radeon_device *rdev) | |||
879 | u32 d1mode_priority_a_cnt, d2mode_priority_a_cnt; | 879 | u32 d1mode_priority_a_cnt, d2mode_priority_a_cnt; |
880 | /* FIXME: implement full support */ | 880 | /* FIXME: implement full support */ |
881 | 881 | ||
882 | if (!rdev->mode_info.mode_config_initialized) | ||
883 | return; | ||
884 | |||
882 | radeon_update_display_priority(rdev); | 885 | radeon_update_display_priority(rdev); |
883 | 886 | ||
884 | if (rdev->mode_info.crtcs[0]->base.enabled) | 887 | if (rdev->mode_info.crtcs[0]->base.enabled) |
diff --git a/drivers/gpu/drm/radeon/rs690.c b/drivers/gpu/drm/radeon/rs690.c index 3462b64369bf..0a2d36e81108 100644 --- a/drivers/gpu/drm/radeon/rs690.c +++ b/drivers/gpu/drm/radeon/rs690.c | |||
@@ -579,6 +579,9 @@ void rs690_bandwidth_update(struct radeon_device *rdev) | |||
579 | u32 d1mode_priority_a_cnt, d1mode_priority_b_cnt; | 579 | u32 d1mode_priority_a_cnt, d1mode_priority_b_cnt; |
580 | u32 d2mode_priority_a_cnt, d2mode_priority_b_cnt; | 580 | u32 d2mode_priority_a_cnt, d2mode_priority_b_cnt; |
581 | 581 | ||
582 | if (!rdev->mode_info.mode_config_initialized) | ||
583 | return; | ||
584 | |||
582 | radeon_update_display_priority(rdev); | 585 | radeon_update_display_priority(rdev); |
583 | 586 | ||
584 | if (rdev->mode_info.crtcs[0]->base.enabled) | 587 | if (rdev->mode_info.crtcs[0]->base.enabled) |
diff --git a/drivers/gpu/drm/radeon/rv515.c b/drivers/gpu/drm/radeon/rv515.c index 8a477bf1fdb3..c55d653aaf5f 100644 --- a/drivers/gpu/drm/radeon/rv515.c +++ b/drivers/gpu/drm/radeon/rv515.c | |||
@@ -1277,6 +1277,9 @@ void rv515_bandwidth_update(struct radeon_device *rdev) | |||
1277 | struct drm_display_mode *mode0 = NULL; | 1277 | struct drm_display_mode *mode0 = NULL; |
1278 | struct drm_display_mode *mode1 = NULL; | 1278 | struct drm_display_mode *mode1 = NULL; |
1279 | 1279 | ||
1280 | if (!rdev->mode_info.mode_config_initialized) | ||
1281 | return; | ||
1282 | |||
1280 | radeon_update_display_priority(rdev); | 1283 | radeon_update_display_priority(rdev); |
1281 | 1284 | ||
1282 | if (rdev->mode_info.crtcs[0]->base.enabled) | 1285 | if (rdev->mode_info.crtcs[0]->base.enabled) |
diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c index eeea5b6a1775..7d5083dc4acb 100644 --- a/drivers/gpu/drm/radeon/si.c +++ b/drivers/gpu/drm/radeon/si.c | |||
@@ -2384,6 +2384,9 @@ void dce6_bandwidth_update(struct radeon_device *rdev) | |||
2384 | u32 num_heads = 0, lb_size; | 2384 | u32 num_heads = 0, lb_size; |
2385 | int i; | 2385 | int i; |
2386 | 2386 | ||
2387 | if (!rdev->mode_info.mode_config_initialized) | ||
2388 | return; | ||
2389 | |||
2387 | radeon_update_display_priority(rdev); | 2390 | radeon_update_display_priority(rdev); |
2388 | 2391 | ||
2389 | for (i = 0; i < rdev->num_crtc; i++) { | 2392 | for (i = 0; i < rdev->num_crtc; i++) { |
diff --git a/drivers/gpu/drm/radeon/si_dpm.c b/drivers/gpu/drm/radeon/si_dpm.c index a53c2e79d9cb..676e6c2ba90a 100644 --- a/drivers/gpu/drm/radeon/si_dpm.c +++ b/drivers/gpu/drm/radeon/si_dpm.c | |||
@@ -6256,7 +6256,7 @@ static void si_parse_pplib_clock_info(struct radeon_device *rdev, | |||
6256 | if ((rps->class2 & ATOM_PPLIB_CLASSIFICATION2_ULV) && | 6256 | if ((rps->class2 & ATOM_PPLIB_CLASSIFICATION2_ULV) && |
6257 | index == 0) { | 6257 | index == 0) { |
6258 | /* XXX disable for A0 tahiti */ | 6258 | /* XXX disable for A0 tahiti */ |
6259 | si_pi->ulv.supported = true; | 6259 | si_pi->ulv.supported = false; |
6260 | si_pi->ulv.pl = *pl; | 6260 | si_pi->ulv.pl = *pl; |
6261 | si_pi->ulv.one_pcie_lane_in_ulv = false; | 6261 | si_pi->ulv.one_pcie_lane_in_ulv = false; |
6262 | si_pi->ulv.volt_change_delay = SISLANDS_ULVVOLTAGECHANGEDELAY_DFLT; | 6262 | si_pi->ulv.volt_change_delay = SISLANDS_ULVVOLTAGECHANGEDELAY_DFLT; |