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path: root/drivers/gpu/drm/i915/intel_engine_cs.c
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Diffstat (limited to 'drivers/gpu/drm/i915/intel_engine_cs.c')
-rw-r--r--drivers/gpu/drm/i915/intel_engine_cs.c34
1 files changed, 12 insertions, 22 deletions
diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
index 32bf3a408d46..0ac497275a51 100644
--- a/drivers/gpu/drm/i915/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/intel_engine_cs.c
@@ -25,7 +25,6 @@
25#include <drm/drm_print.h> 25#include <drm/drm_print.h>
26 26
27#include "i915_drv.h" 27#include "i915_drv.h"
28#include "i915_vgpu.h"
29#include "intel_ringbuffer.h" 28#include "intel_ringbuffer.h"
30#include "intel_lrc.h" 29#include "intel_lrc.h"
31 30
@@ -230,6 +229,7 @@ __intel_engine_context_size(struct drm_i915_private *dev_priv, u8 class)
230 break; 229 break;
231 default: 230 default:
232 MISSING_CASE(class); 231 MISSING_CASE(class);
232 /* fall through */
233 case VIDEO_DECODE_CLASS: 233 case VIDEO_DECODE_CLASS:
234 case VIDEO_ENHANCEMENT_CLASS: 234 case VIDEO_ENHANCEMENT_CLASS:
235 case COPY_ENGINE_CLASS: 235 case COPY_ENGINE_CLASS:
@@ -302,6 +302,8 @@ intel_engine_setup(struct drm_i915_private *dev_priv,
302 engine->class); 302 engine->class);
303 if (WARN_ON(engine->context_size > BIT(20))) 303 if (WARN_ON(engine->context_size > BIT(20)))
304 engine->context_size = 0; 304 engine->context_size = 0;
305 if (engine->context_size)
306 DRIVER_CAPS(dev_priv)->has_logical_contexts = true;
305 307
306 /* Nothing to do here, execute in order of dependencies */ 308 /* Nothing to do here, execute in order of dependencies */
307 engine->schedule = NULL; 309 engine->schedule = NULL;
@@ -456,21 +458,10 @@ static void intel_engine_init_batch_pool(struct intel_engine_cs *engine)
456 i915_gem_batch_pool_init(&engine->batch_pool, engine); 458 i915_gem_batch_pool_init(&engine->batch_pool, engine);
457} 459}
458 460
459static bool csb_force_mmio(struct drm_i915_private *i915)
460{
461 /* Older GVT emulation depends upon intercepting CSB mmio */
462 if (intel_vgpu_active(i915) && !intel_vgpu_has_hwsp_emulation(i915))
463 return true;
464
465 return false;
466}
467
468static void intel_engine_init_execlist(struct intel_engine_cs *engine) 461static void intel_engine_init_execlist(struct intel_engine_cs *engine)
469{ 462{
470 struct intel_engine_execlists * const execlists = &engine->execlists; 463 struct intel_engine_execlists * const execlists = &engine->execlists;
471 464
472 execlists->csb_use_mmio = csb_force_mmio(engine->i915);
473
474 execlists->port_mask = 1; 465 execlists->port_mask = 1;
475 BUILD_BUG_ON_NOT_POWER_OF_2(execlists_num_ports(execlists)); 466 BUILD_BUG_ON_NOT_POWER_OF_2(execlists_num_ports(execlists));
476 GEM_BUG_ON(execlists_num_ports(execlists) > EXECLIST_MAX_PORTS); 467 GEM_BUG_ON(execlists_num_ports(execlists) > EXECLIST_MAX_PORTS);
@@ -492,6 +483,7 @@ static void intel_engine_init_execlist(struct intel_engine_cs *engine)
492void intel_engine_setup_common(struct intel_engine_cs *engine) 483void intel_engine_setup_common(struct intel_engine_cs *engine)
493{ 484{
494 i915_timeline_init(engine->i915, &engine->timeline, engine->name); 485 i915_timeline_init(engine->i915, &engine->timeline, engine->name);
486 lockdep_set_subclass(&engine->timeline.lock, TIMELINE_ENGINE);
495 487
496 intel_engine_init_execlist(engine); 488 intel_engine_init_execlist(engine);
497 intel_engine_init_hangcheck(engine); 489 intel_engine_init_hangcheck(engine);
@@ -1000,10 +992,12 @@ bool intel_engine_is_idle(struct intel_engine_cs *engine)
1000 if (READ_ONCE(engine->execlists.active)) { 992 if (READ_ONCE(engine->execlists.active)) {
1001 struct intel_engine_execlists *execlists = &engine->execlists; 993 struct intel_engine_execlists *execlists = &engine->execlists;
1002 994
995 local_bh_disable();
1003 if (tasklet_trylock(&execlists->tasklet)) { 996 if (tasklet_trylock(&execlists->tasklet)) {
1004 execlists->tasklet.func(execlists->tasklet.data); 997 execlists->tasklet.func(execlists->tasklet.data);
1005 tasklet_unlock(&execlists->tasklet); 998 tasklet_unlock(&execlists->tasklet);
1006 } 999 }
1000 local_bh_enable();
1007 1001
1008 if (READ_ONCE(execlists->active)) 1002 if (READ_ONCE(execlists->active))
1009 return false; 1003 return false;
@@ -1363,12 +1357,10 @@ static void intel_engine_print_registers(const struct intel_engine_cs *engine,
1363 ptr = I915_READ(RING_CONTEXT_STATUS_PTR(engine)); 1357 ptr = I915_READ(RING_CONTEXT_STATUS_PTR(engine));
1364 read = GEN8_CSB_READ_PTR(ptr); 1358 read = GEN8_CSB_READ_PTR(ptr);
1365 write = GEN8_CSB_WRITE_PTR(ptr); 1359 write = GEN8_CSB_WRITE_PTR(ptr);
1366 drm_printf(m, "\tExeclist CSB read %d [%d cached], write %d [%d from hws], interrupt posted? %s, tasklet queued? %s (%s)\n", 1360 drm_printf(m, "\tExeclist CSB read %d [%d cached], write %d [%d from hws], tasklet queued? %s (%s)\n",
1367 read, execlists->csb_head, 1361 read, execlists->csb_head,
1368 write, 1362 write,
1369 intel_read_status_page(engine, intel_hws_csb_write_index(engine->i915)), 1363 intel_read_status_page(engine, intel_hws_csb_write_index(engine->i915)),
1370 yesno(test_bit(ENGINE_IRQ_EXECLIST,
1371 &engine->irq_posted)),
1372 yesno(test_bit(TASKLET_STATE_SCHED, 1364 yesno(test_bit(TASKLET_STATE_SCHED,
1373 &engine->execlists.tasklet.state)), 1365 &engine->execlists.tasklet.state)),
1374 enableddisabled(!atomic_read(&engine->execlists.tasklet.count))); 1366 enableddisabled(!atomic_read(&engine->execlists.tasklet.count)));
@@ -1580,11 +1572,9 @@ void intel_engine_dump(struct intel_engine_cs *engine,
1580 spin_unlock(&b->rb_lock); 1572 spin_unlock(&b->rb_lock);
1581 local_irq_restore(flags); 1573 local_irq_restore(flags);
1582 1574
1583 drm_printf(m, "IRQ? 0x%lx (breadcrumbs? %s) (execlists? %s)\n", 1575 drm_printf(m, "IRQ? 0x%lx (breadcrumbs? %s)\n",
1584 engine->irq_posted, 1576 engine->irq_posted,
1585 yesno(test_bit(ENGINE_IRQ_BREADCRUMB, 1577 yesno(test_bit(ENGINE_IRQ_BREADCRUMB,
1586 &engine->irq_posted)),
1587 yesno(test_bit(ENGINE_IRQ_EXECLIST,
1588 &engine->irq_posted))); 1578 &engine->irq_posted)));
1589 1579
1590 drm_printf(m, "HWSP:\n"); 1580 drm_printf(m, "HWSP:\n");
@@ -1633,8 +1623,8 @@ int intel_enable_engine_stats(struct intel_engine_cs *engine)
1633 if (!intel_engine_supports_stats(engine)) 1623 if (!intel_engine_supports_stats(engine))
1634 return -ENODEV; 1624 return -ENODEV;
1635 1625
1636 tasklet_disable(&execlists->tasklet); 1626 spin_lock_irqsave(&engine->timeline.lock, flags);
1637 write_seqlock_irqsave(&engine->stats.lock, flags); 1627 write_seqlock(&engine->stats.lock);
1638 1628
1639 if (unlikely(engine->stats.enabled == ~0)) { 1629 if (unlikely(engine->stats.enabled == ~0)) {
1640 err = -EBUSY; 1630 err = -EBUSY;
@@ -1658,8 +1648,8 @@ int intel_enable_engine_stats(struct intel_engine_cs *engine)
1658 } 1648 }
1659 1649
1660unlock: 1650unlock:
1661 write_sequnlock_irqrestore(&engine->stats.lock, flags); 1651 write_sequnlock(&engine->stats.lock);
1662 tasklet_enable(&execlists->tasklet); 1652 spin_unlock_irqrestore(&engine->timeline.lock, flags);
1663 1653
1664 return err; 1654 return err;
1665} 1655}