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path: root/drivers/gpu/drm/i915/intel_device_info.c
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Diffstat (limited to 'drivers/gpu/drm/i915/intel_device_info.c')
-rw-r--r--drivers/gpu/drm/i915/intel_device_info.c14
1 files changed, 7 insertions, 7 deletions
diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
index bd5c4d62c635..8627b9a6bff4 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -748,7 +748,7 @@ void intel_device_info_runtime_init(struct intel_device_info *info)
748 if (INTEL_GEN(dev_priv) >= 10) { 748 if (INTEL_GEN(dev_priv) >= 10) {
749 for_each_pipe(dev_priv, pipe) 749 for_each_pipe(dev_priv, pipe)
750 info->num_scalers[pipe] = 2; 750 info->num_scalers[pipe] = 2;
751 } else if (IS_GEN9(dev_priv)) { 751 } else if (IS_GEN(dev_priv, 9)) {
752 info->num_scalers[PIPE_A] = 2; 752 info->num_scalers[PIPE_A] = 2;
753 info->num_scalers[PIPE_B] = 2; 753 info->num_scalers[PIPE_B] = 2;
754 info->num_scalers[PIPE_C] = 1; 754 info->num_scalers[PIPE_C] = 1;
@@ -756,10 +756,10 @@ void intel_device_info_runtime_init(struct intel_device_info *info)
756 756
757 BUILD_BUG_ON(I915_NUM_ENGINES > BITS_PER_TYPE(intel_ring_mask_t)); 757 BUILD_BUG_ON(I915_NUM_ENGINES > BITS_PER_TYPE(intel_ring_mask_t));
758 758
759 if (IS_GEN11(dev_priv)) 759 if (IS_GEN(dev_priv, 11))
760 for_each_pipe(dev_priv, pipe) 760 for_each_pipe(dev_priv, pipe)
761 info->num_sprites[pipe] = 6; 761 info->num_sprites[pipe] = 6;
762 else if (IS_GEN10(dev_priv) || IS_GEMINILAKE(dev_priv)) 762 else if (IS_GEN(dev_priv, 10) || IS_GEMINILAKE(dev_priv))
763 for_each_pipe(dev_priv, pipe) 763 for_each_pipe(dev_priv, pipe)
764 info->num_sprites[pipe] = 3; 764 info->num_sprites[pipe] = 3;
765 else if (IS_BROXTON(dev_priv)) { 765 else if (IS_BROXTON(dev_priv)) {
@@ -787,7 +787,7 @@ void intel_device_info_runtime_init(struct intel_device_info *info)
787 DRM_INFO("Display disabled (module parameter)\n"); 787 DRM_INFO("Display disabled (module parameter)\n");
788 info->num_pipes = 0; 788 info->num_pipes = 0;
789 } else if (HAS_DISPLAY(dev_priv) && 789 } else if (HAS_DISPLAY(dev_priv) &&
790 (IS_GEN7(dev_priv) || IS_GEN8(dev_priv)) && 790 (IS_GEN(dev_priv, 7) || IS_GEN(dev_priv, 8)) &&
791 HAS_PCH_SPLIT(dev_priv)) { 791 HAS_PCH_SPLIT(dev_priv)) {
792 u32 fuse_strap = I915_READ(FUSE_STRAP); 792 u32 fuse_strap = I915_READ(FUSE_STRAP);
793 u32 sfuse_strap = I915_READ(SFUSE_STRAP); 793 u32 sfuse_strap = I915_READ(SFUSE_STRAP);
@@ -851,14 +851,14 @@ void intel_device_info_runtime_init(struct intel_device_info *info)
851 cherryview_sseu_info_init(dev_priv); 851 cherryview_sseu_info_init(dev_priv);
852 else if (IS_BROADWELL(dev_priv)) 852 else if (IS_BROADWELL(dev_priv))
853 broadwell_sseu_info_init(dev_priv); 853 broadwell_sseu_info_init(dev_priv);
854 else if (IS_GEN9(dev_priv)) 854 else if (IS_GEN(dev_priv, 9))
855 gen9_sseu_info_init(dev_priv); 855 gen9_sseu_info_init(dev_priv);
856 else if (IS_GEN10(dev_priv)) 856 else if (IS_GEN(dev_priv, 10))
857 gen10_sseu_info_init(dev_priv); 857 gen10_sseu_info_init(dev_priv);
858 else if (INTEL_GEN(dev_priv) >= 11) 858 else if (INTEL_GEN(dev_priv) >= 11)
859 gen11_sseu_info_init(dev_priv); 859 gen11_sseu_info_init(dev_priv);
860 860
861 if (IS_GEN6(dev_priv) && intel_vtd_active()) { 861 if (IS_GEN(dev_priv, 6) && intel_vtd_active()) {
862 DRM_INFO("Disabling ppGTT for VT-d support\n"); 862 DRM_INFO("Disabling ppGTT for VT-d support\n");
863 info->ppgtt = INTEL_PPGTT_NONE; 863 info->ppgtt = INTEL_PPGTT_NONE;
864 } 864 }