12 files changed, 109 insertions, 106 deletions

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
index 502b94fb116a..b6e9df11115d 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
@@ -1012,13 +1012,9 @@ static int amdgpu_cs_ib_fill(struct amdgpu_device *adev,
                 if (r)
                         return r;
 
-                if (chunk_ib->flags & AMDGPU_IB_FLAG_PREAMBLE) {
-                        parser->job->preamble_status |= AMDGPU_PREAMBLE_IB_PRESENT;
-                        if (!parser->ctx->preamble_presented) {
-                                parser->job->preamble_status |= AMDGPU_PREAMBLE_IB_PRESENT_FIRST;
-                                parser->ctx->preamble_presented = true;
-                        }
-                }
+                if (chunk_ib->flags & AMDGPU_IB_FLAG_PREAMBLE)
+                        parser->job->preamble_status |=
+                                AMDGPU_PREAMBLE_IB_PRESENT;
 
                 if (parser->ring && parser->ring != ring)
                         return -EINVAL;
@@ -1207,26 +1203,24 @@ static int amdgpu_cs_submit(struct amdgpu_cs_parser *p,
 
         int r;
 
+        job = p->job;
+        p->job = NULL;
+
+        r = drm_sched_job_init(&job->base, entity, p->filp);
+        if (r)
+                goto error_unlock;
+
+        /* No memory allocation is allowed while holding the mn lock */
         amdgpu_mn_lock(p->mn);
         amdgpu_bo_list_for_each_userptr_entry(e, p->bo_list) {
                 struct amdgpu_bo *bo = e->robj;
 
                 if (amdgpu_ttm_tt_userptr_needs_pages(bo->tbo.ttm)) {
-                        amdgpu_mn_unlock(p->mn);
-                        return -ERESTARTSYS;
+                        r = -ERESTARTSYS;
+                        goto error_abort;
                 }
         }
 
-        job = p->job;
-        p->job = NULL;
-
-        r = drm_sched_job_init(&job->base, entity, p->filp);
-        if (r) {
-                amdgpu_job_free(job);
-                amdgpu_mn_unlock(p->mn);
-                return r;
-        }
-
         job->owner = p->filp;
         p->fence = dma_fence_get(&job->base.s_fence->finished);
 
@@ -1241,6 +1235,12 @@ static int amdgpu_cs_submit(struct amdgpu_cs_parser *p,
 
         amdgpu_cs_post_dependencies(p);
 
+        if ((job->preamble_status & AMDGPU_PREAMBLE_IB_PRESENT) &&
+            !p->ctx->preamble_presented) {
+                job->preamble_status |= AMDGPU_PREAMBLE_IB_PRESENT_FIRST;
+                p->ctx->preamble_presented = true;
+        }
+
         cs->out.handle = seq;
         job->uf_sequence = seq;
 
@@ -1258,6 +1258,15 @@ static int amdgpu_cs_submit(struct amdgpu_cs_parser *p,
         amdgpu_mn_unlock(p->mn);
 
         return 0;
+
+error_abort:
+        dma_fence_put(&job->base.s_fence->finished);
+        job->base.s_fence = NULL;
+
+error_unlock:
+        amdgpu_job_free(job);
+        amdgpu_mn_unlock(p->mn);
+        return r;
 }
 
 int amdgpu_cs_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
index 5518e623fed2..51b5e977ca88 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
@@ -164,8 +164,10 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
                 return r;
         }
 
+        need_ctx_switch = ring->current_ctx != fence_ctx;
         if (ring->funcs->emit_pipeline_sync && job &&
             ((tmp = amdgpu_sync_get_fence(&job->sched_sync, NULL)) ||
+             (amdgpu_sriov_vf(adev) && need_ctx_switch) ||
              amdgpu_vm_need_pipeline_sync(ring, job))) {
                 need_pipe_sync = true;
                 dma_fence_put(tmp);
@@ -196,7 +198,6 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
         }
 
         skip_preamble = ring->current_ctx == fence_ctx;
-        need_ctx_switch = ring->current_ctx != fence_ctx;
         if (job && ring->funcs->emit_cntxcntl) {
                 if (need_ctx_switch)
                         status |= AMDGPU_HAVE_CTX_SWITCH;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
index 8f98629fbe59..7b4e657a95c7 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
@@ -1932,14 +1932,6 @@ void amdgpu_pm_compute_clocks(struct amdgpu_device *adev)
                         amdgpu_fence_wait_empty(ring);
         }
 
-        mutex_lock(&adev->pm.mutex);
-        /* update battery/ac status */
-        if (power_supply_is_system_supplied() > 0)
-                adev->pm.ac_power = true;
-        else
-                adev->pm.ac_power = false;
-        mutex_unlock(&adev->pm.mutex);
-
         if (adev->powerplay.pp_funcs->dispatch_tasks) {
                 if (!amdgpu_device_has_dc_support(adev)) {
                         mutex_lock(&adev->pm.mutex);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index ece0ac703e27..b17771dd5ce7 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -172,6 +172,7 @@ static void amdgpu_vm_bo_base_init(struct amdgpu_vm_bo_base *base,
          * is validated on next vm use to avoid fault.
          * */
         list_move_tail(&base->vm_status, &vm->evicted);
+        base->moved = true;
 }
 
 /**
@@ -369,7 +370,6 @@ static int amdgpu_vm_clear_bo(struct amdgpu_device *adev,
         uint64_t addr;
         int r;
 
-        addr = amdgpu_bo_gpu_offset(bo);
         entries = amdgpu_bo_size(bo) / 8;
 
         if (pte_support_ats) {
@@ -401,6 +401,7 @@ static int amdgpu_vm_clear_bo(struct amdgpu_device *adev,
         if (r)
                 goto error;
 
+        addr = amdgpu_bo_gpu_offset(bo);
         if (ats_entries) {
                 uint64_t ats_value;
 
@@ -2483,28 +2484,52 @@ static uint32_t amdgpu_vm_get_block_size(uint64_t vm_size)
  * amdgpu_vm_adjust_size - adjust vm size, block size and fragment size
  *
  * @adev: amdgpu_device pointer
- * @vm_size: the default vm size if it's set auto
+ * @min_vm_size: the minimum vm size in GB if it's set auto
  * @fragment_size_default: Default PTE fragment size
  * @max_level: max VMPT level
  * @max_bits: max address space size in bits
  *
  */
-void amdgpu_vm_adjust_size(struct amdgpu_device *adev, uint32_t vm_size,
+void amdgpu_vm_adjust_size(struct amdgpu_device *adev, uint32_t min_vm_size,
                            uint32_t fragment_size_default, unsigned max_level,
                            unsigned max_bits)
 {
+        unsigned int max_size = 1 << (max_bits - 30);
+        unsigned int vm_size;
         uint64_t tmp;
 
         /* adjust vm size first */
         if (amdgpu_vm_size != -1) {
-                unsigned max_size = 1 << (max_bits - 30);
-
                 vm_size = amdgpu_vm_size;
                 if (vm_size > max_size) {
                         dev_warn(adev->dev, "VM size (%d) too large, max is %u GB\n",
                                  amdgpu_vm_size, max_size);
                         vm_size = max_size;
                 }
+        } else {
+                struct sysinfo si;
+                unsigned int phys_ram_gb;
+
+                /* Optimal VM size depends on the amount of physical
+                 * RAM available. Underlying requirements and
+                 * assumptions:
+                 *
+                 *  - Need to map system memory and VRAM from all GPUs
+                 *     - VRAM from other GPUs not known here
+                 *     - Assume VRAM <= system memory
+                 *  - On GFX8 and older, VM space can be segmented for
+                 *    different MTYPEs
+                 *  - Need to allow room for fragmentation, guard pages etc.
+                 *
+                 * This adds up to a rough guess of system memory x3.
+                 * Round up to power of two to maximize the available
+                 * VM size with the given page table size.
+                 */
+                si_meminfo(&si);
+                phys_ram_gb = ((uint64_t)si.totalram * si.mem_unit +
+                               (1 << 30) - 1) >> 30;
+                vm_size = roundup_pow_of_two(
+                        min(max(phys_ram_gb * 3, min_vm_size), max_size));
         }
 
         adev->vm_manager.max_pfn = (uint64_t)vm_size << 18;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
index 67a15d439ac0..9fa9df0c5e7f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
@@ -321,7 +321,7 @@ struct amdgpu_bo_va_mapping *amdgpu_vm_bo_lookup_mapping(struct amdgpu_vm *vm,
 void amdgpu_vm_bo_trace_cs(struct amdgpu_vm *vm, struct ww_acquire_ctx *ticket);
 void amdgpu_vm_bo_rmv(struct amdgpu_device *adev,
                       struct amdgpu_bo_va *bo_va);
-void amdgpu_vm_adjust_size(struct amdgpu_device *adev, uint32_t vm_size,
+void amdgpu_vm_adjust_size(struct amdgpu_device *adev, uint32_t min_vm_size,
                            uint32_t fragment_size_default, unsigned max_level,
                            unsigned max_bits);
 int amdgpu_vm_ioctl(struct drm_device *dev, void *data, struct drm_file *filp);
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index 5cd45210113f..5a9534a82d40 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
@@ -5664,6 +5664,11 @@ static int gfx_v8_0_set_powergating_state(void *handle,
         if (amdgpu_sriov_vf(adev))
                 return 0;
 
+        if (adev->pg_flags & (AMD_PG_SUPPORT_GFX_SMG |
+                                AMD_PG_SUPPORT_RLC_SMU_HS |
+                                AMD_PG_SUPPORT_CP |
+                                AMD_PG_SUPPORT_GFX_DMG))
+                adev->gfx.rlc.funcs->enter_safe_mode(adev);
         switch (adev->asic_type) {
         case CHIP_CARRIZO:
         case CHIP_STONEY:
@@ -5713,7 +5718,11 @@ static int gfx_v8_0_set_powergating_state(void *handle,
         default:
                 break;
         }
-
+        if (adev->pg_flags & (AMD_PG_SUPPORT_GFX_SMG |
+                                AMD_PG_SUPPORT_RLC_SMU_HS |
+                                AMD_PG_SUPPORT_CP |
+                                AMD_PG_SUPPORT_GFX_DMG))
+                adev->gfx.rlc.funcs->exit_safe_mode(adev);
         return 0;
 }
 
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
index 75317f283c69..ad151fefa41f 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
@@ -632,12 +632,6 @@ static void gmc_v6_0_gart_disable(struct amdgpu_device *adev)
         amdgpu_gart_table_vram_unpin(adev);
 }
 
-static void gmc_v6_0_gart_fini(struct amdgpu_device *adev)
-{
-        amdgpu_gart_table_vram_free(adev);
-        amdgpu_gart_fini(adev);
-}
-
 static void gmc_v6_0_vm_decode_fault(struct amdgpu_device *adev,
                                      u32 status, u32 addr, u32 mc_client)
 {
@@ -935,8 +929,9 @@ static int gmc_v6_0_sw_fini(void *handle)
 
         amdgpu_gem_force_release(adev);
         amdgpu_vm_manager_fini(adev);
-        gmc_v6_0_gart_fini(adev);
+        amdgpu_gart_table_vram_free(adev);
         amdgpu_bo_fini(adev);
+        amdgpu_gart_fini(adev);
         release_firmware(adev->gmc.fw);
         adev->gmc.fw = NULL;
 
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
index 36dc367c4b45..f8d8a3a73e42 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
@@ -747,19 +747,6 @@ static void gmc_v7_0_gart_disable(struct amdgpu_device *adev)
 }
 
 /**
- * gmc_v7_0_gart_fini - vm fini callback
- *
- * @adev: amdgpu_device pointer
- *
- * Tears down the driver GART/VM setup (CIK).
- */
-static void gmc_v7_0_gart_fini(struct amdgpu_device *adev)
-{
-        amdgpu_gart_table_vram_free(adev);
-        amdgpu_gart_fini(adev);
-}
-
-/**
  * gmc_v7_0_vm_decode_fault - print human readable fault info
  *
  * @adev: amdgpu_device pointer
@@ -1095,8 +1082,9 @@ static int gmc_v7_0_sw_fini(void *handle)
         amdgpu_gem_force_release(adev);
         amdgpu_vm_manager_fini(adev);
         kfree(adev->gmc.vm_fault_info);
-        gmc_v7_0_gart_fini(adev);
+        amdgpu_gart_table_vram_free(adev);
         amdgpu_bo_fini(adev);
+        amdgpu_gart_fini(adev);
         release_firmware(adev->gmc.fw);
         adev->gmc.fw = NULL;
 
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
index 70fc97b59b4f..9333109b210d 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
@@ -969,19 +969,6 @@ static void gmc_v8_0_gart_disable(struct amdgpu_device *adev)
 }
 
 /**
- * gmc_v8_0_gart_fini - vm fini callback
- *
- * @adev: amdgpu_device pointer
- *
- * Tears down the driver GART/VM setup (CIK).
- */
-static void gmc_v8_0_gart_fini(struct amdgpu_device *adev)
-{
-        amdgpu_gart_table_vram_free(adev);
-        amdgpu_gart_fini(adev);
-}
-
-/**
  * gmc_v8_0_vm_decode_fault - print human readable fault info
  *
  * @adev: amdgpu_device pointer
@@ -1199,8 +1186,9 @@ static int gmc_v8_0_sw_fini(void *handle)
         amdgpu_gem_force_release(adev);
         amdgpu_vm_manager_fini(adev);
         kfree(adev->gmc.vm_fault_info);
-        gmc_v8_0_gart_fini(adev);
+        amdgpu_gart_table_vram_free(adev);
         amdgpu_bo_fini(adev);
+        amdgpu_gart_fini(adev);
         release_firmware(adev->gmc.fw);
         adev->gmc.fw = NULL;
 
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index 399a5db27649..72f8018fa2a8 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -942,26 +942,12 @@ static int gmc_v9_0_sw_init(void *handle)
         return 0;
 }
 
-/**
- * gmc_v9_0_gart_fini - vm fini callback
- *
- * @adev: amdgpu_device pointer
- *
- * Tears down the driver GART/VM setup (CIK).
- */
-static void gmc_v9_0_gart_fini(struct amdgpu_device *adev)
-{
-        amdgpu_gart_table_vram_free(adev);
-        amdgpu_gart_fini(adev);
-}
-
 static int gmc_v9_0_sw_fini(void *handle)
 {
         struct amdgpu_device *adev = (struct amdgpu_device *)handle;
 
         amdgpu_gem_force_release(adev);
         amdgpu_vm_manager_fini(adev);
-        gmc_v9_0_gart_fini(adev);
 
         /*
         * TODO:
@@ -974,7 +960,9 @@ static int gmc_v9_0_sw_fini(void *handle)
         */
         amdgpu_bo_free_kernel(&adev->stolen_vga_memory, NULL, NULL);
 
+        amdgpu_gart_table_vram_free(adev);
         amdgpu_bo_fini(adev);
+        amdgpu_gart_fini(adev);
 
         return 0;
 }
diff --git a/drivers/gpu/drm/amd/amdgpu/kv_dpm.c b/drivers/gpu/drm/amd/amdgpu/kv_dpm.c
index 3f57f6463dc8..cb79a93c2eb7 100644
--- a/drivers/gpu/drm/amd/amdgpu/kv_dpm.c
+++ b/drivers/gpu/drm/amd/amdgpu/kv_dpm.c
@@ -65,8 +65,6 @@ static int kv_set_thermal_temperature_range(struct amdgpu_device *adev,
                                             int min_temp, int max_temp);
 static int kv_init_fps_limits(struct amdgpu_device *adev);
 
-static void kv_dpm_powergate_uvd(void *handle, bool gate);
-static void kv_dpm_powergate_vce(struct amdgpu_device *adev, bool gate);
 static void kv_dpm_powergate_samu(struct amdgpu_device *adev, bool gate);
 static void kv_dpm_powergate_acp(struct amdgpu_device *adev, bool gate);
 
@@ -1354,8 +1352,6 @@ static int kv_dpm_enable(struct amdgpu_device *adev)
                 return ret;
         }
 
-        kv_update_current_ps(adev, adev->pm.dpm.boot_ps);
-
         if (adev->irq.installed &&
             amdgpu_is_internal_thermal_sensor(adev->pm.int_thermal_type)) {
                 ret = kv_set_thermal_temperature_range(adev, KV_TEMP_RANGE_MIN, KV_TEMP_RANGE_MAX);
@@ -1374,6 +1370,8 @@ static int kv_dpm_enable(struct amdgpu_device *adev)
 
 static void kv_dpm_disable(struct amdgpu_device *adev)
 {
+        struct kv_power_info *pi = kv_get_pi(adev);
+
         amdgpu_irq_put(adev, &adev->pm.dpm.thermal.irq,
                        AMDGPU_THERMAL_IRQ_LOW_TO_HIGH);
         amdgpu_irq_put(adev, &adev->pm.dpm.thermal.irq,
@@ -1387,8 +1385,10 @@ static void kv_dpm_disable(struct amdgpu_device *adev)
         /* powerup blocks */
         kv_dpm_powergate_acp(adev, false);
         kv_dpm_powergate_samu(adev, false);
-        kv_dpm_powergate_vce(adev, false);
-        kv_dpm_powergate_uvd(adev, false);
+        if (pi->caps_vce_pg) /* power on the VCE block */
+                amdgpu_kv_notify_message_to_smu(adev, PPSMC_MSG_VCEPowerON);
+        if (pi->caps_uvd_pg) /* power on the UVD block */
+                amdgpu_kv_notify_message_to_smu(adev, PPSMC_MSG_UVDPowerON);
 
         kv_enable_smc_cac(adev, false);
         kv_enable_didt(adev, false);
@@ -1551,7 +1551,6 @@ static int kv_update_vce_dpm(struct amdgpu_device *adev,
         int ret;
 
         if (amdgpu_new_state->evclk > 0 && amdgpu_current_state->evclk == 0) {
-                kv_dpm_powergate_vce(adev, false);
                 if (pi->caps_stable_p_state)
                         pi->vce_boot_level = table->count - 1;
                 else
@@ -1573,7 +1572,6 @@ static int kv_update_vce_dpm(struct amdgpu_device *adev,
                 kv_enable_vce_dpm(adev, true);
         } else if (amdgpu_new_state->evclk == 0 && amdgpu_current_state->evclk > 0) {
                 kv_enable_vce_dpm(adev, false);
-                kv_dpm_powergate_vce(adev, true);
         }
 
         return 0;
@@ -1702,24 +1700,32 @@ static void kv_dpm_powergate_uvd(void *handle, bool gate)
         }
 }
 
-static void kv_dpm_powergate_vce(struct amdgpu_device *adev, bool gate)
+static void kv_dpm_powergate_vce(void *handle, bool gate)
 {
+        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
         struct kv_power_info *pi = kv_get_pi(adev);
-
-        if (pi->vce_power_gated == gate)
-                return;
+        int ret;
 
         pi->vce_power_gated = gate;
 
-        if (!pi->caps_vce_pg)
-                return;
-
-        if (gate)
-                amdgpu_kv_notify_message_to_smu(adev, PPSMC_MSG_VCEPowerOFF);
-        else
-                amdgpu_kv_notify_message_to_smu(adev, PPSMC_MSG_VCEPowerON);
+        if (gate) {
+                /* stop the VCE block */
+                ret = amdgpu_device_ip_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_VCE,
+                                                             AMD_PG_STATE_GATE);
+                kv_enable_vce_dpm(adev, false);
+                if (pi->caps_vce_pg) /* power off the VCE block */
+                        amdgpu_kv_notify_message_to_smu(adev, PPSMC_MSG_VCEPowerOFF);
+        } else {
+                if (pi->caps_vce_pg) /* power on the VCE block */
+                        amdgpu_kv_notify_message_to_smu(adev, PPSMC_MSG_VCEPowerON);
+                kv_enable_vce_dpm(adev, true);
+                /* re-init the VCE block */
+                ret = amdgpu_device_ip_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_VCE,
+                                                             AMD_PG_STATE_UNGATE);
+        }
 }
 
+
 static void kv_dpm_powergate_samu(struct amdgpu_device *adev, bool gate)
 {
         struct kv_power_info *pi = kv_get_pi(adev);
@@ -3061,7 +3067,7 @@ static int kv_dpm_hw_init(void *handle)
         else
                 adev->pm.dpm_enabled = true;
         mutex_unlock(&adev->pm.mutex);
-
+        amdgpu_pm_compute_clocks(adev);
         return ret;
 }
 
@@ -3313,6 +3319,9 @@ static int kv_set_powergating_by_smu(void *handle,
         case AMD_IP_BLOCK_TYPE_UVD:
                 kv_dpm_powergate_uvd(handle, gate);
                 break;
+        case AMD_IP_BLOCK_TYPE_VCE:
+                kv_dpm_powergate_vce(handle, gate);
+                break;
         default:
                 break;
         }
diff --git a/drivers/gpu/drm/amd/amdgpu/si_dpm.c b/drivers/gpu/drm/amd/amdgpu/si_dpm.c
index db327b412562..1de96995e690 100644
--- a/drivers/gpu/drm/amd/amdgpu/si_dpm.c
+++ b/drivers/gpu/drm/amd/amdgpu/si_dpm.c
@@ -6887,7 +6887,6 @@ static int si_dpm_enable(struct amdgpu_device *adev)
 
         si_enable_auto_throttle_source(adev, AMDGPU_DPM_AUTO_THROTTLE_SRC_THERMAL, true);
         si_thermal_start_thermal_controller(adev);
-        ni_update_current_ps(adev, boot_ps);
 
         return 0;
 }
@@ -7763,7 +7762,7 @@ static int si_dpm_hw_init(void *handle)
         else
                 adev->pm.dpm_enabled = true;
         mutex_unlock(&adev->pm.mutex);
-
+        amdgpu_pm_compute_clocks(adev);
         return ret;
 }