1 files changed, 29 insertions, 20 deletions

diff --git a/drivers/gpu/drm/amd/amdgpu/kv_dpm.c b/drivers/gpu/drm/amd/amdgpu/kv_dpm.c
index 3f57f6463dc8..cb79a93c2eb7 100644
--- a/drivers/gpu/drm/amd/amdgpu/kv_dpm.c
+++ b/drivers/gpu/drm/amd/amdgpu/kv_dpm.c
@@ -65,8 +65,6 @@ static int kv_set_thermal_temperature_range(struct amdgpu_device *adev,
                                             int min_temp, int max_temp);
 static int kv_init_fps_limits(struct amdgpu_device *adev);
 
-static void kv_dpm_powergate_uvd(void *handle, bool gate);
-static void kv_dpm_powergate_vce(struct amdgpu_device *adev, bool gate);
 static void kv_dpm_powergate_samu(struct amdgpu_device *adev, bool gate);
 static void kv_dpm_powergate_acp(struct amdgpu_device *adev, bool gate);
 
@@ -1354,8 +1352,6 @@ static int kv_dpm_enable(struct amdgpu_device *adev)
                 return ret;
         }
 
-        kv_update_current_ps(adev, adev->pm.dpm.boot_ps);
-
         if (adev->irq.installed &&
             amdgpu_is_internal_thermal_sensor(adev->pm.int_thermal_type)) {
                 ret = kv_set_thermal_temperature_range(adev, KV_TEMP_RANGE_MIN, KV_TEMP_RANGE_MAX);
@@ -1374,6 +1370,8 @@ static int kv_dpm_enable(struct amdgpu_device *adev)
 
 static void kv_dpm_disable(struct amdgpu_device *adev)
 {
+        struct kv_power_info *pi = kv_get_pi(adev);
+
         amdgpu_irq_put(adev, &adev->pm.dpm.thermal.irq,
                        AMDGPU_THERMAL_IRQ_LOW_TO_HIGH);
         amdgpu_irq_put(adev, &adev->pm.dpm.thermal.irq,
@@ -1387,8 +1385,10 @@ static void kv_dpm_disable(struct amdgpu_device *adev)
         /* powerup blocks */
         kv_dpm_powergate_acp(adev, false);
         kv_dpm_powergate_samu(adev, false);
-        kv_dpm_powergate_vce(adev, false);
-        kv_dpm_powergate_uvd(adev, false);
+        if (pi->caps_vce_pg) /* power on the VCE block */
+                amdgpu_kv_notify_message_to_smu(adev, PPSMC_MSG_VCEPowerON);
+        if (pi->caps_uvd_pg) /* power on the UVD block */
+                amdgpu_kv_notify_message_to_smu(adev, PPSMC_MSG_UVDPowerON);
 
         kv_enable_smc_cac(adev, false);
         kv_enable_didt(adev, false);
@@ -1551,7 +1551,6 @@ static int kv_update_vce_dpm(struct amdgpu_device *adev,
         int ret;
 
         if (amdgpu_new_state->evclk > 0 && amdgpu_current_state->evclk == 0) {
-                kv_dpm_powergate_vce(adev, false);
                 if (pi->caps_stable_p_state)
                         pi->vce_boot_level = table->count - 1;
                 else
@@ -1573,7 +1572,6 @@ static int kv_update_vce_dpm(struct amdgpu_device *adev,
                 kv_enable_vce_dpm(adev, true);
         } else if (amdgpu_new_state->evclk == 0 && amdgpu_current_state->evclk > 0) {
                 kv_enable_vce_dpm(adev, false);
-                kv_dpm_powergate_vce(adev, true);
         }
 
         return 0;
@@ -1702,24 +1700,32 @@ static void kv_dpm_powergate_uvd(void *handle, bool gate)
         }
 }
 
-static void kv_dpm_powergate_vce(struct amdgpu_device *adev, bool gate)
+static void kv_dpm_powergate_vce(void *handle, bool gate)
 {
+        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
         struct kv_power_info *pi = kv_get_pi(adev);
-
-        if (pi->vce_power_gated == gate)
-                return;
+        int ret;
 
         pi->vce_power_gated = gate;
 
-        if (!pi->caps_vce_pg)
-                return;
-
-        if (gate)
-                amdgpu_kv_notify_message_to_smu(adev, PPSMC_MSG_VCEPowerOFF);
-        else
-                amdgpu_kv_notify_message_to_smu(adev, PPSMC_MSG_VCEPowerON);
+        if (gate) {
+                /* stop the VCE block */
+                ret = amdgpu_device_ip_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_VCE,
+                                                             AMD_PG_STATE_GATE);
+                kv_enable_vce_dpm(adev, false);
+                if (pi->caps_vce_pg) /* power off the VCE block */
+                        amdgpu_kv_notify_message_to_smu(adev, PPSMC_MSG_VCEPowerOFF);
+        } else {
+                if (pi->caps_vce_pg) /* power on the VCE block */
+                        amdgpu_kv_notify_message_to_smu(adev, PPSMC_MSG_VCEPowerON);
+                kv_enable_vce_dpm(adev, true);
+                /* re-init the VCE block */
+                ret = amdgpu_device_ip_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_VCE,
+                                                             AMD_PG_STATE_UNGATE);
+        }
 }
 
+
 static void kv_dpm_powergate_samu(struct amdgpu_device *adev, bool gate)
 {
         struct kv_power_info *pi = kv_get_pi(adev);
@@ -3061,7 +3067,7 @@ static int kv_dpm_hw_init(void *handle)
         else
                 adev->pm.dpm_enabled = true;
         mutex_unlock(&adev->pm.mutex);
-
+        amdgpu_pm_compute_clocks(adev);
         return ret;
 }
 
@@ -3313,6 +3319,9 @@ static int kv_set_powergating_by_smu(void *handle,
         case AMD_IP_BLOCK_TYPE_UVD:
                 kv_dpm_powergate_uvd(handle, gate);
                 break;
+        case AMD_IP_BLOCK_TYPE_VCE:
+                kv_dpm_powergate_vce(handle, gate);
+                break;
         default:
                 break;
         }