1 files changed, 27 insertions, 0 deletions

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 14a9169446f5..2081649f49ca 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -2175,6 +2175,21 @@ static int amdgpu_device_ip_suspend_phase2(struct amdgpu_device *adev)
                         DRM_ERROR("suspend of IP block <%s> failed %d\n",
                                   adev->ip_blocks[i].version->funcs->name, r);
                 }
+                /* handle putting the SMC in the appropriate state */
+                if (adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_SMC) {
+                        if (is_support_sw_smu(adev)) {
+                                /* todo */
+                        } else if (adev->powerplay.pp_funcs &&
+                                   adev->powerplay.pp_funcs->set_mp1_state) {
+                                r = adev->powerplay.pp_funcs->set_mp1_state(
+                                        adev->powerplay.pp_handle,
+                                        adev->mp1_state);
+                                if (r) {
+                                        DRM_ERROR("SMC failed to set mp1 state %d, %d\n",
+                                                  adev->mp1_state, r);
+                                }
+                        }
+                }
         }
 
         return 0;
@@ -3640,6 +3655,17 @@ static bool amdgpu_device_lock_adev(struct amdgpu_device *adev, bool trylock)
 
         atomic_inc(&adev->gpu_reset_counter);
         adev->in_gpu_reset = 1;
+        switch (amdgpu_asic_reset_method(adev)) {
+        case AMD_RESET_METHOD_MODE1:
+                adev->mp1_state = PP_MP1_STATE_SHUTDOWN;
+                break;
+        case AMD_RESET_METHOD_MODE2:
+                adev->mp1_state = PP_MP1_STATE_RESET;
+                break;
+        default:
+                adev->mp1_state = PP_MP1_STATE_NONE;
+                break;
+        }
         /* Block kfd: SRIOV would do it separately */
         if (!amdgpu_sriov_vf(adev))
                 amdgpu_amdkfd_pre_reset(adev);
@@ -3653,6 +3679,7 @@ static void amdgpu_device_unlock_adev(struct amdgpu_device *adev)
         if (!amdgpu_sriov_vf(adev))
                 amdgpu_amdkfd_post_reset(adev);
         amdgpu_vf_error_trans_all(adev);
+        adev->mp1_state = PP_MP1_STATE_NONE;
         adev->in_gpu_reset = 0;
         mutex_unlock(&adev->lock_reset);
 }