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-rw-r--r--arch/arc/Kconfig1
-rw-r--r--arch/arc/Makefile2
-rw-r--r--arch/arc/boot/dts/axc001.dtsi20
-rw-r--r--arch/arc/boot/dts/axc003.dtsi21
-rw-r--r--arch/arc/boot/dts/axc003_idu.dtsi21
-rw-r--r--arch/arc/boot/dts/axs10x_mb.dtsi2
-rw-r--r--arch/arc/configs/haps_hs_defconfig1
-rw-r--r--arch/arc/configs/haps_hs_smp_defconfig1
-rw-r--r--arch/arc/configs/nps_defconfig1
-rw-r--r--arch/arc/configs/nsim_700_defconfig1
-rw-r--r--arch/arc/configs/nsim_hs_defconfig1
-rw-r--r--arch/arc/configs/nsim_hs_smp_defconfig1
-rw-r--r--arch/arc/configs/nsimosci_defconfig1
-rw-r--r--arch/arc/configs/nsimosci_hs_defconfig1
-rw-r--r--arch/arc/configs/nsimosci_hs_smp_defconfig1
-rw-r--r--arch/arc/configs/tb10x_defconfig1
-rw-r--r--arch/arc/include/asm/cache.h2
-rw-r--r--arch/arc/include/asm/mmu.h2
-rw-r--r--arch/arc/kernel/intc-arcv2.c3
-rw-r--r--arch/arc/kernel/intc-compact.c14
-rw-r--r--arch/arc/mm/cache.c50
-rw-r--r--arch/arc/mm/dma.c45
-rw-r--r--arch/arc/mm/tlb.c12
-rw-r--r--arch/arc/plat-sim/Kconfig13
-rw-r--r--arch/arc/plat-sim/platform.c5
-rw-r--r--arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi1
-rw-r--r--arch/arm/boot/dts/imx25.dtsi1
-rw-r--r--arch/arm/boot/dts/imx6qdl-nitrogen6_som2.dtsi4
-rw-r--r--arch/arm/boot/dts/imx7d-sdb.dts16
-rw-r--r--arch/arm/boot/dts/sama5d2.dtsi12
-rw-r--r--arch/arm/mach-at91/Kconfig2
-rw-r--r--arch/arm/mach-at91/pm.c12
-rw-r--r--arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts1
-rw-r--r--arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts1
-rw-r--r--arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts1
-rw-r--r--arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi3
-rw-r--r--arch/arm64/boot/dts/renesas/salvator-common.dtsi2
-rw-r--r--arch/arm64/include/asm/arch_timer.h4
-rw-r--r--arch/arm64/include/asm/elf.h4
-rw-r--r--arch/arm64/kernel/fpsimd.c2
-rw-r--r--arch/arm64/kernel/head.S1
-rw-r--r--arch/arm64/kernel/kaslr.c20
-rw-r--r--arch/arm64/mm/fault.c5
-rw-r--r--arch/mips/Kconfig2
-rw-r--r--arch/mips/Makefile15
-rw-r--r--arch/mips/boot/compressed/.gitignore2
-rw-r--r--arch/mips/cavium-octeon/octeon-usb.c2
-rw-r--r--arch/mips/dec/int-handler.S34
-rw-r--r--arch/mips/include/asm/cache.h2
-rw-r--r--arch/mips/include/asm/cpu-features.h3
-rw-r--r--arch/mips/include/asm/octeon/cvmx-l2c-defs.h37
-rw-r--r--arch/mips/include/asm/octeon/cvmx-l2d-defs.h60
-rw-r--r--arch/mips/include/asm/octeon/cvmx.h1
-rw-r--r--arch/mips/kernel/smp.c6
-rw-r--r--arch/mips/mm/uasm-mips.c2
-rw-r--r--arch/mips/pci/pci.c7
-rw-r--r--arch/mips/vdso/gettimeofday.c6
-rw-r--r--arch/powerpc/Kconfig2
-rw-r--r--arch/powerpc/configs/powernv_defconfig3
-rw-r--r--arch/powerpc/configs/ppc64_defconfig3
-rw-r--r--arch/powerpc/configs/pseries_defconfig3
-rw-r--r--arch/powerpc/kernel/entry_64.S60
-rw-r--r--arch/powerpc/kernel/process.c9
-rw-r--r--arch/powerpc/kernel/smp.c6
-rw-r--r--arch/powerpc/kernel/watchdog.c49
-rw-r--r--arch/powerpc/platforms/powernv/idle.c41
-rw-r--r--arch/sparc/include/asm/page_32.h2
-rw-r--r--arch/sparc/kernel/pci_sun4v.c2
-rw-r--r--arch/sparc/kernel/pcic.c2
-rw-r--r--arch/sparc/lib/multi3.S24
-rw-r--r--arch/x86/Kconfig3
-rw-r--r--arch/x86/crypto/sha1_avx2_x86_64_asm.S67
-rw-r--r--arch/x86/crypto/sha1_ssse3_glue.c2
-rw-r--r--arch/x86/entry/entry_64.S2
-rw-r--r--arch/x86/events/core.c16
-rw-r--r--arch/x86/events/intel/bts.c2
-rw-r--r--arch/x86/events/intel/p4.c2
-rw-r--r--arch/x86/events/intel/rapl.c2
-rw-r--r--arch/x86/events/intel/uncore.c2
-rw-r--r--arch/x86/events/intel/uncore_nhmex.c12
-rw-r--r--arch/x86/events/intel/uncore_snb.c6
-rw-r--r--arch/x86/events/intel/uncore_snbep.c42
-rw-r--r--arch/x86/include/asm/cpufeatures.h2
-rw-r--r--arch/x86/include/asm/elf.h4
-rw-r--r--arch/x86/include/asm/hypervisor.h10
-rw-r--r--arch/x86/kernel/cpu/aperfmperf.c3
-rw-r--r--arch/x86/kernel/cpu/mcheck/therm_throt.c2
-rw-r--r--arch/x86/kernel/cpu/microcode/core.c4
-rw-r--r--arch/x86/kernel/cpu/mtrr/main.c18
-rw-r--r--arch/x86/kernel/head64.c7
-rw-r--r--arch/x86/kernel/ksysfs.c4
-rw-r--r--arch/x86/kernel/smpboot.c30
-rw-r--r--arch/x86/kvm/svm.c2
-rw-r--r--arch/x86/mm/init.c3
-rw-r--r--arch/x86/mm/mmap.c7
-rw-r--r--arch/x86/platform/uv/tlb_uv.c4
-rw-r--r--arch/x86/xen/enlighten_hvm.c59
97 files changed, 654 insertions, 363 deletions
diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig
index a5459698f0ee..7db85ab00c52 100644
--- a/arch/arc/Kconfig
+++ b/arch/arc/Kconfig
@@ -96,7 +96,6 @@ menu "ARC Architecture Configuration"
96 96
97menu "ARC Platform/SoC/Board" 97menu "ARC Platform/SoC/Board"
98 98
99source "arch/arc/plat-sim/Kconfig"
100source "arch/arc/plat-tb10x/Kconfig" 99source "arch/arc/plat-tb10x/Kconfig"
101source "arch/arc/plat-axs10x/Kconfig" 100source "arch/arc/plat-axs10x/Kconfig"
102#New platform adds here 101#New platform adds here
diff --git a/arch/arc/Makefile b/arch/arc/Makefile
index 44ef35d33956..3a61cfcc38c0 100644
--- a/arch/arc/Makefile
+++ b/arch/arc/Makefile
@@ -107,7 +107,7 @@ core-y += arch/arc/
107# w/o this dtb won't embed into kernel binary 107# w/o this dtb won't embed into kernel binary
108core-y += arch/arc/boot/dts/ 108core-y += arch/arc/boot/dts/
109 109
110core-$(CONFIG_ARC_PLAT_SIM) += arch/arc/plat-sim/ 110core-y += arch/arc/plat-sim/
111core-$(CONFIG_ARC_PLAT_TB10X) += arch/arc/plat-tb10x/ 111core-$(CONFIG_ARC_PLAT_TB10X) += arch/arc/plat-tb10x/
112core-$(CONFIG_ARC_PLAT_AXS10X) += arch/arc/plat-axs10x/ 112core-$(CONFIG_ARC_PLAT_AXS10X) += arch/arc/plat-axs10x/
113core-$(CONFIG_ARC_PLAT_EZNPS) += arch/arc/plat-eznps/ 113core-$(CONFIG_ARC_PLAT_EZNPS) += arch/arc/plat-eznps/
diff --git a/arch/arc/boot/dts/axc001.dtsi b/arch/arc/boot/dts/axc001.dtsi
index 53ce226f77a5..a380ffa1a458 100644
--- a/arch/arc/boot/dts/axc001.dtsi
+++ b/arch/arc/boot/dts/axc001.dtsi
@@ -15,15 +15,15 @@
15 15
16/ { 16/ {
17 compatible = "snps,arc"; 17 compatible = "snps,arc";
18 #address-cells = <1>; 18 #address-cells = <2>;
19 #size-cells = <1>; 19 #size-cells = <2>;
20 20
21 cpu_card { 21 cpu_card {
22 compatible = "simple-bus"; 22 compatible = "simple-bus";
23 #address-cells = <1>; 23 #address-cells = <1>;
24 #size-cells = <1>; 24 #size-cells = <1>;
25 25
26 ranges = <0x00000000 0xf0000000 0x10000000>; 26 ranges = <0x00000000 0x0 0xf0000000 0x10000000>;
27 27
28 core_clk: core_clk { 28 core_clk: core_clk {
29 #clock-cells = <0>; 29 #clock-cells = <0>;
@@ -91,23 +91,21 @@
91 mb_intc: dw-apb-ictl@0xe0012000 { 91 mb_intc: dw-apb-ictl@0xe0012000 {
92 #interrupt-cells = <1>; 92 #interrupt-cells = <1>;
93 compatible = "snps,dw-apb-ictl"; 93 compatible = "snps,dw-apb-ictl";
94 reg = < 0xe0012000 0x200 >; 94 reg = < 0x0 0xe0012000 0x0 0x200 >;
95 interrupt-controller; 95 interrupt-controller;
96 interrupt-parent = <&core_intc>; 96 interrupt-parent = <&core_intc>;
97 interrupts = < 7 >; 97 interrupts = < 7 >;
98 }; 98 };
99 99
100 memory { 100 memory {
101 #address-cells = <1>;
102 #size-cells = <1>;
103 ranges = <0x00000000 0x80000000 0x20000000>;
104 device_type = "memory"; 101 device_type = "memory";
105 reg = <0x80000000 0x1b000000>; /* (512 - 32) MiB */ 102 /* CONFIG_KERNEL_RAM_BASE_ADDRESS needs to match low mem start */
103 reg = <0x0 0x80000000 0x0 0x1b000000>; /* (512 - 32) MiB */
106 }; 104 };
107 105
108 reserved-memory { 106 reserved-memory {
109 #address-cells = <1>; 107 #address-cells = <2>;
110 #size-cells = <1>; 108 #size-cells = <2>;
111 ranges; 109 ranges;
112 /* 110 /*
113 * We just move frame buffer area to the very end of 111 * We just move frame buffer area to the very end of
@@ -118,7 +116,7 @@
118 */ 116 */
119 frame_buffer: frame_buffer@9e000000 { 117 frame_buffer: frame_buffer@9e000000 {
120 compatible = "shared-dma-pool"; 118 compatible = "shared-dma-pool";
121 reg = <0x9e000000 0x2000000>; 119 reg = <0x0 0x9e000000 0x0 0x2000000>;
122 no-map; 120 no-map;
123 }; 121 };
124 }; 122 };
diff --git a/arch/arc/boot/dts/axc003.dtsi b/arch/arc/boot/dts/axc003.dtsi
index 14df46f141bf..cc9239ef8d08 100644
--- a/arch/arc/boot/dts/axc003.dtsi
+++ b/arch/arc/boot/dts/axc003.dtsi
@@ -14,15 +14,15 @@
14 14
15/ { 15/ {
16 compatible = "snps,arc"; 16 compatible = "snps,arc";
17 #address-cells = <1>; 17 #address-cells = <2>;
18 #size-cells = <1>; 18 #size-cells = <2>;
19 19
20 cpu_card { 20 cpu_card {
21 compatible = "simple-bus"; 21 compatible = "simple-bus";
22 #address-cells = <1>; 22 #address-cells = <1>;
23 #size-cells = <1>; 23 #size-cells = <1>;
24 24
25 ranges = <0x00000000 0xf0000000 0x10000000>; 25 ranges = <0x00000000 0x0 0xf0000000 0x10000000>;
26 26
27 core_clk: core_clk { 27 core_clk: core_clk {
28 #clock-cells = <0>; 28 #clock-cells = <0>;
@@ -94,30 +94,29 @@
94 mb_intc: dw-apb-ictl@0xe0012000 { 94 mb_intc: dw-apb-ictl@0xe0012000 {
95 #interrupt-cells = <1>; 95 #interrupt-cells = <1>;
96 compatible = "snps,dw-apb-ictl"; 96 compatible = "snps,dw-apb-ictl";
97 reg = < 0xe0012000 0x200 >; 97 reg = < 0x0 0xe0012000 0x0 0x200 >;
98 interrupt-controller; 98 interrupt-controller;
99 interrupt-parent = <&core_intc>; 99 interrupt-parent = <&core_intc>;
100 interrupts = < 24 >; 100 interrupts = < 24 >;
101 }; 101 };
102 102
103 memory { 103 memory {
104 #address-cells = <1>;
105 #size-cells = <1>;
106 ranges = <0x00000000 0x80000000 0x40000000>;
107 device_type = "memory"; 104 device_type = "memory";
108 reg = <0x80000000 0x20000000>; /* 512MiB */ 105 /* CONFIG_KERNEL_RAM_BASE_ADDRESS needs to match low mem start */
106 reg = <0x0 0x80000000 0x0 0x20000000 /* 512 MiB low mem */
107 0x1 0xc0000000 0x0 0x40000000>; /* 1 GiB highmem */
109 }; 108 };
110 109
111 reserved-memory { 110 reserved-memory {
112 #address-cells = <1>; 111 #address-cells = <2>;
113 #size-cells = <1>; 112 #size-cells = <2>;
114 ranges; 113 ranges;
115 /* 114 /*
116 * Move frame buffer out of IOC aperture (0x8z-0xAz). 115 * Move frame buffer out of IOC aperture (0x8z-0xAz).
117 */ 116 */
118 frame_buffer: frame_buffer@be000000 { 117 frame_buffer: frame_buffer@be000000 {
119 compatible = "shared-dma-pool"; 118 compatible = "shared-dma-pool";
120 reg = <0xbe000000 0x2000000>; 119 reg = <0x0 0xbe000000 0x0 0x2000000>;
121 no-map; 120 no-map;
122 }; 121 };
123 }; 122 };
diff --git a/arch/arc/boot/dts/axc003_idu.dtsi b/arch/arc/boot/dts/axc003_idu.dtsi
index 695f9fa1996b..4ebb2170abec 100644
--- a/arch/arc/boot/dts/axc003_idu.dtsi
+++ b/arch/arc/boot/dts/axc003_idu.dtsi
@@ -14,15 +14,15 @@
14 14
15/ { 15/ {
16 compatible = "snps,arc"; 16 compatible = "snps,arc";
17 #address-cells = <1>; 17 #address-cells = <2>;
18 #size-cells = <1>; 18 #size-cells = <2>;
19 19
20 cpu_card { 20 cpu_card {
21 compatible = "simple-bus"; 21 compatible = "simple-bus";
22 #address-cells = <1>; 22 #address-cells = <1>;
23 #size-cells = <1>; 23 #size-cells = <1>;
24 24
25 ranges = <0x00000000 0xf0000000 0x10000000>; 25 ranges = <0x00000000 0x0 0xf0000000 0x10000000>;
26 26
27 core_clk: core_clk { 27 core_clk: core_clk {
28 #clock-cells = <0>; 28 #clock-cells = <0>;
@@ -100,30 +100,29 @@
100 mb_intc: dw-apb-ictl@0xe0012000 { 100 mb_intc: dw-apb-ictl@0xe0012000 {
101 #interrupt-cells = <1>; 101 #interrupt-cells = <1>;
102 compatible = "snps,dw-apb-ictl"; 102 compatible = "snps,dw-apb-ictl";
103 reg = < 0xe0012000 0x200 >; 103 reg = < 0x0 0xe0012000 0x0 0x200 >;
104 interrupt-controller; 104 interrupt-controller;
105 interrupt-parent = <&idu_intc>; 105 interrupt-parent = <&idu_intc>;
106 interrupts = <0>; 106 interrupts = <0>;
107 }; 107 };
108 108
109 memory { 109 memory {
110 #address-cells = <1>;
111 #size-cells = <1>;
112 ranges = <0x00000000 0x80000000 0x40000000>;
113 device_type = "memory"; 110 device_type = "memory";
114 reg = <0x80000000 0x20000000>; /* 512MiB */ 111 /* CONFIG_KERNEL_RAM_BASE_ADDRESS needs to match low mem start */
112 reg = <0x0 0x80000000 0x0 0x20000000 /* 512 MiB low mem */
113 0x1 0xc0000000 0x0 0x40000000>; /* 1 GiB highmem */
115 }; 114 };
116 115
117 reserved-memory { 116 reserved-memory {
118 #address-cells = <1>; 117 #address-cells = <2>;
119 #size-cells = <1>; 118 #size-cells = <2>;
120 ranges; 119 ranges;
121 /* 120 /*
122 * Move frame buffer out of IOC aperture (0x8z-0xAz). 121 * Move frame buffer out of IOC aperture (0x8z-0xAz).
123 */ 122 */
124 frame_buffer: frame_buffer@be000000 { 123 frame_buffer: frame_buffer@be000000 {
125 compatible = "shared-dma-pool"; 124 compatible = "shared-dma-pool";
126 reg = <0xbe000000 0x2000000>; 125 reg = <0x0 0xbe000000 0x0 0x2000000>;
127 no-map; 126 no-map;
128 }; 127 };
129 }; 128 };
diff --git a/arch/arc/boot/dts/axs10x_mb.dtsi b/arch/arc/boot/dts/axs10x_mb.dtsi
index 41cfb29b62c1..0ff7e07edcd4 100644
--- a/arch/arc/boot/dts/axs10x_mb.dtsi
+++ b/arch/arc/boot/dts/axs10x_mb.dtsi
@@ -13,7 +13,7 @@
13 compatible = "simple-bus"; 13 compatible = "simple-bus";
14 #address-cells = <1>; 14 #address-cells = <1>;
15 #size-cells = <1>; 15 #size-cells = <1>;
16 ranges = <0x00000000 0xe0000000 0x10000000>; 16 ranges = <0x00000000 0x0 0xe0000000 0x10000000>;
17 interrupt-parent = <&mb_intc>; 17 interrupt-parent = <&mb_intc>;
18 18
19 i2sclk: i2sclk@100a0 { 19 i2sclk: i2sclk@100a0 {
diff --git a/arch/arc/configs/haps_hs_defconfig b/arch/arc/configs/haps_hs_defconfig
index 57b3e599322f..db04ea4dd2d9 100644
--- a/arch/arc/configs/haps_hs_defconfig
+++ b/arch/arc/configs/haps_hs_defconfig
@@ -21,7 +21,6 @@ CONFIG_MODULES=y
21# CONFIG_BLK_DEV_BSG is not set 21# CONFIG_BLK_DEV_BSG is not set
22# CONFIG_IOSCHED_DEADLINE is not set 22# CONFIG_IOSCHED_DEADLINE is not set
23# CONFIG_IOSCHED_CFQ is not set 23# CONFIG_IOSCHED_CFQ is not set
24CONFIG_ARC_PLAT_SIM=y
25CONFIG_ISA_ARCV2=y 24CONFIG_ISA_ARCV2=y
26CONFIG_ARC_BUILTIN_DTB_NAME="haps_hs" 25CONFIG_ARC_BUILTIN_DTB_NAME="haps_hs"
27CONFIG_PREEMPT=y 26CONFIG_PREEMPT=y
diff --git a/arch/arc/configs/haps_hs_smp_defconfig b/arch/arc/configs/haps_hs_smp_defconfig
index f85985adebb2..821a2e562f3f 100644
--- a/arch/arc/configs/haps_hs_smp_defconfig
+++ b/arch/arc/configs/haps_hs_smp_defconfig
@@ -23,7 +23,6 @@ CONFIG_MODULES=y
23# CONFIG_BLK_DEV_BSG is not set 23# CONFIG_BLK_DEV_BSG is not set
24# CONFIG_IOSCHED_DEADLINE is not set 24# CONFIG_IOSCHED_DEADLINE is not set
25# CONFIG_IOSCHED_CFQ is not set 25# CONFIG_IOSCHED_CFQ is not set
26CONFIG_ARC_PLAT_SIM=y
27CONFIG_ISA_ARCV2=y 26CONFIG_ISA_ARCV2=y
28CONFIG_SMP=y 27CONFIG_SMP=y
29CONFIG_ARC_BUILTIN_DTB_NAME="haps_hs_idu" 28CONFIG_ARC_BUILTIN_DTB_NAME="haps_hs_idu"
diff --git a/arch/arc/configs/nps_defconfig b/arch/arc/configs/nps_defconfig
index ede625c76216..7c9c706ae7f6 100644
--- a/arch/arc/configs/nps_defconfig
+++ b/arch/arc/configs/nps_defconfig
@@ -39,7 +39,6 @@ CONFIG_IP_PNP=y
39# CONFIG_INET_XFRM_MODE_TRANSPORT is not set 39# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
40# CONFIG_INET_XFRM_MODE_TUNNEL is not set 40# CONFIG_INET_XFRM_MODE_TUNNEL is not set
41# CONFIG_INET_XFRM_MODE_BEET is not set 41# CONFIG_INET_XFRM_MODE_BEET is not set
42# CONFIG_INET_LRO is not set
43# CONFIG_INET_DIAG is not set 42# CONFIG_INET_DIAG is not set
44# CONFIG_IPV6 is not set 43# CONFIG_IPV6 is not set
45# CONFIG_WIRELESS is not set 44# CONFIG_WIRELESS is not set
diff --git a/arch/arc/configs/nsim_700_defconfig b/arch/arc/configs/nsim_700_defconfig
index b0066a749d4c..6dff83a238b8 100644
--- a/arch/arc/configs/nsim_700_defconfig
+++ b/arch/arc/configs/nsim_700_defconfig
@@ -23,7 +23,6 @@ CONFIG_MODULES=y
23# CONFIG_BLK_DEV_BSG is not set 23# CONFIG_BLK_DEV_BSG is not set
24# CONFIG_IOSCHED_DEADLINE is not set 24# CONFIG_IOSCHED_DEADLINE is not set
25# CONFIG_IOSCHED_CFQ is not set 25# CONFIG_IOSCHED_CFQ is not set
26CONFIG_ARC_PLAT_SIM=y
27CONFIG_ARC_BUILTIN_DTB_NAME="nsim_700" 26CONFIG_ARC_BUILTIN_DTB_NAME="nsim_700"
28CONFIG_PREEMPT=y 27CONFIG_PREEMPT=y
29# CONFIG_COMPACTION is not set 28# CONFIG_COMPACTION is not set
diff --git a/arch/arc/configs/nsim_hs_defconfig b/arch/arc/configs/nsim_hs_defconfig
index ebe9ebb92933..31ee51b987e7 100644
--- a/arch/arc/configs/nsim_hs_defconfig
+++ b/arch/arc/configs/nsim_hs_defconfig
@@ -26,7 +26,6 @@ CONFIG_MODULE_FORCE_UNLOAD=y
26# CONFIG_BLK_DEV_BSG is not set 26# CONFIG_BLK_DEV_BSG is not set
27# CONFIG_IOSCHED_DEADLINE is not set 27# CONFIG_IOSCHED_DEADLINE is not set
28# CONFIG_IOSCHED_CFQ is not set 28# CONFIG_IOSCHED_CFQ is not set
29CONFIG_ARC_PLAT_SIM=y
30CONFIG_ISA_ARCV2=y 29CONFIG_ISA_ARCV2=y
31CONFIG_ARC_BUILTIN_DTB_NAME="nsim_hs" 30CONFIG_ARC_BUILTIN_DTB_NAME="nsim_hs"
32CONFIG_PREEMPT=y 31CONFIG_PREEMPT=y
diff --git a/arch/arc/configs/nsim_hs_smp_defconfig b/arch/arc/configs/nsim_hs_smp_defconfig
index 4bde43278be6..8d3b1f67cae4 100644
--- a/arch/arc/configs/nsim_hs_smp_defconfig
+++ b/arch/arc/configs/nsim_hs_smp_defconfig
@@ -24,7 +24,6 @@ CONFIG_MODULE_FORCE_UNLOAD=y
24# CONFIG_BLK_DEV_BSG is not set 24# CONFIG_BLK_DEV_BSG is not set
25# CONFIG_IOSCHED_DEADLINE is not set 25# CONFIG_IOSCHED_DEADLINE is not set
26# CONFIG_IOSCHED_CFQ is not set 26# CONFIG_IOSCHED_CFQ is not set
27CONFIG_ARC_PLAT_SIM=y
28CONFIG_ISA_ARCV2=y 27CONFIG_ISA_ARCV2=y
29CONFIG_SMP=y 28CONFIG_SMP=y
30CONFIG_ARC_BUILTIN_DTB_NAME="nsim_hs_idu" 29CONFIG_ARC_BUILTIN_DTB_NAME="nsim_hs_idu"
diff --git a/arch/arc/configs/nsimosci_defconfig b/arch/arc/configs/nsimosci_defconfig
index f6fb3d26557e..6168ce2ac2ef 100644
--- a/arch/arc/configs/nsimosci_defconfig
+++ b/arch/arc/configs/nsimosci_defconfig
@@ -23,7 +23,6 @@ CONFIG_MODULES=y
23# CONFIG_BLK_DEV_BSG is not set 23# CONFIG_BLK_DEV_BSG is not set
24# CONFIG_IOSCHED_DEADLINE is not set 24# CONFIG_IOSCHED_DEADLINE is not set
25# CONFIG_IOSCHED_CFQ is not set 25# CONFIG_IOSCHED_CFQ is not set
26CONFIG_ARC_PLAT_SIM=y
27CONFIG_ARC_BUILTIN_DTB_NAME="nsimosci" 26CONFIG_ARC_BUILTIN_DTB_NAME="nsimosci"
28# CONFIG_COMPACTION is not set 27# CONFIG_COMPACTION is not set
29CONFIG_NET=y 28CONFIG_NET=y
diff --git a/arch/arc/configs/nsimosci_hs_defconfig b/arch/arc/configs/nsimosci_hs_defconfig
index b9f0fe00044b..a70bdeb2b3fd 100644
--- a/arch/arc/configs/nsimosci_hs_defconfig
+++ b/arch/arc/configs/nsimosci_hs_defconfig
@@ -23,7 +23,6 @@ CONFIG_MODULES=y
23# CONFIG_BLK_DEV_BSG is not set 23# CONFIG_BLK_DEV_BSG is not set
24# CONFIG_IOSCHED_DEADLINE is not set 24# CONFIG_IOSCHED_DEADLINE is not set
25# CONFIG_IOSCHED_CFQ is not set 25# CONFIG_IOSCHED_CFQ is not set
26CONFIG_ARC_PLAT_SIM=y
27CONFIG_ISA_ARCV2=y 26CONFIG_ISA_ARCV2=y
28CONFIG_ARC_BUILTIN_DTB_NAME="nsimosci_hs" 27CONFIG_ARC_BUILTIN_DTB_NAME="nsimosci_hs"
29# CONFIG_COMPACTION is not set 28# CONFIG_COMPACTION is not set
diff --git a/arch/arc/configs/nsimosci_hs_smp_defconfig b/arch/arc/configs/nsimosci_hs_smp_defconfig
index 155add7761ed..ef96406c446e 100644
--- a/arch/arc/configs/nsimosci_hs_smp_defconfig
+++ b/arch/arc/configs/nsimosci_hs_smp_defconfig
@@ -18,7 +18,6 @@ CONFIG_MODULES=y
18# CONFIG_BLK_DEV_BSG is not set 18# CONFIG_BLK_DEV_BSG is not set
19# CONFIG_IOSCHED_DEADLINE is not set 19# CONFIG_IOSCHED_DEADLINE is not set
20# CONFIG_IOSCHED_CFQ is not set 20# CONFIG_IOSCHED_CFQ is not set
21CONFIG_ARC_PLAT_SIM=y
22CONFIG_ISA_ARCV2=y 21CONFIG_ISA_ARCV2=y
23CONFIG_SMP=y 22CONFIG_SMP=y
24# CONFIG_ARC_TIMERS_64BIT is not set 23# CONFIG_ARC_TIMERS_64BIT is not set
diff --git a/arch/arc/configs/tb10x_defconfig b/arch/arc/configs/tb10x_defconfig
index 4c5118384eb5..f30182549395 100644
--- a/arch/arc/configs/tb10x_defconfig
+++ b/arch/arc/configs/tb10x_defconfig
@@ -38,7 +38,6 @@ CONFIG_IP_MULTICAST=y
38# CONFIG_INET_XFRM_MODE_TRANSPORT is not set 38# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
39# CONFIG_INET_XFRM_MODE_TUNNEL is not set 39# CONFIG_INET_XFRM_MODE_TUNNEL is not set
40# CONFIG_INET_XFRM_MODE_BEET is not set 40# CONFIG_INET_XFRM_MODE_BEET is not set
41# CONFIG_INET_LRO is not set
42# CONFIG_INET_DIAG is not set 41# CONFIG_INET_DIAG is not set
43# CONFIG_IPV6 is not set 42# CONFIG_IPV6 is not set
44# CONFIG_WIRELESS is not set 43# CONFIG_WIRELESS is not set
diff --git a/arch/arc/include/asm/cache.h b/arch/arc/include/asm/cache.h
index 19ebddffb279..02fd1cece6ef 100644
--- a/arch/arc/include/asm/cache.h
+++ b/arch/arc/include/asm/cache.h
@@ -96,7 +96,9 @@ extern unsigned long perip_base, perip_end;
96#define ARC_REG_SLC_FLUSH 0x904 96#define ARC_REG_SLC_FLUSH 0x904
97#define ARC_REG_SLC_INVALIDATE 0x905 97#define ARC_REG_SLC_INVALIDATE 0x905
98#define ARC_REG_SLC_RGN_START 0x914 98#define ARC_REG_SLC_RGN_START 0x914
99#define ARC_REG_SLC_RGN_START1 0x915
99#define ARC_REG_SLC_RGN_END 0x916 100#define ARC_REG_SLC_RGN_END 0x916
101#define ARC_REG_SLC_RGN_END1 0x917
100 102
101/* Bit val in SLC_CONTROL */ 103/* Bit val in SLC_CONTROL */
102#define SLC_CTRL_DIS 0x001 104#define SLC_CTRL_DIS 0x001
diff --git a/arch/arc/include/asm/mmu.h b/arch/arc/include/asm/mmu.h
index db7319e9b506..efb79fafff1d 100644
--- a/arch/arc/include/asm/mmu.h
+++ b/arch/arc/include/asm/mmu.h
@@ -94,6 +94,8 @@ static inline int is_pae40_enabled(void)
94 return IS_ENABLED(CONFIG_ARC_HAS_PAE40); 94 return IS_ENABLED(CONFIG_ARC_HAS_PAE40);
95} 95}
96 96
97extern int pae40_exist_but_not_enab(void);
98
97#endif /* !__ASSEMBLY__ */ 99#endif /* !__ASSEMBLY__ */
98 100
99#endif 101#endif
diff --git a/arch/arc/kernel/intc-arcv2.c b/arch/arc/kernel/intc-arcv2.c
index f928795fd07a..cf90714a676d 100644
--- a/arch/arc/kernel/intc-arcv2.c
+++ b/arch/arc/kernel/intc-arcv2.c
@@ -75,10 +75,13 @@ void arc_init_IRQ(void)
75 * Set a default priority for all available interrupts to prevent 75 * Set a default priority for all available interrupts to prevent
76 * switching of register banks if Fast IRQ and multiple register banks 76 * switching of register banks if Fast IRQ and multiple register banks
77 * are supported by CPU. 77 * are supported by CPU.
78 * Also disable all IRQ lines so faulty external hardware won't
79 * trigger interrupt that kernel is not ready to handle.
78 */ 80 */
79 for (i = NR_EXCEPTIONS; i < irq_bcr.irqs + NR_EXCEPTIONS; i++) { 81 for (i = NR_EXCEPTIONS; i < irq_bcr.irqs + NR_EXCEPTIONS; i++) {
80 write_aux_reg(AUX_IRQ_SELECT, i); 82 write_aux_reg(AUX_IRQ_SELECT, i);
81 write_aux_reg(AUX_IRQ_PRIORITY, ARCV2_IRQ_DEF_PRIO); 83 write_aux_reg(AUX_IRQ_PRIORITY, ARCV2_IRQ_DEF_PRIO);
84 write_aux_reg(AUX_IRQ_ENABLE, 0);
82 } 85 }
83 86
84 /* setup status32, don't enable intr yet as kernel doesn't want */ 87 /* setup status32, don't enable intr yet as kernel doesn't want */
diff --git a/arch/arc/kernel/intc-compact.c b/arch/arc/kernel/intc-compact.c
index 7e608c6b0a01..cef388025adf 100644
--- a/arch/arc/kernel/intc-compact.c
+++ b/arch/arc/kernel/intc-compact.c
@@ -27,7 +27,7 @@
27 */ 27 */
28void arc_init_IRQ(void) 28void arc_init_IRQ(void)
29{ 29{
30 int level_mask = 0; 30 int level_mask = 0, i;
31 31
32 /* Is timer high priority Interrupt (Level2 in ARCompact jargon) */ 32 /* Is timer high priority Interrupt (Level2 in ARCompact jargon) */
33 level_mask |= IS_ENABLED(CONFIG_ARC_COMPACT_IRQ_LEVELS) << TIMER0_IRQ; 33 level_mask |= IS_ENABLED(CONFIG_ARC_COMPACT_IRQ_LEVELS) << TIMER0_IRQ;
@@ -40,6 +40,18 @@ void arc_init_IRQ(void)
40 40
41 if (level_mask) 41 if (level_mask)
42 pr_info("Level-2 interrupts bitset %x\n", level_mask); 42 pr_info("Level-2 interrupts bitset %x\n", level_mask);
43
44 /*
45 * Disable all IRQ lines so faulty external hardware won't
46 * trigger interrupt that kernel is not ready to handle.
47 */
48 for (i = TIMER0_IRQ; i < NR_CPU_IRQS; i++) {
49 unsigned int ienb;
50
51 ienb = read_aux_reg(AUX_IENABLE);
52 ienb &= ~(1 << i);
53 write_aux_reg(AUX_IENABLE, ienb);
54 }
43} 55}
44 56
45/* 57/*
diff --git a/arch/arc/mm/cache.c b/arch/arc/mm/cache.c
index a867575a758b..7db283b46ebd 100644
--- a/arch/arc/mm/cache.c
+++ b/arch/arc/mm/cache.c
@@ -665,6 +665,7 @@ noinline void slc_op(phys_addr_t paddr, unsigned long sz, const int op)
665 static DEFINE_SPINLOCK(lock); 665 static DEFINE_SPINLOCK(lock);
666 unsigned long flags; 666 unsigned long flags;
667 unsigned int ctrl; 667 unsigned int ctrl;
668 phys_addr_t end;
668 669
669 spin_lock_irqsave(&lock, flags); 670 spin_lock_irqsave(&lock, flags);
670 671
@@ -694,8 +695,19 @@ noinline void slc_op(phys_addr_t paddr, unsigned long sz, const int op)
694 * END needs to be setup before START (latter triggers the operation) 695 * END needs to be setup before START (latter triggers the operation)
695 * END can't be same as START, so add (l2_line_sz - 1) to sz 696 * END can't be same as START, so add (l2_line_sz - 1) to sz
696 */ 697 */
697 write_aux_reg(ARC_REG_SLC_RGN_END, (paddr + sz + l2_line_sz - 1)); 698 end = paddr + sz + l2_line_sz - 1;
698 write_aux_reg(ARC_REG_SLC_RGN_START, paddr); 699 if (is_pae40_enabled())
700 write_aux_reg(ARC_REG_SLC_RGN_END1, upper_32_bits(end));
701
702 write_aux_reg(ARC_REG_SLC_RGN_END, lower_32_bits(end));
703
704 if (is_pae40_enabled())
705 write_aux_reg(ARC_REG_SLC_RGN_START1, upper_32_bits(paddr));
706
707 write_aux_reg(ARC_REG_SLC_RGN_START, lower_32_bits(paddr));
708
709 /* Make sure "busy" bit reports correct stataus, see STAR 9001165532 */
710 read_aux_reg(ARC_REG_SLC_CTRL);
699 711
700 while (read_aux_reg(ARC_REG_SLC_CTRL) & SLC_CTRL_BUSY); 712 while (read_aux_reg(ARC_REG_SLC_CTRL) & SLC_CTRL_BUSY);
701 713
@@ -1111,6 +1123,13 @@ noinline void __init arc_ioc_setup(void)
1111 __dc_enable(); 1123 __dc_enable();
1112} 1124}
1113 1125
1126/*
1127 * Cache related boot time checks/setups only needed on master CPU:
1128 * - Geometry checks (kernel build and hardware agree: e.g. L1_CACHE_BYTES)
1129 * Assume SMP only, so all cores will have same cache config. A check on
1130 * one core suffices for all
1131 * - IOC setup / dma callbacks only need to be done once
1132 */
1114void __init arc_cache_init_master(void) 1133void __init arc_cache_init_master(void)
1115{ 1134{
1116 unsigned int __maybe_unused cpu = smp_processor_id(); 1135 unsigned int __maybe_unused cpu = smp_processor_id();
@@ -1190,12 +1209,27 @@ void __ref arc_cache_init(void)
1190 1209
1191 printk(arc_cache_mumbojumbo(0, str, sizeof(str))); 1210 printk(arc_cache_mumbojumbo(0, str, sizeof(str)));
1192 1211
1193 /*
1194 * Only master CPU needs to execute rest of function:
1195 * - Assume SMP so all cores will have same cache config so
1196 * any geomtry checks will be same for all
1197 * - IOC setup / dma callbacks only need to be setup once
1198 */
1199 if (!cpu) 1212 if (!cpu)
1200 arc_cache_init_master(); 1213 arc_cache_init_master();
1214
1215 /*
1216 * In PAE regime, TLB and cache maintenance ops take wider addresses
1217 * And even if PAE is not enabled in kernel, the upper 32-bits still need
1218 * to be zeroed to keep the ops sane.
1219 * As an optimization for more common !PAE enabled case, zero them out
1220 * once at init, rather than checking/setting to 0 for every runtime op
1221 */
1222 if (is_isa_arcv2() && pae40_exist_but_not_enab()) {
1223
1224 if (IS_ENABLED(CONFIG_ARC_HAS_ICACHE))
1225 write_aux_reg(ARC_REG_IC_PTAG_HI, 0);
1226
1227 if (IS_ENABLED(CONFIG_ARC_HAS_DCACHE))
1228 write_aux_reg(ARC_REG_DC_PTAG_HI, 0);
1229
1230 if (l2_line_sz) {
1231 write_aux_reg(ARC_REG_SLC_RGN_END1, 0);
1232 write_aux_reg(ARC_REG_SLC_RGN_START1, 0);
1233 }
1234 }
1201} 1235}
diff --git a/arch/arc/mm/dma.c b/arch/arc/mm/dma.c
index 71d3efff99d3..e9d93604ad0f 100644
--- a/arch/arc/mm/dma.c
+++ b/arch/arc/mm/dma.c
@@ -153,6 +153,19 @@ static void _dma_cache_sync(phys_addr_t paddr, size_t size,
153 } 153 }
154} 154}
155 155
156/*
157 * arc_dma_map_page - map a portion of a page for streaming DMA
158 *
159 * Ensure that any data held in the cache is appropriately discarded
160 * or written back.
161 *
162 * The device owns this memory once this call has completed. The CPU
163 * can regain ownership by calling dma_unmap_page().
164 *
165 * Note: while it takes struct page as arg, caller can "abuse" it to pass
166 * a region larger than PAGE_SIZE, provided it is physically contiguous
167 * and this still works correctly
168 */
156static dma_addr_t arc_dma_map_page(struct device *dev, struct page *page, 169static dma_addr_t arc_dma_map_page(struct device *dev, struct page *page,
157 unsigned long offset, size_t size, enum dma_data_direction dir, 170 unsigned long offset, size_t size, enum dma_data_direction dir,
158 unsigned long attrs) 171 unsigned long attrs)
@@ -165,6 +178,24 @@ static dma_addr_t arc_dma_map_page(struct device *dev, struct page *page,
165 return plat_phys_to_dma(dev, paddr); 178 return plat_phys_to_dma(dev, paddr);
166} 179}
167 180
181/*
182 * arc_dma_unmap_page - unmap a buffer previously mapped through dma_map_page()
183 *
184 * After this call, reads by the CPU to the buffer are guaranteed to see
185 * whatever the device wrote there.
186 *
187 * Note: historically this routine was not implemented for ARC
188 */
189static void arc_dma_unmap_page(struct device *dev, dma_addr_t handle,
190 size_t size, enum dma_data_direction dir,
191 unsigned long attrs)
192{
193 phys_addr_t paddr = plat_dma_to_phys(dev, handle);
194
195 if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC))
196 _dma_cache_sync(paddr, size, dir);
197}
198
168static int arc_dma_map_sg(struct device *dev, struct scatterlist *sg, 199static int arc_dma_map_sg(struct device *dev, struct scatterlist *sg,
169 int nents, enum dma_data_direction dir, unsigned long attrs) 200 int nents, enum dma_data_direction dir, unsigned long attrs)
170{ 201{
@@ -178,6 +209,18 @@ static int arc_dma_map_sg(struct device *dev, struct scatterlist *sg,
178 return nents; 209 return nents;
179} 210}
180 211
212static void arc_dma_unmap_sg(struct device *dev, struct scatterlist *sg,
213 int nents, enum dma_data_direction dir,
214 unsigned long attrs)
215{
216 struct scatterlist *s;
217 int i;
218
219 for_each_sg(sg, s, nents, i)
220 arc_dma_unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir,
221 attrs);
222}
223
181static void arc_dma_sync_single_for_cpu(struct device *dev, 224static void arc_dma_sync_single_for_cpu(struct device *dev,
182 dma_addr_t dma_handle, size_t size, enum dma_data_direction dir) 225 dma_addr_t dma_handle, size_t size, enum dma_data_direction dir)
183{ 226{
@@ -223,7 +266,9 @@ const struct dma_map_ops arc_dma_ops = {
223 .free = arc_dma_free, 266 .free = arc_dma_free,
224 .mmap = arc_dma_mmap, 267 .mmap = arc_dma_mmap,
225 .map_page = arc_dma_map_page, 268 .map_page = arc_dma_map_page,
269 .unmap_page = arc_dma_unmap_page,
226 .map_sg = arc_dma_map_sg, 270 .map_sg = arc_dma_map_sg,
271 .unmap_sg = arc_dma_unmap_sg,
227 .sync_single_for_device = arc_dma_sync_single_for_device, 272 .sync_single_for_device = arc_dma_sync_single_for_device,
228 .sync_single_for_cpu = arc_dma_sync_single_for_cpu, 273 .sync_single_for_cpu = arc_dma_sync_single_for_cpu,
229 .sync_sg_for_cpu = arc_dma_sync_sg_for_cpu, 274 .sync_sg_for_cpu = arc_dma_sync_sg_for_cpu,
diff --git a/arch/arc/mm/tlb.c b/arch/arc/mm/tlb.c
index d0126fdfe2d8..b181f3ee38aa 100644
--- a/arch/arc/mm/tlb.c
+++ b/arch/arc/mm/tlb.c
@@ -104,6 +104,8 @@
104/* A copy of the ASID from the PID reg is kept in asid_cache */ 104/* A copy of the ASID from the PID reg is kept in asid_cache */
105DEFINE_PER_CPU(unsigned int, asid_cache) = MM_CTXT_FIRST_CYCLE; 105DEFINE_PER_CPU(unsigned int, asid_cache) = MM_CTXT_FIRST_CYCLE;
106 106
107static int __read_mostly pae_exists;
108
107/* 109/*
108 * Utility Routine to erase a J-TLB entry 110 * Utility Routine to erase a J-TLB entry
109 * Caller needs to setup Index Reg (manually or via getIndex) 111 * Caller needs to setup Index Reg (manually or via getIndex)
@@ -784,7 +786,7 @@ void read_decode_mmu_bcr(void)
784 mmu->u_dtlb = mmu4->u_dtlb * 4; 786 mmu->u_dtlb = mmu4->u_dtlb * 4;
785 mmu->u_itlb = mmu4->u_itlb * 4; 787 mmu->u_itlb = mmu4->u_itlb * 4;
786 mmu->sasid = mmu4->sasid; 788 mmu->sasid = mmu4->sasid;
787 mmu->pae = mmu4->pae; 789 pae_exists = mmu->pae = mmu4->pae;
788 } 790 }
789} 791}
790 792
@@ -809,6 +811,11 @@ char *arc_mmu_mumbojumbo(int cpu_id, char *buf, int len)
809 return buf; 811 return buf;
810} 812}
811 813
814int pae40_exist_but_not_enab(void)
815{
816 return pae_exists && !is_pae40_enabled();
817}
818
812void arc_mmu_init(void) 819void arc_mmu_init(void)
813{ 820{
814 char str[256]; 821 char str[256];
@@ -859,6 +866,9 @@ void arc_mmu_init(void)
859 /* swapper_pg_dir is the pgd for the kernel, used by vmalloc */ 866 /* swapper_pg_dir is the pgd for the kernel, used by vmalloc */
860 write_aux_reg(ARC_REG_SCRATCH_DATA0, swapper_pg_dir); 867 write_aux_reg(ARC_REG_SCRATCH_DATA0, swapper_pg_dir);
861#endif 868#endif
869
870 if (pae40_exist_but_not_enab())
871 write_aux_reg(ARC_REG_TLBPD1HI, 0);
862} 872}
863 873
864/* 874/*
diff --git a/arch/arc/plat-sim/Kconfig b/arch/arc/plat-sim/Kconfig
deleted file mode 100644
index ac6af96a82f3..000000000000
--- a/arch/arc/plat-sim/Kconfig
+++ /dev/null
@@ -1,13 +0,0 @@
1#
2# Copyright (C) 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
3#
4# This program is free software; you can redistribute it and/or modify
5# it under the terms of the GNU General Public License version 2 as
6# published by the Free Software Foundation.
7#
8
9menuconfig ARC_PLAT_SIM
10 bool "ARC nSIM based simulation virtual platforms"
11 help
12 Support for nSIM based ARC simulation platforms
13 This includes the standalone nSIM (uart only) vs. System C OSCI VP
diff --git a/arch/arc/plat-sim/platform.c b/arch/arc/plat-sim/platform.c
index aea87389e44b..5cda56b1a2ea 100644
--- a/arch/arc/plat-sim/platform.c
+++ b/arch/arc/plat-sim/platform.c
@@ -20,11 +20,14 @@
20 */ 20 */
21 21
22static const char *simulation_compat[] __initconst = { 22static const char *simulation_compat[] __initconst = {
23#ifdef CONFIG_ISA_ARCOMPACT
23 "snps,nsim", 24 "snps,nsim",
24 "snps,nsim_hs",
25 "snps,nsimosci", 25 "snps,nsimosci",
26#else
27 "snps,nsim_hs",
26 "snps,nsimosci_hs", 28 "snps,nsimosci_hs",
27 "snps,zebu_hs", 29 "snps,zebu_hs",
30#endif
28 NULL, 31 NULL,
29}; 32};
30 33
diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
index f92f95741207..a183b56283f8 100644
--- a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
+++ b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
@@ -266,6 +266,7 @@
266 266
267&hdmicec { 267&hdmicec {
268 status = "okay"; 268 status = "okay";
269 needs-hpd;
269}; 270};
270 271
271&hsi2c_4 { 272&hsi2c_4 {
diff --git a/arch/arm/boot/dts/imx25.dtsi b/arch/arm/boot/dts/imx25.dtsi
index dfcc8e00cf1c..0ade3619f3c3 100644
--- a/arch/arm/boot/dts/imx25.dtsi
+++ b/arch/arm/boot/dts/imx25.dtsi
@@ -297,6 +297,7 @@
297 #address-cells = <1>; 297 #address-cells = <1>;
298 #size-cells = <1>; 298 #size-cells = <1>;
299 status = "disabled"; 299 status = "disabled";
300 ranges;
300 301
301 adc: adc@50030800 { 302 adc: adc@50030800 {
302 compatible = "fsl,imx25-gcq"; 303 compatible = "fsl,imx25-gcq";
diff --git a/arch/arm/boot/dts/imx6qdl-nitrogen6_som2.dtsi b/arch/arm/boot/dts/imx6qdl-nitrogen6_som2.dtsi
index aeaa5a6e4fcf..a24e4f1911ab 100644
--- a/arch/arm/boot/dts/imx6qdl-nitrogen6_som2.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-nitrogen6_som2.dtsi
@@ -507,7 +507,7 @@
507 pinctrl_pcie: pciegrp { 507 pinctrl_pcie: pciegrp {
508 fsl,pins = < 508 fsl,pins = <
509 /* PCIe reset */ 509 /* PCIe reset */
510 MX6QDL_PAD_EIM_BCLK__GPIO6_IO31 0x030b0 510 MX6QDL_PAD_EIM_DA0__GPIO3_IO00 0x030b0
511 MX6QDL_PAD_EIM_DA4__GPIO3_IO04 0x030b0 511 MX6QDL_PAD_EIM_DA4__GPIO3_IO04 0x030b0
512 >; 512 >;
513 }; 513 };
@@ -668,7 +668,7 @@
668&pcie { 668&pcie {
669 pinctrl-names = "default"; 669 pinctrl-names = "default";
670 pinctrl-0 = <&pinctrl_pcie>; 670 pinctrl-0 = <&pinctrl_pcie>;
671 reset-gpio = <&gpio6 31 GPIO_ACTIVE_LOW>; 671 reset-gpio = <&gpio3 0 GPIO_ACTIVE_LOW>;
672 status = "okay"; 672 status = "okay";
673}; 673};
674 674
diff --git a/arch/arm/boot/dts/imx7d-sdb.dts b/arch/arm/boot/dts/imx7d-sdb.dts
index 54c45402286b..0a24d1bf3c39 100644
--- a/arch/arm/boot/dts/imx7d-sdb.dts
+++ b/arch/arm/boot/dts/imx7d-sdb.dts
@@ -557,6 +557,14 @@
557 >; 557 >;
558 }; 558 };
559 559
560 pinctrl_spi4: spi4grp {
561 fsl,pins = <
562 MX7D_PAD_GPIO1_IO09__GPIO1_IO9 0x59
563 MX7D_PAD_GPIO1_IO12__GPIO1_IO12 0x59
564 MX7D_PAD_GPIO1_IO13__GPIO1_IO13 0x59
565 >;
566 };
567
560 pinctrl_tsc2046_pendown: tsc2046_pendown { 568 pinctrl_tsc2046_pendown: tsc2046_pendown {
561 fsl,pins = < 569 fsl,pins = <
562 MX7D_PAD_EPDC_BDR1__GPIO2_IO29 0x59 570 MX7D_PAD_EPDC_BDR1__GPIO2_IO29 0x59
@@ -697,13 +705,5 @@
697 fsl,pins = < 705 fsl,pins = <
698 MX7D_PAD_LPSR_GPIO1_IO01__PWM1_OUT 0x110b0 706 MX7D_PAD_LPSR_GPIO1_IO01__PWM1_OUT 0x110b0
699 >; 707 >;
700
701 pinctrl_spi4: spi4grp {
702 fsl,pins = <
703 MX7D_PAD_GPIO1_IO09__GPIO1_IO9 0x59
704 MX7D_PAD_GPIO1_IO12__GPIO1_IO12 0x59
705 MX7D_PAD_GPIO1_IO13__GPIO1_IO13 0x59
706 >;
707 };
708 }; 708 };
709}; 709};
diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
index cc06da394366..60e69aeacbdb 100644
--- a/arch/arm/boot/dts/sama5d2.dtsi
+++ b/arch/arm/boot/dts/sama5d2.dtsi
@@ -303,7 +303,7 @@
303 #size-cells = <1>; 303 #size-cells = <1>;
304 atmel,smc = <&hsmc>; 304 atmel,smc = <&hsmc>;
305 reg = <0x10000000 0x10000000 305 reg = <0x10000000 0x10000000
306 0x40000000 0x30000000>; 306 0x60000000 0x30000000>;
307 ranges = <0x0 0x0 0x10000000 0x10000000 307 ranges = <0x0 0x0 0x10000000 0x10000000
308 0x1 0x0 0x60000000 0x10000000 308 0x1 0x0 0x60000000 0x10000000
309 0x2 0x0 0x70000000 0x10000000 309 0x2 0x0 0x70000000 0x10000000
@@ -1048,18 +1048,18 @@
1048 }; 1048 };
1049 1049
1050 hsmc: hsmc@f8014000 { 1050 hsmc: hsmc@f8014000 {
1051 compatible = "atmel,sama5d3-smc", "syscon", "simple-mfd"; 1051 compatible = "atmel,sama5d2-smc", "syscon", "simple-mfd";
1052 reg = <0xf8014000 0x1000>; 1052 reg = <0xf8014000 0x1000>;
1053 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 6>; 1053 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 6>;
1054 clocks = <&hsmc_clk>; 1054 clocks = <&hsmc_clk>;
1055 #address-cells = <1>; 1055 #address-cells = <1>;
1056 #size-cells = <1>; 1056 #size-cells = <1>;
1057 ranges; 1057 ranges;
1058 1058
1059 pmecc: ecc-engine@ffffc070 { 1059 pmecc: ecc-engine@f8014070 {
1060 compatible = "atmel,sama5d2-pmecc"; 1060 compatible = "atmel,sama5d2-pmecc";
1061 reg = <0xffffc070 0x490>, 1061 reg = <0xf8014070 0x490>,
1062 <0xffffc500 0x100>; 1062 <0xf8014500 0x100>;
1063 }; 1063 };
1064 }; 1064 };
1065 1065
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index d735e5fc4772..195da38cb9a2 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -1,7 +1,7 @@
1menuconfig ARCH_AT91 1menuconfig ARCH_AT91
2 bool "Atmel SoCs" 2 bool "Atmel SoCs"
3 depends on ARCH_MULTI_V4T || ARCH_MULTI_V5 || ARCH_MULTI_V7 || ARM_SINGLE_ARMV7M 3 depends on ARCH_MULTI_V4T || ARCH_MULTI_V5 || ARCH_MULTI_V7 || ARM_SINGLE_ARMV7M
4 select ARM_CPU_SUSPEND if PM 4 select ARM_CPU_SUSPEND if PM && ARCH_MULTI_V7
5 select COMMON_CLK_AT91 5 select COMMON_CLK_AT91
6 select GPIOLIB 6 select GPIOLIB
7 select PINCTRL 7 select PINCTRL
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index 667fddac3856..5036f996e694 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach-at91/pm.c
@@ -608,6 +608,9 @@ static void __init at91_pm_init(void (*pm_idle)(void))
608 608
609void __init at91rm9200_pm_init(void) 609void __init at91rm9200_pm_init(void)
610{ 610{
611 if (!IS_ENABLED(CONFIG_SOC_AT91RM9200))
612 return;
613
611 at91_dt_ramc(); 614 at91_dt_ramc();
612 615
613 /* 616 /*
@@ -620,18 +623,27 @@ void __init at91rm9200_pm_init(void)
620 623
621void __init at91sam9_pm_init(void) 624void __init at91sam9_pm_init(void)
622{ 625{
626 if (!IS_ENABLED(CONFIG_SOC_AT91SAM9))
627 return;
628
623 at91_dt_ramc(); 629 at91_dt_ramc();
624 at91_pm_init(at91sam9_idle); 630 at91_pm_init(at91sam9_idle);
625} 631}
626 632
627void __init sama5_pm_init(void) 633void __init sama5_pm_init(void)
628{ 634{
635 if (!IS_ENABLED(CONFIG_SOC_SAMA5))
636 return;
637
629 at91_dt_ramc(); 638 at91_dt_ramc();
630 at91_pm_init(NULL); 639 at91_pm_init(NULL);
631} 640}
632 641
633void __init sama5d2_pm_init(void) 642void __init sama5d2_pm_init(void)
634{ 643{
644 if (!IS_ENABLED(CONFIG_SOC_SAMA5D2))
645 return;
646
635 at91_pm_backup_init(); 647 at91_pm_backup_init();
636 sama5_pm_init(); 648 sama5_pm_init();
637} 649}
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
index 0d1f026d831a..ba2fde2909f9 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
@@ -51,6 +51,7 @@
51 compatible = "sinovoip,bananapi-m64", "allwinner,sun50i-a64"; 51 compatible = "sinovoip,bananapi-m64", "allwinner,sun50i-a64";
52 52
53 aliases { 53 aliases {
54 ethernet0 = &emac;
54 serial0 = &uart0; 55 serial0 = &uart0;
55 serial1 = &uart1; 56 serial1 = &uart1;
56 }; 57 };
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
index 08cda24ea194..827168bc22ed 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
@@ -51,6 +51,7 @@
51 compatible = "pine64,pine64", "allwinner,sun50i-a64"; 51 compatible = "pine64,pine64", "allwinner,sun50i-a64";
52 52
53 aliases { 53 aliases {
54 ethernet0 = &emac;
54 serial0 = &uart0; 55 serial0 = &uart0;
55 serial1 = &uart1; 56 serial1 = &uart1;
56 serial2 = &uart2; 57 serial2 = &uart2;
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
index 17eb1cc5bf6b..216e3a5dafae 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
@@ -53,6 +53,7 @@
53 "allwinner,sun50i-a64"; 53 "allwinner,sun50i-a64";
54 54
55 aliases { 55 aliases {
56 ethernet0 = &emac;
56 serial0 = &uart0; 57 serial0 = &uart0;
57 }; 58 };
58 59
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
index 732e2e06f503..d9a720bff05d 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
@@ -120,5 +120,8 @@
120}; 120};
121 121
122&pio { 122&pio {
123 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
124 <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
125 <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
123 compatible = "allwinner,sun50i-h5-pinctrl"; 126 compatible = "allwinner,sun50i-h5-pinctrl";
124}; 127};
diff --git a/arch/arm64/boot/dts/renesas/salvator-common.dtsi b/arch/arm64/boot/dts/renesas/salvator-common.dtsi
index a451996f590a..f903957da504 100644
--- a/arch/arm64/boot/dts/renesas/salvator-common.dtsi
+++ b/arch/arm64/boot/dts/renesas/salvator-common.dtsi
@@ -45,7 +45,7 @@
45 stdout-path = "serial0:115200n8"; 45 stdout-path = "serial0:115200n8";
46 }; 46 };
47 47
48 audio_clkout: audio_clkout { 48 audio_clkout: audio-clkout {
49 /* 49 /*
50 * This is same as <&rcar_sound 0> 50 * This is same as <&rcar_sound 0>
51 * but needed to avoid cs2000/rcar_sound probe dead-lock 51 * but needed to avoid cs2000/rcar_sound probe dead-lock
diff --git a/arch/arm64/include/asm/arch_timer.h b/arch/arm64/include/asm/arch_timer.h
index 74d08e44a651..a652ce0a5cb2 100644
--- a/arch/arm64/include/asm/arch_timer.h
+++ b/arch/arm64/include/asm/arch_timer.h
@@ -65,13 +65,13 @@ DECLARE_PER_CPU(const struct arch_timer_erratum_workaround *,
65 u64 _val; \ 65 u64 _val; \
66 if (needs_unstable_timer_counter_workaround()) { \ 66 if (needs_unstable_timer_counter_workaround()) { \
67 const struct arch_timer_erratum_workaround *wa; \ 67 const struct arch_timer_erratum_workaround *wa; \
68 preempt_disable(); \ 68 preempt_disable_notrace(); \
69 wa = __this_cpu_read(timer_unstable_counter_workaround); \ 69 wa = __this_cpu_read(timer_unstable_counter_workaround); \
70 if (wa && wa->read_##reg) \ 70 if (wa && wa->read_##reg) \
71 _val = wa->read_##reg(); \ 71 _val = wa->read_##reg(); \
72 else \ 72 else \
73 _val = read_sysreg(reg); \ 73 _val = read_sysreg(reg); \
74 preempt_enable(); \ 74 preempt_enable_notrace(); \
75 } else { \ 75 } else { \
76 _val = read_sysreg(reg); \ 76 _val = read_sysreg(reg); \
77 } \ 77 } \
diff --git a/arch/arm64/include/asm/elf.h b/arch/arm64/include/asm/elf.h
index acae781f7359..3288c2b36731 100644
--- a/arch/arm64/include/asm/elf.h
+++ b/arch/arm64/include/asm/elf.h
@@ -114,10 +114,10 @@
114 114
115/* 115/*
116 * This is the base location for PIE (ET_DYN with INTERP) loads. On 116 * This is the base location for PIE (ET_DYN with INTERP) loads. On
117 * 64-bit, this is raised to 4GB to leave the entire 32-bit address 117 * 64-bit, this is above 4GB to leave the entire 32-bit address
118 * space open for things that want to use the area for 32-bit pointers. 118 * space open for things that want to use the area for 32-bit pointers.
119 */ 119 */
120#define ELF_ET_DYN_BASE 0x100000000UL 120#define ELF_ET_DYN_BASE (2 * TASK_SIZE_64 / 3)
121 121
122#ifndef __ASSEMBLY__ 122#ifndef __ASSEMBLY__
123 123
diff --git a/arch/arm64/kernel/fpsimd.c b/arch/arm64/kernel/fpsimd.c
index 06da8ea16bbe..c7b4995868e1 100644
--- a/arch/arm64/kernel/fpsimd.c
+++ b/arch/arm64/kernel/fpsimd.c
@@ -161,9 +161,11 @@ void fpsimd_flush_thread(void)
161{ 161{
162 if (!system_supports_fpsimd()) 162 if (!system_supports_fpsimd())
163 return; 163 return;
164 preempt_disable();
164 memset(&current->thread.fpsimd_state, 0, sizeof(struct fpsimd_state)); 165 memset(&current->thread.fpsimd_state, 0, sizeof(struct fpsimd_state));
165 fpsimd_flush_task_state(current); 166 fpsimd_flush_task_state(current);
166 set_thread_flag(TIF_FOREIGN_FPSTATE); 167 set_thread_flag(TIF_FOREIGN_FPSTATE);
168 preempt_enable();
167} 169}
168 170
169/* 171/*
diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S
index 973df7de7bf8..adb0910b88f5 100644
--- a/arch/arm64/kernel/head.S
+++ b/arch/arm64/kernel/head.S
@@ -354,7 +354,6 @@ __primary_switched:
354 tst x23, ~(MIN_KIMG_ALIGN - 1) // already running randomized? 354 tst x23, ~(MIN_KIMG_ALIGN - 1) // already running randomized?
355 b.ne 0f 355 b.ne 0f
356 mov x0, x21 // pass FDT address in x0 356 mov x0, x21 // pass FDT address in x0
357 mov x1, x23 // pass modulo offset in x1
358 bl kaslr_early_init // parse FDT for KASLR options 357 bl kaslr_early_init // parse FDT for KASLR options
359 cbz x0, 0f // KASLR disabled? just proceed 358 cbz x0, 0f // KASLR disabled? just proceed
360 orr x23, x23, x0 // record KASLR offset 359 orr x23, x23, x0 // record KASLR offset
diff --git a/arch/arm64/kernel/kaslr.c b/arch/arm64/kernel/kaslr.c
index a9710efb8c01..47080c49cc7e 100644
--- a/arch/arm64/kernel/kaslr.c
+++ b/arch/arm64/kernel/kaslr.c
@@ -75,7 +75,7 @@ extern void *__init __fixmap_remap_fdt(phys_addr_t dt_phys, int *size,
75 * containing function pointers) to be reinitialized, and zero-initialized 75 * containing function pointers) to be reinitialized, and zero-initialized
76 * .bss variables will be reset to 0. 76 * .bss variables will be reset to 0.
77 */ 77 */
78u64 __init kaslr_early_init(u64 dt_phys, u64 modulo_offset) 78u64 __init kaslr_early_init(u64 dt_phys)
79{ 79{
80 void *fdt; 80 void *fdt;
81 u64 seed, offset, mask, module_range; 81 u64 seed, offset, mask, module_range;
@@ -131,15 +131,17 @@ u64 __init kaslr_early_init(u64 dt_phys, u64 modulo_offset)
131 /* 131 /*
132 * The kernel Image should not extend across a 1GB/32MB/512MB alignment 132 * The kernel Image should not extend across a 1GB/32MB/512MB alignment
133 * boundary (for 4KB/16KB/64KB granule kernels, respectively). If this 133 * boundary (for 4KB/16KB/64KB granule kernels, respectively). If this
134 * happens, increase the KASLR offset by the size of the kernel image 134 * happens, round down the KASLR offset by (1 << SWAPPER_TABLE_SHIFT).
135 * rounded up by SWAPPER_BLOCK_SIZE. 135 *
136 * NOTE: The references to _text and _end below will already take the
137 * modulo offset (the physical displacement modulo 2 MB) into
138 * account, given that the physical placement is controlled by
139 * the loader, and will not change as a result of the virtual
140 * mapping we choose.
136 */ 141 */
137 if ((((u64)_text + offset + modulo_offset) >> SWAPPER_TABLE_SHIFT) != 142 if ((((u64)_text + offset) >> SWAPPER_TABLE_SHIFT) !=
138 (((u64)_end + offset + modulo_offset) >> SWAPPER_TABLE_SHIFT)) { 143 (((u64)_end + offset) >> SWAPPER_TABLE_SHIFT))
139 u64 kimg_sz = _end - _text; 144 offset = round_down(offset, 1 << SWAPPER_TABLE_SHIFT);
140 offset = (offset + round_up(kimg_sz, SWAPPER_BLOCK_SIZE))
141 & mask;
142 }
143 145
144 if (IS_ENABLED(CONFIG_KASAN)) 146 if (IS_ENABLED(CONFIG_KASAN))
145 /* 147 /*
diff --git a/arch/arm64/mm/fault.c b/arch/arm64/mm/fault.c
index 2509e4fe6992..1f22a41565a3 100644
--- a/arch/arm64/mm/fault.c
+++ b/arch/arm64/mm/fault.c
@@ -435,8 +435,11 @@ retry:
435 * the mmap_sem because it would already be released 435 * the mmap_sem because it would already be released
436 * in __lock_page_or_retry in mm/filemap.c. 436 * in __lock_page_or_retry in mm/filemap.c.
437 */ 437 */
438 if (fatal_signal_pending(current)) 438 if (fatal_signal_pending(current)) {
439 if (!user_mode(regs))
440 goto no_context;
439 return 0; 441 return 0;
442 }
440 443
441 /* 444 /*
442 * Clear FAULT_FLAG_ALLOW_RETRY to avoid any risk of 445 * Clear FAULT_FLAG_ALLOW_RETRY to avoid any risk of
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 8dd20358464f..48d91d5be4e9 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -2260,7 +2260,7 @@ config CPU_R4K_CACHE_TLB
2260 2260
2261config MIPS_MT_SMP 2261config MIPS_MT_SMP
2262 bool "MIPS MT SMP support (1 TC on each available VPE)" 2262 bool "MIPS MT SMP support (1 TC on each available VPE)"
2263 depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 2263 depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS
2264 select CPU_MIPSR2_IRQ_VI 2264 select CPU_MIPSR2_IRQ_VI
2265 select CPU_MIPSR2_IRQ_EI 2265 select CPU_MIPSR2_IRQ_EI
2266 select SYNC_R4K 2266 select SYNC_R4K
diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index 04343625b929..bc2708c9ada4 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -243,8 +243,21 @@ include arch/mips/Kbuild.platforms
243ifdef CONFIG_PHYSICAL_START 243ifdef CONFIG_PHYSICAL_START
244load-y = $(CONFIG_PHYSICAL_START) 244load-y = $(CONFIG_PHYSICAL_START)
245endif 245endif
246entry-y = 0x$(shell $(NM) vmlinux 2>/dev/null \ 246
247entry-noisa-y = 0x$(shell $(NM) vmlinux 2>/dev/null \
247 | grep "\bkernel_entry\b" | cut -f1 -d \ ) 248 | grep "\bkernel_entry\b" | cut -f1 -d \ )
249ifdef CONFIG_CPU_MICROMIPS
250 #
251 # Set the ISA bit, since the kernel_entry symbol in the ELF will have it
252 # clear which would lead to images containing addresses which bootloaders may
253 # jump to as MIPS32 code.
254 #
255 entry-y = $(patsubst %0,%1,$(patsubst %2,%3,$(patsubst %4,%5, \
256 $(patsubst %6,%7,$(patsubst %8,%9,$(patsubst %a,%b, \
257 $(patsubst %c,%d,$(patsubst %e,%f,$(entry-noisa-y)))))))))
258else
259 entry-y = $(entry-noisa-y)
260endif
248 261
249cflags-y += -I$(srctree)/arch/mips/include/asm/mach-generic 262cflags-y += -I$(srctree)/arch/mips/include/asm/mach-generic
250drivers-$(CONFIG_PCI) += arch/mips/pci/ 263drivers-$(CONFIG_PCI) += arch/mips/pci/
diff --git a/arch/mips/boot/compressed/.gitignore b/arch/mips/boot/compressed/.gitignore
new file mode 100644
index 000000000000..ebae133f1d00
--- /dev/null
+++ b/arch/mips/boot/compressed/.gitignore
@@ -0,0 +1,2 @@
1ashldi3.c
2bswapsi.c
diff --git a/arch/mips/cavium-octeon/octeon-usb.c b/arch/mips/cavium-octeon/octeon-usb.c
index 542be1cd0f32..bfdfaf32d2c4 100644
--- a/arch/mips/cavium-octeon/octeon-usb.c
+++ b/arch/mips/cavium-octeon/octeon-usb.c
@@ -13,9 +13,9 @@
13#include <linux/mutex.h> 13#include <linux/mutex.h>
14#include <linux/delay.h> 14#include <linux/delay.h>
15#include <linux/of_platform.h> 15#include <linux/of_platform.h>
16#include <linux/io.h>
16 17
17#include <asm/octeon/octeon.h> 18#include <asm/octeon/octeon.h>
18#include <asm/octeon/cvmx-gpio-defs.h>
19 19
20/* USB Control Register */ 20/* USB Control Register */
21union cvm_usbdrd_uctl_ctl { 21union cvm_usbdrd_uctl_ctl {
diff --git a/arch/mips/dec/int-handler.S b/arch/mips/dec/int-handler.S
index 1910223a9c02..cea2bb1621e6 100644
--- a/arch/mips/dec/int-handler.S
+++ b/arch/mips/dec/int-handler.S
@@ -147,23 +147,12 @@
147 * Find irq with highest priority 147 * Find irq with highest priority
148 */ 148 */
149 # open coded PTR_LA t1, cpu_mask_nr_tbl 149 # open coded PTR_LA t1, cpu_mask_nr_tbl
150#if (_MIPS_SZPTR == 32) 150#if defined(CONFIG_32BIT) || defined(KBUILD_64BIT_SYM32)
151 # open coded la t1, cpu_mask_nr_tbl 151 # open coded la t1, cpu_mask_nr_tbl
152 lui t1, %hi(cpu_mask_nr_tbl) 152 lui t1, %hi(cpu_mask_nr_tbl)
153 addiu t1, %lo(cpu_mask_nr_tbl) 153 addiu t1, %lo(cpu_mask_nr_tbl)
154 154#else
155#endif 155#error GCC `-msym32' option required for 64-bit DECstation builds
156#if (_MIPS_SZPTR == 64)
157 # open coded dla t1, cpu_mask_nr_tbl
158 .set push
159 .set noat
160 lui t1, %highest(cpu_mask_nr_tbl)
161 lui AT, %hi(cpu_mask_nr_tbl)
162 daddiu t1, t1, %higher(cpu_mask_nr_tbl)
163 daddiu AT, AT, %lo(cpu_mask_nr_tbl)
164 dsll t1, 32
165 daddu t1, t1, AT
166 .set pop
167#endif 156#endif
1681: lw t2,(t1) 1571: lw t2,(t1)
169 nop 158 nop
@@ -214,23 +203,12 @@
214 * Find irq with highest priority 203 * Find irq with highest priority
215 */ 204 */
216 # open coded PTR_LA t1,asic_mask_nr_tbl 205 # open coded PTR_LA t1,asic_mask_nr_tbl
217#if (_MIPS_SZPTR == 32) 206#if defined(CONFIG_32BIT) || defined(KBUILD_64BIT_SYM32)
218 # open coded la t1, asic_mask_nr_tbl 207 # open coded la t1, asic_mask_nr_tbl
219 lui t1, %hi(asic_mask_nr_tbl) 208 lui t1, %hi(asic_mask_nr_tbl)
220 addiu t1, %lo(asic_mask_nr_tbl) 209 addiu t1, %lo(asic_mask_nr_tbl)
221 210#else
222#endif 211#error GCC `-msym32' option required for 64-bit DECstation builds
223#if (_MIPS_SZPTR == 64)
224 # open coded dla t1, asic_mask_nr_tbl
225 .set push
226 .set noat
227 lui t1, %highest(asic_mask_nr_tbl)
228 lui AT, %hi(asic_mask_nr_tbl)
229 daddiu t1, t1, %higher(asic_mask_nr_tbl)
230 daddiu AT, AT, %lo(asic_mask_nr_tbl)
231 dsll t1, 32
232 daddu t1, t1, AT
233 .set pop
234#endif 212#endif
2352: lw t2,(t1) 2132: lw t2,(t1)
236 nop 214 nop
diff --git a/arch/mips/include/asm/cache.h b/arch/mips/include/asm/cache.h
index fc67947ed658..8b14c2706aa5 100644
--- a/arch/mips/include/asm/cache.h
+++ b/arch/mips/include/asm/cache.h
@@ -9,6 +9,8 @@
9#ifndef _ASM_CACHE_H 9#ifndef _ASM_CACHE_H
10#define _ASM_CACHE_H 10#define _ASM_CACHE_H
11 11
12#include <kmalloc.h>
13
12#define L1_CACHE_SHIFT CONFIG_MIPS_L1_CACHE_SHIFT 14#define L1_CACHE_SHIFT CONFIG_MIPS_L1_CACHE_SHIFT
13#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) 15#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
14 16
diff --git a/arch/mips/include/asm/cpu-features.h b/arch/mips/include/asm/cpu-features.h
index 8baa9033b181..721b698bfe3c 100644
--- a/arch/mips/include/asm/cpu-features.h
+++ b/arch/mips/include/asm/cpu-features.h
@@ -428,6 +428,9 @@
428#ifndef cpu_scache_line_size 428#ifndef cpu_scache_line_size
429#define cpu_scache_line_size() cpu_data[0].scache.linesz 429#define cpu_scache_line_size() cpu_data[0].scache.linesz
430#endif 430#endif
431#ifndef cpu_tcache_line_size
432#define cpu_tcache_line_size() cpu_data[0].tcache.linesz
433#endif
431 434
432#ifndef cpu_hwrena_impl_bits 435#ifndef cpu_hwrena_impl_bits
433#define cpu_hwrena_impl_bits 0 436#define cpu_hwrena_impl_bits 0
diff --git a/arch/mips/include/asm/octeon/cvmx-l2c-defs.h b/arch/mips/include/asm/octeon/cvmx-l2c-defs.h
index d045973ddb33..3ea84acf1814 100644
--- a/arch/mips/include/asm/octeon/cvmx-l2c-defs.h
+++ b/arch/mips/include/asm/octeon/cvmx-l2c-defs.h
@@ -33,6 +33,10 @@
33#define CVMX_L2C_DBG (CVMX_ADD_IO_SEG(0x0001180080000030ull)) 33#define CVMX_L2C_DBG (CVMX_ADD_IO_SEG(0x0001180080000030ull))
34#define CVMX_L2C_CFG (CVMX_ADD_IO_SEG(0x0001180080000000ull)) 34#define CVMX_L2C_CFG (CVMX_ADD_IO_SEG(0x0001180080000000ull))
35#define CVMX_L2C_CTL (CVMX_ADD_IO_SEG(0x0001180080800000ull)) 35#define CVMX_L2C_CTL (CVMX_ADD_IO_SEG(0x0001180080800000ull))
36#define CVMX_L2C_ERR_TDTX(block_id) \
37 (CVMX_ADD_IO_SEG(0x0001180080A007E0ull) + ((block_id) & 3) * 0x40000ull)
38#define CVMX_L2C_ERR_TTGX(block_id) \
39 (CVMX_ADD_IO_SEG(0x0001180080A007E8ull) + ((block_id) & 3) * 0x40000ull)
36#define CVMX_L2C_LCKBASE (CVMX_ADD_IO_SEG(0x0001180080000058ull)) 40#define CVMX_L2C_LCKBASE (CVMX_ADD_IO_SEG(0x0001180080000058ull))
37#define CVMX_L2C_LCKOFF (CVMX_ADD_IO_SEG(0x0001180080000060ull)) 41#define CVMX_L2C_LCKOFF (CVMX_ADD_IO_SEG(0x0001180080000060ull))
38#define CVMX_L2C_PFCTL (CVMX_ADD_IO_SEG(0x0001180080000090ull)) 42#define CVMX_L2C_PFCTL (CVMX_ADD_IO_SEG(0x0001180080000090ull))
@@ -66,9 +70,40 @@
66 ((offset) & 1) * 8) 70 ((offset) & 1) * 8)
67#define CVMX_L2C_WPAR_PPX(offset) (CVMX_ADD_IO_SEG(0x0001180080840000ull) + \ 71#define CVMX_L2C_WPAR_PPX(offset) (CVMX_ADD_IO_SEG(0x0001180080840000ull) + \
68 ((offset) & 31) * 8) 72 ((offset) & 31) * 8)
69#define CVMX_L2D_FUS3 (CVMX_ADD_IO_SEG(0x00011800800007B8ull))
70 73
71 74
75union cvmx_l2c_err_tdtx {
76 uint64_t u64;
77 struct cvmx_l2c_err_tdtx_s {
78 __BITFIELD_FIELD(uint64_t dbe:1,
79 __BITFIELD_FIELD(uint64_t sbe:1,
80 __BITFIELD_FIELD(uint64_t vdbe:1,
81 __BITFIELD_FIELD(uint64_t vsbe:1,
82 __BITFIELD_FIELD(uint64_t syn:10,
83 __BITFIELD_FIELD(uint64_t reserved_22_49:28,
84 __BITFIELD_FIELD(uint64_t wayidx:18,
85 __BITFIELD_FIELD(uint64_t reserved_2_3:2,
86 __BITFIELD_FIELD(uint64_t type:2,
87 ;)))))))))
88 } s;
89};
90
91union cvmx_l2c_err_ttgx {
92 uint64_t u64;
93 struct cvmx_l2c_err_ttgx_s {
94 __BITFIELD_FIELD(uint64_t dbe:1,
95 __BITFIELD_FIELD(uint64_t sbe:1,
96 __BITFIELD_FIELD(uint64_t noway:1,
97 __BITFIELD_FIELD(uint64_t reserved_56_60:5,
98 __BITFIELD_FIELD(uint64_t syn:6,
99 __BITFIELD_FIELD(uint64_t reserved_22_49:28,
100 __BITFIELD_FIELD(uint64_t wayidx:15,
101 __BITFIELD_FIELD(uint64_t reserved_2_6:5,
102 __BITFIELD_FIELD(uint64_t type:2,
103 ;)))))))))
104 } s;
105};
106
72union cvmx_l2c_cfg { 107union cvmx_l2c_cfg {
73 uint64_t u64; 108 uint64_t u64;
74 struct cvmx_l2c_cfg_s { 109 struct cvmx_l2c_cfg_s {
diff --git a/arch/mips/include/asm/octeon/cvmx-l2d-defs.h b/arch/mips/include/asm/octeon/cvmx-l2d-defs.h
new file mode 100644
index 000000000000..a951ad5d65ad
--- /dev/null
+++ b/arch/mips/include/asm/octeon/cvmx-l2d-defs.h
@@ -0,0 +1,60 @@
1/***********************license start***************
2 * Author: Cavium Networks
3 *
4 * Contact: support@caviumnetworks.com
5 * This file is part of the OCTEON SDK
6 *
7 * Copyright (c) 2003-2017 Cavium, Inc.
8 *
9 * This file is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License, Version 2, as
11 * published by the Free Software Foundation.
12 *
13 * This file is distributed in the hope that it will be useful, but
14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
16 * NONINFRINGEMENT. See the GNU General Public License for more
17 * details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this file; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 * or visit http://www.gnu.org/licenses/.
23 *
24 * This file may also be available under a different license from Cavium.
25 * Contact Cavium Networks for more information
26 ***********************license end**************************************/
27
28#ifndef __CVMX_L2D_DEFS_H__
29#define __CVMX_L2D_DEFS_H__
30
31#define CVMX_L2D_ERR (CVMX_ADD_IO_SEG(0x0001180080000010ull))
32#define CVMX_L2D_FUS3 (CVMX_ADD_IO_SEG(0x00011800800007B8ull))
33
34
35union cvmx_l2d_err {
36 uint64_t u64;
37 struct cvmx_l2d_err_s {
38 __BITFIELD_FIELD(uint64_t reserved_6_63:58,
39 __BITFIELD_FIELD(uint64_t bmhclsel:1,
40 __BITFIELD_FIELD(uint64_t ded_err:1,
41 __BITFIELD_FIELD(uint64_t sec_err:1,
42 __BITFIELD_FIELD(uint64_t ded_intena:1,
43 __BITFIELD_FIELD(uint64_t sec_intena:1,
44 __BITFIELD_FIELD(uint64_t ecc_ena:1,
45 ;)))))))
46 } s;
47};
48
49union cvmx_l2d_fus3 {
50 uint64_t u64;
51 struct cvmx_l2d_fus3_s {
52 __BITFIELD_FIELD(uint64_t reserved_40_63:24,
53 __BITFIELD_FIELD(uint64_t ema_ctl:3,
54 __BITFIELD_FIELD(uint64_t reserved_34_36:3,
55 __BITFIELD_FIELD(uint64_t q3fus:34,
56 ;))))
57 } s;
58};
59
60#endif
diff --git a/arch/mips/include/asm/octeon/cvmx.h b/arch/mips/include/asm/octeon/cvmx.h
index 9742202f2a32..e638735cc3ac 100644
--- a/arch/mips/include/asm/octeon/cvmx.h
+++ b/arch/mips/include/asm/octeon/cvmx.h
@@ -62,6 +62,7 @@ enum cvmx_mips_space {
62#include <asm/octeon/cvmx-iob-defs.h> 62#include <asm/octeon/cvmx-iob-defs.h>
63#include <asm/octeon/cvmx-ipd-defs.h> 63#include <asm/octeon/cvmx-ipd-defs.h>
64#include <asm/octeon/cvmx-l2c-defs.h> 64#include <asm/octeon/cvmx-l2c-defs.h>
65#include <asm/octeon/cvmx-l2d-defs.h>
65#include <asm/octeon/cvmx-l2t-defs.h> 66#include <asm/octeon/cvmx-l2t-defs.h>
66#include <asm/octeon/cvmx-led-defs.h> 67#include <asm/octeon/cvmx-led-defs.h>
67#include <asm/octeon/cvmx-mio-defs.h> 68#include <asm/octeon/cvmx-mio-defs.h>
diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c
index 770d4d1516cb..6bace7695788 100644
--- a/arch/mips/kernel/smp.c
+++ b/arch/mips/kernel/smp.c
@@ -376,9 +376,6 @@ asmlinkage void start_secondary(void)
376 cpumask_set_cpu(cpu, &cpu_coherent_mask); 376 cpumask_set_cpu(cpu, &cpu_coherent_mask);
377 notify_cpu_starting(cpu); 377 notify_cpu_starting(cpu);
378 378
379 complete(&cpu_running);
380 synchronise_count_slave(cpu);
381
382 set_cpu_online(cpu, true); 379 set_cpu_online(cpu, true);
383 380
384 set_cpu_sibling_map(cpu); 381 set_cpu_sibling_map(cpu);
@@ -386,6 +383,9 @@ asmlinkage void start_secondary(void)
386 383
387 calculate_cpu_foreign_map(); 384 calculate_cpu_foreign_map();
388 385
386 complete(&cpu_running);
387 synchronise_count_slave(cpu);
388
389 /* 389 /*
390 * irq will be enabled in ->smp_finish(), enabling it too early 390 * irq will be enabled in ->smp_finish(), enabling it too early
391 * is dangerous. 391 * is dangerous.
diff --git a/arch/mips/mm/uasm-mips.c b/arch/mips/mm/uasm-mips.c
index 3f74f6c1f065..9fea6c6bbf49 100644
--- a/arch/mips/mm/uasm-mips.c
+++ b/arch/mips/mm/uasm-mips.c
@@ -48,7 +48,7 @@
48 48
49#include "uasm.c" 49#include "uasm.c"
50 50
51static const struct insn const insn_table[insn_invalid] = { 51static const struct insn insn_table[insn_invalid] = {
52 [insn_addiu] = {M(addiu_op, 0, 0, 0, 0, 0), RS | RT | SIMM}, 52 [insn_addiu] = {M(addiu_op, 0, 0, 0, 0, 0), RS | RT | SIMM},
53 [insn_addu] = {M(spec_op, 0, 0, 0, 0, addu_op), RS | RT | RD}, 53 [insn_addu] = {M(spec_op, 0, 0, 0, 0, addu_op), RS | RT | RD},
54 [insn_and] = {M(spec_op, 0, 0, 0, 0, and_op), RS | RT | RD}, 54 [insn_and] = {M(spec_op, 0, 0, 0, 0, and_op), RS | RT | RD},
diff --git a/arch/mips/pci/pci.c b/arch/mips/pci/pci.c
index bd67ac74fe2d..9632436d74d7 100644
--- a/arch/mips/pci/pci.c
+++ b/arch/mips/pci/pci.c
@@ -28,16 +28,15 @@ EXPORT_SYMBOL(PCIBIOS_MIN_MEM);
28 28
29static int __init pcibios_set_cache_line_size(void) 29static int __init pcibios_set_cache_line_size(void)
30{ 30{
31 struct cpuinfo_mips *c = &current_cpu_data;
32 unsigned int lsize; 31 unsigned int lsize;
33 32
34 /* 33 /*
35 * Set PCI cacheline size to that of the highest level in the 34 * Set PCI cacheline size to that of the highest level in the
36 * cache hierarchy. 35 * cache hierarchy.
37 */ 36 */
38 lsize = c->dcache.linesz; 37 lsize = cpu_dcache_line_size();
39 lsize = c->scache.linesz ? : lsize; 38 lsize = cpu_scache_line_size() ? : lsize;
40 lsize = c->tcache.linesz ? : lsize; 39 lsize = cpu_tcache_line_size() ? : lsize;
41 40
42 BUG_ON(!lsize); 41 BUG_ON(!lsize);
43 42
diff --git a/arch/mips/vdso/gettimeofday.c b/arch/mips/vdso/gettimeofday.c
index 974276e828b2..e2690d7ca4dd 100644
--- a/arch/mips/vdso/gettimeofday.c
+++ b/arch/mips/vdso/gettimeofday.c
@@ -35,7 +35,8 @@ static __always_inline long gettimeofday_fallback(struct timeval *_tv,
35 " syscall\n" 35 " syscall\n"
36 : "=r" (ret), "=r" (error) 36 : "=r" (ret), "=r" (error)
37 : "r" (tv), "r" (tz), "r" (nr) 37 : "r" (tv), "r" (tz), "r" (nr)
38 : "memory"); 38 : "$1", "$3", "$8", "$9", "$10", "$11", "$12", "$13",
39 "$14", "$15", "$24", "$25", "hi", "lo", "memory");
39 40
40 return error ? -ret : ret; 41 return error ? -ret : ret;
41} 42}
@@ -55,7 +56,8 @@ static __always_inline long clock_gettime_fallback(clockid_t _clkid,
55 " syscall\n" 56 " syscall\n"
56 : "=r" (ret), "=r" (error) 57 : "=r" (ret), "=r" (error)
57 : "r" (clkid), "r" (ts), "r" (nr) 58 : "r" (clkid), "r" (ts), "r" (nr)
58 : "memory"); 59 : "$1", "$3", "$8", "$9", "$10", "$11", "$12", "$13",
60 "$14", "$15", "$24", "$25", "hi", "lo", "memory");
59 61
60 return error ? -ret : ret; 62 return error ? -ret : ret;
61} 63}
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 36f858c37ca7..81b0031f909f 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -199,7 +199,7 @@ config PPC
199 select HAVE_OPTPROBES if PPC64 199 select HAVE_OPTPROBES if PPC64
200 select HAVE_PERF_EVENTS 200 select HAVE_PERF_EVENTS
201 select HAVE_PERF_EVENTS_NMI if PPC64 201 select HAVE_PERF_EVENTS_NMI if PPC64
202 select HAVE_HARDLOCKUP_DETECTOR_PERF if HAVE_PERF_EVENTS_NMI && !HAVE_HARDLOCKUP_DETECTOR_ARCH 202 select HAVE_HARDLOCKUP_DETECTOR_PERF if PERF_EVENTS && HAVE_PERF_EVENTS_NMI && !HAVE_HARDLOCKUP_DETECTOR_ARCH
203 select HAVE_PERF_REGS 203 select HAVE_PERF_REGS
204 select HAVE_PERF_USER_STACK_DUMP 204 select HAVE_PERF_USER_STACK_DUMP
205 select HAVE_RCU_TABLE_FREE if SMP 205 select HAVE_RCU_TABLE_FREE if SMP
diff --git a/arch/powerpc/configs/powernv_defconfig b/arch/powerpc/configs/powernv_defconfig
index 0695ce047d56..34fc9bbfca9e 100644
--- a/arch/powerpc/configs/powernv_defconfig
+++ b/arch/powerpc/configs/powernv_defconfig
@@ -293,7 +293,8 @@ CONFIG_MAGIC_SYSRQ=y
293CONFIG_DEBUG_KERNEL=y 293CONFIG_DEBUG_KERNEL=y
294CONFIG_DEBUG_STACK_USAGE=y 294CONFIG_DEBUG_STACK_USAGE=y
295CONFIG_DEBUG_STACKOVERFLOW=y 295CONFIG_DEBUG_STACKOVERFLOW=y
296CONFIG_LOCKUP_DETECTOR=y 296CONFIG_SOFTLOCKUP_DETECTOR=y
297CONFIG_HARDLOCKUP_DETECTOR=y
297CONFIG_LATENCYTOP=y 298CONFIG_LATENCYTOP=y
298CONFIG_SCHED_TRACER=y 299CONFIG_SCHED_TRACER=y
299CONFIG_BLK_DEV_IO_TRACE=y 300CONFIG_BLK_DEV_IO_TRACE=y
diff --git a/arch/powerpc/configs/ppc64_defconfig b/arch/powerpc/configs/ppc64_defconfig
index 5175028c56ce..c5246d29f385 100644
--- a/arch/powerpc/configs/ppc64_defconfig
+++ b/arch/powerpc/configs/ppc64_defconfig
@@ -324,7 +324,8 @@ CONFIG_MAGIC_SYSRQ=y
324CONFIG_DEBUG_KERNEL=y 324CONFIG_DEBUG_KERNEL=y
325CONFIG_DEBUG_STACK_USAGE=y 325CONFIG_DEBUG_STACK_USAGE=y
326CONFIG_DEBUG_STACKOVERFLOW=y 326CONFIG_DEBUG_STACKOVERFLOW=y
327CONFIG_LOCKUP_DETECTOR=y 327CONFIG_SOFTLOCKUP_DETECTOR=y
328CONFIG_HARDLOCKUP_DETECTOR=y
328CONFIG_DEBUG_MUTEXES=y 329CONFIG_DEBUG_MUTEXES=y
329CONFIG_LATENCYTOP=y 330CONFIG_LATENCYTOP=y
330CONFIG_SCHED_TRACER=y 331CONFIG_SCHED_TRACER=y
diff --git a/arch/powerpc/configs/pseries_defconfig b/arch/powerpc/configs/pseries_defconfig
index 1a61aa20dfba..fd5d98a0b95c 100644
--- a/arch/powerpc/configs/pseries_defconfig
+++ b/arch/powerpc/configs/pseries_defconfig
@@ -291,7 +291,8 @@ CONFIG_MAGIC_SYSRQ=y
291CONFIG_DEBUG_KERNEL=y 291CONFIG_DEBUG_KERNEL=y
292CONFIG_DEBUG_STACK_USAGE=y 292CONFIG_DEBUG_STACK_USAGE=y
293CONFIG_DEBUG_STACKOVERFLOW=y 293CONFIG_DEBUG_STACKOVERFLOW=y
294CONFIG_LOCKUP_DETECTOR=y 294CONFIG_SOFTLOCKUP_DETECTOR=y
295CONFIG_HARDLOCKUP_DETECTOR=y
295CONFIG_LATENCYTOP=y 296CONFIG_LATENCYTOP=y
296CONFIG_SCHED_TRACER=y 297CONFIG_SCHED_TRACER=y
297CONFIG_BLK_DEV_IO_TRACE=y 298CONFIG_BLK_DEV_IO_TRACE=y
diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S
index 49d8422767b4..e925c1c99c71 100644
--- a/arch/powerpc/kernel/entry_64.S
+++ b/arch/powerpc/kernel/entry_64.S
@@ -223,17 +223,27 @@ system_call_exit:
223 andi. r0,r9,(_TIF_SYSCALL_DOTRACE|_TIF_SINGLESTEP|_TIF_USER_WORK_MASK|_TIF_PERSYSCALL_MASK) 223 andi. r0,r9,(_TIF_SYSCALL_DOTRACE|_TIF_SINGLESTEP|_TIF_USER_WORK_MASK|_TIF_PERSYSCALL_MASK)
224 bne- .Lsyscall_exit_work 224 bne- .Lsyscall_exit_work
225 225
226 /* If MSR_FP and MSR_VEC are set in user msr, then no need to restore */ 226 andi. r0,r8,MSR_FP
227 li r7,MSR_FP 227 beq 2f
228#ifdef CONFIG_ALTIVEC 228#ifdef CONFIG_ALTIVEC
229 oris r7,r7,MSR_VEC@h 229 andis. r0,r8,MSR_VEC@h
230 bne 3f
230#endif 231#endif
231 and r0,r8,r7 2322: addi r3,r1,STACK_FRAME_OVERHEAD
232 cmpd r0,r7 233#ifdef CONFIG_PPC_BOOK3S
233 bne .Lsyscall_restore_math 234 li r10,MSR_RI
234.Lsyscall_restore_math_cont: 235 mtmsrd r10,1 /* Restore RI */
236#endif
237 bl restore_math
238#ifdef CONFIG_PPC_BOOK3S
239 li r11,0
240 mtmsrd r11,1
241#endif
242 ld r8,_MSR(r1)
243 ld r3,RESULT(r1)
244 li r11,-MAX_ERRNO
235 245
236 cmpld r3,r11 2463: cmpld r3,r11
237 ld r5,_CCR(r1) 247 ld r5,_CCR(r1)
238 bge- .Lsyscall_error 248 bge- .Lsyscall_error
239.Lsyscall_error_cont: 249.Lsyscall_error_cont:
@@ -267,40 +277,6 @@ END_FTR_SECTION_IFSET(CPU_FTR_HAS_PPR)
267 std r5,_CCR(r1) 277 std r5,_CCR(r1)
268 b .Lsyscall_error_cont 278 b .Lsyscall_error_cont
269 279
270.Lsyscall_restore_math:
271 /*
272 * Some initial tests from restore_math to avoid the heavyweight
273 * C code entry and MSR manipulations.
274 */
275 LOAD_REG_IMMEDIATE(r0, MSR_TS_MASK)
276 and. r0,r0,r8
277 bne 1f
278
279 ld r7,PACACURRENT(r13)
280 lbz r0,THREAD+THREAD_LOAD_FP(r7)
281#ifdef CONFIG_ALTIVEC
282 lbz r6,THREAD+THREAD_LOAD_VEC(r7)
283 add r0,r0,r6
284#endif
285 cmpdi r0,0
286 beq .Lsyscall_restore_math_cont
287
2881: addi r3,r1,STACK_FRAME_OVERHEAD
289#ifdef CONFIG_PPC_BOOK3S
290 li r10,MSR_RI
291 mtmsrd r10,1 /* Restore RI */
292#endif
293 bl restore_math
294#ifdef CONFIG_PPC_BOOK3S
295 li r11,0
296 mtmsrd r11,1
297#endif
298 /* Restore volatiles, reload MSR from updated one */
299 ld r8,_MSR(r1)
300 ld r3,RESULT(r1)
301 li r11,-MAX_ERRNO
302 b .Lsyscall_restore_math_cont
303
304/* Traced system call support */ 280/* Traced system call support */
305.Lsyscall_dotrace: 281.Lsyscall_dotrace:
306 bl save_nvgprs 282 bl save_nvgprs
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index 9f3e2c932dcc..1f0fd361e09b 100644
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -362,7 +362,8 @@ void enable_kernel_vsx(void)
362 362
363 cpumsr = msr_check_and_set(MSR_FP|MSR_VEC|MSR_VSX); 363 cpumsr = msr_check_and_set(MSR_FP|MSR_VEC|MSR_VSX);
364 364
365 if (current->thread.regs && (current->thread.regs->msr & MSR_VSX)) { 365 if (current->thread.regs &&
366 (current->thread.regs->msr & (MSR_VSX|MSR_VEC|MSR_FP))) {
366 check_if_tm_restore_required(current); 367 check_if_tm_restore_required(current);
367 /* 368 /*
368 * If a thread has already been reclaimed then the 369 * If a thread has already been reclaimed then the
@@ -386,7 +387,7 @@ void flush_vsx_to_thread(struct task_struct *tsk)
386{ 387{
387 if (tsk->thread.regs) { 388 if (tsk->thread.regs) {
388 preempt_disable(); 389 preempt_disable();
389 if (tsk->thread.regs->msr & MSR_VSX) { 390 if (tsk->thread.regs->msr & (MSR_VSX|MSR_VEC|MSR_FP)) {
390 BUG_ON(tsk != current); 391 BUG_ON(tsk != current);
391 giveup_vsx(tsk); 392 giveup_vsx(tsk);
392 } 393 }
@@ -511,10 +512,6 @@ void restore_math(struct pt_regs *regs)
511{ 512{
512 unsigned long msr; 513 unsigned long msr;
513 514
514 /*
515 * Syscall exit makes a similar initial check before branching
516 * to restore_math. Keep them in synch.
517 */
518 if (!msr_tm_active(regs->msr) && 515 if (!msr_tm_active(regs->msr) &&
519 !current->thread.load_fp && !loadvec(current->thread)) 516 !current->thread.load_fp && !loadvec(current->thread))
520 return; 517 return;
diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c
index cf0e1245b8cc..8d3320562c70 100644
--- a/arch/powerpc/kernel/smp.c
+++ b/arch/powerpc/kernel/smp.c
@@ -351,7 +351,7 @@ static void nmi_ipi_lock_start(unsigned long *flags)
351 hard_irq_disable(); 351 hard_irq_disable();
352 while (atomic_cmpxchg(&__nmi_ipi_lock, 0, 1) == 1) { 352 while (atomic_cmpxchg(&__nmi_ipi_lock, 0, 1) == 1) {
353 raw_local_irq_restore(*flags); 353 raw_local_irq_restore(*flags);
354 cpu_relax(); 354 spin_until_cond(atomic_read(&__nmi_ipi_lock) == 0);
355 raw_local_irq_save(*flags); 355 raw_local_irq_save(*flags);
356 hard_irq_disable(); 356 hard_irq_disable();
357 } 357 }
@@ -360,7 +360,7 @@ static void nmi_ipi_lock_start(unsigned long *flags)
360static void nmi_ipi_lock(void) 360static void nmi_ipi_lock(void)
361{ 361{
362 while (atomic_cmpxchg(&__nmi_ipi_lock, 0, 1) == 1) 362 while (atomic_cmpxchg(&__nmi_ipi_lock, 0, 1) == 1)
363 cpu_relax(); 363 spin_until_cond(atomic_read(&__nmi_ipi_lock) == 0);
364} 364}
365 365
366static void nmi_ipi_unlock(void) 366static void nmi_ipi_unlock(void)
@@ -475,7 +475,7 @@ int smp_send_nmi_ipi(int cpu, void (*fn)(struct pt_regs *), u64 delay_us)
475 nmi_ipi_lock_start(&flags); 475 nmi_ipi_lock_start(&flags);
476 while (nmi_ipi_busy_count) { 476 while (nmi_ipi_busy_count) {
477 nmi_ipi_unlock_end(&flags); 477 nmi_ipi_unlock_end(&flags);
478 cpu_relax(); 478 spin_until_cond(nmi_ipi_busy_count == 0);
479 nmi_ipi_lock_start(&flags); 479 nmi_ipi_lock_start(&flags);
480 } 480 }
481 481
diff --git a/arch/powerpc/kernel/watchdog.c b/arch/powerpc/kernel/watchdog.c
index b67f8b03a32d..34721a257a77 100644
--- a/arch/powerpc/kernel/watchdog.c
+++ b/arch/powerpc/kernel/watchdog.c
@@ -71,15 +71,20 @@ static inline void wd_smp_lock(unsigned long *flags)
71 * This may be called from low level interrupt handlers at some 71 * This may be called from low level interrupt handlers at some
72 * point in future. 72 * point in future.
73 */ 73 */
74 local_irq_save(*flags); 74 raw_local_irq_save(*flags);
75 while (unlikely(test_and_set_bit_lock(0, &__wd_smp_lock))) 75 hard_irq_disable(); /* Make it soft-NMI safe */
76 cpu_relax(); 76 while (unlikely(test_and_set_bit_lock(0, &__wd_smp_lock))) {
77 raw_local_irq_restore(*flags);
78 spin_until_cond(!test_bit(0, &__wd_smp_lock));
79 raw_local_irq_save(*flags);
80 hard_irq_disable();
81 }
77} 82}
78 83
79static inline void wd_smp_unlock(unsigned long *flags) 84static inline void wd_smp_unlock(unsigned long *flags)
80{ 85{
81 clear_bit_unlock(0, &__wd_smp_lock); 86 clear_bit_unlock(0, &__wd_smp_lock);
82 local_irq_restore(*flags); 87 raw_local_irq_restore(*flags);
83} 88}
84 89
85static void wd_lockup_ipi(struct pt_regs *regs) 90static void wd_lockup_ipi(struct pt_regs *regs)
@@ -96,10 +101,10 @@ static void wd_lockup_ipi(struct pt_regs *regs)
96 nmi_panic(regs, "Hard LOCKUP"); 101 nmi_panic(regs, "Hard LOCKUP");
97} 102}
98 103
99static void set_cpu_stuck(int cpu, u64 tb) 104static void set_cpumask_stuck(const struct cpumask *cpumask, u64 tb)
100{ 105{
101 cpumask_set_cpu(cpu, &wd_smp_cpus_stuck); 106 cpumask_or(&wd_smp_cpus_stuck, &wd_smp_cpus_stuck, cpumask);
102 cpumask_clear_cpu(cpu, &wd_smp_cpus_pending); 107 cpumask_andnot(&wd_smp_cpus_pending, &wd_smp_cpus_pending, cpumask);
103 if (cpumask_empty(&wd_smp_cpus_pending)) { 108 if (cpumask_empty(&wd_smp_cpus_pending)) {
104 wd_smp_last_reset_tb = tb; 109 wd_smp_last_reset_tb = tb;
105 cpumask_andnot(&wd_smp_cpus_pending, 110 cpumask_andnot(&wd_smp_cpus_pending,
@@ -107,6 +112,10 @@ static void set_cpu_stuck(int cpu, u64 tb)
107 &wd_smp_cpus_stuck); 112 &wd_smp_cpus_stuck);
108 } 113 }
109} 114}
115static void set_cpu_stuck(int cpu, u64 tb)
116{
117 set_cpumask_stuck(cpumask_of(cpu), tb);
118}
110 119
111static void watchdog_smp_panic(int cpu, u64 tb) 120static void watchdog_smp_panic(int cpu, u64 tb)
112{ 121{
@@ -135,11 +144,9 @@ static void watchdog_smp_panic(int cpu, u64 tb)
135 } 144 }
136 smp_flush_nmi_ipi(1000000); 145 smp_flush_nmi_ipi(1000000);
137 146
138 /* Take the stuck CPU out of the watch group */ 147 /* Take the stuck CPUs out of the watch group */
139 for_each_cpu(c, &wd_smp_cpus_pending) 148 set_cpumask_stuck(&wd_smp_cpus_pending, tb);
140 set_cpu_stuck(c, tb);
141 149
142out:
143 wd_smp_unlock(&flags); 150 wd_smp_unlock(&flags);
144 151
145 printk_safe_flush(); 152 printk_safe_flush();
@@ -152,6 +159,11 @@ out:
152 159
153 if (hardlockup_panic) 160 if (hardlockup_panic)
154 nmi_panic(NULL, "Hard LOCKUP"); 161 nmi_panic(NULL, "Hard LOCKUP");
162
163 return;
164
165out:
166 wd_smp_unlock(&flags);
155} 167}
156 168
157static void wd_smp_clear_cpu_pending(int cpu, u64 tb) 169static void wd_smp_clear_cpu_pending(int cpu, u64 tb)
@@ -258,9 +270,11 @@ static void wd_timer_fn(unsigned long data)
258 270
259void arch_touch_nmi_watchdog(void) 271void arch_touch_nmi_watchdog(void)
260{ 272{
273 unsigned long ticks = tb_ticks_per_usec * wd_timer_period_ms * 1000;
261 int cpu = smp_processor_id(); 274 int cpu = smp_processor_id();
262 275
263 watchdog_timer_interrupt(cpu); 276 if (get_tb() - per_cpu(wd_timer_tb, cpu) >= ticks)
277 watchdog_timer_interrupt(cpu);
264} 278}
265EXPORT_SYMBOL(arch_touch_nmi_watchdog); 279EXPORT_SYMBOL(arch_touch_nmi_watchdog);
266 280
@@ -283,6 +297,8 @@ static void stop_watchdog_timer_on(unsigned int cpu)
283 297
284static int start_wd_on_cpu(unsigned int cpu) 298static int start_wd_on_cpu(unsigned int cpu)
285{ 299{
300 unsigned long flags;
301
286 if (cpumask_test_cpu(cpu, &wd_cpus_enabled)) { 302 if (cpumask_test_cpu(cpu, &wd_cpus_enabled)) {
287 WARN_ON(1); 303 WARN_ON(1);
288 return 0; 304 return 0;
@@ -297,12 +313,14 @@ static int start_wd_on_cpu(unsigned int cpu)
297 if (!cpumask_test_cpu(cpu, &watchdog_cpumask)) 313 if (!cpumask_test_cpu(cpu, &watchdog_cpumask))
298 return 0; 314 return 0;
299 315
316 wd_smp_lock(&flags);
300 cpumask_set_cpu(cpu, &wd_cpus_enabled); 317 cpumask_set_cpu(cpu, &wd_cpus_enabled);
301 if (cpumask_weight(&wd_cpus_enabled) == 1) { 318 if (cpumask_weight(&wd_cpus_enabled) == 1) {
302 cpumask_set_cpu(cpu, &wd_smp_cpus_pending); 319 cpumask_set_cpu(cpu, &wd_smp_cpus_pending);
303 wd_smp_last_reset_tb = get_tb(); 320 wd_smp_last_reset_tb = get_tb();
304 } 321 }
305 smp_wmb(); 322 wd_smp_unlock(&flags);
323
306 start_watchdog_timer_on(cpu); 324 start_watchdog_timer_on(cpu);
307 325
308 return 0; 326 return 0;
@@ -310,12 +328,17 @@ static int start_wd_on_cpu(unsigned int cpu)
310 328
311static int stop_wd_on_cpu(unsigned int cpu) 329static int stop_wd_on_cpu(unsigned int cpu)
312{ 330{
331 unsigned long flags;
332
313 if (!cpumask_test_cpu(cpu, &wd_cpus_enabled)) 333 if (!cpumask_test_cpu(cpu, &wd_cpus_enabled))
314 return 0; /* Can happen in CPU unplug case */ 334 return 0; /* Can happen in CPU unplug case */
315 335
316 stop_watchdog_timer_on(cpu); 336 stop_watchdog_timer_on(cpu);
317 337
338 wd_smp_lock(&flags);
318 cpumask_clear_cpu(cpu, &wd_cpus_enabled); 339 cpumask_clear_cpu(cpu, &wd_cpus_enabled);
340 wd_smp_unlock(&flags);
341
319 wd_smp_clear_cpu_pending(cpu, get_tb()); 342 wd_smp_clear_cpu_pending(cpu, get_tb());
320 343
321 return 0; 344 return 0;
diff --git a/arch/powerpc/platforms/powernv/idle.c b/arch/powerpc/platforms/powernv/idle.c
index 2abee070373f..a553aeea7af6 100644
--- a/arch/powerpc/platforms/powernv/idle.c
+++ b/arch/powerpc/platforms/powernv/idle.c
@@ -56,6 +56,7 @@ u64 pnv_first_deep_stop_state = MAX_STOP_STATE;
56 */ 56 */
57static u64 pnv_deepest_stop_psscr_val; 57static u64 pnv_deepest_stop_psscr_val;
58static u64 pnv_deepest_stop_psscr_mask; 58static u64 pnv_deepest_stop_psscr_mask;
59static u64 pnv_deepest_stop_flag;
59static bool deepest_stop_found; 60static bool deepest_stop_found;
60 61
61static int pnv_save_sprs_for_deep_states(void) 62static int pnv_save_sprs_for_deep_states(void)
@@ -185,8 +186,40 @@ static void pnv_alloc_idle_core_states(void)
185 186
186 update_subcore_sibling_mask(); 187 update_subcore_sibling_mask();
187 188
188 if (supported_cpuidle_states & OPAL_PM_LOSE_FULL_CONTEXT) 189 if (supported_cpuidle_states & OPAL_PM_LOSE_FULL_CONTEXT) {
189 pnv_save_sprs_for_deep_states(); 190 int rc = pnv_save_sprs_for_deep_states();
191
192 if (likely(!rc))
193 return;
194
195 /*
196 * The stop-api is unable to restore hypervisor
197 * resources on wakeup from platform idle states which
198 * lose full context. So disable such states.
199 */
200 supported_cpuidle_states &= ~OPAL_PM_LOSE_FULL_CONTEXT;
201 pr_warn("cpuidle-powernv: Disabling idle states that lose full context\n");
202 pr_warn("cpuidle-powernv: Idle power-savings, CPU-Hotplug affected\n");
203
204 if (cpu_has_feature(CPU_FTR_ARCH_300) &&
205 (pnv_deepest_stop_flag & OPAL_PM_LOSE_FULL_CONTEXT)) {
206 /*
207 * Use the default stop state for CPU-Hotplug
208 * if available.
209 */
210 if (default_stop_found) {
211 pnv_deepest_stop_psscr_val =
212 pnv_default_stop_val;
213 pnv_deepest_stop_psscr_mask =
214 pnv_default_stop_mask;
215 pr_warn("cpuidle-powernv: Offlined CPUs will stop with psscr = 0x%016llx\n",
216 pnv_deepest_stop_psscr_val);
217 } else { /* Fallback to snooze loop for CPU-Hotplug */
218 deepest_stop_found = false;
219 pr_warn("cpuidle-powernv: Offlined CPUs will busy wait\n");
220 }
221 }
222 }
190} 223}
191 224
192u32 pnv_get_supported_cpuidle_states(void) 225u32 pnv_get_supported_cpuidle_states(void)
@@ -375,7 +408,8 @@ unsigned long pnv_cpu_offline(unsigned int cpu)
375 pnv_deepest_stop_psscr_val; 408 pnv_deepest_stop_psscr_val;
376 srr1 = power9_idle_stop(psscr); 409 srr1 = power9_idle_stop(psscr);
377 410
378 } else if (idle_states & OPAL_PM_WINKLE_ENABLED) { 411 } else if ((idle_states & OPAL_PM_WINKLE_ENABLED) &&
412 (idle_states & OPAL_PM_LOSE_FULL_CONTEXT)) {
379 srr1 = power7_idle_insn(PNV_THREAD_WINKLE); 413 srr1 = power7_idle_insn(PNV_THREAD_WINKLE);
380 } else if ((idle_states & OPAL_PM_SLEEP_ENABLED) || 414 } else if ((idle_states & OPAL_PM_SLEEP_ENABLED) ||
381 (idle_states & OPAL_PM_SLEEP_ENABLED_ER1)) { 415 (idle_states & OPAL_PM_SLEEP_ENABLED_ER1)) {
@@ -553,6 +587,7 @@ static int __init pnv_power9_idle_init(struct device_node *np, u32 *flags,
553 max_residency_ns = residency_ns[i]; 587 max_residency_ns = residency_ns[i];
554 pnv_deepest_stop_psscr_val = psscr_val[i]; 588 pnv_deepest_stop_psscr_val = psscr_val[i];
555 pnv_deepest_stop_psscr_mask = psscr_mask[i]; 589 pnv_deepest_stop_psscr_mask = psscr_mask[i];
590 pnv_deepest_stop_flag = flags[i];
556 deepest_stop_found = true; 591 deepest_stop_found = true;
557 } 592 }
558 593
diff --git a/arch/sparc/include/asm/page_32.h b/arch/sparc/include/asm/page_32.h
index 0efd0583a8c9..6249214148c2 100644
--- a/arch/sparc/include/asm/page_32.h
+++ b/arch/sparc/include/asm/page_32.h
@@ -68,6 +68,7 @@ typedef struct { unsigned long iopgprot; } iopgprot_t;
68#define iopgprot_val(x) ((x).iopgprot) 68#define iopgprot_val(x) ((x).iopgprot)
69 69
70#define __pte(x) ((pte_t) { (x) } ) 70#define __pte(x) ((pte_t) { (x) } )
71#define __pmd(x) ((pmd_t) { { (x) }, })
71#define __iopte(x) ((iopte_t) { (x) } ) 72#define __iopte(x) ((iopte_t) { (x) } )
72#define __pgd(x) ((pgd_t) { (x) } ) 73#define __pgd(x) ((pgd_t) { (x) } )
73#define __ctxd(x) ((ctxd_t) { (x) } ) 74#define __ctxd(x) ((ctxd_t) { (x) } )
@@ -95,6 +96,7 @@ typedef unsigned long iopgprot_t;
95#define iopgprot_val(x) (x) 96#define iopgprot_val(x) (x)
96 97
97#define __pte(x) (x) 98#define __pte(x) (x)
99#define __pmd(x) ((pmd_t) { { (x) }, })
98#define __iopte(x) (x) 100#define __iopte(x) (x)
99#define __pgd(x) (x) 101#define __pgd(x) (x)
100#define __ctxd(x) (x) 102#define __ctxd(x) (x)
diff --git a/arch/sparc/kernel/pci_sun4v.c b/arch/sparc/kernel/pci_sun4v.c
index f10e2f712394..9ebebf1fd93d 100644
--- a/arch/sparc/kernel/pci_sun4v.c
+++ b/arch/sparc/kernel/pci_sun4v.c
@@ -1266,8 +1266,6 @@ static int pci_sun4v_probe(struct platform_device *op)
1266 * ATU group, but ATU hcalls won't be available. 1266 * ATU group, but ATU hcalls won't be available.
1267 */ 1267 */
1268 hv_atu = false; 1268 hv_atu = false;
1269 pr_err(PFX "Could not register hvapi ATU err=%d\n",
1270 err);
1271 } else { 1269 } else {
1272 pr_info(PFX "Registered hvapi ATU major[%lu] minor[%lu]\n", 1270 pr_info(PFX "Registered hvapi ATU major[%lu] minor[%lu]\n",
1273 vatu_major, vatu_minor); 1271 vatu_major, vatu_minor);
diff --git a/arch/sparc/kernel/pcic.c b/arch/sparc/kernel/pcic.c
index a38787b84322..732af9a9f6dd 100644
--- a/arch/sparc/kernel/pcic.c
+++ b/arch/sparc/kernel/pcic.c
@@ -602,7 +602,7 @@ void pcibios_fixup_bus(struct pci_bus *bus)
602{ 602{
603 struct pci_dev *dev; 603 struct pci_dev *dev;
604 int i, has_io, has_mem; 604 int i, has_io, has_mem;
605 unsigned int cmd; 605 unsigned int cmd = 0;
606 struct linux_pcic *pcic; 606 struct linux_pcic *pcic;
607 /* struct linux_pbm_info* pbm = &pcic->pbm; */ 607 /* struct linux_pbm_info* pbm = &pcic->pbm; */
608 int node; 608 int node;
diff --git a/arch/sparc/lib/multi3.S b/arch/sparc/lib/multi3.S
index d6b6c97fe3c7..703127aaf4a5 100644
--- a/arch/sparc/lib/multi3.S
+++ b/arch/sparc/lib/multi3.S
@@ -5,26 +5,26 @@
5 .align 4 5 .align 4
6ENTRY(__multi3) /* %o0 = u, %o1 = v */ 6ENTRY(__multi3) /* %o0 = u, %o1 = v */
7 mov %o1, %g1 7 mov %o1, %g1
8 srl %o3, 0, %g4 8 srl %o3, 0, %o4
9 mulx %g4, %g1, %o1 9 mulx %o4, %g1, %o1
10 srlx %g1, 0x20, %g3 10 srlx %g1, 0x20, %g3
11 mulx %g3, %g4, %g5 11 mulx %g3, %o4, %g7
12 sllx %g5, 0x20, %o5 12 sllx %g7, 0x20, %o5
13 srl %g1, 0, %g4 13 srl %g1, 0, %o4
14 sub %o1, %o5, %o5 14 sub %o1, %o5, %o5
15 srlx %o5, 0x20, %o5 15 srlx %o5, 0x20, %o5
16 addcc %g5, %o5, %g5 16 addcc %g7, %o5, %g7
17 srlx %o3, 0x20, %o5 17 srlx %o3, 0x20, %o5
18 mulx %g4, %o5, %g4 18 mulx %o4, %o5, %o4
19 mulx %g3, %o5, %o5 19 mulx %g3, %o5, %o5
20 sethi %hi(0x80000000), %g3 20 sethi %hi(0x80000000), %g3
21 addcc %g5, %g4, %g5 21 addcc %g7, %o4, %g7
22 srlx %g5, 0x20, %g5 22 srlx %g7, 0x20, %g7
23 add %g3, %g3, %g3 23 add %g3, %g3, %g3
24 movcc %xcc, %g0, %g3 24 movcc %xcc, %g0, %g3
25 addcc %o5, %g5, %o5 25 addcc %o5, %g7, %o5
26 sllx %g4, 0x20, %g4 26 sllx %o4, 0x20, %o4
27 add %o1, %g4, %o1 27 add %o1, %o4, %o1
28 add %o5, %g3, %g2 28 add %o5, %g3, %g2
29 mulx %g1, %o2, %g1 29 mulx %g1, %o2, %g1
30 add %g1, %g2, %g1 30 add %g1, %g2, %g1
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 73574c91e857..6e01f585d57c 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -101,6 +101,7 @@ config X86
101 select GENERIC_STRNCPY_FROM_USER 101 select GENERIC_STRNCPY_FROM_USER
102 select GENERIC_STRNLEN_USER 102 select GENERIC_STRNLEN_USER
103 select GENERIC_TIME_VSYSCALL 103 select GENERIC_TIME_VSYSCALL
104 select HARDLOCKUP_CHECK_TIMESTAMP if X86_64
104 select HAVE_ACPI_APEI if ACPI 105 select HAVE_ACPI_APEI if ACPI
105 select HAVE_ACPI_APEI_NMI if ACPI 106 select HAVE_ACPI_APEI_NMI if ACPI
106 select HAVE_ALIGNED_STRUCT_PAGE if SLUB 107 select HAVE_ALIGNED_STRUCT_PAGE if SLUB
@@ -164,7 +165,7 @@ config X86
164 select HAVE_PCSPKR_PLATFORM 165 select HAVE_PCSPKR_PLATFORM
165 select HAVE_PERF_EVENTS 166 select HAVE_PERF_EVENTS
166 select HAVE_PERF_EVENTS_NMI 167 select HAVE_PERF_EVENTS_NMI
167 select HAVE_HARDLOCKUP_DETECTOR_PERF if HAVE_PERF_EVENTS_NMI 168 select HAVE_HARDLOCKUP_DETECTOR_PERF if PERF_EVENTS && HAVE_PERF_EVENTS_NMI
168 select HAVE_PERF_REGS 169 select HAVE_PERF_REGS
169 select HAVE_PERF_USER_STACK_DUMP 170 select HAVE_PERF_USER_STACK_DUMP
170 select HAVE_REGS_AND_STACK_ACCESS_API 171 select HAVE_REGS_AND_STACK_ACCESS_API
diff --git a/arch/x86/crypto/sha1_avx2_x86_64_asm.S b/arch/x86/crypto/sha1_avx2_x86_64_asm.S
index 1cd792db15ef..1eab79c9ac48 100644
--- a/arch/x86/crypto/sha1_avx2_x86_64_asm.S
+++ b/arch/x86/crypto/sha1_avx2_x86_64_asm.S
@@ -117,11 +117,10 @@
117 .set T1, REG_T1 117 .set T1, REG_T1
118.endm 118.endm
119 119
120#define K_BASE %r8
121#define HASH_PTR %r9 120#define HASH_PTR %r9
121#define BLOCKS_CTR %r8
122#define BUFFER_PTR %r10 122#define BUFFER_PTR %r10
123#define BUFFER_PTR2 %r13 123#define BUFFER_PTR2 %r13
124#define BUFFER_END %r11
125 124
126#define PRECALC_BUF %r14 125#define PRECALC_BUF %r14
127#define WK_BUF %r15 126#define WK_BUF %r15
@@ -205,14 +204,14 @@
205 * blended AVX2 and ALU instruction scheduling 204 * blended AVX2 and ALU instruction scheduling
206 * 1 vector iteration per 8 rounds 205 * 1 vector iteration per 8 rounds
207 */ 206 */
208 vmovdqu ((i * 2) + PRECALC_OFFSET)(BUFFER_PTR), W_TMP 207 vmovdqu (i * 2)(BUFFER_PTR), W_TMP
209 .elseif ((i & 7) == 1) 208 .elseif ((i & 7) == 1)
210 vinsertf128 $1, (((i-1) * 2)+PRECALC_OFFSET)(BUFFER_PTR2),\ 209 vinsertf128 $1, ((i-1) * 2)(BUFFER_PTR2),\
211 WY_TMP, WY_TMP 210 WY_TMP, WY_TMP
212 .elseif ((i & 7) == 2) 211 .elseif ((i & 7) == 2)
213 vpshufb YMM_SHUFB_BSWAP, WY_TMP, WY 212 vpshufb YMM_SHUFB_BSWAP, WY_TMP, WY
214 .elseif ((i & 7) == 4) 213 .elseif ((i & 7) == 4)
215 vpaddd K_XMM(K_BASE), WY, WY_TMP 214 vpaddd K_XMM + K_XMM_AR(%rip), WY, WY_TMP
216 .elseif ((i & 7) == 7) 215 .elseif ((i & 7) == 7)
217 vmovdqu WY_TMP, PRECALC_WK(i&~7) 216 vmovdqu WY_TMP, PRECALC_WK(i&~7)
218 217
@@ -255,7 +254,7 @@
255 vpxor WY, WY_TMP, WY_TMP 254 vpxor WY, WY_TMP, WY_TMP
256 .elseif ((i & 7) == 7) 255 .elseif ((i & 7) == 7)
257 vpxor WY_TMP2, WY_TMP, WY 256 vpxor WY_TMP2, WY_TMP, WY
258 vpaddd K_XMM(K_BASE), WY, WY_TMP 257 vpaddd K_XMM + K_XMM_AR(%rip), WY, WY_TMP
259 vmovdqu WY_TMP, PRECALC_WK(i&~7) 258 vmovdqu WY_TMP, PRECALC_WK(i&~7)
260 259
261 PRECALC_ROTATE_WY 260 PRECALC_ROTATE_WY
@@ -291,7 +290,7 @@
291 vpsrld $30, WY, WY 290 vpsrld $30, WY, WY
292 vpor WY, WY_TMP, WY 291 vpor WY, WY_TMP, WY
293 .elseif ((i & 7) == 7) 292 .elseif ((i & 7) == 7)
294 vpaddd K_XMM(K_BASE), WY, WY_TMP 293 vpaddd K_XMM + K_XMM_AR(%rip), WY, WY_TMP
295 vmovdqu WY_TMP, PRECALC_WK(i&~7) 294 vmovdqu WY_TMP, PRECALC_WK(i&~7)
296 295
297 PRECALC_ROTATE_WY 296 PRECALC_ROTATE_WY
@@ -446,6 +445,16 @@
446 445
447.endm 446.endm
448 447
448/* Add constant only if (%2 > %3) condition met (uses RTA as temp)
449 * %1 + %2 >= %3 ? %4 : 0
450 */
451.macro ADD_IF_GE a, b, c, d
452 mov \a, RTA
453 add $\d, RTA
454 cmp $\c, \b
455 cmovge RTA, \a
456.endm
457
449/* 458/*
450 * macro implements 80 rounds of SHA-1, for multiple blocks with s/w pipelining 459 * macro implements 80 rounds of SHA-1, for multiple blocks with s/w pipelining
451 */ 460 */
@@ -463,13 +472,16 @@
463 lea (2*4*80+32)(%rsp), WK_BUF 472 lea (2*4*80+32)(%rsp), WK_BUF
464 473
465 # Precalc WK for first 2 blocks 474 # Precalc WK for first 2 blocks
466 PRECALC_OFFSET = 0 475 ADD_IF_GE BUFFER_PTR2, BLOCKS_CTR, 2, 64
467 .set i, 0 476 .set i, 0
468 .rept 160 477 .rept 160
469 PRECALC i 478 PRECALC i
470 .set i, i + 1 479 .set i, i + 1
471 .endr 480 .endr
472 PRECALC_OFFSET = 128 481
482 /* Go to next block if needed */
483 ADD_IF_GE BUFFER_PTR, BLOCKS_CTR, 3, 128
484 ADD_IF_GE BUFFER_PTR2, BLOCKS_CTR, 4, 128
473 xchg WK_BUF, PRECALC_BUF 485 xchg WK_BUF, PRECALC_BUF
474 486
475 .align 32 487 .align 32
@@ -479,8 +491,8 @@ _loop:
479 * we use K_BASE value as a signal of a last block, 491 * we use K_BASE value as a signal of a last block,
480 * it is set below by: cmovae BUFFER_PTR, K_BASE 492 * it is set below by: cmovae BUFFER_PTR, K_BASE
481 */ 493 */
482 cmp K_BASE, BUFFER_PTR 494 test BLOCKS_CTR, BLOCKS_CTR
483 jne _begin 495 jnz _begin
484 .align 32 496 .align 32
485 jmp _end 497 jmp _end
486 .align 32 498 .align 32
@@ -512,10 +524,10 @@ _loop0:
512 .set j, j+2 524 .set j, j+2
513 .endr 525 .endr
514 526
515 add $(2*64), BUFFER_PTR /* move to next odd-64-byte block */ 527 /* Update Counter */
516 cmp BUFFER_END, BUFFER_PTR /* is current block the last one? */ 528 sub $1, BLOCKS_CTR
517 cmovae K_BASE, BUFFER_PTR /* signal the last iteration smartly */ 529 /* Move to the next block only if needed*/
518 530 ADD_IF_GE BUFFER_PTR, BLOCKS_CTR, 4, 128
519 /* 531 /*
520 * rounds 532 * rounds
521 * 60,62,64,66,68 533 * 60,62,64,66,68
@@ -532,8 +544,8 @@ _loop0:
532 UPDATE_HASH 12(HASH_PTR), D 544 UPDATE_HASH 12(HASH_PTR), D
533 UPDATE_HASH 16(HASH_PTR), E 545 UPDATE_HASH 16(HASH_PTR), E
534 546
535 cmp K_BASE, BUFFER_PTR /* is current block the last one? */ 547 test BLOCKS_CTR, BLOCKS_CTR
536 je _loop 548 jz _loop
537 549
538 mov TB, B 550 mov TB, B
539 551
@@ -575,10 +587,10 @@ _loop2:
575 .set j, j+2 587 .set j, j+2
576 .endr 588 .endr
577 589
578 add $(2*64), BUFFER_PTR2 /* move to next even-64-byte block */ 590 /* update counter */
579 591 sub $1, BLOCKS_CTR
580 cmp BUFFER_END, BUFFER_PTR2 /* is current block the last one */ 592 /* Move to the next block only if needed*/
581 cmovae K_BASE, BUFFER_PTR /* signal the last iteration smartly */ 593 ADD_IF_GE BUFFER_PTR2, BLOCKS_CTR, 4, 128
582 594
583 jmp _loop3 595 jmp _loop3
584_loop3: 596_loop3:
@@ -641,19 +653,12 @@ _loop3:
641 653
642 avx2_zeroupper 654 avx2_zeroupper
643 655
644 lea K_XMM_AR(%rip), K_BASE 656 /* Setup initial values */
645
646 mov CTX, HASH_PTR 657 mov CTX, HASH_PTR
647 mov BUF, BUFFER_PTR 658 mov BUF, BUFFER_PTR
648 lea 64(BUF), BUFFER_PTR2
649
650 shl $6, CNT /* mul by 64 */
651 add BUF, CNT
652 add $64, CNT
653 mov CNT, BUFFER_END
654 659
655 cmp BUFFER_END, BUFFER_PTR2 660 mov BUF, BUFFER_PTR2
656 cmovae K_BASE, BUFFER_PTR2 661 mov CNT, BLOCKS_CTR
657 662
658 xmm_mov BSWAP_SHUFB_CTL(%rip), YMM_SHUFB_BSWAP 663 xmm_mov BSWAP_SHUFB_CTL(%rip), YMM_SHUFB_BSWAP
659 664
diff --git a/arch/x86/crypto/sha1_ssse3_glue.c b/arch/x86/crypto/sha1_ssse3_glue.c
index f960a043cdeb..fc61739150e7 100644
--- a/arch/x86/crypto/sha1_ssse3_glue.c
+++ b/arch/x86/crypto/sha1_ssse3_glue.c
@@ -201,7 +201,7 @@ asmlinkage void sha1_transform_avx2(u32 *digest, const char *data,
201 201
202static bool avx2_usable(void) 202static bool avx2_usable(void)
203{ 203{
204 if (false && avx_usable() && boot_cpu_has(X86_FEATURE_AVX2) 204 if (avx_usable() && boot_cpu_has(X86_FEATURE_AVX2)
205 && boot_cpu_has(X86_FEATURE_BMI1) 205 && boot_cpu_has(X86_FEATURE_BMI1)
206 && boot_cpu_has(X86_FEATURE_BMI2)) 206 && boot_cpu_has(X86_FEATURE_BMI2))
207 return true; 207 return true;
diff --git a/arch/x86/entry/entry_64.S b/arch/x86/entry/entry_64.S
index daf8936d0628..64b233ab7cad 100644
--- a/arch/x86/entry/entry_64.S
+++ b/arch/x86/entry/entry_64.S
@@ -1313,6 +1313,8 @@ ENTRY(nmi)
1313 * other IST entries. 1313 * other IST entries.
1314 */ 1314 */
1315 1315
1316 ASM_CLAC
1317
1316 /* Use %rdx as our temp variable throughout */ 1318 /* Use %rdx as our temp variable throughout */
1317 pushq %rdx 1319 pushq %rdx
1318 1320
diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c
index 8e3db8f642a7..af12e294caed 100644
--- a/arch/x86/events/core.c
+++ b/arch/x86/events/core.c
@@ -2114,7 +2114,7 @@ static void refresh_pce(void *ignored)
2114 load_mm_cr4(this_cpu_read(cpu_tlbstate.loaded_mm)); 2114 load_mm_cr4(this_cpu_read(cpu_tlbstate.loaded_mm));
2115} 2115}
2116 2116
2117static void x86_pmu_event_mapped(struct perf_event *event) 2117static void x86_pmu_event_mapped(struct perf_event *event, struct mm_struct *mm)
2118{ 2118{
2119 if (!(event->hw.flags & PERF_X86_EVENT_RDPMC_ALLOWED)) 2119 if (!(event->hw.flags & PERF_X86_EVENT_RDPMC_ALLOWED))
2120 return; 2120 return;
@@ -2129,22 +2129,20 @@ static void x86_pmu_event_mapped(struct perf_event *event)
2129 * For now, this can't happen because all callers hold mmap_sem 2129 * For now, this can't happen because all callers hold mmap_sem
2130 * for write. If this changes, we'll need a different solution. 2130 * for write. If this changes, we'll need a different solution.
2131 */ 2131 */
2132 lockdep_assert_held_exclusive(&current->mm->mmap_sem); 2132 lockdep_assert_held_exclusive(&mm->mmap_sem);
2133 2133
2134 if (atomic_inc_return(&current->mm->context.perf_rdpmc_allowed) == 1) 2134 if (atomic_inc_return(&mm->context.perf_rdpmc_allowed) == 1)
2135 on_each_cpu_mask(mm_cpumask(current->mm), refresh_pce, NULL, 1); 2135 on_each_cpu_mask(mm_cpumask(mm), refresh_pce, NULL, 1);
2136} 2136}
2137 2137
2138static void x86_pmu_event_unmapped(struct perf_event *event) 2138static void x86_pmu_event_unmapped(struct perf_event *event, struct mm_struct *mm)
2139{ 2139{
2140 if (!current->mm)
2141 return;
2142 2140
2143 if (!(event->hw.flags & PERF_X86_EVENT_RDPMC_ALLOWED)) 2141 if (!(event->hw.flags & PERF_X86_EVENT_RDPMC_ALLOWED))
2144 return; 2142 return;
2145 2143
2146 if (atomic_dec_and_test(&current->mm->context.perf_rdpmc_allowed)) 2144 if (atomic_dec_and_test(&mm->context.perf_rdpmc_allowed))
2147 on_each_cpu_mask(mm_cpumask(current->mm), refresh_pce, NULL, 1); 2145 on_each_cpu_mask(mm_cpumask(mm), refresh_pce, NULL, 1);
2148} 2146}
2149 2147
2150static int x86_pmu_event_idx(struct perf_event *event) 2148static int x86_pmu_event_idx(struct perf_event *event)
diff --git a/arch/x86/events/intel/bts.c b/arch/x86/events/intel/bts.c
index 8ae8c5ce3a1f..ddd8d3516bfc 100644
--- a/arch/x86/events/intel/bts.c
+++ b/arch/x86/events/intel/bts.c
@@ -69,7 +69,7 @@ struct bts_buffer {
69 struct bts_phys buf[0]; 69 struct bts_phys buf[0];
70}; 70};
71 71
72struct pmu bts_pmu; 72static struct pmu bts_pmu;
73 73
74static size_t buf_size(struct page *page) 74static size_t buf_size(struct page *page)
75{ 75{
diff --git a/arch/x86/events/intel/p4.c b/arch/x86/events/intel/p4.c
index eb0533558c2b..d32c0eed38ca 100644
--- a/arch/x86/events/intel/p4.c
+++ b/arch/x86/events/intel/p4.c
@@ -587,7 +587,7 @@ static __initconst const u64 p4_hw_cache_event_ids
587 * P4_CONFIG_ALIASABLE or bits for P4_PEBS_METRIC, they are 587 * P4_CONFIG_ALIASABLE or bits for P4_PEBS_METRIC, they are
588 * either up to date automatically or not applicable at all. 588 * either up to date automatically or not applicable at all.
589 */ 589 */
590struct p4_event_alias { 590static struct p4_event_alias {
591 u64 original; 591 u64 original;
592 u64 alternative; 592 u64 alternative;
593} p4_event_aliases[] = { 593} p4_event_aliases[] = {
diff --git a/arch/x86/events/intel/rapl.c b/arch/x86/events/intel/rapl.c
index a45e2114a846..8e2457cb6b4a 100644
--- a/arch/x86/events/intel/rapl.c
+++ b/arch/x86/events/intel/rapl.c
@@ -559,7 +559,7 @@ static struct attribute_group rapl_pmu_format_group = {
559 .attrs = rapl_formats_attr, 559 .attrs = rapl_formats_attr,
560}; 560};
561 561
562const struct attribute_group *rapl_attr_groups[] = { 562static const struct attribute_group *rapl_attr_groups[] = {
563 &rapl_pmu_attr_group, 563 &rapl_pmu_attr_group,
564 &rapl_pmu_format_group, 564 &rapl_pmu_format_group,
565 &rapl_pmu_events_group, 565 &rapl_pmu_events_group,
diff --git a/arch/x86/events/intel/uncore.c b/arch/x86/events/intel/uncore.c
index 44ec523287f6..1c5390f1cf09 100644
--- a/arch/x86/events/intel/uncore.c
+++ b/arch/x86/events/intel/uncore.c
@@ -721,7 +721,7 @@ static struct attribute *uncore_pmu_attrs[] = {
721 NULL, 721 NULL,
722}; 722};
723 723
724static struct attribute_group uncore_pmu_attr_group = { 724static const struct attribute_group uncore_pmu_attr_group = {
725 .attrs = uncore_pmu_attrs, 725 .attrs = uncore_pmu_attrs,
726}; 726};
727 727
diff --git a/arch/x86/events/intel/uncore_nhmex.c b/arch/x86/events/intel/uncore_nhmex.c
index cda569332005..6a5cbe90f859 100644
--- a/arch/x86/events/intel/uncore_nhmex.c
+++ b/arch/x86/events/intel/uncore_nhmex.c
@@ -272,7 +272,7 @@ static struct attribute *nhmex_uncore_ubox_formats_attr[] = {
272 NULL, 272 NULL,
273}; 273};
274 274
275static struct attribute_group nhmex_uncore_ubox_format_group = { 275static const struct attribute_group nhmex_uncore_ubox_format_group = {
276 .name = "format", 276 .name = "format",
277 .attrs = nhmex_uncore_ubox_formats_attr, 277 .attrs = nhmex_uncore_ubox_formats_attr,
278}; 278};
@@ -299,7 +299,7 @@ static struct attribute *nhmex_uncore_cbox_formats_attr[] = {
299 NULL, 299 NULL,
300}; 300};
301 301
302static struct attribute_group nhmex_uncore_cbox_format_group = { 302static const struct attribute_group nhmex_uncore_cbox_format_group = {
303 .name = "format", 303 .name = "format",
304 .attrs = nhmex_uncore_cbox_formats_attr, 304 .attrs = nhmex_uncore_cbox_formats_attr,
305}; 305};
@@ -407,7 +407,7 @@ static struct attribute *nhmex_uncore_bbox_formats_attr[] = {
407 NULL, 407 NULL,
408}; 408};
409 409
410static struct attribute_group nhmex_uncore_bbox_format_group = { 410static const struct attribute_group nhmex_uncore_bbox_format_group = {
411 .name = "format", 411 .name = "format",
412 .attrs = nhmex_uncore_bbox_formats_attr, 412 .attrs = nhmex_uncore_bbox_formats_attr,
413}; 413};
@@ -484,7 +484,7 @@ static struct attribute *nhmex_uncore_sbox_formats_attr[] = {
484 NULL, 484 NULL,
485}; 485};
486 486
487static struct attribute_group nhmex_uncore_sbox_format_group = { 487static const struct attribute_group nhmex_uncore_sbox_format_group = {
488 .name = "format", 488 .name = "format",
489 .attrs = nhmex_uncore_sbox_formats_attr, 489 .attrs = nhmex_uncore_sbox_formats_attr,
490}; 490};
@@ -898,7 +898,7 @@ static struct attribute *nhmex_uncore_mbox_formats_attr[] = {
898 NULL, 898 NULL,
899}; 899};
900 900
901static struct attribute_group nhmex_uncore_mbox_format_group = { 901static const struct attribute_group nhmex_uncore_mbox_format_group = {
902 .name = "format", 902 .name = "format",
903 .attrs = nhmex_uncore_mbox_formats_attr, 903 .attrs = nhmex_uncore_mbox_formats_attr,
904}; 904};
@@ -1163,7 +1163,7 @@ static struct attribute *nhmex_uncore_rbox_formats_attr[] = {
1163 NULL, 1163 NULL,
1164}; 1164};
1165 1165
1166static struct attribute_group nhmex_uncore_rbox_format_group = { 1166static const struct attribute_group nhmex_uncore_rbox_format_group = {
1167 .name = "format", 1167 .name = "format",
1168 .attrs = nhmex_uncore_rbox_formats_attr, 1168 .attrs = nhmex_uncore_rbox_formats_attr,
1169}; 1169};
diff --git a/arch/x86/events/intel/uncore_snb.c b/arch/x86/events/intel/uncore_snb.c
index a3dcc12bef4a..db1127ce685e 100644
--- a/arch/x86/events/intel/uncore_snb.c
+++ b/arch/x86/events/intel/uncore_snb.c
@@ -130,7 +130,7 @@ static struct attribute *snb_uncore_formats_attr[] = {
130 NULL, 130 NULL,
131}; 131};
132 132
133static struct attribute_group snb_uncore_format_group = { 133static const struct attribute_group snb_uncore_format_group = {
134 .name = "format", 134 .name = "format",
135 .attrs = snb_uncore_formats_attr, 135 .attrs = snb_uncore_formats_attr,
136}; 136};
@@ -289,7 +289,7 @@ static struct attribute *snb_uncore_imc_formats_attr[] = {
289 NULL, 289 NULL,
290}; 290};
291 291
292static struct attribute_group snb_uncore_imc_format_group = { 292static const struct attribute_group snb_uncore_imc_format_group = {
293 .name = "format", 293 .name = "format",
294 .attrs = snb_uncore_imc_formats_attr, 294 .attrs = snb_uncore_imc_formats_attr,
295}; 295};
@@ -769,7 +769,7 @@ static struct attribute *nhm_uncore_formats_attr[] = {
769 NULL, 769 NULL,
770}; 770};
771 771
772static struct attribute_group nhm_uncore_format_group = { 772static const struct attribute_group nhm_uncore_format_group = {
773 .name = "format", 773 .name = "format",
774 .attrs = nhm_uncore_formats_attr, 774 .attrs = nhm_uncore_formats_attr,
775}; 775};
diff --git a/arch/x86/events/intel/uncore_snbep.c b/arch/x86/events/intel/uncore_snbep.c
index 4f9127644b80..db1fe377e6dd 100644
--- a/arch/x86/events/intel/uncore_snbep.c
+++ b/arch/x86/events/intel/uncore_snbep.c
@@ -602,27 +602,27 @@ static struct uncore_event_desc snbep_uncore_qpi_events[] = {
602 { /* end: all zeroes */ }, 602 { /* end: all zeroes */ },
603}; 603};
604 604
605static struct attribute_group snbep_uncore_format_group = { 605static const struct attribute_group snbep_uncore_format_group = {
606 .name = "format", 606 .name = "format",
607 .attrs = snbep_uncore_formats_attr, 607 .attrs = snbep_uncore_formats_attr,
608}; 608};
609 609
610static struct attribute_group snbep_uncore_ubox_format_group = { 610static const struct attribute_group snbep_uncore_ubox_format_group = {
611 .name = "format", 611 .name = "format",
612 .attrs = snbep_uncore_ubox_formats_attr, 612 .attrs = snbep_uncore_ubox_formats_attr,
613}; 613};
614 614
615static struct attribute_group snbep_uncore_cbox_format_group = { 615static const struct attribute_group snbep_uncore_cbox_format_group = {
616 .name = "format", 616 .name = "format",
617 .attrs = snbep_uncore_cbox_formats_attr, 617 .attrs = snbep_uncore_cbox_formats_attr,
618}; 618};
619 619
620static struct attribute_group snbep_uncore_pcu_format_group = { 620static const struct attribute_group snbep_uncore_pcu_format_group = {
621 .name = "format", 621 .name = "format",
622 .attrs = snbep_uncore_pcu_formats_attr, 622 .attrs = snbep_uncore_pcu_formats_attr,
623}; 623};
624 624
625static struct attribute_group snbep_uncore_qpi_format_group = { 625static const struct attribute_group snbep_uncore_qpi_format_group = {
626 .name = "format", 626 .name = "format",
627 .attrs = snbep_uncore_qpi_formats_attr, 627 .attrs = snbep_uncore_qpi_formats_attr,
628}; 628};
@@ -1431,27 +1431,27 @@ static struct attribute *ivbep_uncore_qpi_formats_attr[] = {
1431 NULL, 1431 NULL,
1432}; 1432};
1433 1433
1434static struct attribute_group ivbep_uncore_format_group = { 1434static const struct attribute_group ivbep_uncore_format_group = {
1435 .name = "format", 1435 .name = "format",
1436 .attrs = ivbep_uncore_formats_attr, 1436 .attrs = ivbep_uncore_formats_attr,
1437}; 1437};
1438 1438
1439static struct attribute_group ivbep_uncore_ubox_format_group = { 1439static const struct attribute_group ivbep_uncore_ubox_format_group = {
1440 .name = "format", 1440 .name = "format",
1441 .attrs = ivbep_uncore_ubox_formats_attr, 1441 .attrs = ivbep_uncore_ubox_formats_attr,
1442}; 1442};
1443 1443
1444static struct attribute_group ivbep_uncore_cbox_format_group = { 1444static const struct attribute_group ivbep_uncore_cbox_format_group = {
1445 .name = "format", 1445 .name = "format",
1446 .attrs = ivbep_uncore_cbox_formats_attr, 1446 .attrs = ivbep_uncore_cbox_formats_attr,
1447}; 1447};
1448 1448
1449static struct attribute_group ivbep_uncore_pcu_format_group = { 1449static const struct attribute_group ivbep_uncore_pcu_format_group = {
1450 .name = "format", 1450 .name = "format",
1451 .attrs = ivbep_uncore_pcu_formats_attr, 1451 .attrs = ivbep_uncore_pcu_formats_attr,
1452}; 1452};
1453 1453
1454static struct attribute_group ivbep_uncore_qpi_format_group = { 1454static const struct attribute_group ivbep_uncore_qpi_format_group = {
1455 .name = "format", 1455 .name = "format",
1456 .attrs = ivbep_uncore_qpi_formats_attr, 1456 .attrs = ivbep_uncore_qpi_formats_attr,
1457}; 1457};
@@ -1887,7 +1887,7 @@ static struct attribute *knl_uncore_ubox_formats_attr[] = {
1887 NULL, 1887 NULL,
1888}; 1888};
1889 1889
1890static struct attribute_group knl_uncore_ubox_format_group = { 1890static const struct attribute_group knl_uncore_ubox_format_group = {
1891 .name = "format", 1891 .name = "format",
1892 .attrs = knl_uncore_ubox_formats_attr, 1892 .attrs = knl_uncore_ubox_formats_attr,
1893}; 1893};
@@ -1927,7 +1927,7 @@ static struct attribute *knl_uncore_cha_formats_attr[] = {
1927 NULL, 1927 NULL,
1928}; 1928};
1929 1929
1930static struct attribute_group knl_uncore_cha_format_group = { 1930static const struct attribute_group knl_uncore_cha_format_group = {
1931 .name = "format", 1931 .name = "format",
1932 .attrs = knl_uncore_cha_formats_attr, 1932 .attrs = knl_uncore_cha_formats_attr,
1933}; 1933};
@@ -2037,7 +2037,7 @@ static struct attribute *knl_uncore_pcu_formats_attr[] = {
2037 NULL, 2037 NULL,
2038}; 2038};
2039 2039
2040static struct attribute_group knl_uncore_pcu_format_group = { 2040static const struct attribute_group knl_uncore_pcu_format_group = {
2041 .name = "format", 2041 .name = "format",
2042 .attrs = knl_uncore_pcu_formats_attr, 2042 .attrs = knl_uncore_pcu_formats_attr,
2043}; 2043};
@@ -2187,7 +2187,7 @@ static struct attribute *knl_uncore_irp_formats_attr[] = {
2187 NULL, 2187 NULL,
2188}; 2188};
2189 2189
2190static struct attribute_group knl_uncore_irp_format_group = { 2190static const struct attribute_group knl_uncore_irp_format_group = {
2191 .name = "format", 2191 .name = "format",
2192 .attrs = knl_uncore_irp_formats_attr, 2192 .attrs = knl_uncore_irp_formats_attr,
2193}; 2193};
@@ -2385,7 +2385,7 @@ static struct attribute *hswep_uncore_ubox_formats_attr[] = {
2385 NULL, 2385 NULL,
2386}; 2386};
2387 2387
2388static struct attribute_group hswep_uncore_ubox_format_group = { 2388static const struct attribute_group hswep_uncore_ubox_format_group = {
2389 .name = "format", 2389 .name = "format",
2390 .attrs = hswep_uncore_ubox_formats_attr, 2390 .attrs = hswep_uncore_ubox_formats_attr,
2391}; 2391};
@@ -2439,7 +2439,7 @@ static struct attribute *hswep_uncore_cbox_formats_attr[] = {
2439 NULL, 2439 NULL,
2440}; 2440};
2441 2441
2442static struct attribute_group hswep_uncore_cbox_format_group = { 2442static const struct attribute_group hswep_uncore_cbox_format_group = {
2443 .name = "format", 2443 .name = "format",
2444 .attrs = hswep_uncore_cbox_formats_attr, 2444 .attrs = hswep_uncore_cbox_formats_attr,
2445}; 2445};
@@ -2621,7 +2621,7 @@ static struct attribute *hswep_uncore_sbox_formats_attr[] = {
2621 NULL, 2621 NULL,
2622}; 2622};
2623 2623
2624static struct attribute_group hswep_uncore_sbox_format_group = { 2624static const struct attribute_group hswep_uncore_sbox_format_group = {
2625 .name = "format", 2625 .name = "format",
2626 .attrs = hswep_uncore_sbox_formats_attr, 2626 .attrs = hswep_uncore_sbox_formats_attr,
2627}; 2627};
@@ -3314,7 +3314,7 @@ static struct attribute *skx_uncore_cha_formats_attr[] = {
3314 NULL, 3314 NULL,
3315}; 3315};
3316 3316
3317static struct attribute_group skx_uncore_chabox_format_group = { 3317static const struct attribute_group skx_uncore_chabox_format_group = {
3318 .name = "format", 3318 .name = "format",
3319 .attrs = skx_uncore_cha_formats_attr, 3319 .attrs = skx_uncore_cha_formats_attr,
3320}; 3320};
@@ -3427,7 +3427,7 @@ static struct attribute *skx_uncore_iio_formats_attr[] = {
3427 NULL, 3427 NULL,
3428}; 3428};
3429 3429
3430static struct attribute_group skx_uncore_iio_format_group = { 3430static const struct attribute_group skx_uncore_iio_format_group = {
3431 .name = "format", 3431 .name = "format",
3432 .attrs = skx_uncore_iio_formats_attr, 3432 .attrs = skx_uncore_iio_formats_attr,
3433}; 3433};
@@ -3484,7 +3484,7 @@ static struct attribute *skx_uncore_formats_attr[] = {
3484 NULL, 3484 NULL,
3485}; 3485};
3486 3486
3487static struct attribute_group skx_uncore_format_group = { 3487static const struct attribute_group skx_uncore_format_group = {
3488 .name = "format", 3488 .name = "format",
3489 .attrs = skx_uncore_formats_attr, 3489 .attrs = skx_uncore_formats_attr,
3490}; 3490};
@@ -3605,7 +3605,7 @@ static struct attribute *skx_upi_uncore_formats_attr[] = {
3605 NULL, 3605 NULL,
3606}; 3606};
3607 3607
3608static struct attribute_group skx_upi_uncore_format_group = { 3608static const struct attribute_group skx_upi_uncore_format_group = {
3609 .name = "format", 3609 .name = "format",
3610 .attrs = skx_upi_uncore_formats_attr, 3610 .attrs = skx_upi_uncore_formats_attr,
3611}; 3611};
diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index ca3c48c0872f..5a28e8e55e36 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -286,7 +286,7 @@
286#define X86_FEATURE_PAUSEFILTER (15*32+10) /* filtered pause intercept */ 286#define X86_FEATURE_PAUSEFILTER (15*32+10) /* filtered pause intercept */
287#define X86_FEATURE_PFTHRESHOLD (15*32+12) /* pause filter threshold */ 287#define X86_FEATURE_PFTHRESHOLD (15*32+12) /* pause filter threshold */
288#define X86_FEATURE_AVIC (15*32+13) /* Virtual Interrupt Controller */ 288#define X86_FEATURE_AVIC (15*32+13) /* Virtual Interrupt Controller */
289#define X86_FEATURE_VIRTUAL_VMLOAD_VMSAVE (15*32+15) /* Virtual VMLOAD VMSAVE */ 289#define X86_FEATURE_V_VMSAVE_VMLOAD (15*32+15) /* Virtual VMSAVE VMLOAD */
290 290
291/* Intel-defined CPU features, CPUID level 0x00000007:0 (ecx), word 16 */ 291/* Intel-defined CPU features, CPUID level 0x00000007:0 (ecx), word 16 */
292#define X86_FEATURE_AVX512VBMI (16*32+ 1) /* AVX512 Vector Bit Manipulation instructions*/ 292#define X86_FEATURE_AVX512VBMI (16*32+ 1) /* AVX512 Vector Bit Manipulation instructions*/
diff --git a/arch/x86/include/asm/elf.h b/arch/x86/include/asm/elf.h
index 1c18d83d3f09..9aeb91935ce0 100644
--- a/arch/x86/include/asm/elf.h
+++ b/arch/x86/include/asm/elf.h
@@ -247,11 +247,11 @@ extern int force_personality32;
247 247
248/* 248/*
249 * This is the base location for PIE (ET_DYN with INTERP) loads. On 249 * This is the base location for PIE (ET_DYN with INTERP) loads. On
250 * 64-bit, this is raised to 4GB to leave the entire 32-bit address 250 * 64-bit, this is above 4GB to leave the entire 32-bit address
251 * space open for things that want to use the area for 32-bit pointers. 251 * space open for things that want to use the area for 32-bit pointers.
252 */ 252 */
253#define ELF_ET_DYN_BASE (mmap_is_ia32() ? 0x000400000UL : \ 253#define ELF_ET_DYN_BASE (mmap_is_ia32() ? 0x000400000UL : \
254 0x100000000UL) 254 (TASK_SIZE / 3 * 2))
255 255
256/* This yields a mask that user programs can use to figure out what 256/* This yields a mask that user programs can use to figure out what
257 instruction set this CPU supports. This could be done in user space, 257 instruction set this CPU supports. This could be done in user space,
diff --git a/arch/x86/include/asm/hypervisor.h b/arch/x86/include/asm/hypervisor.h
index 21126155a739..0ead9dbb9130 100644
--- a/arch/x86/include/asm/hypervisor.h
+++ b/arch/x86/include/asm/hypervisor.h
@@ -43,6 +43,9 @@ struct hypervisor_x86 {
43 43
44 /* pin current vcpu to specified physical cpu (run rarely) */ 44 /* pin current vcpu to specified physical cpu (run rarely) */
45 void (*pin_vcpu)(int); 45 void (*pin_vcpu)(int);
46
47 /* called during init_mem_mapping() to setup early mappings. */
48 void (*init_mem_mapping)(void);
46}; 49};
47 50
48extern const struct hypervisor_x86 *x86_hyper; 51extern const struct hypervisor_x86 *x86_hyper;
@@ -57,8 +60,15 @@ extern const struct hypervisor_x86 x86_hyper_kvm;
57extern void init_hypervisor_platform(void); 60extern void init_hypervisor_platform(void);
58extern bool hypervisor_x2apic_available(void); 61extern bool hypervisor_x2apic_available(void);
59extern void hypervisor_pin_vcpu(int cpu); 62extern void hypervisor_pin_vcpu(int cpu);
63
64static inline void hypervisor_init_mem_mapping(void)
65{
66 if (x86_hyper && x86_hyper->init_mem_mapping)
67 x86_hyper->init_mem_mapping();
68}
60#else 69#else
61static inline void init_hypervisor_platform(void) { } 70static inline void init_hypervisor_platform(void) { }
62static inline bool hypervisor_x2apic_available(void) { return false; } 71static inline bool hypervisor_x2apic_available(void) { return false; }
72static inline void hypervisor_init_mem_mapping(void) { }
63#endif /* CONFIG_HYPERVISOR_GUEST */ 73#endif /* CONFIG_HYPERVISOR_GUEST */
64#endif /* _ASM_X86_HYPERVISOR_H */ 74#endif /* _ASM_X86_HYPERVISOR_H */
diff --git a/arch/x86/kernel/cpu/aperfmperf.c b/arch/x86/kernel/cpu/aperfmperf.c
index 7cf7c70b6ef2..0ee83321a313 100644
--- a/arch/x86/kernel/cpu/aperfmperf.c
+++ b/arch/x86/kernel/cpu/aperfmperf.c
@@ -40,13 +40,16 @@ static void aperfmperf_snapshot_khz(void *dummy)
40 struct aperfmperf_sample *s = this_cpu_ptr(&samples); 40 struct aperfmperf_sample *s = this_cpu_ptr(&samples);
41 ktime_t now = ktime_get(); 41 ktime_t now = ktime_get();
42 s64 time_delta = ktime_ms_delta(now, s->time); 42 s64 time_delta = ktime_ms_delta(now, s->time);
43 unsigned long flags;
43 44
44 /* Don't bother re-computing within the cache threshold time. */ 45 /* Don't bother re-computing within the cache threshold time. */
45 if (time_delta < APERFMPERF_CACHE_THRESHOLD_MS) 46 if (time_delta < APERFMPERF_CACHE_THRESHOLD_MS)
46 return; 47 return;
47 48
49 local_irq_save(flags);
48 rdmsrl(MSR_IA32_APERF, aperf); 50 rdmsrl(MSR_IA32_APERF, aperf);
49 rdmsrl(MSR_IA32_MPERF, mperf); 51 rdmsrl(MSR_IA32_MPERF, mperf);
52 local_irq_restore(flags);
50 53
51 aperf_delta = aperf - s->aperf; 54 aperf_delta = aperf - s->aperf;
52 mperf_delta = mperf - s->mperf; 55 mperf_delta = mperf - s->mperf;
diff --git a/arch/x86/kernel/cpu/mcheck/therm_throt.c b/arch/x86/kernel/cpu/mcheck/therm_throt.c
index d7cc190ae457..f7370abd33c6 100644
--- a/arch/x86/kernel/cpu/mcheck/therm_throt.c
+++ b/arch/x86/kernel/cpu/mcheck/therm_throt.c
@@ -122,7 +122,7 @@ static struct attribute *thermal_throttle_attrs[] = {
122 NULL 122 NULL
123}; 123};
124 124
125static struct attribute_group thermal_attr_group = { 125static const struct attribute_group thermal_attr_group = {
126 .attrs = thermal_throttle_attrs, 126 .attrs = thermal_throttle_attrs,
127 .name = "thermal_throttle" 127 .name = "thermal_throttle"
128}; 128};
diff --git a/arch/x86/kernel/cpu/microcode/core.c b/arch/x86/kernel/cpu/microcode/core.c
index 9cb98ee103db..86e8f0b2537b 100644
--- a/arch/x86/kernel/cpu/microcode/core.c
+++ b/arch/x86/kernel/cpu/microcode/core.c
@@ -561,7 +561,7 @@ static struct attribute *mc_default_attrs[] = {
561 NULL 561 NULL
562}; 562};
563 563
564static struct attribute_group mc_attr_group = { 564static const struct attribute_group mc_attr_group = {
565 .attrs = mc_default_attrs, 565 .attrs = mc_default_attrs,
566 .name = "microcode", 566 .name = "microcode",
567}; 567};
@@ -707,7 +707,7 @@ static struct attribute *cpu_root_microcode_attrs[] = {
707 NULL 707 NULL
708}; 708};
709 709
710static struct attribute_group cpu_root_microcode_group = { 710static const struct attribute_group cpu_root_microcode_group = {
711 .name = "microcode", 711 .name = "microcode",
712 .attrs = cpu_root_microcode_attrs, 712 .attrs = cpu_root_microcode_attrs,
713}; 713};
diff --git a/arch/x86/kernel/cpu/mtrr/main.c b/arch/x86/kernel/cpu/mtrr/main.c
index c5bb63be4ba1..40d5a8a75212 100644
--- a/arch/x86/kernel/cpu/mtrr/main.c
+++ b/arch/x86/kernel/cpu/mtrr/main.c
@@ -237,6 +237,18 @@ set_mtrr(unsigned int reg, unsigned long base, unsigned long size, mtrr_type typ
237 stop_machine(mtrr_rendezvous_handler, &data, cpu_online_mask); 237 stop_machine(mtrr_rendezvous_handler, &data, cpu_online_mask);
238} 238}
239 239
240static void set_mtrr_cpuslocked(unsigned int reg, unsigned long base,
241 unsigned long size, mtrr_type type)
242{
243 struct set_mtrr_data data = { .smp_reg = reg,
244 .smp_base = base,
245 .smp_size = size,
246 .smp_type = type
247 };
248
249 stop_machine_cpuslocked(mtrr_rendezvous_handler, &data, cpu_online_mask);
250}
251
240static void set_mtrr_from_inactive_cpu(unsigned int reg, unsigned long base, 252static void set_mtrr_from_inactive_cpu(unsigned int reg, unsigned long base,
241 unsigned long size, mtrr_type type) 253 unsigned long size, mtrr_type type)
242{ 254{
@@ -370,7 +382,7 @@ int mtrr_add_page(unsigned long base, unsigned long size,
370 /* Search for an empty MTRR */ 382 /* Search for an empty MTRR */
371 i = mtrr_if->get_free_region(base, size, replace); 383 i = mtrr_if->get_free_region(base, size, replace);
372 if (i >= 0) { 384 if (i >= 0) {
373 set_mtrr(i, base, size, type); 385 set_mtrr_cpuslocked(i, base, size, type);
374 if (likely(replace < 0)) { 386 if (likely(replace < 0)) {
375 mtrr_usage_table[i] = 1; 387 mtrr_usage_table[i] = 1;
376 } else { 388 } else {
@@ -378,7 +390,7 @@ int mtrr_add_page(unsigned long base, unsigned long size,
378 if (increment) 390 if (increment)
379 mtrr_usage_table[i]++; 391 mtrr_usage_table[i]++;
380 if (unlikely(replace != i)) { 392 if (unlikely(replace != i)) {
381 set_mtrr(replace, 0, 0, 0); 393 set_mtrr_cpuslocked(replace, 0, 0, 0);
382 mtrr_usage_table[replace] = 0; 394 mtrr_usage_table[replace] = 0;
383 } 395 }
384 } 396 }
@@ -506,7 +518,7 @@ int mtrr_del_page(int reg, unsigned long base, unsigned long size)
506 goto out; 518 goto out;
507 } 519 }
508 if (--mtrr_usage_table[reg] < 1) 520 if (--mtrr_usage_table[reg] < 1)
509 set_mtrr(reg, 0, 0, 0); 521 set_mtrr_cpuslocked(reg, 0, 0, 0);
510 error = reg; 522 error = reg;
511 out: 523 out:
512 mutex_unlock(&mtrr_mutex); 524 mutex_unlock(&mtrr_mutex);
diff --git a/arch/x86/kernel/head64.c b/arch/x86/kernel/head64.c
index 46c3c73e7f43..9ba79543d9ee 100644
--- a/arch/x86/kernel/head64.c
+++ b/arch/x86/kernel/head64.c
@@ -53,6 +53,7 @@ void __head __startup_64(unsigned long physaddr)
53 pudval_t *pud; 53 pudval_t *pud;
54 pmdval_t *pmd, pmd_entry; 54 pmdval_t *pmd, pmd_entry;
55 int i; 55 int i;
56 unsigned int *next_pgt_ptr;
56 57
57 /* Is the address too large? */ 58 /* Is the address too large? */
58 if (physaddr >> MAX_PHYSMEM_BITS) 59 if (physaddr >> MAX_PHYSMEM_BITS)
@@ -91,9 +92,9 @@ void __head __startup_64(unsigned long physaddr)
91 * creates a bunch of nonsense entries but that is fine -- 92 * creates a bunch of nonsense entries but that is fine --
92 * it avoids problems around wraparound. 93 * it avoids problems around wraparound.
93 */ 94 */
94 95 next_pgt_ptr = fixup_pointer(&next_early_pgt, physaddr);
95 pud = fixup_pointer(early_dynamic_pgts[next_early_pgt++], physaddr); 96 pud = fixup_pointer(early_dynamic_pgts[(*next_pgt_ptr)++], physaddr);
96 pmd = fixup_pointer(early_dynamic_pgts[next_early_pgt++], physaddr); 97 pmd = fixup_pointer(early_dynamic_pgts[(*next_pgt_ptr)++], physaddr);
97 98
98 if (IS_ENABLED(CONFIG_X86_5LEVEL)) { 99 if (IS_ENABLED(CONFIG_X86_5LEVEL)) {
99 p4d = fixup_pointer(early_dynamic_pgts[next_early_pgt++], physaddr); 100 p4d = fixup_pointer(early_dynamic_pgts[next_early_pgt++], physaddr);
diff --git a/arch/x86/kernel/ksysfs.c b/arch/x86/kernel/ksysfs.c
index 4afc67f5facc..06e1ff5562c0 100644
--- a/arch/x86/kernel/ksysfs.c
+++ b/arch/x86/kernel/ksysfs.c
@@ -55,7 +55,7 @@ static struct bin_attribute *boot_params_data_attrs[] = {
55 NULL, 55 NULL,
56}; 56};
57 57
58static struct attribute_group boot_params_attr_group = { 58static const struct attribute_group boot_params_attr_group = {
59 .attrs = boot_params_version_attrs, 59 .attrs = boot_params_version_attrs,
60 .bin_attrs = boot_params_data_attrs, 60 .bin_attrs = boot_params_data_attrs,
61}; 61};
@@ -202,7 +202,7 @@ static struct bin_attribute *setup_data_data_attrs[] = {
202 NULL, 202 NULL,
203}; 203};
204 204
205static struct attribute_group setup_data_attr_group = { 205static const struct attribute_group setup_data_attr_group = {
206 .attrs = setup_data_type_attrs, 206 .attrs = setup_data_type_attrs,
207 .bin_attrs = setup_data_data_attrs, 207 .bin_attrs = setup_data_data_attrs,
208}; 208};
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
index b474c8de7fba..54b9e89d4d6b 100644
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -971,7 +971,8 @@ void common_cpu_up(unsigned int cpu, struct task_struct *idle)
971 * Returns zero if CPU booted OK, else error code from 971 * Returns zero if CPU booted OK, else error code from
972 * ->wakeup_secondary_cpu. 972 * ->wakeup_secondary_cpu.
973 */ 973 */
974static int do_boot_cpu(int apicid, int cpu, struct task_struct *idle) 974static int do_boot_cpu(int apicid, int cpu, struct task_struct *idle,
975 int *cpu0_nmi_registered)
975{ 976{
976 volatile u32 *trampoline_status = 977 volatile u32 *trampoline_status =
977 (volatile u32 *) __va(real_mode_header->trampoline_status); 978 (volatile u32 *) __va(real_mode_header->trampoline_status);
@@ -979,7 +980,6 @@ static int do_boot_cpu(int apicid, int cpu, struct task_struct *idle)
979 unsigned long start_ip = real_mode_header->trampoline_start; 980 unsigned long start_ip = real_mode_header->trampoline_start;
980 981
981 unsigned long boot_error = 0; 982 unsigned long boot_error = 0;
982 int cpu0_nmi_registered = 0;
983 unsigned long timeout; 983 unsigned long timeout;
984 984
985 idle->thread.sp = (unsigned long)task_pt_regs(idle); 985 idle->thread.sp = (unsigned long)task_pt_regs(idle);
@@ -1035,7 +1035,7 @@ static int do_boot_cpu(int apicid, int cpu, struct task_struct *idle)
1035 boot_error = apic->wakeup_secondary_cpu(apicid, start_ip); 1035 boot_error = apic->wakeup_secondary_cpu(apicid, start_ip);
1036 else 1036 else
1037 boot_error = wakeup_cpu_via_init_nmi(cpu, start_ip, apicid, 1037 boot_error = wakeup_cpu_via_init_nmi(cpu, start_ip, apicid,
1038 &cpu0_nmi_registered); 1038 cpu0_nmi_registered);
1039 1039
1040 if (!boot_error) { 1040 if (!boot_error) {
1041 /* 1041 /*
@@ -1080,12 +1080,6 @@ static int do_boot_cpu(int apicid, int cpu, struct task_struct *idle)
1080 */ 1080 */
1081 smpboot_restore_warm_reset_vector(); 1081 smpboot_restore_warm_reset_vector();
1082 } 1082 }
1083 /*
1084 * Clean up the nmi handler. Do this after the callin and callout sync
1085 * to avoid impact of possible long unregister time.
1086 */
1087 if (cpu0_nmi_registered)
1088 unregister_nmi_handler(NMI_LOCAL, "wake_cpu0");
1089 1083
1090 return boot_error; 1084 return boot_error;
1091} 1085}
@@ -1093,8 +1087,9 @@ static int do_boot_cpu(int apicid, int cpu, struct task_struct *idle)
1093int native_cpu_up(unsigned int cpu, struct task_struct *tidle) 1087int native_cpu_up(unsigned int cpu, struct task_struct *tidle)
1094{ 1088{
1095 int apicid = apic->cpu_present_to_apicid(cpu); 1089 int apicid = apic->cpu_present_to_apicid(cpu);
1090 int cpu0_nmi_registered = 0;
1096 unsigned long flags; 1091 unsigned long flags;
1097 int err; 1092 int err, ret = 0;
1098 1093
1099 WARN_ON(irqs_disabled()); 1094 WARN_ON(irqs_disabled());
1100 1095
@@ -1131,10 +1126,11 @@ int native_cpu_up(unsigned int cpu, struct task_struct *tidle)
1131 1126
1132 common_cpu_up(cpu, tidle); 1127 common_cpu_up(cpu, tidle);
1133 1128
1134 err = do_boot_cpu(apicid, cpu, tidle); 1129 err = do_boot_cpu(apicid, cpu, tidle, &cpu0_nmi_registered);
1135 if (err) { 1130 if (err) {
1136 pr_err("do_boot_cpu failed(%d) to wakeup CPU#%u\n", err, cpu); 1131 pr_err("do_boot_cpu failed(%d) to wakeup CPU#%u\n", err, cpu);
1137 return -EIO; 1132 ret = -EIO;
1133 goto unreg_nmi;
1138 } 1134 }
1139 1135
1140 /* 1136 /*
@@ -1150,7 +1146,15 @@ int native_cpu_up(unsigned int cpu, struct task_struct *tidle)
1150 touch_nmi_watchdog(); 1146 touch_nmi_watchdog();
1151 } 1147 }
1152 1148
1153 return 0; 1149unreg_nmi:
1150 /*
1151 * Clean up the nmi handler. Do this after the callin and callout sync
1152 * to avoid impact of possible long unregister time.
1153 */
1154 if (cpu0_nmi_registered)
1155 unregister_nmi_handler(NMI_LOCAL, "wake_cpu0");
1156
1157 return ret;
1154} 1158}
1155 1159
1156/** 1160/**
diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
index 1107626938cc..56ba05312759 100644
--- a/arch/x86/kvm/svm.c
+++ b/arch/x86/kvm/svm.c
@@ -1100,7 +1100,7 @@ static __init int svm_hardware_setup(void)
1100 1100
1101 if (vls) { 1101 if (vls) {
1102 if (!npt_enabled || 1102 if (!npt_enabled ||
1103 !boot_cpu_has(X86_FEATURE_VIRTUAL_VMLOAD_VMSAVE) || 1103 !boot_cpu_has(X86_FEATURE_V_VMSAVE_VMLOAD) ||
1104 !IS_ENABLED(CONFIG_X86_64)) { 1104 !IS_ENABLED(CONFIG_X86_64)) {
1105 vls = false; 1105 vls = false;
1106 } else { 1106 } else {
diff --git a/arch/x86/mm/init.c b/arch/x86/mm/init.c
index 673541eb3b3f..bf3f1065d6ad 100644
--- a/arch/x86/mm/init.c
+++ b/arch/x86/mm/init.c
@@ -18,6 +18,7 @@
18#include <asm/dma.h> /* for MAX_DMA_PFN */ 18#include <asm/dma.h> /* for MAX_DMA_PFN */
19#include <asm/microcode.h> 19#include <asm/microcode.h>
20#include <asm/kaslr.h> 20#include <asm/kaslr.h>
21#include <asm/hypervisor.h>
21 22
22/* 23/*
23 * We need to define the tracepoints somewhere, and tlb.c 24 * We need to define the tracepoints somewhere, and tlb.c
@@ -636,6 +637,8 @@ void __init init_mem_mapping(void)
636 load_cr3(swapper_pg_dir); 637 load_cr3(swapper_pg_dir);
637 __flush_tlb_all(); 638 __flush_tlb_all();
638 639
640 hypervisor_init_mem_mapping();
641
639 early_memtest(0, max_pfn_mapped << PAGE_SHIFT); 642 early_memtest(0, max_pfn_mapped << PAGE_SHIFT);
640} 643}
641 644
diff --git a/arch/x86/mm/mmap.c b/arch/x86/mm/mmap.c
index 229d04a83f85..a88cfbfbd078 100644
--- a/arch/x86/mm/mmap.c
+++ b/arch/x86/mm/mmap.c
@@ -50,8 +50,7 @@ unsigned long tasksize_64bit(void)
50static unsigned long stack_maxrandom_size(unsigned long task_size) 50static unsigned long stack_maxrandom_size(unsigned long task_size)
51{ 51{
52 unsigned long max = 0; 52 unsigned long max = 0;
53 if ((current->flags & PF_RANDOMIZE) && 53 if (current->flags & PF_RANDOMIZE) {
54 !(current->personality & ADDR_NO_RANDOMIZE)) {
55 max = (-1UL) & __STACK_RND_MASK(task_size == tasksize_32bit()); 54 max = (-1UL) & __STACK_RND_MASK(task_size == tasksize_32bit());
56 max <<= PAGE_SHIFT; 55 max <<= PAGE_SHIFT;
57 } 56 }
@@ -79,13 +78,13 @@ static int mmap_is_legacy(void)
79 78
80static unsigned long arch_rnd(unsigned int rndbits) 79static unsigned long arch_rnd(unsigned int rndbits)
81{ 80{
81 if (!(current->flags & PF_RANDOMIZE))
82 return 0;
82 return (get_random_long() & ((1UL << rndbits) - 1)) << PAGE_SHIFT; 83 return (get_random_long() & ((1UL << rndbits) - 1)) << PAGE_SHIFT;
83} 84}
84 85
85unsigned long arch_mmap_rnd(void) 86unsigned long arch_mmap_rnd(void)
86{ 87{
87 if (!(current->flags & PF_RANDOMIZE))
88 return 0;
89 return arch_rnd(mmap_is_ia32() ? mmap32_rnd_bits : mmap64_rnd_bits); 88 return arch_rnd(mmap_is_ia32() ? mmap32_rnd_bits : mmap64_rnd_bits);
90} 89}
91 90
diff --git a/arch/x86/platform/uv/tlb_uv.c b/arch/x86/platform/uv/tlb_uv.c
index 3e4bdb442fbc..f44c0bc95aa2 100644
--- a/arch/x86/platform/uv/tlb_uv.c
+++ b/arch/x86/platform/uv/tlb_uv.c
@@ -26,7 +26,7 @@
26static struct bau_operations ops __ro_after_init; 26static struct bau_operations ops __ro_after_init;
27 27
28/* timeouts in nanoseconds (indexed by UVH_AGING_PRESCALE_SEL urgency7 30:28) */ 28/* timeouts in nanoseconds (indexed by UVH_AGING_PRESCALE_SEL urgency7 30:28) */
29static int timeout_base_ns[] = { 29static const int timeout_base_ns[] = {
30 20, 30 20,
31 160, 31 160,
32 1280, 32 1280,
@@ -1216,7 +1216,7 @@ static struct bau_pq_entry *find_another_by_swack(struct bau_pq_entry *msg,
1216 * set a bit in the UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE register. 1216 * set a bit in the UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE register.
1217 * Such a message must be ignored. 1217 * Such a message must be ignored.
1218 */ 1218 */
1219void process_uv2_message(struct msg_desc *mdp, struct bau_control *bcp) 1219static void process_uv2_message(struct msg_desc *mdp, struct bau_control *bcp)
1220{ 1220{
1221 unsigned long mmr_image; 1221 unsigned long mmr_image;
1222 unsigned char swack_vec; 1222 unsigned char swack_vec;
diff --git a/arch/x86/xen/enlighten_hvm.c b/arch/x86/xen/enlighten_hvm.c
index 87d791356ea9..de503c225ae1 100644
--- a/arch/x86/xen/enlighten_hvm.c
+++ b/arch/x86/xen/enlighten_hvm.c
@@ -12,6 +12,7 @@
12#include <asm/setup.h> 12#include <asm/setup.h>
13#include <asm/hypervisor.h> 13#include <asm/hypervisor.h>
14#include <asm/e820/api.h> 14#include <asm/e820/api.h>
15#include <asm/early_ioremap.h>
15 16
16#include <asm/xen/cpuid.h> 17#include <asm/xen/cpuid.h>
17#include <asm/xen/hypervisor.h> 18#include <asm/xen/hypervisor.h>
@@ -21,38 +22,50 @@
21#include "mmu.h" 22#include "mmu.h"
22#include "smp.h" 23#include "smp.h"
23 24
24void __ref xen_hvm_init_shared_info(void) 25static unsigned long shared_info_pfn;
26
27void xen_hvm_init_shared_info(void)
25{ 28{
26 struct xen_add_to_physmap xatp; 29 struct xen_add_to_physmap xatp;
27 u64 pa;
28
29 if (HYPERVISOR_shared_info == &xen_dummy_shared_info) {
30 /*
31 * Search for a free page starting at 4kB physical address.
32 * Low memory is preferred to avoid an EPT large page split up
33 * by the mapping.
34 * Starting below X86_RESERVE_LOW (usually 64kB) is fine as
35 * the BIOS used for HVM guests is well behaved and won't
36 * clobber memory other than the first 4kB.
37 */
38 for (pa = PAGE_SIZE;
39 !e820__mapped_all(pa, pa + PAGE_SIZE, E820_TYPE_RAM) ||
40 memblock_is_reserved(pa);
41 pa += PAGE_SIZE)
42 ;
43
44 memblock_reserve(pa, PAGE_SIZE);
45 HYPERVISOR_shared_info = __va(pa);
46 }
47 30
48 xatp.domid = DOMID_SELF; 31 xatp.domid = DOMID_SELF;
49 xatp.idx = 0; 32 xatp.idx = 0;
50 xatp.space = XENMAPSPACE_shared_info; 33 xatp.space = XENMAPSPACE_shared_info;
51 xatp.gpfn = virt_to_pfn(HYPERVISOR_shared_info); 34 xatp.gpfn = shared_info_pfn;
52 if (HYPERVISOR_memory_op(XENMEM_add_to_physmap, &xatp)) 35 if (HYPERVISOR_memory_op(XENMEM_add_to_physmap, &xatp))
53 BUG(); 36 BUG();
54} 37}
55 38
39static void __init reserve_shared_info(void)
40{
41 u64 pa;
42
43 /*
44 * Search for a free page starting at 4kB physical address.
45 * Low memory is preferred to avoid an EPT large page split up
46 * by the mapping.
47 * Starting below X86_RESERVE_LOW (usually 64kB) is fine as
48 * the BIOS used for HVM guests is well behaved and won't
49 * clobber memory other than the first 4kB.
50 */
51 for (pa = PAGE_SIZE;
52 !e820__mapped_all(pa, pa + PAGE_SIZE, E820_TYPE_RAM) ||
53 memblock_is_reserved(pa);
54 pa += PAGE_SIZE)
55 ;
56
57 shared_info_pfn = PHYS_PFN(pa);
58
59 memblock_reserve(pa, PAGE_SIZE);
60 HYPERVISOR_shared_info = early_memremap(pa, PAGE_SIZE);
61}
62
63static void __init xen_hvm_init_mem_mapping(void)
64{
65 early_memunmap(HYPERVISOR_shared_info, PAGE_SIZE);
66 HYPERVISOR_shared_info = __va(PFN_PHYS(shared_info_pfn));
67}
68
56static void __init init_hvm_pv_info(void) 69static void __init init_hvm_pv_info(void)
57{ 70{
58 int major, minor; 71 int major, minor;
@@ -153,6 +166,7 @@ static void __init xen_hvm_guest_init(void)
153 166
154 init_hvm_pv_info(); 167 init_hvm_pv_info();
155 168
169 reserve_shared_info();
156 xen_hvm_init_shared_info(); 170 xen_hvm_init_shared_info();
157 171
158 /* 172 /*
@@ -218,5 +232,6 @@ const struct hypervisor_x86 x86_hyper_xen_hvm = {
218 .init_platform = xen_hvm_guest_init, 232 .init_platform = xen_hvm_guest_init,
219 .pin_vcpu = xen_pin_vcpu, 233 .pin_vcpu = xen_pin_vcpu,
220 .x2apic_available = xen_x2apic_para_available, 234 .x2apic_available = xen_x2apic_para_available,
235 .init_mem_mapping = xen_hvm_init_mem_mapping,
221}; 236};
222EXPORT_SYMBOL(x86_hyper_xen_hvm); 237EXPORT_SYMBOL(x86_hyper_xen_hvm);
generated by cgit v1.2.2 (git 2.25.0) at 2026-04-27 06:24:57 -0400