diff options
Diffstat (limited to 'arch/arc/boot/dts/axc003.dtsi')
| -rw-r--r-- | arch/arc/boot/dts/axc003.dtsi | 21 |
1 files changed, 10 insertions, 11 deletions
diff --git a/arch/arc/boot/dts/axc003.dtsi b/arch/arc/boot/dts/axc003.dtsi index 14df46f141bf..cc9239ef8d08 100644 --- a/arch/arc/boot/dts/axc003.dtsi +++ b/arch/arc/boot/dts/axc003.dtsi | |||
| @@ -14,15 +14,15 @@ | |||
| 14 | 14 | ||
| 15 | / { | 15 | / { |
| 16 | compatible = "snps,arc"; | 16 | compatible = "snps,arc"; |
| 17 | #address-cells = <1>; | 17 | #address-cells = <2>; |
| 18 | #size-cells = <1>; | 18 | #size-cells = <2>; |
| 19 | 19 | ||
| 20 | cpu_card { | 20 | cpu_card { |
| 21 | compatible = "simple-bus"; | 21 | compatible = "simple-bus"; |
| 22 | #address-cells = <1>; | 22 | #address-cells = <1>; |
| 23 | #size-cells = <1>; | 23 | #size-cells = <1>; |
| 24 | 24 | ||
| 25 | ranges = <0x00000000 0xf0000000 0x10000000>; | 25 | ranges = <0x00000000 0x0 0xf0000000 0x10000000>; |
| 26 | 26 | ||
| 27 | core_clk: core_clk { | 27 | core_clk: core_clk { |
| 28 | #clock-cells = <0>; | 28 | #clock-cells = <0>; |
| @@ -94,30 +94,29 @@ | |||
| 94 | mb_intc: dw-apb-ictl@0xe0012000 { | 94 | mb_intc: dw-apb-ictl@0xe0012000 { |
| 95 | #interrupt-cells = <1>; | 95 | #interrupt-cells = <1>; |
| 96 | compatible = "snps,dw-apb-ictl"; | 96 | compatible = "snps,dw-apb-ictl"; |
| 97 | reg = < 0xe0012000 0x200 >; | 97 | reg = < 0x0 0xe0012000 0x0 0x200 >; |
| 98 | interrupt-controller; | 98 | interrupt-controller; |
| 99 | interrupt-parent = <&core_intc>; | 99 | interrupt-parent = <&core_intc>; |
| 100 | interrupts = < 24 >; | 100 | interrupts = < 24 >; |
| 101 | }; | 101 | }; |
| 102 | 102 | ||
| 103 | memory { | 103 | memory { |
| 104 | #address-cells = <1>; | ||
| 105 | #size-cells = <1>; | ||
| 106 | ranges = <0x00000000 0x80000000 0x40000000>; | ||
| 107 | device_type = "memory"; | 104 | device_type = "memory"; |
| 108 | reg = <0x80000000 0x20000000>; /* 512MiB */ | 105 | /* CONFIG_KERNEL_RAM_BASE_ADDRESS needs to match low mem start */ |
| 106 | reg = <0x0 0x80000000 0x0 0x20000000 /* 512 MiB low mem */ | ||
| 107 | 0x1 0xc0000000 0x0 0x40000000>; /* 1 GiB highmem */ | ||
| 109 | }; | 108 | }; |
| 110 | 109 | ||
| 111 | reserved-memory { | 110 | reserved-memory { |
| 112 | #address-cells = <1>; | 111 | #address-cells = <2>; |
| 113 | #size-cells = <1>; | 112 | #size-cells = <2>; |
| 114 | ranges; | 113 | ranges; |
| 115 | /* | 114 | /* |
| 116 | * Move frame buffer out of IOC aperture (0x8z-0xAz). | 115 | * Move frame buffer out of IOC aperture (0x8z-0xAz). |
| 117 | */ | 116 | */ |
| 118 | frame_buffer: frame_buffer@be000000 { | 117 | frame_buffer: frame_buffer@be000000 { |
| 119 | compatible = "shared-dma-pool"; | 118 | compatible = "shared-dma-pool"; |
| 120 | reg = <0xbe000000 0x2000000>; | 119 | reg = <0x0 0xbe000000 0x0 0x2000000>; |
| 121 | no-map; | 120 | no-map; |
| 122 | }; | 121 | }; |
| 123 | }; | 122 | }; |
