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-rw-r--r--arch/mips/mti-malta/malta-init.c17
1 files changed, 7 insertions, 10 deletions
diff --git a/arch/mips/mti-malta/malta-init.c b/arch/mips/mti-malta/malta-init.c
index dc2c5214809d..0f3b881a3190 100644
--- a/arch/mips/mti-malta/malta-init.c
+++ b/arch/mips/mti-malta/malta-init.c
@@ -14,6 +14,7 @@
14#include <linux/init.h> 14#include <linux/init.h>
15#include <linux/string.h> 15#include <linux/string.h>
16#include <linux/kernel.h> 16#include <linux/kernel.h>
17#include <linux/pci_regs.h>
17#include <linux/serial_core.h> 18#include <linux/serial_core.h>
18 19
19#include <asm/cacheflush.h> 20#include <asm/cacheflush.h>
@@ -242,23 +243,19 @@ mips_pci_controller:
242 MSC01_PCI_SWAP_BYTESWAP << MSC01_PCI_SWAP_MEM_SHF | 243 MSC01_PCI_SWAP_BYTESWAP << MSC01_PCI_SWAP_MEM_SHF |
243 MSC01_PCI_SWAP_BYTESWAP << MSC01_PCI_SWAP_BAR0_SHF); 244 MSC01_PCI_SWAP_BYTESWAP << MSC01_PCI_SWAP_BAR0_SHF);
244#endif 245#endif
245#ifndef CONFIG_EVA 246
246 /* Fix up target memory mapping. */
247 MSC_READ(MSC01_PCI_BAR0, mask);
248 MSC_WRITE(MSC01_PCI_P2SCMSKL, mask & MSC01_PCI_BAR0_SIZE_MSK);
249#else
250 /* 247 /*
251 * Setup the Malta max (2GB) memory for PCI DMA in host bridge 248 * Setup the Malta max (2GB) memory for PCI DMA in host bridge
252 * in transparent addressing mode, starting from 0x80000000. 249 * in transparent addressing mode.
253 */ 250 */
254 mask = PHYS_OFFSET | (1<<3); 251 mask = PHYS_OFFSET | PCI_BASE_ADDRESS_MEM_PREFETCH;
255 MSC_WRITE(MSC01_PCI_BAR0, mask); 252 MSC_WRITE(MSC01_PCI_BAR0, mask);
256
257 mask = PHYS_OFFSET;
258 MSC_WRITE(MSC01_PCI_HEAD4, mask); 253 MSC_WRITE(MSC01_PCI_HEAD4, mask);
254
255 mask &= MSC01_PCI_BAR0_SIZE_MSK;
259 MSC_WRITE(MSC01_PCI_P2SCMSKL, mask); 256 MSC_WRITE(MSC01_PCI_P2SCMSKL, mask);
260 MSC_WRITE(MSC01_PCI_P2SCMAPL, mask); 257 MSC_WRITE(MSC01_PCI_P2SCMAPL, mask);
261#endif 258
262 /* Don't handle target retries indefinitely. */ 259 /* Don't handle target retries indefinitely. */
263 if ((data & MSC01_PCI_CFG_MAXRTRY_MSK) == 260 if ((data & MSC01_PCI_CFG_MAXRTRY_MSK) ==
264 MSC01_PCI_CFG_MAXRTRY_MSK) 261 MSC01_PCI_CFG_MAXRTRY_MSK)