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-rw-r--r--arch/mips/include/asm/stackframe.h280
1 files changed, 168 insertions, 112 deletions
diff --git a/arch/mips/include/asm/stackframe.h b/arch/mips/include/asm/stackframe.h
index eaa5a4d7d5e5..5d3563c55e0c 100644
--- a/arch/mips/include/asm/stackframe.h
+++ b/arch/mips/include/asm/stackframe.h
@@ -19,20 +19,43 @@
19#include <asm/asm-offsets.h> 19#include <asm/asm-offsets.h>
20#include <asm/thread_info.h> 20#include <asm/thread_info.h>
21 21
22/* Make the addition of cfi info a little easier. */
23 .macro cfi_rel_offset reg offset=0 docfi=0
24 .if \docfi
25 .cfi_rel_offset \reg, \offset
26 .endif
27 .endm
28
29 .macro cfi_st reg offset=0 docfi=0
30 LONG_S \reg, \offset(sp)
31 cfi_rel_offset \reg, \offset, \docfi
32 .endm
33
34 .macro cfi_restore reg offset=0 docfi=0
35 .if \docfi
36 .cfi_restore \reg
37 .endif
38 .endm
39
40 .macro cfi_ld reg offset=0 docfi=0
41 LONG_L \reg, \offset(sp)
42 cfi_restore \reg \offset \docfi
43 .endm
44
22#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX) 45#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
23#define STATMASK 0x3f 46#define STATMASK 0x3f
24#else 47#else
25#define STATMASK 0x1f 48#define STATMASK 0x1f
26#endif 49#endif
27 50
28 .macro SAVE_AT 51 .macro SAVE_AT docfi=0
29 .set push 52 .set push
30 .set noat 53 .set noat
31 LONG_S $1, PT_R1(sp) 54 cfi_st $1, PT_R1, \docfi
32 .set pop 55 .set pop
33 .endm 56 .endm
34 57
35 .macro SAVE_TEMP 58 .macro SAVE_TEMP docfi=0
36#ifdef CONFIG_CPU_HAS_SMARTMIPS 59#ifdef CONFIG_CPU_HAS_SMARTMIPS
37 mflhxu v1 60 mflhxu v1
38 LONG_S v1, PT_LO(sp) 61 LONG_S v1, PT_LO(sp)
@@ -44,20 +67,20 @@
44 mfhi v1 67 mfhi v1
45#endif 68#endif
46#ifdef CONFIG_32BIT 69#ifdef CONFIG_32BIT
47 LONG_S $8, PT_R8(sp) 70 cfi_st $8, PT_R8, \docfi
48 LONG_S $9, PT_R9(sp) 71 cfi_st $9, PT_R9, \docfi
49#endif 72#endif
50 LONG_S $10, PT_R10(sp) 73 cfi_st $10, PT_R10, \docfi
51 LONG_S $11, PT_R11(sp) 74 cfi_st $11, PT_R11, \docfi
52 LONG_S $12, PT_R12(sp) 75 cfi_st $12, PT_R12, \docfi
53#if !defined(CONFIG_CPU_HAS_SMARTMIPS) && !defined(CONFIG_CPU_MIPSR6) 76#if !defined(CONFIG_CPU_HAS_SMARTMIPS) && !defined(CONFIG_CPU_MIPSR6)
54 LONG_S v1, PT_HI(sp) 77 LONG_S v1, PT_HI(sp)
55 mflo v1 78 mflo v1
56#endif 79#endif
57 LONG_S $13, PT_R13(sp) 80 cfi_st $13, PT_R13, \docfi
58 LONG_S $14, PT_R14(sp) 81 cfi_st $14, PT_R14, \docfi
59 LONG_S $15, PT_R15(sp) 82 cfi_st $15, PT_R15, \docfi
60 LONG_S $24, PT_R24(sp) 83 cfi_st $24, PT_R24, \docfi
61#if !defined(CONFIG_CPU_HAS_SMARTMIPS) && !defined(CONFIG_CPU_MIPSR6) 84#if !defined(CONFIG_CPU_HAS_SMARTMIPS) && !defined(CONFIG_CPU_MIPSR6)
62 LONG_S v1, PT_LO(sp) 85 LONG_S v1, PT_LO(sp)
63#endif 86#endif
@@ -71,20 +94,28 @@
71#endif 94#endif
72 .endm 95 .endm
73 96
74 .macro SAVE_STATIC 97 .macro SAVE_STATIC docfi=0
75 LONG_S $16, PT_R16(sp) 98 cfi_st $16, PT_R16, \docfi
76 LONG_S $17, PT_R17(sp) 99 cfi_st $17, PT_R17, \docfi
77 LONG_S $18, PT_R18(sp) 100 cfi_st $18, PT_R18, \docfi
78 LONG_S $19, PT_R19(sp) 101 cfi_st $19, PT_R19, \docfi
79 LONG_S $20, PT_R20(sp) 102 cfi_st $20, PT_R20, \docfi
80 LONG_S $21, PT_R21(sp) 103 cfi_st $21, PT_R21, \docfi
81 LONG_S $22, PT_R22(sp) 104 cfi_st $22, PT_R22, \docfi
82 LONG_S $23, PT_R23(sp) 105 cfi_st $23, PT_R23, \docfi
83 LONG_S $30, PT_R30(sp) 106 cfi_st $30, PT_R30, \docfi
84 .endm 107 .endm
85 108
109/*
110 * get_saved_sp returns the SP for the current CPU by looking in the
111 * kernelsp array for it. If tosp is set, it stores the current sp in
112 * k0 and loads the new value in sp. If not, it clobbers k0 and
113 * stores the new value in k1, leaving sp unaffected.
114 */
86#ifdef CONFIG_SMP 115#ifdef CONFIG_SMP
87 .macro get_saved_sp /* SMP variation */ 116
117 /* SMP variation */
118 .macro get_saved_sp docfi=0 tosp=0
88 ASM_CPUID_MFC0 k0, ASM_SMP_CPUID_REG 119 ASM_CPUID_MFC0 k0, ASM_SMP_CPUID_REG
89#if defined(CONFIG_32BIT) || defined(KBUILD_64BIT_SYM32) 120#if defined(CONFIG_32BIT) || defined(KBUILD_64BIT_SYM32)
90 lui k1, %hi(kernelsp) 121 lui k1, %hi(kernelsp)
@@ -97,7 +128,15 @@
97#endif 128#endif
98 LONG_SRL k0, SMP_CPUID_PTRSHIFT 129 LONG_SRL k0, SMP_CPUID_PTRSHIFT
99 LONG_ADDU k1, k0 130 LONG_ADDU k1, k0
131 .if \tosp
132 move k0, sp
133 .if \docfi
134 .cfi_register sp, k0
135 .endif
136 LONG_L sp, %lo(kernelsp)(k1)
137 .else
100 LONG_L k1, %lo(kernelsp)(k1) 138 LONG_L k1, %lo(kernelsp)(k1)
139 .endif
101 .endm 140 .endm
102 141
103 .macro set_saved_sp stackp temp temp2 142 .macro set_saved_sp stackp temp temp2
@@ -106,7 +145,8 @@
106 LONG_S \stackp, kernelsp(\temp) 145 LONG_S \stackp, kernelsp(\temp)
107 .endm 146 .endm
108#else /* !CONFIG_SMP */ 147#else /* !CONFIG_SMP */
109 .macro get_saved_sp /* Uniprocessor variation */ 148 /* Uniprocessor variation */
149 .macro get_saved_sp docfi=0 tosp=0
110#ifdef CONFIG_CPU_JUMP_WORKAROUNDS 150#ifdef CONFIG_CPU_JUMP_WORKAROUNDS
111 /* 151 /*
112 * Clear BTB (branch target buffer), forbid RAS (return address 152 * Clear BTB (branch target buffer), forbid RAS (return address
@@ -135,7 +175,15 @@
135 daddiu k1, %hi(kernelsp) 175 daddiu k1, %hi(kernelsp)
136 dsll k1, k1, 16 176 dsll k1, k1, 16
137#endif 177#endif
178 .if \tosp
179 move k0, sp
180 .if \docfi
181 .cfi_register sp, k0
182 .endif
183 LONG_L sp, %lo(kernelsp)(k1)
184 .else
138 LONG_L k1, %lo(kernelsp)(k1) 185 LONG_L k1, %lo(kernelsp)(k1)
186 .endif
139 .endm 187 .endm
140 188
141 .macro set_saved_sp stackp temp temp2 189 .macro set_saved_sp stackp temp temp2
@@ -143,7 +191,7 @@
143 .endm 191 .endm
144#endif 192#endif
145 193
146 .macro SAVE_SOME 194 .macro SAVE_SOME docfi=0
147 .set push 195 .set push
148 .set noat 196 .set noat
149 .set reorder 197 .set reorder
@@ -151,7 +199,6 @@
151 sll k0, 3 /* extract cu0 bit */ 199 sll k0, 3 /* extract cu0 bit */
152 .set noreorder 200 .set noreorder
153 bltz k0, 8f 201 bltz k0, 8f
154 move k1, sp
155#ifdef CONFIG_EVA 202#ifdef CONFIG_EVA
156 /* 203 /*
157 * Flush interAptiv's Return Prediction Stack (RPS) by writing 204 * Flush interAptiv's Return Prediction Stack (RPS) by writing
@@ -178,20 +225,26 @@
178 MTC0 k0, CP0_ENTRYHI 225 MTC0 k0, CP0_ENTRYHI
179#endif 226#endif
180 .set reorder 227 .set reorder
228 move k0, sp
229 .if \docfi
230 .cfi_register sp, k0
231 .endif
181 /* Called from user mode, new stack. */ 232 /* Called from user mode, new stack. */
182 get_saved_sp 233 get_saved_sp docfi=\docfi tosp=1
183#ifndef CONFIG_CPU_DADDI_WORKAROUNDS 2348:
1848: move k0, sp 235#ifdef CONFIG_CPU_DADDI_WORKAROUNDS
185 PTR_SUBU sp, k1, PT_SIZE 236 .set at=k1
186#else 237#endif
187 .set at=k0 238 PTR_SUBU sp, PT_SIZE
1888: PTR_SUBU k1, PT_SIZE 239#ifdef CONFIG_CPU_DADDI_WORKAROUNDS
189 .set noat 240 .set noat
190 move k0, sp
191 move sp, k1
192#endif 241#endif
193 LONG_S k0, PT_R29(sp) 242 .if \docfi
194 LONG_S $3, PT_R3(sp) 243 .cfi_def_cfa sp,0
244 .endif
245 cfi_st k0, PT_R29, \docfi
246 cfi_rel_offset sp, PT_R29, \docfi
247 cfi_st v1, PT_R3, \docfi
195 /* 248 /*
196 * You might think that you don't need to save $0, 249 * You might think that you don't need to save $0,
197 * but the FPU emulator and gdb remote debug stub 250 * but the FPU emulator and gdb remote debug stub
@@ -199,23 +252,26 @@
199 */ 252 */
200 LONG_S $0, PT_R0(sp) 253 LONG_S $0, PT_R0(sp)
201 mfc0 v1, CP0_STATUS 254 mfc0 v1, CP0_STATUS
202 LONG_S $2, PT_R2(sp) 255 cfi_st v0, PT_R2, \docfi
203 LONG_S v1, PT_STATUS(sp) 256 LONG_S v1, PT_STATUS(sp)
204 LONG_S $4, PT_R4(sp) 257 cfi_st $4, PT_R4, \docfi
205 mfc0 v1, CP0_CAUSE 258 mfc0 v1, CP0_CAUSE
206 LONG_S $5, PT_R5(sp) 259 cfi_st $5, PT_R5, \docfi
207 LONG_S v1, PT_CAUSE(sp) 260 LONG_S v1, PT_CAUSE(sp)
208 LONG_S $6, PT_R6(sp) 261 cfi_st $6, PT_R6, \docfi
209 MFC0 v1, CP0_EPC 262 cfi_st ra, PT_R31, \docfi
210 LONG_S $7, PT_R7(sp) 263 MFC0 ra, CP0_EPC
264 cfi_st $7, PT_R7, \docfi
211#ifdef CONFIG_64BIT 265#ifdef CONFIG_64BIT
212 LONG_S $8, PT_R8(sp) 266 cfi_st $8, PT_R8, \docfi
213 LONG_S $9, PT_R9(sp) 267 cfi_st $9, PT_R9, \docfi
214#endif 268#endif
215 LONG_S v1, PT_EPC(sp) 269 LONG_S ra, PT_EPC(sp)
216 LONG_S $25, PT_R25(sp) 270 .if \docfi
217 LONG_S $28, PT_R28(sp) 271 .cfi_rel_offset ra, PT_EPC
218 LONG_S $31, PT_R31(sp) 272 .endif
273 cfi_st $25, PT_R25, \docfi
274 cfi_st $28, PT_R28, \docfi
219 275
220 /* Set thread_info if we're coming from user mode */ 276 /* Set thread_info if we're coming from user mode */
221 mfc0 k0, CP0_STATUS 277 mfc0 k0, CP0_STATUS
@@ -232,21 +288,21 @@
232 .set pop 288 .set pop
233 .endm 289 .endm
234 290
235 .macro SAVE_ALL 291 .macro SAVE_ALL docfi=0
236 SAVE_SOME 292 SAVE_SOME \docfi
237 SAVE_AT 293 SAVE_AT \docfi
238 SAVE_TEMP 294 SAVE_TEMP \docfi
239 SAVE_STATIC 295 SAVE_STATIC \docfi
240 .endm 296 .endm
241 297
242 .macro RESTORE_AT 298 .macro RESTORE_AT docfi=0
243 .set push 299 .set push
244 .set noat 300 .set noat
245 LONG_L $1, PT_R1(sp) 301 cfi_ld $1, PT_R1, \docfi
246 .set pop 302 .set pop
247 .endm 303 .endm
248 304
249 .macro RESTORE_TEMP 305 .macro RESTORE_TEMP docfi=0
250#ifdef CONFIG_CPU_CAVIUM_OCTEON 306#ifdef CONFIG_CPU_CAVIUM_OCTEON
251 /* Restore the Octeon multiplier state */ 307 /* Restore the Octeon multiplier state */
252 jal octeon_mult_restore 308 jal octeon_mult_restore
@@ -265,33 +321,37 @@
265 mthi $24 321 mthi $24
266#endif 322#endif
267#ifdef CONFIG_32BIT 323#ifdef CONFIG_32BIT
268 LONG_L $8, PT_R8(sp) 324 cfi_ld $8, PT_R8, \docfi
269 LONG_L $9, PT_R9(sp) 325 cfi_ld $9, PT_R9, \docfi
270#endif 326#endif
271 LONG_L $10, PT_R10(sp) 327 cfi_ld $10, PT_R10, \docfi
272 LONG_L $11, PT_R11(sp) 328 cfi_ld $11, PT_R11, \docfi
273 LONG_L $12, PT_R12(sp) 329 cfi_ld $12, PT_R12, \docfi
274 LONG_L $13, PT_R13(sp) 330 cfi_ld $13, PT_R13, \docfi
275 LONG_L $14, PT_R14(sp) 331 cfi_ld $14, PT_R14, \docfi
276 LONG_L $15, PT_R15(sp) 332 cfi_ld $15, PT_R15, \docfi
277 LONG_L $24, PT_R24(sp) 333 cfi_ld $24, PT_R24, \docfi
278 .endm 334 .endm
279 335
280 .macro RESTORE_STATIC 336 .macro RESTORE_STATIC docfi=0
281 LONG_L $16, PT_R16(sp) 337 cfi_ld $16, PT_R16, \docfi
282 LONG_L $17, PT_R17(sp) 338 cfi_ld $17, PT_R17, \docfi
283 LONG_L $18, PT_R18(sp) 339 cfi_ld $18, PT_R18, \docfi
284 LONG_L $19, PT_R19(sp) 340 cfi_ld $19, PT_R19, \docfi
285 LONG_L $20, PT_R20(sp) 341 cfi_ld $20, PT_R20, \docfi
286 LONG_L $21, PT_R21(sp) 342 cfi_ld $21, PT_R21, \docfi
287 LONG_L $22, PT_R22(sp) 343 cfi_ld $22, PT_R22, \docfi
288 LONG_L $23, PT_R23(sp) 344 cfi_ld $23, PT_R23, \docfi
289 LONG_L $30, PT_R30(sp) 345 cfi_ld $30, PT_R30, \docfi
346 .endm
347
348 .macro RESTORE_SP docfi=0
349 cfi_ld sp, PT_R29, \docfi
290 .endm 350 .endm
291 351
292#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX) 352#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
293 353
294 .macro RESTORE_SOME 354 .macro RESTORE_SOME docfi=0
295 .set push 355 .set push
296 .set reorder 356 .set reorder
297 .set noat 357 .set noat
@@ -306,30 +366,30 @@
306 and v0, v1 366 and v0, v1
307 or v0, a0 367 or v0, a0
308 mtc0 v0, CP0_STATUS 368 mtc0 v0, CP0_STATUS
309 LONG_L $31, PT_R31(sp) 369 cfi_ld $31, PT_R31, \docfi
310 LONG_L $28, PT_R28(sp) 370 cfi_ld $28, PT_R28, \docfi
311 LONG_L $25, PT_R25(sp) 371 cfi_ld $25, PT_R25, \docfi
312 LONG_L $7, PT_R7(sp) 372 cfi_ld $7, PT_R7, \docfi
313 LONG_L $6, PT_R6(sp) 373 cfi_ld $6, PT_R6, \docfi
314 LONG_L $5, PT_R5(sp) 374 cfi_ld $5, PT_R5, \docfi
315 LONG_L $4, PT_R4(sp) 375 cfi_ld $4, PT_R4, \docfi
316 LONG_L $3, PT_R3(sp) 376 cfi_ld $3, PT_R3, \docfi
317 LONG_L $2, PT_R2(sp) 377 cfi_ld $2, PT_R2, \docfi
318 .set pop 378 .set pop
319 .endm 379 .endm
320 380
321 .macro RESTORE_SP_AND_RET 381 .macro RESTORE_SP_AND_RET docfi=0
322 .set push 382 .set push
323 .set noreorder 383 .set noreorder
324 LONG_L k0, PT_EPC(sp) 384 LONG_L k0, PT_EPC(sp)
325 LONG_L sp, PT_R29(sp) 385 RESTORE_SP \docfi
326 jr k0 386 jr k0
327 rfe 387 rfe
328 .set pop 388 .set pop
329 .endm 389 .endm
330 390
331#else 391#else
332 .macro RESTORE_SOME 392 .macro RESTORE_SOME docfi=0
333 .set push 393 .set push
334 .set reorder 394 .set reorder
335 .set noat 395 .set noat
@@ -346,24 +406,24 @@
346 mtc0 v0, CP0_STATUS 406 mtc0 v0, CP0_STATUS
347 LONG_L v1, PT_EPC(sp) 407 LONG_L v1, PT_EPC(sp)
348 MTC0 v1, CP0_EPC 408 MTC0 v1, CP0_EPC
349 LONG_L $31, PT_R31(sp) 409 cfi_ld $31, PT_R31, \docfi
350 LONG_L $28, PT_R28(sp) 410 cfi_ld $28, PT_R28, \docfi
351 LONG_L $25, PT_R25(sp) 411 cfi_ld $25, PT_R25, \docfi
352#ifdef CONFIG_64BIT 412#ifdef CONFIG_64BIT
353 LONG_L $8, PT_R8(sp) 413 cfi_ld $8, PT_R8, \docfi
354 LONG_L $9, PT_R9(sp) 414 cfi_ld $9, PT_R9, \docfi
355#endif 415#endif
356 LONG_L $7, PT_R7(sp) 416 cfi_ld $7, PT_R7, \docfi
357 LONG_L $6, PT_R6(sp) 417 cfi_ld $6, PT_R6, \docfi
358 LONG_L $5, PT_R5(sp) 418 cfi_ld $5, PT_R5, \docfi
359 LONG_L $4, PT_R4(sp) 419 cfi_ld $4, PT_R4, \docfi
360 LONG_L $3, PT_R3(sp) 420 cfi_ld $3, PT_R3, \docfi
361 LONG_L $2, PT_R2(sp) 421 cfi_ld $2, PT_R2, \docfi
362 .set pop 422 .set pop
363 .endm 423 .endm
364 424
365 .macro RESTORE_SP_AND_RET 425 .macro RESTORE_SP_AND_RET docfi=0
366 LONG_L sp, PT_R29(sp) 426 RESTORE_SP \docfi
367#ifdef CONFIG_CPU_MIPSR6 427#ifdef CONFIG_CPU_MIPSR6
368 eretnc 428 eretnc
369#else 429#else
@@ -375,16 +435,12 @@
375 435
376#endif 436#endif
377 437
378 .macro RESTORE_SP 438 .macro RESTORE_ALL docfi=0
379 LONG_L sp, PT_R29(sp) 439 RESTORE_TEMP \docfi
380 .endm 440 RESTORE_STATIC \docfi
381 441 RESTORE_AT \docfi
382 .macro RESTORE_ALL 442 RESTORE_SOME \docfi
383 RESTORE_TEMP 443 RESTORE_SP \docfi
384 RESTORE_STATIC
385 RESTORE_AT
386 RESTORE_SOME
387 RESTORE_SP
388 .endm 444 .endm
389 445
390/* 446/*
generated by cgit v1.2.2 (git 2.25.0) at 2026-05-27 09:44:35 -0400