diff options
Diffstat (limited to 'arch/mips/include/asm/mipsregs.h')
| -rw-r--r-- | arch/mips/include/asm/mipsregs.h | 10 |
1 files changed, 1 insertions, 9 deletions
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h index eb742895dcbe..7e4e6f8fab37 100644 --- a/arch/mips/include/asm/mipsregs.h +++ b/arch/mips/include/asm/mipsregs.h | |||
| @@ -240,7 +240,7 @@ | |||
| 240 | #define PM_HUGE_MASK PM_64M | 240 | #define PM_HUGE_MASK PM_64M |
| 241 | #elif defined(CONFIG_PAGE_SIZE_64KB) | 241 | #elif defined(CONFIG_PAGE_SIZE_64KB) |
| 242 | #define PM_HUGE_MASK PM_256M | 242 | #define PM_HUGE_MASK PM_256M |
| 243 | #elif defined(CONFIG_HUGETLB_PAGE) | 243 | #elif defined(CONFIG_MIPS_HUGE_TLB_SUPPORT) |
| 244 | #error Bad page size configuration for hugetlbfs! | 244 | #error Bad page size configuration for hugetlbfs! |
| 245 | #endif | 245 | #endif |
| 246 | 246 | ||
| @@ -977,10 +977,6 @@ do { \ | |||
| 977 | #define read_c0_framemask() __read_32bit_c0_register($21, 0) | 977 | #define read_c0_framemask() __read_32bit_c0_register($21, 0) |
| 978 | #define write_c0_framemask(val) __write_32bit_c0_register($21, 0, val) | 978 | #define write_c0_framemask(val) __write_32bit_c0_register($21, 0, val) |
| 979 | 979 | ||
| 980 | /* RM9000 PerfControl performance counter control register */ | ||
| 981 | #define read_c0_perfcontrol() __read_32bit_c0_register($22, 0) | ||
| 982 | #define write_c0_perfcontrol(val) __write_32bit_c0_register($22, 0, val) | ||
| 983 | |||
| 984 | #define read_c0_diag() __read_32bit_c0_register($22, 0) | 980 | #define read_c0_diag() __read_32bit_c0_register($22, 0) |
| 985 | #define write_c0_diag(val) __write_32bit_c0_register($22, 0, val) | 981 | #define write_c0_diag(val) __write_32bit_c0_register($22, 0, val) |
| 986 | 982 | ||
| @@ -1033,10 +1029,6 @@ do { \ | |||
| 1033 | #define read_c0_perfcntr3_64() __read_64bit_c0_register($25, 7) | 1029 | #define read_c0_perfcntr3_64() __read_64bit_c0_register($25, 7) |
| 1034 | #define write_c0_perfcntr3_64(val) __write_64bit_c0_register($25, 7, val) | 1030 | #define write_c0_perfcntr3_64(val) __write_64bit_c0_register($25, 7, val) |
| 1035 | 1031 | ||
| 1036 | /* RM9000 PerfCount performance counter register */ | ||
| 1037 | #define read_c0_perfcount() __read_64bit_c0_register($25, 0) | ||
| 1038 | #define write_c0_perfcount(val) __write_64bit_c0_register($25, 0, val) | ||
| 1039 | |||
| 1040 | #define read_c0_ecc() __read_32bit_c0_register($26, 0) | 1032 | #define read_c0_ecc() __read_32bit_c0_register($26, 0) |
| 1041 | #define write_c0_ecc(val) __write_32bit_c0_register($26, 0, val) | 1033 | #define write_c0_ecc(val) __write_32bit_c0_register($26, 0, val) |
| 1042 | 1034 | ||
