26 files changed, 1319 insertions, 52 deletions

diff --git a/arch/mips/boot/dts/brcm/Makefile b/arch/mips/boot/dts/brcm/Makefile
index fda9d387cc08..d61bc2aebf69 100644
--- a/arch/mips/boot/dts/brcm/Makefile
+++ b/arch/mips/boot/dts/brcm/Makefile
@@ -1,6 +1,5 @@
 dtb-$(CONFIG_DT_BCM93384WVG)            += bcm93384wvg.dtb
 dtb-$(CONFIG_DT_BCM93384WVG_VIPER)      += bcm93384wvg_viper.dtb
-dtb-$(CONFIG_DT_BCM96358NB4SER)         += bcm96358nb4ser.dtb
 dtb-$(CONFIG_DT_BCM96368MVWG)           += bcm96368mvwg.dtb
 dtb-$(CONFIG_DT_BCM9EJTAGPRB)           += bcm9ejtagprb.dtb
 dtb-$(CONFIG_DT_BCM97125CBMB)           += bcm97125cbmb.dtb
@@ -11,20 +10,29 @@ dtb-$(CONFIG_DT_BCM97362SVMB)		+= bcm97362svmb.dtb
 dtb-$(CONFIG_DT_BCM97420C)              += bcm97420c.dtb
 dtb-$(CONFIG_DT_BCM97425SVMB)           += bcm97425svmb.dtb
 dtb-$(CONFIG_DT_BCM97435SVMB)           += bcm97435svmb.dtb
+dtb-$(CONFIG_DT_COMTREND_VR3032U)       += bcm63268-comtrend-vr-3032u.dtb
+dtb-$(CONFIG_DT_NETGEAR_CVG834G)        += bcm3368-netgear-cvg834g.dtb
+dtb-$(CONFIG_DT_SFR_NEUFBOX4_SERCOMM)   += bcm6358-neufbox4-sercomm.dtb
+dtb-$(CONFIG_DT_SFR_NEUFBOX6_SERCOMM)   += bcm6362-neufbox6-sercomm.dtb
 
-dtb-$(CONFIG_DT_NONE)                   += \
-                                                bcm93384wvg.dtb         \
-                                                bcm93384wvg_viper.dtb   \
-                                                bcm96358nb4ser.dtb      \
-                                                bcm96368mvwg.dtb        \
-                                                bcm9ejtagprb.dtb        \
-                                                bcm97125cbmb.dtb        \
-                                                bcm97346dbsmb.dtb       \
-                                                bcm97358svmb.dtb        \
-                                                bcm97360svmb.dtb        \
-                                                bcm97362svmb.dtb        \
-                                                bcm97420c.dtb           \
-                                                bcm97425svmb.dtb
+dtb-$(CONFIG_DT_NONE) += \
+        bcm3368-netgear-cvg834g.dtb \
+        bcm6358-neufbox4-sercomm.dtb \
+        bcm6362-neufbox6-sercomm.dtb \
+        bcm63268-comtrend-vr-3032u.dtb \
+        bcm93384wvg.dtb \
+        bcm93384wvg_viper.dtb \
+        bcm96358nb4ser.dtb \
+        bcm96368mvwg.dtb \
+        bcm9ejtagprb.dtb \
+        bcm97125cbmb.dtb \
+        bcm97346dbsmb.dtb \
+        bcm97358svmb.dtb \
+        bcm97360svmb.dtb \
+        bcm97362svmb.dtb \
+        bcm97420c.dtb \
+        bcm97425svmb.dtb \
+        bcm97435svmb.dtb
 
 obj-y                           += $(patsubst %.dtb, %.dtb.o, $(dtb-y))
 
diff --git a/arch/mips/boot/dts/brcm/bcm3368-netgear-cvg834g.dts b/arch/mips/boot/dts/brcm/bcm3368-netgear-cvg834g.dts
new file mode 100644
index 000000000000..2f2e80fdcde8
--- /dev/null
+++ b/arch/mips/boot/dts/brcm/bcm3368-netgear-cvg834g.dts
@@ -0,0 +1,22 @@
+/dts-v1/;
+
+/include/ "bcm3368.dtsi"
+
+/ {
+        compatible = "netgear,cvg834g", "brcm,bcm3368";
+        model = "NETGEAR CVG834G";
+
+        memory@0 {
+                device_type = "memory";
+                reg = <0x00000000 0x02000000>;
+        };
+
+        chosen {
+                bootargs = "console=ttyS0,115200";
+                stdout-path = &uart0;
+        };
+};
+
+&uart0 {
+        status = "okay";
+};
diff --git a/arch/mips/boot/dts/brcm/bcm3368.dtsi b/arch/mips/boot/dts/brcm/bcm3368.dtsi
new file mode 100644
index 000000000000..bee855cb8073
--- /dev/null
+++ b/arch/mips/boot/dts/brcm/bcm3368.dtsi
@@ -0,0 +1,101 @@
+/ {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        compatible = "brcm,bcm3368";
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                mips-hpt-frequency = <150000000>;
+
+                cpu@0 {
+                        compatible = "brcm,bmips4350";
+                        device_type = "cpu";
+                        reg = <0>;
+                };
+
+                cpu@1 {
+                        compatible = "brcm,bmips4350";
+                        device_type = "cpu";
+                        reg = <1>;
+                };
+        };
+
+        clocks {
+                periph_clk: periph-clk {
+                        compatible = "fixed-clock";
+                        #clock-cells = <0>;
+                        clock-frequency = <50000000>;
+                };
+        };
+
+        aliases {
+                serial0 = &uart0;
+                serial1 = &uart1;
+        };
+
+        cpu_intc: interrupt-controller {
+                #address-cells = <0>;
+                compatible = "mti,cpu-interrupt-controller";
+
+                interrupt-controller;
+                #interrupt-cells = <1>;
+        };
+
+        ubus {
+                #address-cells = <1>;
+                #size-cells = <1>;
+
+                compatible = "simple-bus";
+                ranges;
+
+                periph_cntl: syscon@fff8c000 {
+                        compatible = "syscon";
+                        reg = <0xfff8c000 0xc>;
+                        native-endian;
+                };
+
+                reboot: syscon-reboot@fff8c008 {
+                        compatible = "syscon-reboot";
+                        regmap = <&periph_cntl>;
+                        offset = <0x8>;
+                        mask = <0x1>;
+                };
+
+                periph_intc: interrupt-controller@fff8c00c {
+                        compatible = "brcm,bcm6345-l1-intc";
+                        reg = <0xfff8c00c 0x8>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <1>;
+
+                        interrupt-parent = <&cpu_intc>;
+                        interrupts = <2>;
+                };
+
+                uart0: serial@fff8c100 {
+                        compatible = "brcm,bcm6345-uart";
+                        reg = <0xfff8c100 0x18>;
+
+                        interrupt-parent = <&periph_intc>;
+                        interrupts = <2>;
+
+                        clocks = <&periph_clk>;
+
+                        status = "disabled";
+                };
+
+                uart1: serial@fff8c120 {
+                        compatible = "brcm,bcm6345-uart";
+                        reg = <0xfff8c120 0x18>;
+
+                        interrupt-parent = <&periph_intc>;
+                        interrupts = <3>;
+
+                        clocks = <&periph_clk>;
+
+                        status = "disabled";
+                };
+        };
+};
diff --git a/arch/mips/boot/dts/brcm/bcm63268-comtrend-vr-3032u.dts b/arch/mips/boot/dts/brcm/bcm63268-comtrend-vr-3032u.dts
new file mode 100644
index 000000000000..430d35ca33d5
--- /dev/null
+++ b/arch/mips/boot/dts/brcm/bcm63268-comtrend-vr-3032u.dts
@@ -0,0 +1,108 @@
+/dts-v1/;
+
+/include/ "bcm63268.dtsi"
+
+/ {
+        compatible = "comtrend,vr-3032u", "brcm,bcm63268";
+        model = "Comtrend VR-3032u";
+
+        memory@0 {
+                device_type = "memory";
+                reg = <0x00000000 0x04000000>;
+        };
+
+        chosen {
+                bootargs = "console=ttyS0,115200";
+                stdout-path = &uart0;
+        };
+};
+
+&leds0 {
+        status = "ok";
+        brcm,serial-leds;
+        brcm,serial-dat-low;
+        brcm,serial-shift-inv;
+
+        led@0 {
+                reg = <0>;
+                brcm,hardware-controlled;
+                brcm,link-signal-sources = <0>;
+                /* GPHY0 Speed 0 */
+        };
+        led@1 {
+                reg = <1>;
+                brcm,hardware-controlled;
+                brcm,link-signal-sources = <1>;
+                /* GPHY0 Speed 1 */
+        };
+        led@2 {
+                reg = <2>;
+                active-low;
+                label = "vr-3032u:red:inet";
+        };
+        led@3 {
+                reg = <3>;
+                active-low;
+                label = "vr-3032u:green:dsl";
+        };
+        led@4 {
+                reg = <4>;
+                active-low;
+                label = "vr-3032u:green:usb";
+        };
+        led@7 {
+                reg = <7>;
+                active-low;
+                label = "vr-3032u:green:wps";
+        };
+        led@8 {
+                reg = <8>;
+                active-low;
+                label = "vr-3032u:green:inet";
+        };
+        led@9 {
+                reg = <9>;
+                brcm,hardware-controlled;
+                /* EPHY0 Activity */
+        };
+        led@10 {
+                reg = <10>;
+                brcm,hardware-controlled;
+                /* EPHY1 Activity */
+        };
+        led@11 {
+                reg = <11>;
+                brcm,hardware-controlled;
+                /* EPHY2 Activity */
+        };
+        led@12 {
+                reg = <12>;
+                brcm,hardware-controlled;
+                /* GPHY0 Activity */
+        };
+        led@13 {
+                reg = <13>;
+                brcm,hardware-controlled;
+                /* EPHY0 Speed */
+        };
+        led@14 {
+                reg = <14>;
+                brcm,hardware-controlled;
+                /* EPHY1 Speed */
+        };
+        led@15 {
+                reg = <15>;
+                brcm,hardware-controlled;
+                /* EPHY2 Speed */
+        };
+        led@20 {
+                reg = <20>;
+                active-low;
+                label = "vr-3032u:green:power";
+                default-state = "on";
+        };
+};
+
+&uart0 {
+        status = "okay";
+};
diff --git a/arch/mips/boot/dts/brcm/bcm63268.dtsi b/arch/mips/boot/dts/brcm/bcm63268.dtsi
new file mode 100644
index 000000000000..7e6bf2cc0287
--- /dev/null
+++ b/arch/mips/boot/dts/brcm/bcm63268.dtsi
@@ -0,0 +1,134 @@
+/ {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        compatible = "brcm,bcm63268";
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                mips-hpt-frequency = <200000000>;
+
+                cpu@0 {
+                        compatible = "brcm,bmips4350";
+                        device_type = "cpu";
+                        reg = <0>;
+                };
+
+                cpu@1 {
+                        compatible = "brcm,bmips4350";
+                        device_type = "cpu";
+                        reg = <1>;
+                };
+        };
+
+        clocks {
+                periph_clk: periph-clk {
+                        compatible = "fixed-clock";
+                        #clock-cells = <0>;
+                        clock-frequency = <50000000>;
+                };
+        };
+
+        aliases {
+                serial0 = &uart0;
+                serial1 = &uart1;
+        };
+
+        cpu_intc: interrupt-controller {
+                #address-cells = <0>;
+                compatible = "mti,cpu-interrupt-controller";
+
+                interrupt-controller;
+                #interrupt-cells = <1>;
+        };
+
+        ubus {
+                #address-cells = <1>;
+                #size-cells = <1>;
+
+                compatible = "simple-bus";
+                ranges;
+
+                periph_cntl: syscon@10000000 {
+                        compatible = "syscon";
+                        reg = <0x10000000 0x14>;
+                        native-endian;
+                };
+
+                reboot: syscon-reboot@10000008 {
+                        compatible = "syscon-reboot";
+                        regmap = <&periph_cntl>;
+                        offset = <0x8>;
+                        mask = <0x1>;
+                };
+
+                periph_intc: interrupt-controller@10000020 {
+                        compatible = "brcm,bcm6345-l1-intc";
+                        reg = <0x10000020 0x20>,
+                              <0x10000040 0x20>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <1>;
+
+                        interrupt-parent = <&cpu_intc>;
+                        interrupts = <2>, <3>;
+                };
+
+                uart0: serial@10000180 {
+                        compatible = "brcm,bcm6345-uart";
+                        reg = <0x10000180 0x18>;
+
+                        interrupt-parent = <&periph_intc>;
+                        interrupts = <5>;
+
+                        clocks = <&periph_clk>;
+
+                        status = "disabled";
+                };
+
+                uart1: serial@100001a0 {
+                        compatible = "brcm,bcm6345-uart";
+                        reg = <0x100001a0 0x18>;
+
+                        interrupt-parent = <&periph_intc>;
+                        interrupts = <34>;
+
+                        clocks = <&periph_clk>;
+
+                        status = "disabled";
+                };
+
+                leds0: led-controller@10001900 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "brcm,bcm6328-leds";
+                        reg = <0x10001900 0x24>;
+
+                        status = "disabled";
+                };
+
+                ehci: usb@10002500 {
+                        compatible = "brcm,bcm63268-ehci", "generic-ehci";
+                        reg = <0x10002500 0x100>;
+                        big-endian;
+
+                        interrupt-parent = <&periph_intc>;
+                        interrupts = <10>;
+
+                        status = "disabled";
+                };
+
+                ohci: usb@10002600 {
+                        compatible = "brcm,bcm63268-ohci", "generic-ohci";
+                        reg = <0x10002600 0x100>;
+                        big-endian;
+                        no-big-frame-no;
+
+                        interrupt-parent = <&periph_intc>;
+                        interrupts = <9>;
+
+                        status = "disabled";
+                };
+        };
+};
diff --git a/arch/mips/boot/dts/brcm/bcm96358nb4ser.dts b/arch/mips/boot/dts/brcm/bcm6358-neufbox4-sercomm.dts
index f412117972e6..702eae2a22a0 100644
--- a/arch/mips/boot/dts/brcm/bcm96358nb4ser.dts
+++ b/arch/mips/boot/dts/brcm/bcm6358-neufbox4-sercomm.dts
@@ -12,6 +12,7 @@
         };
 
         chosen {
+                bootargs = "console=ttyS0,115200";
                 stdout-path = &uart0;
         };
 };
diff --git a/arch/mips/boot/dts/brcm/bcm6362-neufbox6-sercomm.dts b/arch/mips/boot/dts/brcm/bcm6362-neufbox6-sercomm.dts
new file mode 100644
index 000000000000..480f2a5bf1da
--- /dev/null
+++ b/arch/mips/boot/dts/brcm/bcm6362-neufbox6-sercomm.dts
@@ -0,0 +1,22 @@
+/dts-v1/;
+
+/include/ "bcm6362.dtsi"
+
+/ {
+        compatible = "sfr,nb6-ser", "brcm,bcm6362";
+        model = "SFR NeufBox 6 (Sercomm)";
+
+        memory@0 {
+                device_type = "memory";
+                reg = <0x00000000 0x08000000>;
+        };
+
+        chosen {
+                bootargs = "console=ttyS0,115200";
+                stdout-path = &uart0;
+        };
+};
+
+&uart0 {
+        status = "okay";
+};
diff --git a/arch/mips/boot/dts/brcm/bcm6362.dtsi b/arch/mips/boot/dts/brcm/bcm6362.dtsi
new file mode 100644
index 000000000000..c507da594f2f
--- /dev/null
+++ b/arch/mips/boot/dts/brcm/bcm6362.dtsi
@@ -0,0 +1,134 @@
+/ {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        compatible = "brcm,bcm6362";
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                mips-hpt-frequency = <200000000>;
+
+                cpu@0 {
+                        compatible = "brcm,bmips4350";
+                        device_type = "cpu";
+                        reg = <0>;
+                };
+
+                cpu@1 {
+                        compatible = "brcm,bmips4350";
+                        device_type = "cpu";
+                        reg = <1>;
+                };
+        };
+
+        clocks {
+                periph_clk: periph-clk {
+                        compatible = "fixed-clock";
+                        #clock-cells = <0>;
+                        clock-frequency = <50000000>;
+                };
+        };
+
+        aliases {
+                serial0 = &uart0;
+                serial1 = &uart1;
+        };
+
+        cpu_intc: interrupt-controller {
+                #address-cells = <0>;
+                compatible = "mti,cpu-interrupt-controller";
+
+                interrupt-controller;
+                #interrupt-cells = <1>;
+        };
+
+        ubus {
+                #address-cells = <1>;
+                #size-cells = <1>;
+
+                compatible = "simple-bus";
+                ranges;
+
+                periph_cntl: syscon@10000000 {
+                        compatible = "syscon";
+                        reg = <0x10000000 0x14>;
+                        native-endian;
+                };
+
+                reboot: syscon-reboot@10000008 {
+                        compatible = "syscon-reboot";
+                        regmap = <&periph_cntl>;
+                        offset = <0x8>;
+                        mask = <0x1>;
+                };
+
+                periph_intc: interrupt-controller@10000020 {
+                        compatible = "brcm,bcm6345-l1-intc";
+                        reg = <0x10000020 0x10>,
+                              <0x10000030 0x10>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <1>;
+
+                        interrupt-parent = <&cpu_intc>;
+                        interrupts = <2>, <3>;
+                };
+
+                uart0: serial@10000100 {
+                        compatible = "brcm,bcm6345-uart";
+                        reg = <0x10000100 0x18>;
+
+                        interrupt-parent = <&periph_intc>;
+                        interrupts = <3>;
+
+                        clocks = <&periph_clk>;
+
+                        status = "disabled";
+                };
+
+                uart1: serial@10000120 {
+                        compatible = "brcm,bcm6345-uart";
+                        reg = <0x10000120 0x18>;
+
+                        interrupt-parent = <&periph_intc>;
+                        interrupts = <4>;
+
+                        clocks = <&periph_clk>;
+
+                        status = "disabled";
+                };
+
+                leds0: led-controller@10001900 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "brcm,bcm6328-leds";
+                        reg = <0x10001900 0x24>;
+
+                        status = "disabled";
+                };
+
+                ehci: usb@10002500 {
+                        compatible = "brcm,bcm6362-ehci", "generic-ehci";
+                        reg = <0x10002500 0x100>;
+                        big-endian;
+
+                        interrupt-parent = <&periph_intc>;
+                        interrupts = <10>;
+
+                        status = "disabled";
+                };
+
+                ohci: usb@10002600 {
+                        compatible = "brcm,bcm6362-ohci", "generic-ohci";
+                        reg = <0x10002600 0x100>;
+                        big-endian;
+                        no-big-frame-no;
+
+                        interrupt-parent = <&periph_intc>;
+                        interrupts = <9>;
+
+                        status = "disabled";
+                };
+        };
+};
diff --git a/arch/mips/boot/dts/brcm/bcm7125.dtsi b/arch/mips/boot/dts/brcm/bcm7125.dtsi
index 550e1d9e3ee0..bbd00f65ce39 100644
--- a/arch/mips/boot/dts/brcm/bcm7125.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7125.dtsi
@@ -26,7 +26,7 @@
                 uart0 = &uart0;
         };
 
-        cpu_intc: cpu_intc {
+        cpu_intc: interrupt-controller {
                 #address-cells = <0>;
                 compatible = "mti,cpu-interrupt-controller";
 
@@ -40,6 +40,12 @@
                         #clock-cells = <0>;
                         clock-frequency = <81000000>;
                 };
+
+                upg_clk: upg_clk {
+                        compatible = "fixed-clock";
+                        #clock-cells = <0>;
+                        clock-frequency = <27000000>;
+                };
         };
 
         rdb {
@@ -49,7 +55,7 @@
                 compatible = "simple-bus";
                 ranges = <0 0x10000000 0x01000000>;
 
-                periph_intc: periph_intc@441400 {
+                periph_intc: interrupt-controller@441400 {
                         compatible = "brcm,bcm7038-l1-intc";
                         reg = <0x441400 0x30>, <0x441600 0x30>;
 
@@ -60,7 +66,7 @@
                         interrupts = <2>, <3>;
                 };
 
-                sun_l2_intc: sun_l2_intc@401800 {
+                sun_l2_intc: interrupt-controller@401800 {
                         compatible = "brcm,l2-intc";
                         reg = <0x401800 0x30>;
                         interrupt-controller;
@@ -81,7 +87,7 @@
                                                      "avd_0", "jtag_0";
                 };
 
-                upg_irq0_intc: upg_irq0_intc@406780 {
+                upg_irq0_intc: interrupt-controller@406780 {
                         compatible = "brcm,bcm7120-l2-intc";
                         reg = <0x406780 0x8>;
 
@@ -183,6 +189,26 @@
                       status = "disabled";
                 };
 
+                pwma: pwm@406580 {
+                        compatible = "brcm,bcm7038-pwm";
+                        reg = <0x406580 0x28>;
+                        #pwm-cells = <2>;
+                        clocks = <&upg_clk>;
+                        status = "disabled";
+                };
+
+                upg_gio: gpio@406700 {
+                        compatible = "brcm,brcmstb-gpio";
+                        reg = <0x406700 0x80>;
+                        #gpio-cells = <2>;
+                        #interrupt-cells = <2>;
+                        gpio-controller;
+                        interrupt-controller;
+                        interrupt-parent = <&upg_irq0_intc>;
+                        interrupts = <6>;
+                        brcm,gpio-bank-widths = <32 32 32 18>;
+                };
+
                 ehci0: usb@488300 {
                         compatible = "brcm,bcm7125-ehci", "generic-ehci";
                         reg = <0x488300 0x100>;
diff --git a/arch/mips/boot/dts/brcm/bcm7346.dtsi b/arch/mips/boot/dts/brcm/bcm7346.dtsi
index ec959061d52e..4bbcc95f1c15 100644
--- a/arch/mips/boot/dts/brcm/bcm7346.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7346.dtsi
@@ -26,7 +26,7 @@
                 uart0 = &uart0;
         };
 
-        cpu_intc: cpu_intc {
+        cpu_intc: interrupt-controller {
                 #address-cells = <0>;
                 compatible = "mti,cpu-interrupt-controller";
 
@@ -40,6 +40,12 @@
                         #clock-cells = <0>;
                         clock-frequency = <81000000>;
                 };
+
+                upg_clk: upg_clk {
+                        compatible = "fixed-clock";
+                        #clock-cells = <0>;
+                        clock-frequency = <27000000>;
+                };
         };
 
         rdb {
@@ -49,7 +55,7 @@
                 compatible = "simple-bus";
                 ranges = <0 0x10000000 0x01000000>;
 
-                periph_intc: periph_intc@411400 {
+                periph_intc: interrupt-controller@411400 {
                         compatible = "brcm,bcm7038-l1-intc";
                         reg = <0x411400 0x30>, <0x411600 0x30>;
 
@@ -60,7 +66,7 @@
                         interrupts = <2>, <3>;
                 };
 
-                sun_l2_intc: sun_l2_intc@403000 {
+                sun_l2_intc: interrupt-controller@403000 {
                         compatible = "brcm,l2-intc";
                         reg = <0x403000 0x30>;
                         interrupt-controller;
@@ -81,7 +87,7 @@
                                                      "jtag_0", "svd_0";
                 };
 
-                upg_irq0_intc: upg_irq0_intc@406780 {
+                upg_irq0_intc: interrupt-controller@406780 {
                         compatible = "brcm,bcm7120-l2-intc";
                         reg = <0x406780 0x8>;
 
@@ -96,7 +102,7 @@
                         interrupt-names = "upg_main", "upg_bsc";
                 };
 
-                upg_aon_irq0_intc: upg_aon_irq0_intc@408b80 {
+                upg_aon_irq0_intc: interrupt-controller@408b80 {
                         compatible = "brcm,bcm7120-l2-intc";
                         reg = <0x408b80 0x8>;
 
@@ -210,6 +216,59 @@
                       status = "disabled";
                 };
 
+                pwma: pwm@406580 {
+                        compatible = "brcm,bcm7038-pwm";
+                        reg = <0x406580 0x28>;
+                        #pwm-cells = <2>;
+                        clocks = <&upg_clk>;
+                        status = "disabled";
+                };
+
+                pwmb: pwm@406800 {
+                        compatible = "brcm,bcm7038-pwm";
+                        reg = <0x406800 0x28>;
+                        #pwm-cells = <2>;
+                        clocks = <&upg_clk>;
+                        status = "disabled";
+                };
+
+                aon_pm_l2_intc: interrupt-controller@408440 {
+                        compatible = "brcm,l2-intc";
+                        reg = <0x408440 0x30>;
+                        interrupt-controller;
+                        #interrupt-cells = <1>;
+                        interrupt-parent = <&periph_intc>;
+                        interrupts = <53>;
+                        brcm,irq-can-wake;
+                };
+
+                upg_gio: gpio@406700 {
+                        compatible = "brcm,brcmstb-gpio";
+                        reg = <0x406700 0x60>;
+                        #gpio-cells = <2>;
+                        #interrupt-cells = <2>;
+                        gpio-controller;
+                        interrupt-controller;
+                        interrupt-parent = <&upg_irq0_intc>;
+                        interrupts = <6>;
+                        brcm,gpio-bank-widths = <32 32 16>;
+                };
+
+                upg_gio_aon: gpio@408c00 {
+                        compatible = "brcm,brcmstb-gpio";
+                        reg = <0x408c00 0x60>;
+                        #gpio-cells = <2>;
+                        #interrupt-cells = <2>;
+                        gpio-controller;
+                        interrupt-controller;
+                        interrupt-parent = <&upg_aon_irq0_intc>;
+                        interrupts = <6>;
+                        interrupts-extended = <&upg_aon_irq0_intc 6>,
+                                              <&aon_pm_l2_intc 5>;
+                        wakeup-source;
+                        brcm,gpio-bank-widths = <27 32 2>;
+                };
+
                 enet0: ethernet@430000 {
                         phy-mode = "internal";
                         phy-handle = <&phy1>;
@@ -313,6 +372,26 @@
                         status = "disabled";
                 };
 
+                hif_l2_intc: interrupt-controller@411000 {
+                        compatible = "brcm,l2-intc";
+                        reg = <0x411000 0x30>;
+                        interrupt-controller;
+                        #interrupt-cells = <1>;
+                        interrupt-parent = <&periph_intc>;
+                        interrupts = <30>;
+                };
+
+                nand: nand@412800 {
+                        compatible = "brcm,brcmnand-v5.0", "brcm,brcmnand";
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        reg-names = "nand";
+                        reg = <0x412800 0x400>;
+                        interrupt-parent = <&hif_l2_intc>;
+                        interrupts = <24>;
+                        status = "disabled";
+                };
+
                 sata: sata@181000 {
                         compatible = "brcm,bcm7425-ahci", "brcm,sata3-ahci";
                         reg-names = "ahci", "top-ctrl";
@@ -352,5 +431,13 @@
                                 #phy-cells = <0>;
                         };
                 };
+
+                sdhci0: sdhci@413500 {
+                        compatible = "brcm,bcm7425-sdhci";
+                        reg = <0x413500 0x100>;
+                        interrupt-parent = <&periph_intc>;
+                        interrupts = <85>;
+                        status = "disabled";
+                };
         };
 };
diff --git a/arch/mips/boot/dts/brcm/bcm7358.dtsi b/arch/mips/boot/dts/brcm/bcm7358.dtsi
index ca57fb5eb122..3e42535c8d29 100644
--- a/arch/mips/boot/dts/brcm/bcm7358.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7358.dtsi
@@ -20,7 +20,7 @@
                 uart0 = &uart0;
         };
 
-        cpu_intc: cpu_intc {
+        cpu_intc: interrupt-controller {
                 #address-cells = <0>;
                 compatible = "mti,cpu-interrupt-controller";
 
@@ -34,6 +34,12 @@
                         #clock-cells = <0>;
                         clock-frequency = <81000000>;
                 };
+
+                upg_clk: upg_clk {
+                        compatible = "fixed-clock";
+                        #clock-cells = <0>;
+                        clock-frequency = <27000000>;
+                };
         };
 
         rdb {
@@ -43,7 +49,7 @@
                 compatible = "simple-bus";
                 ranges = <0 0x10000000 0x01000000>;
 
-                periph_intc: periph_intc@411400 {
+                periph_intc: interrupt-controller@411400 {
                         compatible = "brcm,bcm7038-l1-intc";
                         reg = <0x411400 0x30>;
 
@@ -54,7 +60,7 @@
                         interrupts = <2>;
                 };
 
-                sun_l2_intc: sun_l2_intc@403000 {
+                sun_l2_intc: interrupt-controller@403000 {
                         compatible = "brcm,l2-intc";
                         reg = <0x403000 0x30>;
                         interrupt-controller;
@@ -75,7 +81,7 @@
                                                      "avd_0", "jtag_0";
                 };
 
-                upg_irq0_intc: upg_irq0_intc@406600 {
+                upg_irq0_intc: interrupt-controller@406600 {
                         compatible = "brcm,bcm7120-l2-intc";
                         reg = <0x406600 0x8>;
 
@@ -90,7 +96,7 @@
                         interrupt-names = "upg_main", "upg_bsc";
                 };
 
-                upg_aon_irq0_intc: upg_aon_irq0_intc@408b80 {
+                upg_aon_irq0_intc: interrupt-controller@408b80 {
                         compatible = "brcm,bcm7120-l2-intc";
                         reg = <0x408b80 0x8>;
 
@@ -194,6 +200,59 @@
                       status = "disabled";
                 };
 
+                pwma: pwm@406400 {
+                        compatible = "brcm,bcm7038-pwm";
+                        reg = <0x406400 0x28>;
+                        #pwm-cells = <2>;
+                        clocks = <&upg_clk>;
+                        status = "disabled";
+                };
+
+                pwmb: pwm@406700 {
+                        compatible = "brcm,bcm7038-pwm";
+                        reg = <0x406700 0x28>;
+                        #pwm-cells = <2>;
+                        clocks = <&upg_clk>;
+                        status = "disabled";
+                };
+
+                aon_pm_l2_intc: interrupt-controller@408240 {
+                        compatible = "brcm,l2-intc";
+                        reg = <0x408240 0x30>;
+                        interrupt-controller;
+                        #interrupt-cells = <1>;
+                        interrupt-parent = <&periph_intc>;
+                        interrupts = <50>;
+                        brcm,irq-can-wake;
+                };
+
+                upg_gio: gpio@406500 {
+                        compatible = "brcm,brcmstb-gpio";
+                        reg = <0x406500 0xa0>;
+                        #gpio-cells = <2>;
+                        #interrupt-cells = <2>;
+                        gpio-controller;
+                        interrupt-controller;
+                        interrupt-parent = <&upg_irq0_intc>;
+                        interrupts = <6>;
+                        brcm,gpio-bank-widths = <32 32 32 29 4>;
+                };
+
+                upg_gio_aon: gpio@408c00 {
+                        compatible = "brcm,brcmstb-gpio";
+                        reg = <0x408c00 0x60>;
+                        #gpio-cells = <2>;
+                        #interrupt-cells = <2>;
+                        gpio-controller;
+                        interrupt-controller;
+                        interrupt-parent = <&upg_aon_irq0_intc>;
+                        interrupts = <6>;
+                        interrupts-extended = <&upg_aon_irq0_intc 6>,
+                                              <&aon_pm_l2_intc 5>;
+                        wakeup-source;
+                        brcm,gpio-bank-widths = <21 32 2>;
+                };
+
                 enet0: ethernet@430000 {
                         phy-mode = "internal";
                         phy-handle = <&phy1>;
@@ -239,5 +298,25 @@
                         interrupts = <66>;
                         status = "disabled";
                 };
+
+                hif_l2_intc: interrupt-controller@411000 {
+                        compatible = "brcm,l2-intc";
+                        reg = <0x411000 0x30>;
+                        interrupt-controller;
+                        #interrupt-cells = <1>;
+                        interrupt-parent = <&periph_intc>;
+                        interrupts = <30>;
+                };
+
+                nand: nand@412800 {
+                        compatible = "brcm,brcmnand-v5.0", "brcm,brcmnand";
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        reg-names = "nand";
+                        reg = <0x412800 0x400>;
+                        interrupt-parent = <&hif_l2_intc>;
+                        interrupts = <24>;
+                        status = "disabled";
+                };
         };
 };
diff --git a/arch/mips/boot/dts/brcm/bcm7360.dtsi b/arch/mips/boot/dts/brcm/bcm7360.dtsi
index 1c0c3d438c7a..112a5571c596 100644
--- a/arch/mips/boot/dts/brcm/bcm7360.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7360.dtsi
@@ -20,7 +20,7 @@
                 uart0 = &uart0;
         };
 
-        cpu_intc: cpu_intc {
+        cpu_intc: interrupt-controller {
                 #address-cells = <0>;
                 compatible = "mti,cpu-interrupt-controller";
 
@@ -34,6 +34,12 @@
                         #clock-cells = <0>;
                         clock-frequency = <81000000>;
                 };
+
+                upg_clk: upg_clk {
+                        compatible = "fixed-clock";
+                        #clock-cells = <0>;
+                        clock-frequency = <27000000>;
+                };
         };
 
         rdb {
@@ -43,7 +49,7 @@
                 compatible = "simple-bus";
                 ranges = <0 0x10000000 0x01000000>;
 
-                periph_intc: periph_intc@411400 {
+                periph_intc: interrupt-controller@411400 {
                         compatible = "brcm,bcm7038-l1-intc";
                         reg = <0x411400 0x30>;
 
@@ -54,7 +60,7 @@
                         interrupts = <2>;
                 };
 
-                sun_l2_intc: sun_l2_intc@403000 {
+                sun_l2_intc: interrupt-controller@403000 {
                         compatible = "brcm,l2-intc";
                         reg = <0x403000 0x30>;
                         interrupt-controller;
@@ -75,7 +81,7 @@
                                                      "avd_0", "jtag_0";
                 };
 
-                upg_irq0_intc: upg_irq0_intc@406600 {
+                upg_irq0_intc: interrupt-controller@406600 {
                         compatible = "brcm,bcm7120-l2-intc";
                         reg = <0x406600 0x8>;
 
@@ -90,7 +96,7 @@
                         interrupt-names = "upg_main", "upg_bsc";
                 };
 
-                upg_aon_irq0_intc: upg_aon_irq0_intc@408b80 {
+                upg_aon_irq0_intc: interrupt-controller@408b80 {
                         compatible = "brcm,bcm7120-l2-intc";
                         reg = <0x408b80 0x8>;
 
@@ -194,6 +200,51 @@
                       status = "disabled";
                 };
 
+                pwma: pwm@406400 {
+                        compatible = "brcm,bcm7038-pwm";
+                        reg = <0x406400 0x28>;
+                        #pwm-cells = <2>;
+                        clocks = <&upg_clk>;
+                        status = "disabled";
+                };
+
+                aon_pm_l2_intc: interrupt-controller@408440 {
+                        compatible = "brcm,l2-intc";
+                        reg = <0x408440 0x30>;
+                        interrupt-controller;
+                        #interrupt-cells = <1>;
+                        interrupt-parent = <&periph_intc>;
+                        interrupts = <50>;
+                        brcm,irq-can-wake;
+                };
+
+                upg_gio: gpio@406500 {
+                        compatible = "brcm,brcmstb-gpio";
+                        reg = <0x406500 0xa0>;
+                        #gpio-cells = <2>;
+                        #interrupt-cells = <2>;
+                        gpio-controller;
+                        interrupt-controller;
+                        interrupt-parent = <&upg_irq0_intc>;
+                        interrupts = <6>;
+                        brcm,gpio-bank-widths = <32 32 32 29 4>;
+                };
+
+                upg_gio_aon: gpio@408c00 {
+                        compatible = "brcm,brcmstb-gpio";
+                        reg = <0x408c00 0x60>;
+                        #gpio-cells = <2>;
+                        #interrupt-cells = <2>;
+                        gpio-controller;
+                        interrupt-controller;
+                        interrupt-parent = <&upg_aon_irq0_intc>;
+                        interrupts = <6>;
+                        interrupts-extended = <&upg_aon_irq0_intc 6>,
+                                              <&aon_pm_l2_intc 5>;
+                        wakeup-source;
+                        brcm,gpio-bank-widths = <21 32 2>;
+                };
+
                 enet0: ethernet@430000 {
                         phy-mode = "internal";
                         phy-handle = <&phy1>;
@@ -240,6 +291,26 @@
                         status = "disabled";
                 };
 
+                hif_l2_intc: interrupt-controller@411000 {
+                        compatible = "brcm,l2-intc";
+                        reg = <0x411000 0x30>;
+                        interrupt-controller;
+                        #interrupt-cells = <1>;
+                        interrupt-parent = <&periph_intc>;
+                        interrupts = <30>;
+                };
+
+                nand: nand@412800 {
+                        compatible = "brcm,brcmnand-v5.0", "brcm,brcmnand";
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        reg-names = "nand";
+                        reg = <0x412800 0x400>;
+                        interrupt-parent = <&hif_l2_intc>;
+                        interrupts = <24>;
+                        status = "disabled";
+                };
+
                 sata: sata@181000 {
                         compatible = "brcm,bcm7425-ahci", "brcm,sata3-ahci";
                         reg-names = "ahci", "top-ctrl";
@@ -279,5 +350,13 @@
                                 #phy-cells = <0>;
                         };
                 };
+
+                sdhci0: sdhci@410000 {
+                        compatible = "brcm,bcm7425-sdhci";
+                        reg = <0x410000 0x100>;
+                        interrupt-parent = <&periph_intc>;
+                        interrupts = <82>;
+                        status = "disabled";
+                };
         };
 };
diff --git a/arch/mips/boot/dts/brcm/bcm7362.dtsi b/arch/mips/boot/dts/brcm/bcm7362.dtsi
index 6b4713add4b8..34abfb0b07e7 100644
--- a/arch/mips/boot/dts/brcm/bcm7362.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7362.dtsi
@@ -26,7 +26,7 @@
                 uart0 = &uart0;
         };
 
-        cpu_intc: cpu_intc {
+        cpu_intc: interrupt-controller {
                 #address-cells = <0>;
                 compatible = "mti,cpu-interrupt-controller";
 
@@ -40,6 +40,12 @@
                         #clock-cells = <0>;
                         clock-frequency = <81000000>;
                 };
+
+                upg_clk: upg_clk {
+                        compatible = "fixed-clock";
+                        #clock-cells = <0>;
+                        clock-frequency = <27000000>;
+                };
         };
 
         rdb {
@@ -49,7 +55,7 @@
                 compatible = "simple-bus";
                 ranges = <0 0x10000000 0x01000000>;
 
-                periph_intc: periph_intc@411400 {
+                periph_intc: interrupt-controller@411400 {
                         compatible = "brcm,bcm7038-l1-intc";
                         reg = <0x411400 0x30>, <0x411600 0x30>;
 
@@ -60,7 +66,7 @@
                         interrupts = <2>, <3>;
                 };
 
-                sun_l2_intc: sun_l2_intc@403000 {
+                sun_l2_intc: interrupt-controller@403000 {
                         compatible = "brcm,l2-intc";
                         reg = <0x403000 0x30>;
                         interrupt-controller;
@@ -81,7 +87,7 @@
                                                      "avd_0", "jtag_0";
                 };
 
-                upg_irq0_intc: upg_irq0_intc@406600 {
+                upg_irq0_intc: interrupt-controller@406600 {
                         compatible = "brcm,bcm7120-l2-intc";
                         reg = <0x406600 0x8>;
 
@@ -96,7 +102,7 @@
                         interrupt-names = "upg_main", "upg_bsc";
                 };
 
-                upg_aon_irq0_intc: upg_aon_irq0_intc@408b80 {
+                upg_aon_irq0_intc: interrupt-controller@408b80 {
                         compatible = "brcm,bcm7120-l2-intc";
                         reg = <0x408b80 0x8>;
 
@@ -190,6 +196,51 @@
                       status = "disabled";
                 };
 
+                pwma: pwm@406400 {
+                        compatible = "brcm,bcm7038-pwm";
+                        reg = <0x406400 0x28>;
+                        #pwm-cells = <2>;
+                        clocks = <&upg_clk>;
+                        status = "disabled";
+                };
+
+                aon_pm_l2_intc: interrupt-controller@408440 {
+                        compatible = "brcm,l2-intc";
+                        reg = <0x408440 0x30>;
+                        interrupt-controller;
+                        #interrupt-cells = <1>;
+                        interrupt-parent = <&periph_intc>;
+                        interrupts = <50>;
+                        brcm,irq-can-wake;
+                };
+
+                upg_gio: gpio@406500 {
+                        compatible = "brcm,brcmstb-gpio";
+                        reg = <0x406500 0xa0>;
+                        #gpio-cells = <2>;
+                        #interrupt-cells = <2>;
+                        gpio-controller;
+                        interrupt-controller;
+                        interrupt-parent = <&upg_irq0_intc>;
+                        interrupts = <6>;
+                        brcm,gpio-bank-widths = <32 32 32 29 4>;
+                };
+
+                upg_gio_aon: gpio@408c00 {
+                        compatible = "brcm,brcmstb-gpio";
+                        reg = <0x408c00 0x60>;
+                        #gpio-cells = <2>;
+                        #interrupt-cells = <2>;
+                        gpio-controller;
+                        interrupt-controller;
+                        interrupt-parent = <&upg_aon_irq0_intc>;
+                        interrupts = <6>;
+                        interrupts-extended = <&upg_aon_irq0_intc 6>,
+                                              <&aon_pm_l2_intc 5>;
+                        wakeup-source;
+                        brcm,gpio-bank-widths = <21 32 2>;
+                };
+
                 enet0: ethernet@430000 {
                         phy-mode = "internal";
                         phy-handle = <&phy1>;
@@ -236,6 +287,26 @@
                         status = "disabled";
                 };
 
+                hif_l2_intc: interrupt-controller@411000 {
+                        compatible = "brcm,l2-intc";
+                        reg = <0x411000 0x30>;
+                        interrupt-controller;
+                        #interrupt-cells = <1>;
+                        interrupt-parent = <&periph_intc>;
+                        interrupts = <30>;
+                };
+
+                nand: nand@412800 {
+                        compatible = "brcm,brcmnand-v5.0", "brcm,brcmnand";
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        reg-names = "nand";
+                        reg = <0x412800 0x400>;
+                        interrupt-parent = <&hif_l2_intc>;
+                        interrupts = <24>;
+                        status = "disabled";
+                };
+
                 sata: sata@181000 {
                         compatible = "brcm,bcm7425-ahci", "brcm,sata3-ahci";
                         reg-names = "ahci", "top-ctrl";
@@ -275,5 +346,13 @@
                                 #phy-cells = <0>;
                         };
                 };
+
+                sdhci0: sdhci@410000 {
+                        compatible = "brcm,bcm7425-sdhci";
+                        reg = <0x410000 0x100>;
+                        interrupt-parent = <&periph_intc>;
+                        interrupts = <82>;
+                        status = "disabled";
+                };
         };
 };
diff --git a/arch/mips/boot/dts/brcm/bcm7420.dtsi b/arch/mips/boot/dts/brcm/bcm7420.dtsi
index 0586bf662571..b143723c674e 100644
--- a/arch/mips/boot/dts/brcm/bcm7420.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7420.dtsi
@@ -26,7 +26,7 @@
                 uart0 = &uart0;
         };
 
-        cpu_intc: cpu_intc {
+        cpu_intc: interrupt-controller {
                 #address-cells = <0>;
                 compatible = "mti,cpu-interrupt-controller";
 
@@ -40,6 +40,12 @@
                         #clock-cells = <0>;
                         clock-frequency = <81000000>;
                 };
+
+                upg_clk: upg_clk {
+                        compatible = "fixed-clock";
+                        #clock-cells = <0>;
+                        clock-frequency = <27000000>;
+                };
         };
 
         rdb {
@@ -49,7 +55,7 @@
                 compatible = "simple-bus";
                 ranges = <0 0x10000000 0x01000000>;
 
-                periph_intc: periph_intc@441400 {
+                periph_intc: interrupt-controller@441400 {
                         compatible = "brcm,bcm7038-l1-intc";
                         reg = <0x441400 0x30>, <0x441600 0x30>;
 
@@ -60,7 +66,7 @@
                         interrupts = <2>, <3>;
                 };
 
-                sun_l2_intc: sun_l2_intc@401800 {
+                sun_l2_intc: interrupt-controller@401800 {
                         compatible = "brcm,l2-intc";
                         reg = <0x401800 0x30>;
                         interrupt-controller;
@@ -82,7 +88,7 @@
                                                      "jtag_0";
                 };
 
-                upg_irq0_intc: upg_irq0_intc@406780 {
+                upg_irq0_intc: interrupt-controller@406780 {
                         compatible = "brcm,bcm7120-l2-intc";
                         reg = <0x406780 0x8>;
 
@@ -191,6 +197,34 @@
                       status = "disabled";
                 };
 
+                pwma: pwm@406580 {
+                        compatible = "brcm,bcm7038-pwm";
+                        reg = <0x406580 0x28>;
+                        #pwm-cells = <2>;
+                        clocks = <&upg_clk>;
+                        status = "disabled";
+                };
+
+                pwmb: pwm@406880 {
+                        compatible = "brcm,bcm7038-pwm";
+                        reg = <0x406880 0x28>;
+                        #pwm-cells = <2>;
+                        clocks = <&upg_clk>;
+                        status = "disabled";
+                };
+
+                upg_gio: gpio@406700 {
+                        compatible = "brcm,brcmstb-gpio";
+                        reg = <0x406700 0x80>;
+                        #gpio-cells = <2>;
+                        #interrupt-cells = <2>;
+                        gpio-controller;
+                        interrupt-controller;
+                        interrupt-parent = <&upg_irq0_intc>;
+                        interrupts = <6>;
+                        brcm,gpio-bank-widths = <32 32 32 27>;
+                };
+
                 enet0: ethernet@468000 {
                         phy-mode = "internal";
                         phy-handle = <&phy1>;
diff --git a/arch/mips/boot/dts/brcm/bcm7425.dtsi b/arch/mips/boot/dts/brcm/bcm7425.dtsi
index c1c15edaf829..2488d2f61f60 100644
--- a/arch/mips/boot/dts/brcm/bcm7425.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7425.dtsi
@@ -26,7 +26,7 @@
                 uart0 = &uart0;
         };
 
-        cpu_intc: cpu_intc {
+        cpu_intc: interrupt-controller {
                 #address-cells = <0>;
                 compatible = "mti,cpu-interrupt-controller";
 
@@ -40,6 +40,12 @@
                         #clock-cells = <0>;
                         clock-frequency = <81000000>;
                 };
+
+                upg_clk: upg_clk {
+                        compatible = "fixed-clock";
+                        #clock-cells = <0>;
+                        clock-frequency = <27000000>;
+                };
         };
 
         rdb {
@@ -49,7 +55,7 @@
                 compatible = "simple-bus";
                 ranges = <0 0x10000000 0x01000000>;
 
-                periph_intc: periph_intc@41a400 {
+                periph_intc: interrupt-controller@41a400 {
                         compatible = "brcm,bcm7038-l1-intc";
                         reg = <0x41a400 0x30>, <0x41a600 0x30>;
 
@@ -60,7 +66,7 @@
                         interrupts = <2>, <3>;
                 };
 
-                sun_l2_intc: sun_l2_intc@403000 {
+                sun_l2_intc: interrupt-controller@403000 {
                         compatible = "brcm,l2-intc";
                         reg = <0x403000 0x30>;
                         interrupt-controller;
@@ -83,7 +89,7 @@
                                                      "vice_0";
                 };
 
-                upg_irq0_intc: upg_irq0_intc@406780 {
+                upg_irq0_intc: interrupt-controller@406780 {
                         compatible = "brcm,bcm7120-l2-intc";
                         reg = <0x406780 0x8>;
 
@@ -98,7 +104,7 @@
                         interrupt-names = "upg_main", "upg_bsc";
                 };
 
-                upg_aon_irq0_intc: upg_aon_irq0_intc@409480 {
+                upg_aon_irq0_intc: interrupt-controller@409480 {
                         compatible = "brcm,bcm7120-l2-intc";
                         reg = <0x409480 0x8>;
 
@@ -209,6 +215,59 @@
                       status = "disabled";
                 };
 
+                pwma: pwm@406580 {
+                        compatible = "brcm,bcm7038-pwm";
+                        reg = <0x406580 0x28>;
+                        #pwm-cells = <2>;
+                        clocks = <&upg_clk>;
+                        status = "disabled";
+                };
+
+                pwmb: pwm@406800 {
+                        compatible = "brcm,bcm7038-pwm";
+                        reg = <0x406800 0x28>;
+                        #pwm-cells = <2>;
+                        clocks = <&upg_clk>;
+                        status = "disabled";
+                };
+
+                aon_pm_l2_intc: interrupt-controller@408440 {
+                        compatible = "brcm,l2-intc";
+                        reg = <0x408440 0x30>;
+                        interrupt-controller;
+                        #interrupt-cells = <1>;
+                        interrupt-parent = <&periph_intc>;
+                        interrupts = <49>;
+                        brcm,irq-can-wake;
+                };
+
+                upg_gio: gpio@406700 {
+                        compatible = "brcm,brcmstb-gpio";
+                        reg = <0x406700 0x80>;
+                        #gpio-cells = <2>;
+                        #interrupt-cells = <2>;
+                        gpio-controller;
+                        interrupt-controller;
+                        interrupt-parent = <&upg_irq0_intc>;
+                        interrupts = <6>;
+                        brcm,gpio-bank-widths = <32 32 32 21>;
+                };
+
+                upg_gio_aon: gpio@4094c0 {
+                        compatible = "brcm,brcmstb-gpio";
+                        reg = <0x4094c0 0x40>;
+                        #gpio-cells = <2>;
+                        #interrupt-cells = <2>;
+                        gpio-controller;
+                        interrupt-controller;
+                        interrupt-parent = <&upg_aon_irq0_intc>;
+                        interrupts = <6>;
+                        interrupts-extended = <&upg_aon_irq0_intc 6>,
+                                              <&aon_pm_l2_intc 5>;
+                        wakeup-source;
+                        brcm,gpio-bank-widths = <18 4>;
+                };
+
                 enet0: ethernet@b80000 {
                         phy-mode = "internal";
                         phy-handle = <&phy1>;
@@ -312,6 +371,26 @@
                         status = "disabled";
                 };
 
+                hif_l2_intc: interrupt-controller@41a000 {
+                        compatible = "brcm,l2-intc";
+                        reg = <0x41a000 0x30>;
+                        interrupt-controller;
+                        #interrupt-cells = <1>;
+                        interrupt-parent = <&periph_intc>;
+                        interrupts = <24>;
+                };
+
+                nand: nand@41b800 {
+                        compatible = "brcm,brcmnand-v5.0", "brcm,brcmnand";
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        reg-names = "nand";
+                        reg = <0x41b800 0x400>;
+                        interrupt-parent = <&hif_l2_intc>;
+                        interrupts = <24>;
+                        status = "disabled";
+                };
+
                 sata: sata@181000 {
                         compatible = "brcm,bcm7425-ahci", "brcm,sata3-ahci";
                         reg-names = "ahci", "top-ctrl";
@@ -351,5 +430,25 @@
                                 #phy-cells = <0>;
                         };
                 };
+
+                sdhci0: sdhci@419000 {
+                        compatible = "brcm,bcm7425-sdhci";
+                        reg = <0x419000 0x100>;
+                        interrupt-parent = <&periph_intc>;
+                        interrupts = <43>;
+                        sd-uhs-sdr50;
+                        mmc-hs200-1_8v;
+                        status = "disabled";
+                };
+
+                sdhci1: sdhci@419200 {
+                        compatible = "brcm,bcm7425-sdhci";
+                        reg = <0x419200 0x100>;
+                        interrupt-parent = <&periph_intc>;
+                        interrupts = <44>;
+                        sd-uhs-sdr50;
+                        mmc-hs200-1_8v;
+                        status = "disabled";
+                };
         };
 };
diff --git a/arch/mips/boot/dts/brcm/bcm7435.dtsi b/arch/mips/boot/dts/brcm/bcm7435.dtsi
index a874d3a0e2ee..19fa259b968b 100644
--- a/arch/mips/boot/dts/brcm/bcm7435.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7435.dtsi
@@ -38,7 +38,7 @@
                 uart0 = &uart0;
         };
 
-        cpu_intc: cpu_intc {
+        cpu_intc: interrupt-controller {
                 #address-cells = <0>;
                 compatible = "mti,cpu-interrupt-controller";
 
@@ -52,6 +52,12 @@
                         #clock-cells = <0>;
                         clock-frequency = <81000000>;
                 };
+
+                upg_clk: upg_clk {
+                        compatible = "fixed-clock";
+                        #clock-cells = <0>;
+                        clock-frequency = <27000000>;
+                };
         };
 
         rdb {
@@ -61,7 +67,7 @@
                 compatible = "simple-bus";
                 ranges = <0 0x10000000 0x01000000>;
 
-                periph_intc: periph_intc@41b500 {
+                periph_intc: interrupt-controller@41b500 {
                         compatible = "brcm,bcm7038-l1-intc";
                         reg = <0x41b500 0x40>, <0x41b600 0x40>,
                                 <0x41b700 0x40>, <0x41b800 0x40>;
@@ -73,7 +79,7 @@
                         interrupts = <2>, <3>, <2>, <3>;
                 };
 
-                sun_l2_intc: sun_l2_intc@403000 {
+                sun_l2_intc: interrupt-controller@403000 {
                         compatible = "brcm,l2-intc";
                         reg = <0x403000 0x30>;
                         interrupt-controller;
@@ -98,7 +104,7 @@
                                                      "scpu";
                 };
 
-                upg_irq0_intc: upg_irq0_intc@406780 {
+                upg_irq0_intc: interrupt-controller@406780 {
                         compatible = "brcm,bcm7120-l2-intc";
                         reg = <0x406780 0x8>;
 
@@ -113,7 +119,7 @@
                         interrupt-names = "upg_main", "upg_bsc";
                 };
 
-                upg_aon_irq0_intc: upg_aon_irq0_intc@409480 {
+                upg_aon_irq0_intc: interrupt-controller@409480 {
                         compatible = "brcm,bcm7120-l2-intc";
                         reg = <0x409480 0x8>;
 
@@ -224,6 +230,59 @@
                       status = "disabled";
                 };
 
+                pwma: pwm@406580 {
+                        compatible = "brcm,bcm7038-pwm";
+                        reg = <0x406580 0x28>;
+                        #pwm-cells = <2>;
+                        clocks = <&upg_clk>;
+                        status = "disabled";
+                };
+
+                pwmb: pwm@406800 {
+                        compatible = "brcm,bcm7038-pwm";
+                        reg = <0x406800 0x28>;
+                        #pwm-cells = <2>;
+                        clocks = <&upg_clk>;
+                        status = "disabled";
+                };
+
+                aon_pm_l2_intc: interrupt-controller@408440 {
+                        compatible = "brcm,l2-intc";
+                        reg = <0x408440 0x30>;
+                        interrupt-controller;
+                        #interrupt-cells = <1>;
+                        interrupt-parent = <&periph_intc>;
+                        interrupts = <54>;
+                        brcm,irq-can-wake;
+                };
+
+                upg_gio: gpio@406700 {
+                        compatible = "brcm,brcmstb-gpio";
+                        reg = <0x406700 0x80>;
+                        #gpio-cells = <2>;
+                        #interrupt-cells = <2>;
+                        gpio-controller;
+                        interrupt-controller;
+                        interrupt-parent = <&upg_irq0_intc>;
+                        interrupts = <6>;
+                        brcm,gpio-bank-widths = <32 32 32 21>;
+                };
+
+                upg_gio_aon: gpio@4094c0 {
+                        compatible = "brcm,brcmstb-gpio";
+                        reg = <0x4094c0 0x40>;
+                        #gpio-cells = <2>;
+                        #interrupt-cells = <2>;
+                        gpio-controller;
+                        interrupt-controller;
+                        interrupt-parent = <&upg_aon_irq0_intc>;
+                        interrupts = <6>;
+                        interrupts-extended = <&upg_aon_irq0_intc 6>,
+                                              <&aon_pm_l2_intc 5>;
+                        wakeup-source;
+                        brcm,gpio-bank-widths = <18 4>;
+                };
+
                 enet0: ethernet@b80000 {
                         phy-mode = "internal";
                         phy-handle = <&phy1>;
@@ -327,6 +386,26 @@
                         status = "disabled";
                 };
 
+                hif_l2_intc: interrupt-controller@41b000 {
+                        compatible = "brcm,l2-intc";
+                        reg = <0x41b000 0x30>;
+                        interrupt-controller;
+                        #interrupt-cells = <1>;
+                        interrupt-parent = <&periph_intc>;
+                        interrupts = <24>;
+                };
+
+                nand: nand@41c800 {
+                        compatible = "brcm,brcmnand-v6.2", "brcm,brcmnand";
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        reg-names = "nand", "flash-dma";
+                        reg = <0x41c800 0x600>, <0x41d000 0x100>;
+                        interrupt-parent = <&hif_l2_intc>;
+                        interrupts = <24>, <4>;
+                        status = "disabled";
+                };
+
                 sata: sata@181000 {
                         compatible = "brcm,bcm7425-ahci", "brcm,sata3-ahci";
                         reg-names = "ahci", "top-ctrl";
@@ -366,5 +445,25 @@
                                 #phy-cells = <0>;
                         };
                 };
+
+                sdhci0: sdhci@41a000 {
+                        compatible = "brcm,bcm7425-sdhci";
+                        reg = <0x41a000 0x100>;
+                        interrupt-parent = <&periph_intc>;
+                        interrupts = <47>;
+                        sd-uhs-sdr50;
+                        mmc-hs200-1_8v;
+                        status = "disabled";
+                };
+
+                sdhci1: sdhci@41a200 {
+                        compatible = "brcm,bcm7425-sdhci";
+                        reg = <0x41a200 0x100>;
+                        interrupt-parent = <&periph_intc>;
+                        interrupts = <48>;
+                        sd-uhs-sdr50;
+                        mmc-hs200-1_8v;
+                        status = "disabled";
+                };
         };
 };
diff --git a/arch/mips/boot/dts/brcm/bcm97125cbmb.dts b/arch/mips/boot/dts/brcm/bcm97125cbmb.dts
index f2449d147c6d..5c24eacd72dd 100644
--- a/arch/mips/boot/dts/brcm/bcm97125cbmb.dts
+++ b/arch/mips/boot/dts/brcm/bcm97125cbmb.dts
@@ -45,6 +45,10 @@
         status = "okay";
 };
 
+&pwma {
+        status = "okay";
+};
+
 /* FIXME: USB is wonky; disable it for now */
 &ehci0 {
         status = "disabled";
diff --git a/arch/mips/boot/dts/brcm/bcm97346dbsmb.dts b/arch/mips/boot/dts/brcm/bcm97346dbsmb.dts
index d3d28816a027..e67eaf30de3d 100644
--- a/arch/mips/boot/dts/brcm/bcm97346dbsmb.dts
+++ b/arch/mips/boot/dts/brcm/bcm97346dbsmb.dts
@@ -1,6 +1,7 @@
 /dts-v1/;
 
 /include/ "bcm7346.dtsi"
+/include/ "bcm97xxx-nand-cs1-bch24.dtsi"
 
 / {
         compatible = "brcm,bcm97346dbsmb", "brcm,bcm7346";
@@ -49,6 +50,14 @@
         status = "okay";
 };
 
+&pwma {
+        status = "okay";
+};
+
+&pwmb {
+        status = "okay";
+};
+
 &enet0 {
         status = "okay";
 };
@@ -85,6 +94,10 @@
         status = "okay";
 };
 
+&nand {
+        status = "okay";
+};
+
 &sata {
         status = "okay";
 };
@@ -92,3 +105,7 @@
 &sata_phy {
         status = "okay";
 };
+
+&sdhci0 {
+        status = "okay";
+};
diff --git a/arch/mips/boot/dts/brcm/bcm97358svmb.dts b/arch/mips/boot/dts/brcm/bcm97358svmb.dts
index 02ce6b429dc4..ee4607fae47a 100644
--- a/arch/mips/boot/dts/brcm/bcm97358svmb.dts
+++ b/arch/mips/boot/dts/brcm/bcm97358svmb.dts
@@ -1,6 +1,7 @@
 /dts-v1/;
 
 /include/ "bcm7358.dtsi"
+/include/ "bcm97xxx-nand-cs1-bch4.dtsi"
 
 / {
         compatible = "brcm,bcm97358svmb", "brcm,bcm7358";
@@ -45,6 +46,14 @@
         status = "okay";
 };
 
+&pwma {
+        status = "okay";
+};
+
+&pwmb {
+        status = "okay";
+};
+
 &enet0 {
         status = "okay";
 };
@@ -56,3 +65,7 @@
 &ohci0 {
         status = "okay";
 };
+
+&nand {
+        status = "okay";
+};
diff --git a/arch/mips/boot/dts/brcm/bcm97360svmb.dts b/arch/mips/boot/dts/brcm/bcm97360svmb.dts
index 73124be9548a..bed821b03013 100644
--- a/arch/mips/boot/dts/brcm/bcm97360svmb.dts
+++ b/arch/mips/boot/dts/brcm/bcm97360svmb.dts
@@ -45,6 +45,10 @@
         status = "okay";
 };
 
+&pwma {
+        status = "okay";
+};
+
 &enet0 {
         status = "okay";
 };
@@ -64,3 +68,7 @@
 &sata_phy {
         status = "okay";
 };
+
+&sdhci0 {
+        status = "okay";
+};
diff --git a/arch/mips/boot/dts/brcm/bcm97362svmb.dts b/arch/mips/boot/dts/brcm/bcm97362svmb.dts
index 3cfcaebe7f79..68fd823868e0 100644
--- a/arch/mips/boot/dts/brcm/bcm97362svmb.dts
+++ b/arch/mips/boot/dts/brcm/bcm97362svmb.dts
@@ -1,6 +1,7 @@
 /dts-v1/;
 
 /include/ "bcm7362.dtsi"
+/include/ "bcm97xxx-nand-cs1-bch4.dtsi"
 
 / {
         compatible = "brcm,bcm97362svmb", "brcm,bcm7362";
@@ -41,6 +42,10 @@
         status = "okay";
 };
 
+&pwma {
+        status = "okay";
+};
+
 &enet0 {
         status = "okay";
 };
@@ -53,6 +58,10 @@
         status = "okay";
 };
 
+&nand {
+        status = "okay";
+};
+
 &sata {
         status = "okay";
 };
@@ -60,3 +69,7 @@
 &sata_phy {
         status = "okay";
 };
+
+&sdhci0 {
+        status = "okay";
+};
diff --git a/arch/mips/boot/dts/brcm/bcm97420c.dts b/arch/mips/boot/dts/brcm/bcm97420c.dts
index 600d57abee05..e66271af055e 100644
--- a/arch/mips/boot/dts/brcm/bcm97420c.dts
+++ b/arch/mips/boot/dts/brcm/bcm97420c.dts
@@ -51,6 +51,14 @@
         status = "okay";
 };
 
+&pwma {
+        status = "okay";
+};
+
+&pwmb {
+        status = "okay";
+};
+
 /* FIXME: MAC driver comes up but cannot attach to PHY */
 &enet0 {
         status = "disabled";
diff --git a/arch/mips/boot/dts/brcm/bcm97425svmb.dts b/arch/mips/boot/dts/brcm/bcm97425svmb.dts
index 119c714805cb..f95ba1bf3e58 100644
--- a/arch/mips/boot/dts/brcm/bcm97425svmb.dts
+++ b/arch/mips/boot/dts/brcm/bcm97425svmb.dts
@@ -1,6 +1,7 @@
 /dts-v1/;
 
 /include/ "bcm7425.dtsi"
+/include/ "bcm97xxx-nand-cs1-bch24.dtsi"
 
 / {
         compatible = "brcm,bcm97425svmb", "brcm,bcm7425";
@@ -51,6 +52,14 @@
         status = "okay";
 };
 
+&pwma {
+        status = "okay";
+};
+
+&pwmb {
+        status = "okay";
+};
+
 &enet0 {
         status = "okay";
 };
@@ -86,3 +95,15 @@
 &ohci3 {
         status = "okay";
 };
+
+&nand {
+        status = "okay";
+};
+
+&sdhci0 {
+        status = "okay";
+};
+
+&sdhci1 {
+        status = "okay";
+};
diff --git a/arch/mips/boot/dts/brcm/bcm97435svmb.dts b/arch/mips/boot/dts/brcm/bcm97435svmb.dts
index 43e3ba27f07b..fb37b7111bf4 100644
--- a/arch/mips/boot/dts/brcm/bcm97435svmb.dts
+++ b/arch/mips/boot/dts/brcm/bcm97435svmb.dts
@@ -1,6 +1,7 @@
 /dts-v1/;
 
 /include/ "bcm7435.dtsi"
+/include/ "bcm97xxx-nand-cs1-bch24.dtsi"
 
 / {
         compatible = "brcm,bcm97435svmb", "brcm,bcm7435";
@@ -51,6 +52,14 @@
         status = "okay";
 };
 
+&pwma {
+        status = "okay";
+};
+
+&pwmb {
+        status = "okay";
+};
+
 &enet0 {
         status = "okay";
 };
@@ -87,6 +96,10 @@
         status = "okay";
 };
 
+&nand {
+        status = "okay";
+};
+
 &sata {
         status = "okay";
 };
@@ -94,3 +107,11 @@
 &sata_phy {
         status = "okay";
 };
+
+&sdhci0 {
+        status = "okay";
+};
+
+&sdhci1 {
+        status = "okay";
+};
diff --git a/arch/mips/boot/dts/brcm/bcm97xxx-nand-cs1-bch24.dtsi b/arch/mips/boot/dts/brcm/bcm97xxx-nand-cs1-bch24.dtsi
new file mode 100644
index 000000000000..3c24f97de922
--- /dev/null
+++ b/arch/mips/boot/dts/brcm/bcm97xxx-nand-cs1-bch24.dtsi
@@ -0,0 +1,25 @@
+&nand {
+        nandcs@1 {
+                compatible = "brcm,nandcs";
+                reg = <1>;
+                nand-on-flash-bbt;
+
+                nand-ecc-strength = <24>;
+                nand-ecc-step-size = <1024>;
+                brcm,nand-oob-sector-size = <27>;
+
+                partitions {
+                        compatible = "fixed-partitions";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+
+                        flash1.rootfs@0 {
+                                reg = <0x0 0x10000000>;
+                        };
+
+                        flash1.kernel@10000000 {
+                                reg = <0x10000000 0x400000>;
+                        };
+                };
+        };
+};
diff --git a/arch/mips/boot/dts/brcm/bcm97xxx-nand-cs1-bch4.dtsi b/arch/mips/boot/dts/brcm/bcm97xxx-nand-cs1-bch4.dtsi
new file mode 100644
index 000000000000..cb531816ef4c
--- /dev/null
+++ b/arch/mips/boot/dts/brcm/bcm97xxx-nand-cs1-bch4.dtsi
@@ -0,0 +1,25 @@
+&nand {
+        nandcs@1 {
+                compatible = "brcm,nandcs";
+                reg = <1>;
+                nand-on-flash-bbt;
+
+                nand-ecc-strength = <4>;
+                nand-ecc-step-size = <512>;
+                brcm,nand-oob-sector-size = <16>;
+
+                partitions {
+                        compatible = "fixed-partitions";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+
+                        flash1.rootfs@0 {
+                                reg = <0x0 0x10000000>;
+                        };
+
+                        flash1.kernel@10000000 {
+                                reg = <0x10000000 0x400000>;
+                        };
+                };
+        };
+};