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Diffstat (limited to 'arch/mips/boot/dts/brcm/bcm7420.dtsi')
-rw-r--r--arch/mips/boot/dts/brcm/bcm7420.dtsi42
1 files changed, 38 insertions, 4 deletions
diff --git a/arch/mips/boot/dts/brcm/bcm7420.dtsi b/arch/mips/boot/dts/brcm/bcm7420.dtsi
index 0586bf662571..b143723c674e 100644
--- a/arch/mips/boot/dts/brcm/bcm7420.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7420.dtsi
@@ -26,7 +26,7 @@
26 uart0 = &uart0; 26 uart0 = &uart0;
27 }; 27 };
28 28
29 cpu_intc: cpu_intc { 29 cpu_intc: interrupt-controller {
30 #address-cells = <0>; 30 #address-cells = <0>;
31 compatible = "mti,cpu-interrupt-controller"; 31 compatible = "mti,cpu-interrupt-controller";
32 32
@@ -40,6 +40,12 @@
40 #clock-cells = <0>; 40 #clock-cells = <0>;
41 clock-frequency = <81000000>; 41 clock-frequency = <81000000>;
42 }; 42 };
43
44 upg_clk: upg_clk {
45 compatible = "fixed-clock";
46 #clock-cells = <0>;
47 clock-frequency = <27000000>;
48 };
43 }; 49 };
44 50
45 rdb { 51 rdb {
@@ -49,7 +55,7 @@
49 compatible = "simple-bus"; 55 compatible = "simple-bus";
50 ranges = <0 0x10000000 0x01000000>; 56 ranges = <0 0x10000000 0x01000000>;
51 57
52 periph_intc: periph_intc@441400 { 58 periph_intc: interrupt-controller@441400 {
53 compatible = "brcm,bcm7038-l1-intc"; 59 compatible = "brcm,bcm7038-l1-intc";
54 reg = <0x441400 0x30>, <0x441600 0x30>; 60 reg = <0x441400 0x30>, <0x441600 0x30>;
55 61
@@ -60,7 +66,7 @@
60 interrupts = <2>, <3>; 66 interrupts = <2>, <3>;
61 }; 67 };
62 68
63 sun_l2_intc: sun_l2_intc@401800 { 69 sun_l2_intc: interrupt-controller@401800 {
64 compatible = "brcm,l2-intc"; 70 compatible = "brcm,l2-intc";
65 reg = <0x401800 0x30>; 71 reg = <0x401800 0x30>;
66 interrupt-controller; 72 interrupt-controller;
@@ -82,7 +88,7 @@
82 "jtag_0"; 88 "jtag_0";
83 }; 89 };
84 90
85 upg_irq0_intc: upg_irq0_intc@406780 { 91 upg_irq0_intc: interrupt-controller@406780 {
86 compatible = "brcm,bcm7120-l2-intc"; 92 compatible = "brcm,bcm7120-l2-intc";
87 reg = <0x406780 0x8>; 93 reg = <0x406780 0x8>;
88 94
@@ -191,6 +197,34 @@
191 status = "disabled"; 197 status = "disabled";
192 }; 198 };
193 199
200 pwma: pwm@406580 {
201 compatible = "brcm,bcm7038-pwm";
202 reg = <0x406580 0x28>;
203 #pwm-cells = <2>;
204 clocks = <&upg_clk>;
205 status = "disabled";
206 };
207
208 pwmb: pwm@406880 {
209 compatible = "brcm,bcm7038-pwm";
210 reg = <0x406880 0x28>;
211 #pwm-cells = <2>;
212 clocks = <&upg_clk>;
213 status = "disabled";
214 };
215
216 upg_gio: gpio@406700 {
217 compatible = "brcm,brcmstb-gpio";
218 reg = <0x406700 0x80>;
219 #gpio-cells = <2>;
220 #interrupt-cells = <2>;
221 gpio-controller;
222 interrupt-controller;
223 interrupt-parent = <&upg_irq0_intc>;
224 interrupts = <6>;
225 brcm,gpio-bank-widths = <32 32 32 27>;
226 };
227
194 enet0: ethernet@468000 { 228 enet0: ethernet@468000 {
195 phy-mode = "internal"; 229 phy-mode = "internal";
196 phy-handle = <&phy1>; 230 phy-handle = <&phy1>;