diff options
Diffstat (limited to 'arch/m32r/mm/cache.c')
| -rw-r--r-- | arch/m32r/mm/cache.c | 89 |
1 files changed, 0 insertions, 89 deletions
diff --git a/arch/m32r/mm/cache.c b/arch/m32r/mm/cache.c deleted file mode 100644 index 0d1ae744e56f..000000000000 --- a/arch/m32r/mm/cache.c +++ /dev/null | |||
| @@ -1,89 +0,0 @@ | |||
| 1 | // SPDX-License-Identifier: GPL-2.0 | ||
| 2 | /* | ||
| 3 | * linux/arch/m32r/mm/cache.c | ||
| 4 | * | ||
| 5 | * Copyright (C) 2002-2005 Hirokazu Takata, Hayato Fujiwara | ||
| 6 | */ | ||
| 7 | |||
| 8 | #include <asm/pgtable.h> | ||
| 9 | |||
| 10 | #undef MCCR | ||
| 11 | |||
| 12 | #if defined(CONFIG_CHIP_XNUX2) || defined(CONFIG_CHIP_M32700) \ | ||
| 13 | || defined(CONFIG_CHIP_VDEC2) || defined(CONFIG_CHIP_OPSP) | ||
| 14 | /* Cache Control Register */ | ||
| 15 | #define MCCR ((volatile unsigned long*)0xfffffffc) | ||
| 16 | #define MCCR_CC (1UL << 7) /* Cache mode modify bit */ | ||
| 17 | #define MCCR_IIV (1UL << 6) /* I-cache invalidate */ | ||
| 18 | #define MCCR_DIV (1UL << 5) /* D-cache invalidate */ | ||
| 19 | #define MCCR_DCB (1UL << 4) /* D-cache copy back */ | ||
| 20 | #define MCCR_ICM (1UL << 1) /* I-cache mode [0:off,1:on] */ | ||
| 21 | #define MCCR_DCM (1UL << 0) /* D-cache mode [0:off,1:on] */ | ||
| 22 | #define MCCR_ICACHE_INV (MCCR_CC|MCCR_IIV) | ||
| 23 | #define MCCR_DCACHE_CB (MCCR_CC|MCCR_DCB) | ||
| 24 | #define MCCR_DCACHE_CBINV (MCCR_CC|MCCR_DIV|MCCR_DCB) | ||
| 25 | #define CHECK_MCCR(mccr) (mccr = *MCCR) | ||
| 26 | #elif defined(CONFIG_CHIP_M32102) | ||
| 27 | #define MCCR ((volatile unsigned char*)0xfffffffe) | ||
| 28 | #define MCCR_IIV (1UL << 0) /* I-cache invalidate */ | ||
| 29 | #define MCCR_ICACHE_INV MCCR_IIV | ||
| 30 | #elif defined(CONFIG_CHIP_M32104) | ||
| 31 | #define MCCR ((volatile unsigned short*)0xfffffffe) | ||
| 32 | #define MCCR_IIV (1UL << 8) /* I-cache invalidate */ | ||
| 33 | #define MCCR_DIV (1UL << 9) /* D-cache invalidate */ | ||
| 34 | #define MCCR_DCB (1UL << 10) /* D-cache copy back */ | ||
| 35 | #define MCCR_ICM (1UL << 0) /* I-cache mode [0:off,1:on] */ | ||
| 36 | #define MCCR_DCM (1UL << 1) /* D-cache mode [0:off,1:on] */ | ||
| 37 | #define MCCR_ICACHE_INV MCCR_IIV | ||
| 38 | #define MCCR_DCACHE_CB MCCR_DCB | ||
| 39 | #define MCCR_DCACHE_CBINV (MCCR_DIV|MCCR_DCB) | ||
| 40 | #endif | ||
| 41 | |||
| 42 | #ifndef MCCR | ||
| 43 | #error Unknown cache type. | ||
| 44 | #endif | ||
| 45 | |||
| 46 | |||
| 47 | /* Copy back and invalidate D-cache and invalidate I-cache all */ | ||
| 48 | void _flush_cache_all(void) | ||
| 49 | { | ||
| 50 | #if defined(CONFIG_CHIP_M32102) | ||
| 51 | unsigned char mccr; | ||
| 52 | *MCCR = MCCR_ICACHE_INV; | ||
| 53 | #elif defined(CONFIG_CHIP_M32104) | ||
| 54 | unsigned short mccr; | ||
| 55 | |||
| 56 | /* Copyback and invalidate D-cache */ | ||
| 57 | /* Invalidate I-cache */ | ||
| 58 | *MCCR |= (MCCR_ICACHE_INV | MCCR_DCACHE_CBINV); | ||
| 59 | #else | ||
| 60 | unsigned long mccr; | ||
| 61 | |||
| 62 | /* Copyback and invalidate D-cache */ | ||
| 63 | /* Invalidate I-cache */ | ||
| 64 | *MCCR = MCCR_ICACHE_INV | MCCR_DCACHE_CBINV; | ||
| 65 | #endif | ||
| 66 | while ((mccr = *MCCR) & MCCR_IIV); /* loop while invalidating... */ | ||
| 67 | } | ||
| 68 | |||
| 69 | /* Copy back D-cache and invalidate I-cache all */ | ||
| 70 | void _flush_cache_copyback_all(void) | ||
| 71 | { | ||
| 72 | #if defined(CONFIG_CHIP_M32102) | ||
| 73 | unsigned char mccr; | ||
| 74 | *MCCR = MCCR_ICACHE_INV; | ||
| 75 | #elif defined(CONFIG_CHIP_M32104) | ||
| 76 | unsigned short mccr; | ||
| 77 | |||
| 78 | /* Copyback and invalidate D-cache */ | ||
| 79 | /* Invalidate I-cache */ | ||
| 80 | *MCCR |= (MCCR_ICACHE_INV | MCCR_DCACHE_CB); | ||
| 81 | #else | ||
| 82 | unsigned long mccr; | ||
| 83 | |||
| 84 | /* Copyback D-cache */ | ||
| 85 | /* Invalidate I-cache */ | ||
| 86 | *MCCR = MCCR_ICACHE_INV | MCCR_DCACHE_CB; | ||
| 87 | #endif | ||
| 88 | while ((mccr = *MCCR) & MCCR_IIV); /* loop while invalidating... */ | ||
| 89 | } | ||