diff options
223 files changed, 0 insertions, 27243 deletions
diff --git a/MAINTAINERS b/MAINTAINERS index 3655d284af20..f48790625e3f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS | |||
@@ -8308,11 +8308,6 @@ W: http://linux-test-project.github.io/ | |||
8308 | T: git git://github.com/linux-test-project/ltp.git | 8308 | T: git git://github.com/linux-test-project/ltp.git |
8309 | S: Maintained | 8309 | S: Maintained |
8310 | 8310 | ||
8311 | M32R ARCHITECTURE | ||
8312 | W: http://www.linux-m32r.org/ | ||
8313 | S: Orphan | ||
8314 | F: arch/m32r/ | ||
8315 | |||
8316 | M68K ARCHITECTURE | 8311 | M68K ARCHITECTURE |
8317 | M: Geert Uytterhoeven <geert@linux-m68k.org> | 8312 | M: Geert Uytterhoeven <geert@linux-m68k.org> |
8318 | L: linux-m68k@lists.linux-m68k.org | 8313 | L: linux-m68k@lists.linux-m68k.org |
diff --git a/arch/m32r/Kconfig b/arch/m32r/Kconfig deleted file mode 100644 index dd84ee194579..000000000000 --- a/arch/m32r/Kconfig +++ /dev/null | |||
@@ -1,419 +0,0 @@ | |||
1 | # SPDX-License-Identifier: GPL-2.0 | ||
2 | config M32R | ||
3 | bool | ||
4 | default y | ||
5 | select HAVE_IDE | ||
6 | select HAVE_OPROFILE | ||
7 | select INIT_ALL_POSSIBLE | ||
8 | select HAVE_KERNEL_GZIP | ||
9 | select HAVE_KERNEL_BZIP2 | ||
10 | select HAVE_KERNEL_LZMA | ||
11 | select ARCH_WANT_IPC_PARSE_VERSION | ||
12 | select HAVE_DEBUG_BUGVERBOSE | ||
13 | select VIRT_TO_BUS | ||
14 | select GENERIC_IRQ_PROBE | ||
15 | select GENERIC_IRQ_SHOW | ||
16 | select GENERIC_ATOMIC64 | ||
17 | select ARCH_HAS_DEVMEM_IS_ALLOWED | ||
18 | select ARCH_USES_GETTIMEOFFSET | ||
19 | select MODULES_USE_ELF_RELA | ||
20 | select HAVE_DEBUG_STACKOVERFLOW | ||
21 | select CPU_NO_EFFICIENT_FFS | ||
22 | select DMA_DIRECT_OPS | ||
23 | select ARCH_NO_COHERENT_DMA_MMAP if !MMU | ||
24 | |||
25 | config SBUS | ||
26 | bool | ||
27 | |||
28 | config GENERIC_ISA_DMA | ||
29 | bool | ||
30 | default y | ||
31 | |||
32 | config ZONE_DMA | ||
33 | bool | ||
34 | default y | ||
35 | |||
36 | config NO_IOPORT_MAP | ||
37 | def_bool y | ||
38 | |||
39 | config NO_DMA | ||
40 | def_bool n | ||
41 | |||
42 | config HZ | ||
43 | int | ||
44 | default 100 | ||
45 | |||
46 | source "init/Kconfig" | ||
47 | |||
48 | source "kernel/Kconfig.freezer" | ||
49 | |||
50 | |||
51 | menu "Processor type and features" | ||
52 | |||
53 | choice | ||
54 | prompt "Platform Type" | ||
55 | default PLAT_MAPPI | ||
56 | |||
57 | config PLAT_MAPPI | ||
58 | bool "Mappi-I" | ||
59 | help | ||
60 | The Mappi-I is an FPGA board for SOC (System-On-a-Chip) prototyping. | ||
61 | You can operate a Linux system on this board by using an M32R | ||
62 | softmacro core, which is a fully-synthesizable functional model | ||
63 | described in Verilog-HDL. | ||
64 | |||
65 | The Mappi-I board was the first platform, which had been used | ||
66 | to port and develop a Linux system for the M32R processor. | ||
67 | Currently, the Mappi-II, an heir to the Mappi-I, is available. | ||
68 | |||
69 | config PLAT_USRV | ||
70 | bool "uServer" | ||
71 | select PLAT_HAS_INT1ICU | ||
72 | |||
73 | config PLAT_M32700UT | ||
74 | bool "M32700UT" | ||
75 | select PLAT_HAS_INT0ICU | ||
76 | select PLAT_HAS_INT1ICU | ||
77 | select PLAT_HAS_INT2ICU | ||
78 | help | ||
79 | The M3T-M32700UT is an evaluation board based on uT-Engine | ||
80 | specification. This board has an M32700 (Chaos) evaluation chip. | ||
81 | You can say Y for SMP, because the M32700 is a single chip | ||
82 | multiprocessor. | ||
83 | |||
84 | config PLAT_OPSPUT | ||
85 | bool "OPSPUT" | ||
86 | select PLAT_HAS_INT0ICU | ||
87 | select PLAT_HAS_INT1ICU | ||
88 | select PLAT_HAS_INT2ICU | ||
89 | help | ||
90 | The OPSPUT is an evaluation board based on uT-Engine | ||
91 | specification. This board has a OPSP-REP chip. | ||
92 | |||
93 | config PLAT_OAKS32R | ||
94 | bool "OAKS32R" | ||
95 | help | ||
96 | The OAKS32R is a tiny, inexpensive evaluation board. | ||
97 | Please note that if you say Y here and choose chip "M32102", | ||
98 | say N for MMU and select a no-MMU version kernel, otherwise | ||
99 | a kernel with MMU support will not work, because the M32102 | ||
100 | is a microcontroller for embedded systems and it has no MMU. | ||
101 | |||
102 | config PLAT_MAPPI2 | ||
103 | bool "Mappi-II(M3A-ZA36/M3A-ZA52)" | ||
104 | |||
105 | config PLAT_MAPPI3 | ||
106 | bool "Mappi-III(M3A-2170)" | ||
107 | |||
108 | config PLAT_M32104UT | ||
109 | bool "M32104UT" | ||
110 | select PLAT_HAS_INT1ICU | ||
111 | help | ||
112 | The M3T-M32104UT is an reference board based on uT-Engine | ||
113 | specification. This board has a M32104 chip. | ||
114 | |||
115 | endchoice | ||
116 | |||
117 | choice | ||
118 | prompt "Processor family" | ||
119 | default CHIP_M32700 | ||
120 | |||
121 | config CHIP_M32700 | ||
122 | bool "M32700 (Chaos)" | ||
123 | |||
124 | config CHIP_M32102 | ||
125 | bool "M32102" | ||
126 | |||
127 | config CHIP_M32104 | ||
128 | bool "M32104" | ||
129 | depends on PLAT_M32104UT | ||
130 | |||
131 | config CHIP_VDEC2 | ||
132 | bool "VDEC2" | ||
133 | |||
134 | config CHIP_OPSP | ||
135 | bool "OPSP" | ||
136 | |||
137 | endchoice | ||
138 | |||
139 | config MMU | ||
140 | bool "Support for memory management hardware" | ||
141 | depends on CHIP_M32700 || CHIP_VDEC2 || CHIP_OPSP | ||
142 | default y | ||
143 | |||
144 | config TLB_ENTRIES | ||
145 | int "TLB Entries" | ||
146 | depends on CHIP_M32700 || CHIP_VDEC2 || CHIP_OPSP | ||
147 | default 32 if CHIP_M32700 || CHIP_OPSP | ||
148 | default 16 if CHIP_VDEC2 | ||
149 | |||
150 | |||
151 | config ISA_M32R | ||
152 | bool | ||
153 | depends on CHIP_M32102 || CHIP_M32104 | ||
154 | default y | ||
155 | |||
156 | config ISA_M32R2 | ||
157 | bool | ||
158 | depends on CHIP_M32700 || CHIP_VDEC2 || CHIP_OPSP | ||
159 | default y | ||
160 | |||
161 | config ISA_DSP_LEVEL2 | ||
162 | bool | ||
163 | depends on CHIP_M32700 || CHIP_OPSP | ||
164 | default y | ||
165 | |||
166 | config ISA_DUAL_ISSUE | ||
167 | bool | ||
168 | depends on CHIP_M32700 || CHIP_OPSP | ||
169 | default y | ||
170 | |||
171 | config PLAT_HAS_INT0ICU | ||
172 | bool | ||
173 | default n | ||
174 | |||
175 | config PLAT_HAS_INT1ICU | ||
176 | bool | ||
177 | default n | ||
178 | |||
179 | config PLAT_HAS_INT2ICU | ||
180 | bool | ||
181 | default n | ||
182 | |||
183 | config BUS_CLOCK | ||
184 | int "Bus Clock [Hz] (integer)" | ||
185 | default "70000000" if PLAT_MAPPI | ||
186 | default "25000000" if PLAT_USRV | ||
187 | default "50000000" if PLAT_MAPPI3 | ||
188 | default "50000000" if PLAT_M32700UT | ||
189 | default "50000000" if PLAT_OPSPUT | ||
190 | default "54000000" if PLAT_M32104UT | ||
191 | default "33333333" if PLAT_OAKS32R | ||
192 | default "20000000" if PLAT_MAPPI2 | ||
193 | |||
194 | config TIMER_DIVIDE | ||
195 | int "Timer divider (integer)" | ||
196 | default "128" | ||
197 | |||
198 | config CPU_BIG_ENDIAN | ||
199 | bool | ||
200 | default !CPU_LITTLE_ENDIAN | ||
201 | |||
202 | config CPU_LITTLE_ENDIAN | ||
203 | bool "Generate little endian code" | ||
204 | default n | ||
205 | |||
206 | config MEMORY_START | ||
207 | hex "Physical memory start address (hex)" | ||
208 | default "08000000" if PLAT_MAPPI || PLAT_MAPPI2 || PLAT_MAPPI3 | ||
209 | default "08000000" if PLAT_USRV | ||
210 | default "08000000" if PLAT_M32700UT | ||
211 | default "08000000" if PLAT_OPSPUT | ||
212 | default "04000000" if PLAT_M32104UT | ||
213 | default "01000000" if PLAT_OAKS32R | ||
214 | |||
215 | config MEMORY_SIZE | ||
216 | hex "Physical memory size (hex)" | ||
217 | default "08000000" if PLAT_MAPPI3 | ||
218 | default "04000000" if PLAT_MAPPI || PLAT_MAPPI2 | ||
219 | default "02000000" if PLAT_USRV | ||
220 | default "01000000" if PLAT_M32700UT | ||
221 | default "01000000" if PLAT_OPSPUT | ||
222 | default "01000000" if PLAT_M32104UT | ||
223 | default "00800000" if PLAT_OAKS32R | ||
224 | |||
225 | config ARCH_DISCONTIGMEM_ENABLE | ||
226 | bool "Internal RAM Support" | ||
227 | depends on CHIP_M32700 || CHIP_M32102 || CHIP_VDEC2 || CHIP_OPSP || CHIP_M32104 | ||
228 | default y | ||
229 | |||
230 | source "mm/Kconfig" | ||
231 | |||
232 | config IRAM_START | ||
233 | hex "Internal memory start address (hex)" | ||
234 | default "00f00000" if !CHIP_M32104 | ||
235 | default "00700000" if CHIP_M32104 | ||
236 | depends on (CHIP_M32700 || CHIP_M32102 || CHIP_VDEC2 || CHIP_OPSP || CHIP_M32104) && DISCONTIGMEM | ||
237 | |||
238 | config IRAM_SIZE | ||
239 | hex "Internal memory size (hex)" | ||
240 | depends on (CHIP_M32700 || CHIP_M32102 || CHIP_VDEC2 || CHIP_OPSP || CHIP_M32104) && DISCONTIGMEM | ||
241 | default "00080000" if CHIP_M32700 | ||
242 | default "00010000" if CHIP_M32102 || CHIP_OPSP || CHIP_M32104 | ||
243 | default "00008000" if CHIP_VDEC2 | ||
244 | |||
245 | # | ||
246 | # Define implied options from the CPU selection here | ||
247 | # | ||
248 | |||
249 | config GENERIC_LOCKBREAK | ||
250 | bool | ||
251 | default y | ||
252 | depends on SMP && PREEMPT | ||
253 | |||
254 | config RWSEM_GENERIC_SPINLOCK | ||
255 | bool | ||
256 | depends on M32R | ||
257 | default y | ||
258 | |||
259 | config RWSEM_XCHGADD_ALGORITHM | ||
260 | bool | ||
261 | default n | ||
262 | |||
263 | config ARCH_HAS_ILOG2_U32 | ||
264 | bool | ||
265 | default n | ||
266 | |||
267 | config ARCH_HAS_ILOG2_U64 | ||
268 | bool | ||
269 | default n | ||
270 | |||
271 | config GENERIC_HWEIGHT | ||
272 | bool | ||
273 | default y | ||
274 | |||
275 | config GENERIC_CALIBRATE_DELAY | ||
276 | bool | ||
277 | default y | ||
278 | |||
279 | config SCHED_OMIT_FRAME_POINTER | ||
280 | bool | ||
281 | default y | ||
282 | |||
283 | source "kernel/Kconfig.preempt" | ||
284 | |||
285 | config SMP | ||
286 | bool "Symmetric multi-processing support" | ||
287 | depends on MMU | ||
288 | ---help--- | ||
289 | This enables support for systems with more than one CPU. If you have | ||
290 | a system with only one CPU, say N. If you have a system with more | ||
291 | than one CPU, say Y. | ||
292 | |||
293 | If you say N here, the kernel will run on uni- and multiprocessor | ||
294 | machines, but will use only one CPU of a multiprocessor machine. If | ||
295 | you say Y here, the kernel will run on many, but not all, | ||
296 | uniprocessor machines. On a uniprocessor machine, the kernel | ||
297 | will run faster if you say N here. | ||
298 | |||
299 | People using multiprocessor machines who say Y here should also say | ||
300 | Y to "Enhanced Real Time Clock Support", below. The "Advanced Power | ||
301 | Management" code will be disabled if you say Y here. | ||
302 | |||
303 | See also the SMP-HOWTO available at | ||
304 | <http://tldp.org/HOWTO/SMP-HOWTO.html>. | ||
305 | |||
306 | If you don't know what to do here, say N. | ||
307 | |||
308 | config CHIP_M32700_TS1 | ||
309 | bool "Workaround code for the M32700 TS1 chip's bug" | ||
310 | depends on (CHIP_M32700 && SMP) | ||
311 | default n | ||
312 | |||
313 | config NR_CPUS | ||
314 | int "Maximum number of CPUs (2-32)" | ||
315 | range 2 32 | ||
316 | depends on SMP | ||
317 | default "2" | ||
318 | help | ||
319 | This allows you to specify the maximum number of CPUs which this | ||
320 | kernel will support. The maximum supported value is 32 and the | ||
321 | minimum value which makes sense is 2. | ||
322 | |||
323 | This is purely to save memory - each supported CPU adds | ||
324 | approximately eight kilobytes to the kernel image. | ||
325 | |||
326 | # Common NUMA Features | ||
327 | config NUMA | ||
328 | bool "Numa Memory Allocation Support" | ||
329 | depends on SMP && BROKEN | ||
330 | default n | ||
331 | |||
332 | config NODES_SHIFT | ||
333 | int | ||
334 | default "1" | ||
335 | depends on NEED_MULTIPLE_NODES | ||
336 | |||
337 | endmenu | ||
338 | |||
339 | |||
340 | menu "Bus options (PCI, PCMCIA, EISA, MCA, ISA)" | ||
341 | |||
342 | config PCI | ||
343 | bool "PCI support" | ||
344 | depends on BROKEN | ||
345 | default n | ||
346 | help | ||
347 | Find out whether you have a PCI motherboard. PCI is the name of a | ||
348 | bus system, i.e. the way the CPU talks to the other stuff inside | ||
349 | your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or | ||
350 | VESA. If you have PCI, say Y, otherwise N. | ||
351 | |||
352 | choice | ||
353 | prompt "PCI access mode" | ||
354 | depends on PCI | ||
355 | default PCI_GOANY | ||
356 | |||
357 | config PCI_GOBIOS | ||
358 | bool "BIOS" | ||
359 | ---help--- | ||
360 | On PCI systems, the BIOS can be used to detect the PCI devices and | ||
361 | determine their configuration. However, some old PCI motherboards | ||
362 | have BIOS bugs and may crash if this is done. Also, some embedded | ||
363 | PCI-based systems don't have any BIOS at all. Linux can also try to | ||
364 | detect the PCI hardware directly without using the BIOS. | ||
365 | |||
366 | With this option, you can specify how Linux should detect the PCI | ||
367 | devices. If you choose "BIOS", the BIOS will be used, if you choose | ||
368 | "Direct", the BIOS won't be used, and if you choose "Any", the | ||
369 | kernel will try the direct access method and falls back to the BIOS | ||
370 | if that doesn't work. If unsure, go with the default, which is | ||
371 | "Any". | ||
372 | |||
373 | config PCI_GODIRECT | ||
374 | bool "Direct" | ||
375 | |||
376 | config PCI_GOANY | ||
377 | bool "Any" | ||
378 | |||
379 | endchoice | ||
380 | |||
381 | config PCI_BIOS | ||
382 | bool | ||
383 | depends on PCI && (PCI_GOBIOS || PCI_GOANY) | ||
384 | default y | ||
385 | |||
386 | config PCI_DIRECT | ||
387 | bool | ||
388 | depends on PCI && (PCI_GODIRECT || PCI_GOANY) | ||
389 | default y | ||
390 | |||
391 | source "drivers/pci/Kconfig" | ||
392 | |||
393 | config ISA | ||
394 | bool | ||
395 | |||
396 | source "drivers/pcmcia/Kconfig" | ||
397 | |||
398 | endmenu | ||
399 | |||
400 | |||
401 | menu "Executable file formats" | ||
402 | |||
403 | source "fs/Kconfig.binfmt" | ||
404 | |||
405 | endmenu | ||
406 | |||
407 | source "net/Kconfig" | ||
408 | |||
409 | source "drivers/Kconfig" | ||
410 | |||
411 | source "fs/Kconfig" | ||
412 | |||
413 | source "arch/m32r/Kconfig.debug" | ||
414 | |||
415 | source "security/Kconfig" | ||
416 | |||
417 | source "crypto/Kconfig" | ||
418 | |||
419 | source "lib/Kconfig" | ||
diff --git a/arch/m32r/Kconfig.debug b/arch/m32r/Kconfig.debug deleted file mode 100644 index ffca1e194f91..000000000000 --- a/arch/m32r/Kconfig.debug +++ /dev/null | |||
@@ -1,22 +0,0 @@ | |||
1 | # SPDX-License-Identifier: GPL-2.0 | ||
2 | menu "Kernel hacking" | ||
3 | |||
4 | source "lib/Kconfig.debug" | ||
5 | |||
6 | config DEBUG_PAGEALLOC | ||
7 | bool "Debug page memory allocations" | ||
8 | depends on DEBUG_KERNEL && BROKEN | ||
9 | help | ||
10 | Unmap pages from the kernel linear mapping after free_pages(). | ||
11 | This results in a large slowdown, but helps to find certain types | ||
12 | of memory corruptions. | ||
13 | |||
14 | config FRAME_POINTER | ||
15 | bool "Compile the kernel with frame pointers" | ||
16 | help | ||
17 | If you say Y here the resulting kernel image will be slightly larger | ||
18 | and slower, but it will give very useful debugging information. | ||
19 | If you don't debug the kernel, you can say N, but we may not be able | ||
20 | to solve problems without frame pointers. | ||
21 | |||
22 | endmenu | ||
diff --git a/arch/m32r/Makefile b/arch/m32r/Makefile deleted file mode 100644 index d73b58c847a6..000000000000 --- a/arch/m32r/Makefile +++ /dev/null | |||
@@ -1,63 +0,0 @@ | |||
1 | # SPDX-License-Identifier: GPL-2.0 | ||
2 | # | ||
3 | # m32r/Makefile | ||
4 | # | ||
5 | # This file is included by the global makefile so that you can add your own | ||
6 | # architecture-specific flags and dependencies. | ||
7 | # | ||
8 | |||
9 | KBUILD_DEFCONFIG := m32700ut.smp_defconfig | ||
10 | |||
11 | LDFLAGS := | ||
12 | OBJCOPYFLAGS := -O binary -R .note -R .comment -S | ||
13 | LDFLAGS_vmlinux := | ||
14 | |||
15 | KBUILD_CFLAGS += -pipe -fno-schedule-insns | ||
16 | KBUILD_CFLAGS_KERNEL += -mmodel=medium | ||
17 | KBUILD_CFLAGS_MODULE += -mmodel=large | ||
18 | |||
19 | ifdef CONFIG_CHIP_VDEC2 | ||
20 | cflags-$(CONFIG_ISA_M32R2) += -DNO_FPU -Wa,-bitinst | ||
21 | aflags-$(CONFIG_ISA_M32R2) += -DNO_FPU -O2 -Wa,-bitinst -Wa,-no-parallel | ||
22 | else | ||
23 | cflags-$(CONFIG_ISA_M32R2) += -DNO_FPU -m32r2 | ||
24 | aflags-$(CONFIG_ISA_M32R2) += -DNO_FPU -m32r2 -O2 | ||
25 | endif | ||
26 | |||
27 | cflags-$(CONFIG_ISA_M32R) += -DNO_FPU | ||
28 | aflags-$(CONFIG_ISA_M32R) += -DNO_FPU -O2 -Wa,-no-bitinst | ||
29 | |||
30 | KBUILD_CFLAGS += $(cflags-y) | ||
31 | KBUILD_AFLAGS += $(aflags-y) | ||
32 | |||
33 | CHECKFLAGS += -D__m32r__ -D__BIG_ENDIAN__=1 | ||
34 | |||
35 | head-y := arch/m32r/kernel/head.o | ||
36 | |||
37 | LIBGCC := $(shell $(CC) $(KBUILD_CFLAGS) -print-libgcc-file-name) | ||
38 | |||
39 | libs-y += arch/m32r/lib/ $(LIBGCC) | ||
40 | core-y += arch/m32r/kernel/ \ | ||
41 | arch/m32r/mm/ \ | ||
42 | arch/m32r/boot/ \ | ||
43 | arch/m32r/platforms/ | ||
44 | |||
45 | drivers-$(CONFIG_OPROFILE) += arch/m32r/oprofile/ | ||
46 | |||
47 | boot := arch/m32r/boot | ||
48 | |||
49 | PHONY += zImage | ||
50 | |||
51 | all: zImage | ||
52 | |||
53 | zImage: vmlinux | ||
54 | $(Q)$(MAKE) $(build)=$(boot) $(boot)/$@ | ||
55 | |||
56 | compressed: zImage | ||
57 | |||
58 | archclean: | ||
59 | $(Q)$(MAKE) $(clean)=$(boot) | ||
60 | |||
61 | define archhelp | ||
62 | echo '* zImage - Compressed kernel image (arch/$(ARCH)/boot/zImage)' | ||
63 | endef | ||
diff --git a/arch/m32r/boot/Makefile b/arch/m32r/boot/Makefile deleted file mode 100644 index af2cef475d98..000000000000 --- a/arch/m32r/boot/Makefile +++ /dev/null | |||
@@ -1,19 +0,0 @@ | |||
1 | # | ||
2 | # arch/m32r/boot/Makefile | ||
3 | # | ||
4 | # This file is subject to the terms and conditions of the GNU General Public | ||
5 | # License. See the file "COPYING" in the main directory of this archive | ||
6 | # for more details. | ||
7 | |||
8 | targets := zImage | ||
9 | subdir- := compressed | ||
10 | |||
11 | obj-y := setup.o | ||
12 | |||
13 | $(obj)/zImage: $(obj)/compressed/vmlinux FORCE | ||
14 | $(call if_changed,objcopy) | ||
15 | @echo 'Kernel: $@ is ready' | ||
16 | |||
17 | $(obj)/compressed/vmlinux: FORCE | ||
18 | $(Q)$(MAKE) $(build)=$(obj)/compressed $@ | ||
19 | |||
diff --git a/arch/m32r/boot/compressed/Makefile b/arch/m32r/boot/compressed/Makefile deleted file mode 100644 index abd3c75ebd32..000000000000 --- a/arch/m32r/boot/compressed/Makefile +++ /dev/null | |||
@@ -1,51 +0,0 @@ | |||
1 | # SPDX-License-Identifier: GPL-2.0 | ||
2 | # | ||
3 | # linux/arch/m32r/boot/compressed/Makefile | ||
4 | # | ||
5 | # create a compressed vmlinux image from the original vmlinux | ||
6 | # | ||
7 | |||
8 | targets := vmlinux vmlinux.bin vmlinux.bin.gz vmlinux.bin.bz2 \ | ||
9 | vmlinux.bin.lzma head.o misc.o piggy.o vmlinux.lds | ||
10 | |||
11 | OBJECTS = $(obj)/head.o $(obj)/misc.o | ||
12 | |||
13 | # | ||
14 | # IMAGE_OFFSET is the load offset of the compression loader | ||
15 | # | ||
16 | #IMAGE_OFFSET := $(shell printf "0x%08x" $$[$(CONFIG_MEMORY_START)+0x2000]) | ||
17 | #IMAGE_OFFSET := $(shell printf "0x%08x" $$[$(CONFIG_MEMORY_START)+0x00400000]) | ||
18 | |||
19 | LDFLAGS_vmlinux := -T | ||
20 | |||
21 | $(obj)/vmlinux: $(obj)/vmlinux.lds $(OBJECTS) $(obj)/piggy.o FORCE | ||
22 | $(call if_changed,ld) | ||
23 | |||
24 | $(obj)/vmlinux.bin: vmlinux FORCE | ||
25 | $(call if_changed,objcopy) | ||
26 | |||
27 | $(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE | ||
28 | $(call if_changed,gzip) | ||
29 | |||
30 | $(obj)/vmlinux.bin.bz2: $(obj)/vmlinux.bin FORCE | ||
31 | $(call if_changed,bzip2) | ||
32 | |||
33 | $(obj)/vmlinux.bin.lzma: $(obj)/vmlinux.bin FORCE | ||
34 | $(call if_changed,lzma) | ||
35 | |||
36 | CFLAGS_misc.o += -fpic | ||
37 | |||
38 | ifdef CONFIG_MMU | ||
39 | LDFLAGS_piggy.o := -r --format binary --oformat elf32-m32r-linux -T | ||
40 | else | ||
41 | LDFLAGS_piggy.o := -r --format binary --oformat elf32-m32r -T | ||
42 | endif | ||
43 | |||
44 | OBJCOPYFLAGS += -R .empty_zero_page | ||
45 | |||
46 | suffix-$(CONFIG_KERNEL_GZIP) = gz | ||
47 | suffix-$(CONFIG_KERNEL_BZIP2) = bz2 | ||
48 | suffix-$(CONFIG_KERNEL_LZMA) = lzma | ||
49 | |||
50 | $(obj)/piggy.o: $(obj)/vmlinux.scr $(obj)/vmlinux.bin.$(suffix-y) FORCE | ||
51 | $(call if_changed,ld) | ||
diff --git a/arch/m32r/boot/compressed/boot.h b/arch/m32r/boot/compressed/boot.h deleted file mode 100644 index 7fce713e8aac..000000000000 --- a/arch/m32r/boot/compressed/boot.h +++ /dev/null | |||
@@ -1,60 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | /* | ||
3 | * 1. load vmlinuz | ||
4 | * | ||
5 | * CONFIG_MEMORY_START +-----------------------+ | ||
6 | * | vmlinuz | | ||
7 | * +-----------------------+ | ||
8 | * 2. decompressed | ||
9 | * | ||
10 | * CONFIG_MEMORY_START +-----------------------+ | ||
11 | * | vmlinuz | | ||
12 | * +-----------------------+ | ||
13 | * | | | ||
14 | * BOOT_RELOC_ADDR +-----------------------+ | ||
15 | * | | | ||
16 | * KERNEL_DECOMPRESS_ADDR +-----------------------+ | ||
17 | * | vmlinux | | ||
18 | * +-----------------------+ | ||
19 | * | ||
20 | * 3. relocate copy & jump code | ||
21 | * | ||
22 | * CONFIG_MEMORY_START +-----------------------+ | ||
23 | * | vmlinuz | | ||
24 | * +-----------------------+ | ||
25 | * | | | ||
26 | * BOOT_RELOC_ADDR +-----------------------+ | ||
27 | * | boot(copy&jump) | | ||
28 | * KERNEL_DECOMPRESS_ADDR +-----------------------+ | ||
29 | * | vmlinux | | ||
30 | * +-----------------------+ | ||
31 | * | ||
32 | * 4. relocate decompressed kernel | ||
33 | * | ||
34 | * CONFIG_MEMORY_START +-----------------------+ | ||
35 | * | vmlinux | | ||
36 | * +-----------------------+ | ||
37 | * | | | ||
38 | * BOOT_RELOC_ADDR +-----------------------+ | ||
39 | * | boot(copy&jump) | | ||
40 | * KERNEL_DECOMPRESS_ADDR +-----------------------+ | ||
41 | * | | | ||
42 | * +-----------------------+ | ||
43 | * | ||
44 | */ | ||
45 | #ifdef __ASSEMBLY__ | ||
46 | #define __val(x) x | ||
47 | #else | ||
48 | #define __val(x) (x) | ||
49 | #endif | ||
50 | |||
51 | #define DECOMPRESS_OFFSET_BASE __val(0x00900000) | ||
52 | #define BOOT_RELOC_SIZE __val(0x00001000) | ||
53 | |||
54 | #define KERNEL_EXEC_ADDR __val(CONFIG_MEMORY_START) | ||
55 | #define KERNEL_DECOMPRESS_ADDR __val(CONFIG_MEMORY_START + \ | ||
56 | DECOMPRESS_OFFSET_BASE + BOOT_RELOC_SIZE) | ||
57 | #define KERNEL_ENTRY __val(CONFIG_MEMORY_START + 0x1000) | ||
58 | |||
59 | #define BOOT_EXEC_ADDR __val(CONFIG_MEMORY_START) | ||
60 | #define BOOT_RELOC_ADDR __val(CONFIG_MEMORY_START + DECOMPRESS_OFFSET_BASE) | ||
diff --git a/arch/m32r/boot/compressed/head.S b/arch/m32r/boot/compressed/head.S deleted file mode 100644 index 39b693640375..000000000000 --- a/arch/m32r/boot/compressed/head.S +++ /dev/null | |||
@@ -1,177 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | /* | ||
3 | * linux/arch/m32r/boot/compressed/head.S | ||
4 | * | ||
5 | * Copyright (c) 2001-2003 Hiroyuki Kondo, Hirokazu Takata, | ||
6 | * Hitoshi Yamamoto, Takeo Takahashi | ||
7 | * Copyright (c) 2004 Hirokazu Takata | ||
8 | */ | ||
9 | |||
10 | .text | ||
11 | #include <linux/linkage.h> | ||
12 | #include <asm/addrspace.h> | ||
13 | #include <asm/page.h> | ||
14 | #include <asm/assembler.h> | ||
15 | |||
16 | /* | ||
17 | * This code can be loaded anywhere, as long as output will not | ||
18 | * overlap it. | ||
19 | * | ||
20 | * NOTE: This head.S should *NOT* be compiled with -fpic. | ||
21 | * | ||
22 | */ | ||
23 | |||
24 | .global startup | ||
25 | .global __bss_start, _ebss, end, zimage_data, zimage_len | ||
26 | __ALIGN | ||
27 | startup: | ||
28 | ldi r0, #0x0000 /* SPI, disable EI */ | ||
29 | mvtc r0, psw | ||
30 | |||
31 | ldi r12, #-8 | ||
32 | bl 1f | ||
33 | .fillinsn | ||
34 | 1: | ||
35 | seth r1, #high(CONFIG_MEMORY_START + 0x00400000) /* Start address */ | ||
36 | add r12, r14 /* Real address */ | ||
37 | sub r12, r1 /* difference */ | ||
38 | |||
39 | .global got_len | ||
40 | seth r3, #high(_GLOBAL_OFFSET_TABLE_+8) | ||
41 | or3 r3, r3, #low(_GLOBAL_OFFSET_TABLE_+12) | ||
42 | add r3, r14 | ||
43 | |||
44 | /* Update the contents of global offset table */ | ||
45 | ldi r1, #low(got_len) | ||
46 | srli r1, #2 | ||
47 | beqz r1, 2f | ||
48 | .fillinsn | ||
49 | 1: | ||
50 | ld r2, @r3 | ||
51 | add r2, r12 | ||
52 | st r2, @r3 | ||
53 | addi r3, #4 | ||
54 | addi r1, #-1 | ||
55 | bnez r1, 1b | ||
56 | .fillinsn | ||
57 | 2: | ||
58 | /* XXX: resolve plt */ | ||
59 | |||
60 | /* | ||
61 | * Clear BSS first so that there are no surprises... | ||
62 | */ | ||
63 | #ifdef CONFIG_ISA_DUAL_ISSUE | ||
64 | seth r2, #high(__bss_start) | ||
65 | or3 r2, r2, #low(__bss_start) | ||
66 | add r2, r12 | ||
67 | seth r3, #high(_ebss) | ||
68 | or3 r3, r3, #low(_ebss) | ||
69 | add r3, r12 | ||
70 | sub r3, r2 | ||
71 | |||
72 | ; R4 = BSS size in longwords (rounded down) | ||
73 | mv r4, r3 || ldi r1, #0 | ||
74 | srli r4, #4 || addi r2, #-4 | ||
75 | beqz r4, .Lendloop1 | ||
76 | .Lloop1: | ||
77 | #ifndef CONFIG_CHIP_M32310 | ||
78 | ; Touch memory for the no-write-allocating cache. | ||
79 | ld r0, @(4,r2) | ||
80 | #endif | ||
81 | st r1, @+r2 || addi r4, #-1 | ||
82 | st r1, @+r2 | ||
83 | st r1, @+r2 | ||
84 | st r1, @+r2 || cmpeq r1, r4 ; R4 = 0? | ||
85 | bnc .Lloop1 | ||
86 | .Lendloop1: | ||
87 | and3 r4, r3, #15 | ||
88 | addi r2, #4 | ||
89 | beqz r4, .Lendloop2 | ||
90 | .Lloop2: | ||
91 | stb r1, @r2 || addi r4, #-1 | ||
92 | addi r2, #1 | ||
93 | bnez r4, .Lloop2 | ||
94 | .Lendloop2: | ||
95 | |||
96 | #else /* not CONFIG_ISA_DUAL_ISSUE */ | ||
97 | seth r2, #high(__bss_start) | ||
98 | or3 r2, r2, #low(__bss_start) | ||
99 | add r2, r12 | ||
100 | seth r3, #high(_ebss) | ||
101 | or3 r3, r3, #low(_ebss) | ||
102 | add r3, r12 | ||
103 | sub r3, r2 | ||
104 | mv r4, r3 | ||
105 | srli r4, #2 ; R4 = BSS size in longwords (rounded down) | ||
106 | ldi r1, #0 ; clear R1 for longwords store | ||
107 | addi r2, #-4 ; account for pre-inc store | ||
108 | beqz r4, .Lendloop1 ; any more to go? | ||
109 | .Lloop1: | ||
110 | st r1, @+r2 ; yep, zero out another longword | ||
111 | addi r4, #-1 ; decrement count | ||
112 | bnez r4, .Lloop1 ; go do some more | ||
113 | .Lendloop1: | ||
114 | |||
115 | #endif /* not CONFIG_ISA_DUAL_ISSUE */ | ||
116 | |||
117 | seth r1, #high(end) | ||
118 | or3 r1, r1, #low(end) | ||
119 | add r1, r12 | ||
120 | mv sp, r1 | ||
121 | |||
122 | /* | ||
123 | * decompress the kernel | ||
124 | */ | ||
125 | mv r0, sp | ||
126 | srli r0, 31 /* MMU is ON or OFF */ | ||
127 | seth r1, #high(zimage_data) | ||
128 | or3 r1, r1, #low(zimage_data) | ||
129 | add r1, r12 | ||
130 | seth r2, #high(zimage_len) | ||
131 | or3 r2, r2, #low(zimage_len) | ||
132 | mv r3, sp | ||
133 | |||
134 | bl decompress_kernel | ||
135 | |||
136 | #if defined(CONFIG_CHIP_M32700) || defined(CONFIG_CHIP_OPSP) || defined(CONFIG_CHIP_VDEC2) | ||
137 | /* Cache flush */ | ||
138 | ldi r0, -1 | ||
139 | ldi r1, 0xd0 ; invalidate i-cache, copy back d-cache | ||
140 | stb r1, @r0 | ||
141 | #elif defined(CONFIG_CHIP_M32102) | ||
142 | /* Cache flush */ | ||
143 | ldi r0, -2 | ||
144 | ldi r1, 0x0100 ; invalidate | ||
145 | stb r1, @r0 | ||
146 | #elif defined(CONFIG_CHIP_M32104) | ||
147 | /* Cache flush */ | ||
148 | ldi r0, -2 | ||
149 | ldi r1, 0x0700 ; invalidate i-cache, copy back d-cache | ||
150 | sth r1, @r0 | ||
151 | #else | ||
152 | #error "put your cache flush function, please" | ||
153 | #endif | ||
154 | |||
155 | mv r0, sp | ||
156 | srli r0, 31 /* MMU is ON or OFF */ | ||
157 | slli r0, 31 | ||
158 | or3 r0, r0, #0x2000 | ||
159 | seth r1, #high(CONFIG_MEMORY_START) | ||
160 | or r0, r1 | ||
161 | jmp r0 | ||
162 | |||
163 | .balign 512 | ||
164 | fake_headers_as_bzImage: | ||
165 | .short 0 | ||
166 | .ascii "HdrS" | ||
167 | .short 0x0202 | ||
168 | .short 0 | ||
169 | .short 0 | ||
170 | .byte 0x00, 0x10 | ||
171 | .short 0 | ||
172 | .byte 0 | ||
173 | .byte 1 | ||
174 | .byte 0x00, 0x80 | ||
175 | .long 0 | ||
176 | .long 0 | ||
177 | |||
diff --git a/arch/m32r/boot/compressed/install.sh b/arch/m32r/boot/compressed/install.sh deleted file mode 100644 index 16e5a0a13437..000000000000 --- a/arch/m32r/boot/compressed/install.sh +++ /dev/null | |||
@@ -1,57 +0,0 @@ | |||
1 | #!/bin/sh | ||
2 | # | ||
3 | # arch/sh/boot/install.sh | ||
4 | # | ||
5 | # This file is subject to the terms and conditions of the GNU General Public | ||
6 | # License. See the file "COPYING" in the main directory of this archive | ||
7 | # for more details. | ||
8 | # | ||
9 | # Copyright (C) 1995 by Linus Torvalds | ||
10 | # | ||
11 | # Adapted from code in arch/i386/boot/Makefile by H. Peter Anvin | ||
12 | # Adapted from code in arch/i386/boot/install.sh by Russell King | ||
13 | # Adapted from code in arch/arm/boot/install.sh by Stuart Menefy | ||
14 | # Adapted from code in arch/sh/boot/install.sh by Takeo Takahashi | ||
15 | # | ||
16 | # "make install" script for sh architecture | ||
17 | # | ||
18 | # Arguments: | ||
19 | # $1 - kernel version | ||
20 | # $2 - kernel image file | ||
21 | # $3 - kernel map file | ||
22 | # $4 - default install path (blank if root directory) | ||
23 | # | ||
24 | |||
25 | # User may have a custom install script | ||
26 | |||
27 | if [ -x /sbin/${INSTALLKERNEL} ]; then | ||
28 | exec /sbin/${INSTALLKERNEL} "$@" | ||
29 | fi | ||
30 | |||
31 | if [ "$2" = "zImage" ]; then | ||
32 | # Compressed install | ||
33 | echo "Installing compressed kernel" | ||
34 | if [ -f $4/vmlinuz-$1 ]; then | ||
35 | mv $4/vmlinuz-$1 $4/vmlinuz.old | ||
36 | fi | ||
37 | |||
38 | if [ -f $4/System.map-$1 ]; then | ||
39 | mv $4/System.map-$1 $4/System.old | ||
40 | fi | ||
41 | |||
42 | cat $2 > $4/vmlinuz-$1 | ||
43 | cp $3 $4/System.map-$1 | ||
44 | else | ||
45 | # Normal install | ||
46 | echo "Installing normal kernel" | ||
47 | if [ -f $4/vmlinux-$1 ]; then | ||
48 | mv $4/vmlinux-$1 $4/vmlinux.old | ||
49 | fi | ||
50 | |||
51 | if [ -f $4/System.map ]; then | ||
52 | mv $4/System.map $4/System.old | ||
53 | fi | ||
54 | |||
55 | cat $2 > $4/vmlinux-$1 | ||
56 | cp $3 $4/System.map | ||
57 | fi | ||
diff --git a/arch/m32r/boot/compressed/m32r_sio.c b/arch/m32r/boot/compressed/m32r_sio.c deleted file mode 100644 index 9d34bd063c31..000000000000 --- a/arch/m32r/boot/compressed/m32r_sio.c +++ /dev/null | |||
@@ -1,77 +0,0 @@ | |||
1 | // SPDX-License-Identifier: GPL-2.0 | ||
2 | /* | ||
3 | * arch/m32r/boot/compressed/m32r_sio.c | ||
4 | * | ||
5 | * 2003-02-12: Takeo Takahashi | ||
6 | * 2006-11-30: OPSPUT support by Kazuhiro Inaoka | ||
7 | * | ||
8 | */ | ||
9 | |||
10 | #include <asm/processor.h> | ||
11 | |||
12 | static void m32r_putc(char c); | ||
13 | |||
14 | static int puts(const char *s) | ||
15 | { | ||
16 | char c; | ||
17 | while ((c = *s++)) | ||
18 | m32r_putc(c); | ||
19 | return 0; | ||
20 | } | ||
21 | |||
22 | #if defined(CONFIG_PLAT_M32700UT) || defined(CONFIG_PLAT_OPSPUT) | ||
23 | #include <asm/m32r.h> | ||
24 | #include <asm/io.h> | ||
25 | |||
26 | #define USE_FPGA_MAP 0 | ||
27 | |||
28 | #if USE_FPGA_MAP | ||
29 | /* | ||
30 | * fpga configuration program uses MMU, and define map as same as | ||
31 | * M32104 uT-Engine board. | ||
32 | */ | ||
33 | #define BOOT_SIO0STS (volatile unsigned short *)(0x02c00000 + 0x20006) | ||
34 | #define BOOT_SIO0TXB (volatile unsigned short *)(0x02c00000 + 0x2000c) | ||
35 | #else | ||
36 | #undef PLD_BASE | ||
37 | #if defined(CONFIG_PLAT_OPSPUT) | ||
38 | #define PLD_BASE 0x1cc00000 | ||
39 | #else | ||
40 | #define PLD_BASE 0xa4c00000 | ||
41 | #endif | ||
42 | #define BOOT_SIO0STS PLD_ESIO0STS | ||
43 | #define BOOT_SIO0TXB PLD_ESIO0TXB | ||
44 | #endif | ||
45 | |||
46 | static void m32r_putc(char c) | ||
47 | { | ||
48 | while ((*BOOT_SIO0STS & 0x3) != 0x3) | ||
49 | cpu_relax(); | ||
50 | if (c == '\n') { | ||
51 | *BOOT_SIO0TXB = '\r'; | ||
52 | while ((*BOOT_SIO0STS & 0x3) != 0x3) | ||
53 | cpu_relax(); | ||
54 | } | ||
55 | *BOOT_SIO0TXB = c; | ||
56 | } | ||
57 | #else /* !(CONFIG_PLAT_M32700UT) */ | ||
58 | #if defined(CONFIG_PLAT_MAPPI2) | ||
59 | #define SIO0STS (volatile unsigned short *)(0xa0efd000 + 14) | ||
60 | #define SIO0TXB (volatile unsigned short *)(0xa0efd000 + 30) | ||
61 | #else | ||
62 | #define SIO0STS (volatile unsigned short *)(0x00efd000 + 14) | ||
63 | #define SIO0TXB (volatile unsigned short *)(0x00efd000 + 30) | ||
64 | #endif | ||
65 | |||
66 | static void m32r_putc(char c) | ||
67 | { | ||
68 | while ((*SIO0STS & 0x1) == 0) | ||
69 | cpu_relax(); | ||
70 | if (c == '\n') { | ||
71 | *SIO0TXB = '\r'; | ||
72 | while ((*SIO0STS & 0x1) == 0) | ||
73 | cpu_relax(); | ||
74 | } | ||
75 | *SIO0TXB = c; | ||
76 | } | ||
77 | #endif | ||
diff --git a/arch/m32r/boot/compressed/misc.c b/arch/m32r/boot/compressed/misc.c deleted file mode 100644 index 43e367055669..000000000000 --- a/arch/m32r/boot/compressed/misc.c +++ /dev/null | |||
@@ -1,93 +0,0 @@ | |||
1 | // SPDX-License-Identifier: GPL-2.0 | ||
2 | /* | ||
3 | * arch/m32r/boot/compressed/misc.c | ||
4 | * | ||
5 | * This is a collection of several routines from gzip-1.0.3 | ||
6 | * adapted for Linux. | ||
7 | * | ||
8 | * malloc by Hannu Savolainen 1993 and Matthias Urlichs 1994 | ||
9 | * | ||
10 | * Adapted for SH by Stuart Menefy, Aug 1999 | ||
11 | * | ||
12 | * 2003-02-12: Support M32R by Takeo Takahashi | ||
13 | */ | ||
14 | |||
15 | /* | ||
16 | * gzip declarations | ||
17 | */ | ||
18 | #define STATIC static | ||
19 | |||
20 | #undef memset | ||
21 | #undef memcpy | ||
22 | #define memzero(s, n) memset ((s), 0, (n)) | ||
23 | |||
24 | static void error(char *m); | ||
25 | |||
26 | #include "m32r_sio.c" | ||
27 | |||
28 | static unsigned long free_mem_ptr; | ||
29 | static unsigned long free_mem_end_ptr; | ||
30 | |||
31 | #ifdef CONFIG_KERNEL_BZIP2 | ||
32 | void *memset(void *s, int c, size_t n) | ||
33 | { | ||
34 | char *ss = s; | ||
35 | |||
36 | while (n--) | ||
37 | *ss++ = c; | ||
38 | return s; | ||
39 | } | ||
40 | #endif | ||
41 | |||
42 | #ifdef CONFIG_KERNEL_GZIP | ||
43 | void *memcpy(void *dest, const void *src, size_t n) | ||
44 | { | ||
45 | char *d = dest; | ||
46 | const char *s = src; | ||
47 | while (n--) | ||
48 | *d++ = *s++; | ||
49 | |||
50 | return dest; | ||
51 | } | ||
52 | |||
53 | #define BOOT_HEAP_SIZE 0x10000 | ||
54 | #include "../../../../lib/decompress_inflate.c" | ||
55 | #endif | ||
56 | |||
57 | #ifdef CONFIG_KERNEL_BZIP2 | ||
58 | #define BOOT_HEAP_SIZE 0x400000 | ||
59 | #include "../../../../lib/decompress_bunzip2.c" | ||
60 | #endif | ||
61 | |||
62 | #ifdef CONFIG_KERNEL_LZMA | ||
63 | #define BOOT_HEAP_SIZE 0x10000 | ||
64 | #include "../../../../lib/decompress_unlzma.c" | ||
65 | #endif | ||
66 | |||
67 | static void error(char *x) | ||
68 | { | ||
69 | puts("\n\n"); | ||
70 | puts(x); | ||
71 | puts("\n\n -- System halted"); | ||
72 | |||
73 | while(1); /* Halt */ | ||
74 | } | ||
75 | |||
76 | void | ||
77 | decompress_kernel(int mmu_on, unsigned char *zimage_data, | ||
78 | unsigned int zimage_len, unsigned long heap) | ||
79 | { | ||
80 | unsigned char *input_data = zimage_data; | ||
81 | int input_len = zimage_len; | ||
82 | unsigned char *output_data; | ||
83 | |||
84 | output_data = (unsigned char *)CONFIG_MEMORY_START + 0x2000 | ||
85 | + (mmu_on ? 0x80000000 : 0); | ||
86 | free_mem_ptr = heap; | ||
87 | free_mem_end_ptr = free_mem_ptr + BOOT_HEAP_SIZE; | ||
88 | |||
89 | puts("\nDecompressing Linux... "); | ||
90 | __decompress(input_data, input_len, NULL, NULL, output_data, 0, | ||
91 | NULL, error); | ||
92 | puts("done.\nBooting the kernel.\n"); | ||
93 | } | ||
diff --git a/arch/m32r/boot/compressed/vmlinux.lds.S b/arch/m32r/boot/compressed/vmlinux.lds.S deleted file mode 100644 index c393eb559c4c..000000000000 --- a/arch/m32r/boot/compressed/vmlinux.lds.S +++ /dev/null | |||
@@ -1,31 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | |||
3 | OUTPUT_ARCH(m32r) | ||
4 | ENTRY(startup) | ||
5 | SECTIONS | ||
6 | { | ||
7 | . = CONFIG_MEMORY_START + 0x00400000; | ||
8 | |||
9 | _text = .; | ||
10 | .text : { *(.text) } = 0 | ||
11 | .rodata : { *(.rodata) *(.rodata.*) } | ||
12 | _etext = .; | ||
13 | |||
14 | . = ALIGN(32 / 8); | ||
15 | .data : { *(.data) } | ||
16 | . = ALIGN(32 / 8); | ||
17 | _got = .; | ||
18 | .got : { *(.got) _egot = .; *(.got.*) } | ||
19 | _edata = .; | ||
20 | |||
21 | . = ALIGN(32 / 8); | ||
22 | __bss_start = .; | ||
23 | .bss : { *(.bss) *(.sbss) } | ||
24 | . = ALIGN(32 / 8); | ||
25 | _ebss = .; | ||
26 | . = ALIGN(4096); | ||
27 | . += 4096; | ||
28 | end = . ; | ||
29 | |||
30 | got_len = (_egot - _got); | ||
31 | } | ||
diff --git a/arch/m32r/boot/compressed/vmlinux.scr b/arch/m32r/boot/compressed/vmlinux.scr deleted file mode 100644 index 924c7992c55b..000000000000 --- a/arch/m32r/boot/compressed/vmlinux.scr +++ /dev/null | |||
@@ -1,9 +0,0 @@ | |||
1 | SECTIONS | ||
2 | { | ||
3 | .data : { | ||
4 | zimage_data = .; | ||
5 | *(.data) | ||
6 | zimage_data_end = .; | ||
7 | } | ||
8 | zimage_len = zimage_data_end - zimage_data; | ||
9 | } | ||
diff --git a/arch/m32r/boot/setup.S b/arch/m32r/boot/setup.S deleted file mode 100644 index 5909a825e2ed..000000000000 --- a/arch/m32r/boot/setup.S +++ /dev/null | |||
@@ -1,185 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | /* | ||
3 | * linux/arch/m32r/boot/setup.S -- A setup code. | ||
4 | * | ||
5 | * Copyright (C) 2001-2005 Hiroyuki Kondo, Hirokazu Takata, | ||
6 | * Hitoshi Yamamoto, Hayato Fujiwara | ||
7 | * | ||
8 | */ | ||
9 | |||
10 | #include <linux/linkage.h> | ||
11 | #include <asm/segment.h> | ||
12 | #include <asm/page.h> | ||
13 | #include <asm/pgtable.h> | ||
14 | |||
15 | #include <asm/assembler.h> | ||
16 | #include <asm/mmu_context.h> | ||
17 | #include <asm/m32r.h> | ||
18 | |||
19 | /* | ||
20 | * References to members of the boot_cpu_data structure. | ||
21 | */ | ||
22 | |||
23 | #define CPU_PARAMS boot_cpu_data | ||
24 | #define M32R_MCICAR 0xfffffff0 | ||
25 | #define M32R_MCDCAR 0xfffffff4 | ||
26 | #define M32R_MCCR 0xfffffffc | ||
27 | #define M32R_BSCR0 0xffffffd2 | ||
28 | |||
29 | ;BSEL | ||
30 | #define BSEL0CR0 0x00ef5000 | ||
31 | #define BSEL0CR1 0x00ef5004 | ||
32 | #define BSEL1CR0 0x00ef5100 | ||
33 | #define BSEL1CR1 0x00ef5104 | ||
34 | #define BSEL0CR0_VAL 0x00000000 | ||
35 | #define BSEL0CR1_VAL 0x01200100 | ||
36 | #define BSEL1CR0_VAL 0x01018000 | ||
37 | #define BSEL1CR1_VAL 0x00200001 | ||
38 | |||
39 | ;SDRAMC | ||
40 | #define SDRAMC_SDRF0 0x00ef6000 | ||
41 | #define SDRAMC_SDRF1 0x00ef6004 | ||
42 | #define SDRAMC_SDIR0 0x00ef6008 | ||
43 | #define SDRAMC_SDIR1 0x00ef600c | ||
44 | #define SDRAMC_SD0ADR 0x00ef6020 | ||
45 | #define SDRAMC_SD0ER 0x00ef6024 | ||
46 | #define SDRAMC_SD0TR 0x00ef6028 | ||
47 | #define SDRAMC_SD0MOD 0x00ef602c | ||
48 | #define SDRAMC_SD1ADR 0x00ef6040 | ||
49 | #define SDRAMC_SD1ER 0x00ef6044 | ||
50 | #define SDRAMC_SD1TR 0x00ef6048 | ||
51 | #define SDRAMC_SD1MOD 0x00ef604c | ||
52 | #define SDRAM0 0x18000000 | ||
53 | #define SDRAM1 0x1c000000 | ||
54 | |||
55 | /*------------------------------------------------------------------------ | ||
56 | * start up | ||
57 | */ | ||
58 | |||
59 | /*------------------------------------------------------------------------ | ||
60 | * Kernel entry | ||
61 | */ | ||
62 | .section .boot, "ax" | ||
63 | ENTRY(boot) | ||
64 | |||
65 | /* Set cache mode */ | ||
66 | #if defined(CONFIG_CHIP_XNUX2) | ||
67 | ldi r0, #-2 ;LDIMM (r0, M32R_MCCR) | ||
68 | ldi r1, #0x0101 ; cache on (with invalidation) | ||
69 | ; ldi r1, #0x00 ; cache off | ||
70 | sth r1, @r0 | ||
71 | #elif defined(CONFIG_CHIP_M32700) || defined(CONFIG_CHIP_VDEC2) \ | ||
72 | || defined(CONFIG_CHIP_OPSP) | ||
73 | ldi r0, #-4 ;LDIMM (r0, M32R_MCCR) | ||
74 | ldi r1, #0x73 ; cache on (with invalidation) | ||
75 | ; ldi r1, #0x00 ; cache off | ||
76 | st r1, @r0 | ||
77 | #elif defined(CONFIG_CHIP_M32102) | ||
78 | ldi r0, #-4 ;LDIMM (r0, M32R_MCCR) | ||
79 | ldi r1, #0x101 ; cache on (with invalidation) | ||
80 | ; ldi r1, #0x00 ; cache off | ||
81 | st r1, @r0 | ||
82 | #elif defined(CONFIG_CHIP_M32104) | ||
83 | ldi r0, #-96 ; DNCR0 | ||
84 | seth r1, #0x0060 ; from 0x00600000 | ||
85 | or3 r1, r1, #0x0005 ; size 2MB | ||
86 | st r1, @r0 | ||
87 | seth r1, #0x0100 ; from 0x01000000 | ||
88 | or3 r1, r1, #0x0003 ; size 16MB | ||
89 | st r1, @+r0 | ||
90 | seth r1, #0x0200 ; from 0x02000000 | ||
91 | or3 r1, r1, #0x0002 ; size 32MB | ||
92 | st r1, @+r0 | ||
93 | ldi r0, #-4 ;LDIMM (r0, M32R_MCCR) | ||
94 | ldi r1, #0x703 ; cache on (with invalidation) | ||
95 | st r1, @r0 | ||
96 | #else | ||
97 | #error unknown chip configuration | ||
98 | #endif | ||
99 | |||
100 | #ifdef CONFIG_SMP | ||
101 | ;; if not BSP (CPU#0) goto AP_loop | ||
102 | seth r5, #shigh(M32R_CPUID_PORTL) | ||
103 | ld r5, @(low(M32R_CPUID_PORTL), r5) | ||
104 | bnez r5, AP_loop | ||
105 | #if !defined(CONFIG_PLAT_USRV) | ||
106 | ;; boot AP | ||
107 | ld24 r5, #0xeff2f8 ; IPICR7 | ||
108 | ldi r6, #0x2 ; IPI to CPU1 | ||
109 | st r6, @r5 | ||
110 | #endif | ||
111 | #endif | ||
112 | |||
113 | /* | ||
114 | * Now, Jump to stext | ||
115 | * if with MMU, TLB on. | ||
116 | * if with no MMU, only jump. | ||
117 | */ | ||
118 | .global eit_vector | ||
119 | mmu_on: | ||
120 | LDIMM (r13, stext) | ||
121 | #ifdef CONFIG_MMU | ||
122 | bl init_tlb | ||
123 | LDIMM (r2, eit_vector) ; set EVB(cr5) | ||
124 | mvtc r2, cr5 | ||
125 | seth r0, #high(MMU_REG_BASE) ; Set MMU_REG_BASE higher | ||
126 | or3 r0, r0, #low(MMU_REG_BASE) ; Set MMU_REG_BASE lower | ||
127 | ldi r1, #0x01 | ||
128 | st r1, @(MATM_offset,r0) ; Set MATM (T bit ON) | ||
129 | ld r0, @(MATM_offset,r0) ; Check | ||
130 | #else | ||
131 | #if defined(CONFIG_CHIP_M32700) | ||
132 | seth r0,#high(M32R_MCDCAR) | ||
133 | or3 r0,r0,#low(M32R_MCDCAR) | ||
134 | ld24 r1,#0x8080 | ||
135 | st r1,@r0 | ||
136 | #elif defined(CONFIG_CHIP_M32104) | ||
137 | LDIMM (r2, eit_vector) ; set EVB(cr5) | ||
138 | mvtc r2, cr5 | ||
139 | #endif | ||
140 | #endif /* CONFIG_MMU */ | ||
141 | jmp r13 | ||
142 | nop | ||
143 | nop | ||
144 | |||
145 | #ifdef CONFIG_SMP | ||
146 | /* | ||
147 | * AP wait loop | ||
148 | */ | ||
149 | ENTRY(AP_loop) | ||
150 | ;; disable interrupt | ||
151 | clrpsw #0x40 | ||
152 | ;; reset EVB | ||
153 | LDIMM (r4, _AP_RE) | ||
154 | seth r5, #high(__PAGE_OFFSET) | ||
155 | or3 r5, r5, #low(__PAGE_OFFSET) | ||
156 | not r5, r5 | ||
157 | and r4, r5 | ||
158 | mvtc r4, cr5 | ||
159 | ;; disable maskable interrupt | ||
160 | seth r4, #high(M32R_ICU_IMASK_PORTL) | ||
161 | or3 r4, r4, #low(M32R_ICU_IMASK_PORTL) | ||
162 | ldi r5, #0 | ||
163 | st r5, @r4 | ||
164 | ld r5, @r4 | ||
165 | ;; enable only IPI | ||
166 | setpsw #0x40 | ||
167 | ;; LOOOOOOOOOOOOOOP!!! | ||
168 | .fillinsn | ||
169 | 2: | ||
170 | nop | ||
171 | nop | ||
172 | bra 2b | ||
173 | nop | ||
174 | nop | ||
175 | |||
176 | #ifdef CONFIG_CHIP_M32700_TS1 | ||
177 | .global dcache_dummy | ||
178 | .balign 16, 0 | ||
179 | dcache_dummy: | ||
180 | .byte 16 | ||
181 | #endif /* CONFIG_CHIP_M32700_TS1 */ | ||
182 | #endif /* CONFIG_SMP */ | ||
183 | |||
184 | .end | ||
185 | |||
diff --git a/arch/m32r/configs/m32104ut_defconfig b/arch/m32r/configs/m32104ut_defconfig deleted file mode 100644 index 4aa42acbd512..000000000000 --- a/arch/m32r/configs/m32104ut_defconfig +++ /dev/null | |||
@@ -1,144 +0,0 @@ | |||
1 | CONFIG_SYSVIPC=y | ||
2 | CONFIG_IKCONFIG=y | ||
3 | CONFIG_IKCONFIG_PROC=y | ||
4 | CONFIG_LOG_BUF_SHIFT=14 | ||
5 | CONFIG_SLAB=y | ||
6 | CONFIG_PROFILING=y | ||
7 | CONFIG_OPROFILE=m | ||
8 | CONFIG_MODULES=y | ||
9 | CONFIG_MODULE_UNLOAD=y | ||
10 | CONFIG_MODULE_FORCE_UNLOAD=y | ||
11 | # CONFIG_BLK_DEV_BSG is not set | ||
12 | CONFIG_PLAT_M32104UT=y | ||
13 | CONFIG_CHIP_M32104=y | ||
14 | CONFIG_MEMORY_START=0x04000000 | ||
15 | CONFIG_MEMORY_SIZE=0x01000000 | ||
16 | CONFIG_IRAM_START=0x00700000 | ||
17 | CONFIG_IRAM_SIZE=0x00010000 | ||
18 | CONFIG_PREEMPT=y | ||
19 | CONFIG_BINFMT_MISC=y | ||
20 | CONFIG_NET=y | ||
21 | CONFIG_PACKET=y | ||
22 | CONFIG_UNIX=y | ||
23 | CONFIG_INET=y | ||
24 | # CONFIG_IPV6 is not set | ||
25 | CONFIG_NETFILTER=y | ||
26 | CONFIG_NETFILTER_NETLINK_QUEUE=m | ||
27 | CONFIG_NETFILTER_NETLINK_LOG=m | ||
28 | CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m | ||
29 | CONFIG_NETFILTER_XT_TARGET_MARK=m | ||
30 | CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m | ||
31 | CONFIG_NETFILTER_XT_MATCH_COMMENT=m | ||
32 | CONFIG_NETFILTER_XT_MATCH_DCCP=m | ||
33 | CONFIG_NETFILTER_XT_MATCH_LENGTH=m | ||
34 | CONFIG_NETFILTER_XT_MATCH_LIMIT=m | ||
35 | CONFIG_NETFILTER_XT_MATCH_MAC=m | ||
36 | CONFIG_NETFILTER_XT_MATCH_MARK=m | ||
37 | CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m | ||
38 | CONFIG_NETFILTER_XT_MATCH_REALM=m | ||
39 | CONFIG_NETFILTER_XT_MATCH_SCTP=m | ||
40 | CONFIG_NETFILTER_XT_MATCH_STRING=m | ||
41 | CONFIG_NETFILTER_XT_MATCH_TCPMSS=m | ||
42 | CONFIG_IP_NF_IPTABLES=m | ||
43 | CONFIG_IP_NF_MATCH_ADDRTYPE=m | ||
44 | CONFIG_IP_NF_MATCH_ECN=m | ||
45 | CONFIG_IP_NF_MATCH_TTL=m | ||
46 | CONFIG_IP_NF_FILTER=m | ||
47 | CONFIG_IP_NF_TARGET_REJECT=m | ||
48 | CONFIG_IP_NF_TARGET_LOG=m | ||
49 | CONFIG_IP_NF_MANGLE=m | ||
50 | CONFIG_IP_NF_TARGET_ECN=m | ||
51 | CONFIG_IP_NF_TARGET_TTL=m | ||
52 | CONFIG_IP_NF_RAW=m | ||
53 | CONFIG_IP_NF_ARPTABLES=m | ||
54 | CONFIG_IP_NF_ARPFILTER=m | ||
55 | CONFIG_IP_NF_ARP_MANGLE=m | ||
56 | CONFIG_PARPORT=m | ||
57 | CONFIG_PARPORT_1284=y | ||
58 | CONFIG_BLK_DEV_LOOP=y | ||
59 | CONFIG_BLK_DEV_NBD=m | ||
60 | CONFIG_CDROM_PKTCDVD=m | ||
61 | CONFIG_CDROM_PKTCDVD_WCACHE=y | ||
62 | CONFIG_IDE=y | ||
63 | CONFIG_BLK_DEV_IDECD=y | ||
64 | CONFIG_IDE_GENERIC=y | ||
65 | CONFIG_SCSI=y | ||
66 | CONFIG_BLK_DEV_SD=y | ||
67 | CONFIG_CHR_DEV_ST=m | ||
68 | CONFIG_BLK_DEV_SR=m | ||
69 | CONFIG_CHR_DEV_SG=m | ||
70 | CONFIG_SCSI_MULTI_LUN=y | ||
71 | CONFIG_SCSI_CONSTANTS=y | ||
72 | CONFIG_SCSI_SPI_ATTRS=y | ||
73 | CONFIG_MD=y | ||
74 | CONFIG_BLK_DEV_MD=y | ||
75 | CONFIG_MD_RAID1=y | ||
76 | CONFIG_BLK_DEV_DM=m | ||
77 | CONFIG_DM_CRYPT=m | ||
78 | CONFIG_DM_SNAPSHOT=m | ||
79 | CONFIG_NETDEVICES=y | ||
80 | CONFIG_DUMMY=m | ||
81 | CONFIG_NET_ETHERNET=y | ||
82 | CONFIG_MII=y | ||
83 | CONFIG_NE2000=m | ||
84 | CONFIG_SERIAL_8250=m | ||
85 | # CONFIG_HW_RANDOM is not set | ||
86 | CONFIG_I2C=m | ||
87 | CONFIG_I2C_CHARDEV=m | ||
88 | CONFIG_SENSORS_ADM1021=m | ||
89 | CONFIG_SENSORS_ADM1025=m | ||
90 | CONFIG_SENSORS_ADM1031=m | ||
91 | CONFIG_SENSORS_DS1621=m | ||
92 | CONFIG_SENSORS_GL518SM=m | ||
93 | CONFIG_SENSORS_IT87=m | ||
94 | CONFIG_SENSORS_LM75=m | ||
95 | CONFIG_SENSORS_LM77=m | ||
96 | CONFIG_SENSORS_LM78=m | ||
97 | CONFIG_SENSORS_LM80=m | ||
98 | CONFIG_SENSORS_LM83=m | ||
99 | CONFIG_SENSORS_LM85=m | ||
100 | CONFIG_SENSORS_LM90=m | ||
101 | CONFIG_SENSORS_MAX1619=m | ||
102 | CONFIG_SENSORS_SMSC47M1=m | ||
103 | CONFIG_SENSORS_W83781D=m | ||
104 | CONFIG_SENSORS_W83L785TS=m | ||
105 | CONFIG_SENSORS_W83627HF=m | ||
106 | CONFIG_EXT2_FS=y | ||
107 | CONFIG_EXT2_FS_XATTR=y | ||
108 | CONFIG_EXT2_FS_POSIX_ACL=y | ||
109 | CONFIG_EXT2_FS_SECURITY=y | ||
110 | CONFIG_EXT3_FS=y | ||
111 | CONFIG_EXT3_FS_POSIX_ACL=y | ||
112 | CONFIG_EXT3_FS_SECURITY=y | ||
113 | CONFIG_ISO9660_FS=y | ||
114 | CONFIG_JOLIET=y | ||
115 | CONFIG_UDF_FS=m | ||
116 | CONFIG_MSDOS_FS=y | ||
117 | CONFIG_VFAT_FS=y | ||
118 | CONFIG_CONFIGFS_FS=m | ||
119 | CONFIG_ROMFS_FS=y | ||
120 | CONFIG_NFS_FS=y | ||
121 | CONFIG_NFS_V3=y | ||
122 | CONFIG_NFSD=m | ||
123 | CONFIG_NFSD_V3=y | ||
124 | CONFIG_NLS_DEFAULT="cp437" | ||
125 | CONFIG_NLS_CODEPAGE_437=y | ||
126 | CONFIG_NLS_CODEPAGE_932=y | ||
127 | CONFIG_NLS_ISO8859_1=y | ||
128 | CONFIG_CRYPTO_NULL=m | ||
129 | CONFIG_CRYPTO_ECB=m | ||
130 | CONFIG_CRYPTO_PCBC=m | ||
131 | CONFIG_CRYPTO_HMAC=y | ||
132 | CONFIG_CRYPTO_MD4=m | ||
133 | CONFIG_CRYPTO_MD5=m | ||
134 | CONFIG_CRYPTO_SHA1=m | ||
135 | CONFIG_CRYPTO_SHA256=m | ||
136 | CONFIG_CRYPTO_SHA512=m | ||
137 | CONFIG_CRYPTO_WP512=m | ||
138 | CONFIG_CRYPTO_BLOWFISH=m | ||
139 | CONFIG_CRYPTO_DES=m | ||
140 | CONFIG_CRYPTO_SERPENT=m | ||
141 | CONFIG_CRYPTO_TWOFISH=m | ||
142 | CONFIG_CRC_CCITT=m | ||
143 | CONFIG_CRC16=m | ||
144 | CONFIG_LIBCRC32C=m | ||
diff --git a/arch/m32r/configs/m32700ut.smp_defconfig b/arch/m32r/configs/m32700ut.smp_defconfig deleted file mode 100644 index 41a0495b65df..000000000000 --- a/arch/m32r/configs/m32700ut.smp_defconfig +++ /dev/null | |||
@@ -1,85 +0,0 @@ | |||
1 | CONFIG_SYSVIPC=y | ||
2 | CONFIG_BSD_PROCESS_ACCT=y | ||
3 | CONFIG_IKCONFIG=y | ||
4 | CONFIG_IKCONFIG_PROC=y | ||
5 | CONFIG_LOG_BUF_SHIFT=15 | ||
6 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | ||
7 | CONFIG_EXPERT=y | ||
8 | # CONFIG_KALLSYMS is not set | ||
9 | # CONFIG_FUTEX is not set | ||
10 | # CONFIG_EPOLL is not set | ||
11 | CONFIG_SLAB=y | ||
12 | CONFIG_PROFILING=y | ||
13 | CONFIG_OPROFILE=y | ||
14 | CONFIG_MODULES=y | ||
15 | CONFIG_MODULE_UNLOAD=y | ||
16 | # CONFIG_BLK_DEV_BSG is not set | ||
17 | CONFIG_PLAT_M32700UT=y | ||
18 | CONFIG_MEMORY_START=0x08000000 | ||
19 | CONFIG_MEMORY_SIZE=0x01000000 | ||
20 | CONFIG_IRAM_START=0x00f00000 | ||
21 | CONFIG_IRAM_SIZE=0x00080000 | ||
22 | CONFIG_PREEMPT=y | ||
23 | CONFIG_SMP=y | ||
24 | CONFIG_NET=y | ||
25 | CONFIG_PACKET=y | ||
26 | CONFIG_UNIX=y | ||
27 | CONFIG_INET=y | ||
28 | CONFIG_IP_PNP=y | ||
29 | CONFIG_IP_PNP_DHCP=y | ||
30 | # CONFIG_IPV6 is not set | ||
31 | CONFIG_MTD=y | ||
32 | CONFIG_MTD_REDBOOT_PARTS=y | ||
33 | CONFIG_MTD_BLOCK=y | ||
34 | CONFIG_MTD_CFI=m | ||
35 | CONFIG_MTD_JEDECPROBE=m | ||
36 | CONFIG_MTD_CFI_ADV_OPTIONS=y | ||
37 | CONFIG_MTD_CFI_BE_BYTE_SWAP=y | ||
38 | CONFIG_MTD_CFI_GEOMETRY=y | ||
39 | # CONFIG_MTD_CFI_I2 is not set | ||
40 | CONFIG_MTD_CFI_AMDSTD=m | ||
41 | CONFIG_BLK_DEV_LOOP=y | ||
42 | CONFIG_BLK_DEV_NBD=y | ||
43 | CONFIG_BLK_DEV_RAM=y | ||
44 | CONFIG_ATA_OVER_ETH=m | ||
45 | CONFIG_IDE=y | ||
46 | CONFIG_BLK_DEV_IDECD=m | ||
47 | CONFIG_IDE_GENERIC=y | ||
48 | CONFIG_SCSI=m | ||
49 | CONFIG_BLK_DEV_SD=m | ||
50 | CONFIG_BLK_DEV_SR=m | ||
51 | CONFIG_CHR_DEV_SG=m | ||
52 | CONFIG_SCSI_MULTI_LUN=y | ||
53 | CONFIG_NETDEVICES=y | ||
54 | CONFIG_NET_ETHERNET=y | ||
55 | CONFIG_SMC91X=y | ||
56 | # CONFIG_INPUT_MOUSEDEV is not set | ||
57 | # CONFIG_INPUT_KEYBOARD is not set | ||
58 | # CONFIG_INPUT_MOUSE is not set | ||
59 | # CONFIG_SERIO_I8042 is not set | ||
60 | CONFIG_SERIAL_M32R_SIO_CONSOLE=y | ||
61 | CONFIG_SERIAL_M32R_PLDSIO=y | ||
62 | CONFIG_HW_RANDOM=y | ||
63 | CONFIG_DS1302=y | ||
64 | CONFIG_FB=y | ||
65 | CONFIG_FIRMWARE_EDID=y | ||
66 | CONFIG_FB_S1D13XXX=y | ||
67 | # CONFIG_VGA_CONSOLE is not set | ||
68 | CONFIG_FRAMEBUFFER_CONSOLE=y | ||
69 | CONFIG_LOGO=y | ||
70 | CONFIG_MMC=y | ||
71 | CONFIG_MMC_DEBUG=y | ||
72 | CONFIG_EXT2_FS=y | ||
73 | CONFIG_EXT3_FS=y | ||
74 | CONFIG_REISERFS_FS=m | ||
75 | CONFIG_ISO9660_FS=m | ||
76 | CONFIG_JOLIET=y | ||
77 | CONFIG_UDF_FS=m | ||
78 | CONFIG_MSDOS_FS=m | ||
79 | CONFIG_VFAT_FS=m | ||
80 | CONFIG_PROC_KCORE=y | ||
81 | CONFIG_TMPFS=y | ||
82 | CONFIG_NFS_FS=y | ||
83 | CONFIG_NFS_V3=y | ||
84 | CONFIG_ROOT_NFS=y | ||
85 | CONFIG_NLS=y | ||
diff --git a/arch/m32r/configs/m32700ut.up_defconfig b/arch/m32r/configs/m32700ut.up_defconfig deleted file mode 100644 index 20078a866f45..000000000000 --- a/arch/m32r/configs/m32700ut.up_defconfig +++ /dev/null | |||
@@ -1,84 +0,0 @@ | |||
1 | CONFIG_SYSVIPC=y | ||
2 | CONFIG_BSD_PROCESS_ACCT=y | ||
3 | CONFIG_IKCONFIG=y | ||
4 | CONFIG_IKCONFIG_PROC=y | ||
5 | CONFIG_LOG_BUF_SHIFT=14 | ||
6 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | ||
7 | CONFIG_EXPERT=y | ||
8 | # CONFIG_KALLSYMS is not set | ||
9 | # CONFIG_FUTEX is not set | ||
10 | # CONFIG_EPOLL is not set | ||
11 | CONFIG_SLAB=y | ||
12 | CONFIG_PROFILING=y | ||
13 | CONFIG_OPROFILE=y | ||
14 | CONFIG_MODULES=y | ||
15 | CONFIG_MODULE_UNLOAD=y | ||
16 | # CONFIG_BLK_DEV_BSG is not set | ||
17 | CONFIG_PLAT_M32700UT=y | ||
18 | CONFIG_MEMORY_START=0x08000000 | ||
19 | CONFIG_MEMORY_SIZE=0x01000000 | ||
20 | CONFIG_IRAM_START=0x00f00000 | ||
21 | CONFIG_IRAM_SIZE=0x00080000 | ||
22 | CONFIG_PREEMPT=y | ||
23 | CONFIG_NET=y | ||
24 | CONFIG_PACKET=y | ||
25 | CONFIG_UNIX=y | ||
26 | CONFIG_INET=y | ||
27 | CONFIG_IP_PNP=y | ||
28 | CONFIG_IP_PNP_DHCP=y | ||
29 | # CONFIG_IPV6 is not set | ||
30 | CONFIG_MTD=y | ||
31 | CONFIG_MTD_REDBOOT_PARTS=y | ||
32 | CONFIG_MTD_BLOCK=y | ||
33 | CONFIG_MTD_CFI=m | ||
34 | CONFIG_MTD_JEDECPROBE=m | ||
35 | CONFIG_MTD_CFI_ADV_OPTIONS=y | ||
36 | CONFIG_MTD_CFI_BE_BYTE_SWAP=y | ||
37 | CONFIG_MTD_CFI_GEOMETRY=y | ||
38 | # CONFIG_MTD_CFI_I2 is not set | ||
39 | CONFIG_MTD_CFI_AMDSTD=m | ||
40 | CONFIG_BLK_DEV_LOOP=y | ||
41 | CONFIG_BLK_DEV_NBD=y | ||
42 | CONFIG_BLK_DEV_RAM=y | ||
43 | CONFIG_ATA_OVER_ETH=m | ||
44 | CONFIG_IDE=y | ||
45 | CONFIG_BLK_DEV_IDECD=m | ||
46 | CONFIG_IDE_GENERIC=y | ||
47 | CONFIG_SCSI=m | ||
48 | CONFIG_BLK_DEV_SD=m | ||
49 | CONFIG_BLK_DEV_SR=m | ||
50 | CONFIG_CHR_DEV_SG=m | ||
51 | CONFIG_SCSI_MULTI_LUN=y | ||
52 | CONFIG_NETDEVICES=y | ||
53 | CONFIG_NET_ETHERNET=y | ||
54 | CONFIG_SMC91X=y | ||
55 | # CONFIG_INPUT_MOUSEDEV is not set | ||
56 | # CONFIG_INPUT_KEYBOARD is not set | ||
57 | # CONFIG_INPUT_MOUSE is not set | ||
58 | # CONFIG_SERIO_I8042 is not set | ||
59 | CONFIG_SERIAL_M32R_SIO_CONSOLE=y | ||
60 | CONFIG_SERIAL_M32R_PLDSIO=y | ||
61 | CONFIG_HW_RANDOM=y | ||
62 | CONFIG_DS1302=y | ||
63 | CONFIG_FB=y | ||
64 | CONFIG_FIRMWARE_EDID=y | ||
65 | CONFIG_FB_S1D13XXX=y | ||
66 | # CONFIG_VGA_CONSOLE is not set | ||
67 | CONFIG_FRAMEBUFFER_CONSOLE=y | ||
68 | CONFIG_LOGO=y | ||
69 | CONFIG_MMC=y | ||
70 | CONFIG_MMC_DEBUG=y | ||
71 | CONFIG_EXT2_FS=y | ||
72 | CONFIG_EXT3_FS=y | ||
73 | CONFIG_REISERFS_FS=m | ||
74 | CONFIG_ISO9660_FS=m | ||
75 | CONFIG_JOLIET=y | ||
76 | CONFIG_UDF_FS=m | ||
77 | CONFIG_MSDOS_FS=m | ||
78 | CONFIG_VFAT_FS=m | ||
79 | CONFIG_PROC_KCORE=y | ||
80 | CONFIG_TMPFS=y | ||
81 | CONFIG_NFS_FS=y | ||
82 | CONFIG_NFS_V3=y | ||
83 | CONFIG_ROOT_NFS=y | ||
84 | CONFIG_NLS=y | ||
diff --git a/arch/m32r/configs/mappi.nommu_defconfig b/arch/m32r/configs/mappi.nommu_defconfig deleted file mode 100644 index 4bf3820e054a..000000000000 --- a/arch/m32r/configs/mappi.nommu_defconfig +++ /dev/null | |||
@@ -1,46 +0,0 @@ | |||
1 | CONFIG_BSD_PROCESS_ACCT=y | ||
2 | CONFIG_IKCONFIG=y | ||
3 | CONFIG_LOG_BUF_SHIFT=14 | ||
4 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | ||
5 | CONFIG_EXPERT=y | ||
6 | # CONFIG_KALLSYMS is not set | ||
7 | # CONFIG_FUTEX is not set | ||
8 | # CONFIG_EPOLL is not set | ||
9 | CONFIG_SLAB=y | ||
10 | CONFIG_MODULES=y | ||
11 | CONFIG_MODULE_UNLOAD=y | ||
12 | # CONFIG_BLK_DEV_BSG is not set | ||
13 | # CONFIG_MMU is not set | ||
14 | CONFIG_BUS_CLOCK=50000000 | ||
15 | CONFIG_MEMORY_START=0x00000000 | ||
16 | CONFIG_MEMORY_SIZE=0x00E00000 | ||
17 | CONFIG_IRAM_START=0x00f00000 | ||
18 | CONFIG_IRAM_SIZE=0x00080000 | ||
19 | CONFIG_PREEMPT=y | ||
20 | CONFIG_PCCARD=y | ||
21 | CONFIG_M32R_PCC=y | ||
22 | CONFIG_BINFMT_FLAT=y | ||
23 | CONFIG_NET=y | ||
24 | CONFIG_PACKET=y | ||
25 | CONFIG_UNIX=y | ||
26 | CONFIG_INET=y | ||
27 | CONFIG_IP_PNP=y | ||
28 | CONFIG_IP_PNP_DHCP=y | ||
29 | # CONFIG_IPV6 is not set | ||
30 | CONFIG_BLK_DEV_LOOP=y | ||
31 | CONFIG_BLK_DEV_NBD=y | ||
32 | CONFIG_BLK_DEV_RAM=y | ||
33 | CONFIG_NETDEVICES=y | ||
34 | # CONFIG_INPUT_MOUSEDEV is not set | ||
35 | # CONFIG_INPUT_KEYBOARD is not set | ||
36 | # CONFIG_INPUT_MOUSE is not set | ||
37 | # CONFIG_SERIO_I8042 is not set | ||
38 | # CONFIG_VT is not set | ||
39 | CONFIG_SERIAL_M32R_SIO_CONSOLE=y | ||
40 | CONFIG_HW_RANDOM=y | ||
41 | CONFIG_EXT2_FS=y | ||
42 | CONFIG_EXT3_FS=y | ||
43 | CONFIG_NFS_FS=y | ||
44 | CONFIG_NFS_V3=y | ||
45 | CONFIG_ROOT_NFS=y | ||
46 | CONFIG_NLS=y | ||
diff --git a/arch/m32r/configs/mappi.smp_defconfig b/arch/m32r/configs/mappi.smp_defconfig deleted file mode 100644 index f9ed7bdbf4de..000000000000 --- a/arch/m32r/configs/mappi.smp_defconfig +++ /dev/null | |||
@@ -1,62 +0,0 @@ | |||
1 | CONFIG_SYSVIPC=y | ||
2 | CONFIG_IKCONFIG=y | ||
3 | CONFIG_IKCONFIG_PROC=y | ||
4 | CONFIG_LOG_BUF_SHIFT=15 | ||
5 | CONFIG_BLK_DEV_INITRD=y | ||
6 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | ||
7 | CONFIG_EXPERT=y | ||
8 | # CONFIG_KALLSYMS is not set | ||
9 | # CONFIG_FUTEX is not set | ||
10 | # CONFIG_EPOLL is not set | ||
11 | CONFIG_SLAB=y | ||
12 | CONFIG_MODULES=y | ||
13 | CONFIG_MODULE_UNLOAD=y | ||
14 | # CONFIG_BLK_DEV_BSG is not set | ||
15 | CONFIG_BUS_CLOCK=10000000 | ||
16 | CONFIG_MEMORY_START=0x08000000 | ||
17 | CONFIG_MEMORY_SIZE=0x04000000 | ||
18 | CONFIG_IRAM_START=0x00f00000 | ||
19 | CONFIG_IRAM_SIZE=0x00080000 | ||
20 | CONFIG_PREEMPT=y | ||
21 | CONFIG_SMP=y | ||
22 | CONFIG_CHIP_M32700_TS1=y | ||
23 | CONFIG_PCCARD=y | ||
24 | CONFIG_M32R_PCC=y | ||
25 | CONFIG_NET=y | ||
26 | CONFIG_UNIX=y | ||
27 | CONFIG_INET=y | ||
28 | CONFIG_IP_PNP=y | ||
29 | CONFIG_IP_PNP_DHCP=y | ||
30 | # CONFIG_IPV6 is not set | ||
31 | # CONFIG_STANDALONE is not set | ||
32 | CONFIG_MTD=y | ||
33 | CONFIG_MTD_REDBOOT_PARTS=y | ||
34 | CONFIG_MTD_BLOCK=y | ||
35 | CONFIG_BLK_DEV_LOOP=y | ||
36 | CONFIG_BLK_DEV_NBD=m | ||
37 | CONFIG_BLK_DEV_RAM=y | ||
38 | CONFIG_IDE=m | ||
39 | CONFIG_BLK_DEV_IDECS=m | ||
40 | CONFIG_BLK_DEV_IDECD=m | ||
41 | CONFIG_IDE_GENERIC=m | ||
42 | CONFIG_NETDEVICES=y | ||
43 | # CONFIG_INPUT_KEYBOARD is not set | ||
44 | # CONFIG_INPUT_MOUSE is not set | ||
45 | # CONFIG_SERIO_I8042 is not set | ||
46 | # CONFIG_SERIO_SERPORT is not set | ||
47 | # CONFIG_VT is not set | ||
48 | CONFIG_SERIAL_M32R_SIO_CONSOLE=y | ||
49 | CONFIG_HW_RANDOM=y | ||
50 | CONFIG_EXT2_FS=y | ||
51 | CONFIG_EXT3_FS=y | ||
52 | CONFIG_ISO9660_FS=y | ||
53 | CONFIG_MSDOS_FS=m | ||
54 | CONFIG_VFAT_FS=m | ||
55 | CONFIG_PROC_KCORE=y | ||
56 | CONFIG_TMPFS=y | ||
57 | CONFIG_JFFS2_FS=y | ||
58 | CONFIG_ROMFS_FS=y | ||
59 | CONFIG_NFS_FS=y | ||
60 | CONFIG_NFS_V3=y | ||
61 | CONFIG_ROOT_NFS=y | ||
62 | CONFIG_NLS=y | ||
diff --git a/arch/m32r/configs/mappi.up_defconfig b/arch/m32r/configs/mappi.up_defconfig deleted file mode 100644 index 289ae7421e12..000000000000 --- a/arch/m32r/configs/mappi.up_defconfig +++ /dev/null | |||
@@ -1,60 +0,0 @@ | |||
1 | CONFIG_SYSVIPC=y | ||
2 | CONFIG_IKCONFIG=y | ||
3 | CONFIG_IKCONFIG_PROC=y | ||
4 | CONFIG_LOG_BUF_SHIFT=14 | ||
5 | CONFIG_BLK_DEV_INITRD=y | ||
6 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | ||
7 | CONFIG_EXPERT=y | ||
8 | # CONFIG_KALLSYMS is not set | ||
9 | # CONFIG_FUTEX is not set | ||
10 | # CONFIG_EPOLL is not set | ||
11 | CONFIG_SLAB=y | ||
12 | CONFIG_MODULES=y | ||
13 | CONFIG_MODULE_UNLOAD=y | ||
14 | # CONFIG_BLK_DEV_BSG is not set | ||
15 | CONFIG_BUS_CLOCK=10000000 | ||
16 | CONFIG_MEMORY_START=0x08000000 | ||
17 | CONFIG_MEMORY_SIZE=0x04000000 | ||
18 | CONFIG_IRAM_START=0x00f00000 | ||
19 | CONFIG_IRAM_SIZE=0x00080000 | ||
20 | CONFIG_PREEMPT=y | ||
21 | CONFIG_PCCARD=y | ||
22 | CONFIG_M32R_PCC=y | ||
23 | CONFIG_NET=y | ||
24 | CONFIG_UNIX=y | ||
25 | CONFIG_INET=y | ||
26 | CONFIG_IP_PNP=y | ||
27 | CONFIG_IP_PNP_DHCP=y | ||
28 | # CONFIG_IPV6 is not set | ||
29 | # CONFIG_STANDALONE is not set | ||
30 | CONFIG_MTD=y | ||
31 | CONFIG_MTD_REDBOOT_PARTS=y | ||
32 | CONFIG_MTD_BLOCK=y | ||
33 | CONFIG_BLK_DEV_LOOP=y | ||
34 | CONFIG_BLK_DEV_NBD=m | ||
35 | CONFIG_BLK_DEV_RAM=y | ||
36 | CONFIG_IDE=m | ||
37 | CONFIG_BLK_DEV_IDECS=m | ||
38 | CONFIG_BLK_DEV_IDECD=m | ||
39 | CONFIG_IDE_GENERIC=m | ||
40 | CONFIG_NETDEVICES=y | ||
41 | # CONFIG_INPUT_KEYBOARD is not set | ||
42 | # CONFIG_INPUT_MOUSE is not set | ||
43 | # CONFIG_SERIO_I8042 is not set | ||
44 | # CONFIG_SERIO_SERPORT is not set | ||
45 | # CONFIG_VT is not set | ||
46 | CONFIG_SERIAL_M32R_SIO_CONSOLE=y | ||
47 | CONFIG_HW_RANDOM=y | ||
48 | CONFIG_EXT2_FS=y | ||
49 | CONFIG_EXT3_FS=y | ||
50 | CONFIG_ISO9660_FS=y | ||
51 | CONFIG_MSDOS_FS=m | ||
52 | CONFIG_VFAT_FS=m | ||
53 | CONFIG_PROC_KCORE=y | ||
54 | CONFIG_TMPFS=y | ||
55 | CONFIG_JFFS2_FS=y | ||
56 | CONFIG_ROMFS_FS=y | ||
57 | CONFIG_NFS_FS=y | ||
58 | CONFIG_NFS_V3=y | ||
59 | CONFIG_ROOT_NFS=y | ||
60 | CONFIG_NLS=y | ||
diff --git a/arch/m32r/configs/mappi2.opsp_defconfig b/arch/m32r/configs/mappi2.opsp_defconfig deleted file mode 100644 index 2852f6e7e246..000000000000 --- a/arch/m32r/configs/mappi2.opsp_defconfig +++ /dev/null | |||
@@ -1,65 +0,0 @@ | |||
1 | CONFIG_SYSVIPC=y | ||
2 | CONFIG_BSD_PROCESS_ACCT=y | ||
3 | CONFIG_IKCONFIG=y | ||
4 | CONFIG_LOG_BUF_SHIFT=14 | ||
5 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | ||
6 | CONFIG_EXPERT=y | ||
7 | # CONFIG_KALLSYMS is not set | ||
8 | # CONFIG_FUTEX is not set | ||
9 | # CONFIG_EPOLL is not set | ||
10 | CONFIG_SLAB=y | ||
11 | CONFIG_MODULES=y | ||
12 | CONFIG_MODULE_UNLOAD=y | ||
13 | # CONFIG_BLK_DEV_BSG is not set | ||
14 | CONFIG_PLAT_MAPPI2=y | ||
15 | CONFIG_CHIP_OPSP=y | ||
16 | CONFIG_TLB_ENTRIES=16 | ||
17 | CONFIG_BUS_CLOCK=50000000 | ||
18 | CONFIG_MEMORY_START=0x08000000 | ||
19 | CONFIG_MEMORY_SIZE=0x01000000 | ||
20 | CONFIG_IRAM_START=0x00f00000 | ||
21 | CONFIG_IRAM_SIZE=0x00008000 | ||
22 | CONFIG_PREEMPT=y | ||
23 | CONFIG_PCCARD=y | ||
24 | CONFIG_NET=y | ||
25 | CONFIG_PACKET=y | ||
26 | CONFIG_UNIX=y | ||
27 | CONFIG_INET=y | ||
28 | CONFIG_IP_PNP=y | ||
29 | CONFIG_IP_PNP_DHCP=y | ||
30 | # CONFIG_IPV6 is not set | ||
31 | CONFIG_BLK_DEV_LOOP=y | ||
32 | CONFIG_BLK_DEV_NBD=y | ||
33 | CONFIG_BLK_DEV_RAM=y | ||
34 | CONFIG_IDE=y | ||
35 | CONFIG_BLK_DEV_IDECS=y | ||
36 | CONFIG_BLK_DEV_IDECD=m | ||
37 | CONFIG_IDE_GENERIC=y | ||
38 | CONFIG_SCSI=m | ||
39 | CONFIG_BLK_DEV_SD=m | ||
40 | CONFIG_BLK_DEV_SR=m | ||
41 | CONFIG_CHR_DEV_SG=m | ||
42 | CONFIG_SCSI_MULTI_LUN=y | ||
43 | CONFIG_NETDEVICES=y | ||
44 | CONFIG_NET_ETHERNET=y | ||
45 | CONFIG_SMC91X=y | ||
46 | # CONFIG_INPUT_MOUSEDEV is not set | ||
47 | # CONFIG_INPUT_KEYBOARD is not set | ||
48 | # CONFIG_INPUT_MOUSE is not set | ||
49 | # CONFIG_SERIO_I8042 is not set | ||
50 | CONFIG_SERIAL_M32R_SIO_CONSOLE=y | ||
51 | CONFIG_HW_RANDOM=y | ||
52 | # CONFIG_VGA_CONSOLE is not set | ||
53 | CONFIG_EXT2_FS=y | ||
54 | CONFIG_EXT3_FS=y | ||
55 | CONFIG_ISO9660_FS=m | ||
56 | CONFIG_JOLIET=y | ||
57 | CONFIG_UDF_FS=m | ||
58 | CONFIG_MSDOS_FS=m | ||
59 | CONFIG_VFAT_FS=m | ||
60 | CONFIG_PROC_KCORE=y | ||
61 | CONFIG_TMPFS=y | ||
62 | CONFIG_NFS_FS=y | ||
63 | CONFIG_NFS_V3=y | ||
64 | CONFIG_ROOT_NFS=y | ||
65 | CONFIG_NLS=y | ||
diff --git a/arch/m32r/configs/mappi2.vdec2_defconfig b/arch/m32r/configs/mappi2.vdec2_defconfig deleted file mode 100644 index 8da4dbad8510..000000000000 --- a/arch/m32r/configs/mappi2.vdec2_defconfig +++ /dev/null | |||
@@ -1,64 +0,0 @@ | |||
1 | CONFIG_SYSVIPC=y | ||
2 | CONFIG_BSD_PROCESS_ACCT=y | ||
3 | CONFIG_IKCONFIG=y | ||
4 | CONFIG_LOG_BUF_SHIFT=14 | ||
5 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | ||
6 | CONFIG_EXPERT=y | ||
7 | # CONFIG_KALLSYMS is not set | ||
8 | # CONFIG_FUTEX is not set | ||
9 | # CONFIG_EPOLL is not set | ||
10 | CONFIG_SLAB=y | ||
11 | CONFIG_MODULES=y | ||
12 | CONFIG_MODULE_UNLOAD=y | ||
13 | # CONFIG_BLK_DEV_BSG is not set | ||
14 | CONFIG_PLAT_MAPPI2=y | ||
15 | CONFIG_CHIP_VDEC2=y | ||
16 | CONFIG_BUS_CLOCK=50000000 | ||
17 | CONFIG_MEMORY_START=0x08000000 | ||
18 | CONFIG_MEMORY_SIZE=0x01000000 | ||
19 | CONFIG_IRAM_START=0x00f00000 | ||
20 | CONFIG_IRAM_SIZE=0x00008000 | ||
21 | CONFIG_PREEMPT=y | ||
22 | CONFIG_PCCARD=y | ||
23 | CONFIG_NET=y | ||
24 | CONFIG_PACKET=y | ||
25 | CONFIG_UNIX=y | ||
26 | CONFIG_INET=y | ||
27 | CONFIG_IP_PNP=y | ||
28 | CONFIG_IP_PNP_DHCP=y | ||
29 | # CONFIG_IPV6 is not set | ||
30 | CONFIG_BLK_DEV_LOOP=y | ||
31 | CONFIG_BLK_DEV_NBD=y | ||
32 | CONFIG_BLK_DEV_RAM=y | ||
33 | CONFIG_IDE=y | ||
34 | CONFIG_BLK_DEV_IDECS=y | ||
35 | CONFIG_BLK_DEV_IDECD=m | ||
36 | CONFIG_IDE_GENERIC=y | ||
37 | CONFIG_SCSI=m | ||
38 | CONFIG_BLK_DEV_SD=m | ||
39 | CONFIG_BLK_DEV_SR=m | ||
40 | CONFIG_CHR_DEV_SG=m | ||
41 | CONFIG_SCSI_MULTI_LUN=y | ||
42 | CONFIG_NETDEVICES=y | ||
43 | CONFIG_NET_ETHERNET=y | ||
44 | CONFIG_SMC91X=y | ||
45 | # CONFIG_INPUT_MOUSEDEV is not set | ||
46 | # CONFIG_INPUT_KEYBOARD is not set | ||
47 | # CONFIG_INPUT_MOUSE is not set | ||
48 | # CONFIG_SERIO_I8042 is not set | ||
49 | CONFIG_SERIAL_M32R_SIO_CONSOLE=y | ||
50 | CONFIG_HW_RANDOM=y | ||
51 | # CONFIG_VGA_CONSOLE is not set | ||
52 | CONFIG_EXT2_FS=y | ||
53 | CONFIG_EXT3_FS=y | ||
54 | CONFIG_ISO9660_FS=m | ||
55 | CONFIG_JOLIET=y | ||
56 | CONFIG_UDF_FS=m | ||
57 | CONFIG_MSDOS_FS=m | ||
58 | CONFIG_VFAT_FS=m | ||
59 | CONFIG_PROC_KCORE=y | ||
60 | CONFIG_TMPFS=y | ||
61 | CONFIG_NFS_FS=y | ||
62 | CONFIG_NFS_V3=y | ||
63 | CONFIG_ROOT_NFS=y | ||
64 | CONFIG_NLS=y | ||
diff --git a/arch/m32r/configs/mappi3.smp_defconfig b/arch/m32r/configs/mappi3.smp_defconfig deleted file mode 100644 index 5605b23e2faf..000000000000 --- a/arch/m32r/configs/mappi3.smp_defconfig +++ /dev/null | |||
@@ -1,62 +0,0 @@ | |||
1 | CONFIG_SYSVIPC=y | ||
2 | CONFIG_IKCONFIG=y | ||
3 | CONFIG_IKCONFIG_PROC=y | ||
4 | CONFIG_LOG_BUF_SHIFT=15 | ||
5 | CONFIG_BLK_DEV_INITRD=y | ||
6 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | ||
7 | CONFIG_EXPERT=y | ||
8 | # CONFIG_KALLSYMS is not set | ||
9 | # CONFIG_FUTEX is not set | ||
10 | # CONFIG_EPOLL is not set | ||
11 | CONFIG_SLAB=y | ||
12 | CONFIG_MODULES=y | ||
13 | CONFIG_MODULE_UNLOAD=y | ||
14 | # CONFIG_BLK_DEV_BSG is not set | ||
15 | CONFIG_PLAT_MAPPI3=y | ||
16 | CONFIG_BUS_CLOCK=10000000 | ||
17 | CONFIG_MEMORY_START=0x08000000 | ||
18 | CONFIG_MEMORY_SIZE=0x08000000 | ||
19 | CONFIG_IRAM_START=0x00f00000 | ||
20 | CONFIG_IRAM_SIZE=0x00080000 | ||
21 | CONFIG_PREEMPT=y | ||
22 | CONFIG_SMP=y | ||
23 | CONFIG_PCCARD=y | ||
24 | CONFIG_NET=y | ||
25 | CONFIG_UNIX=y | ||
26 | CONFIG_INET=y | ||
27 | CONFIG_IP_PNP=y | ||
28 | CONFIG_IP_PNP_DHCP=y | ||
29 | # CONFIG_IPV6 is not set | ||
30 | CONFIG_MTD=y | ||
31 | CONFIG_MTD_REDBOOT_PARTS=y | ||
32 | CONFIG_MTD_BLOCK=y | ||
33 | CONFIG_BLK_DEV_LOOP=y | ||
34 | CONFIG_BLK_DEV_NBD=m | ||
35 | CONFIG_BLK_DEV_RAM=y | ||
36 | CONFIG_IDE=y | ||
37 | CONFIG_BLK_DEV_IDECS=m | ||
38 | CONFIG_BLK_DEV_IDECD=m | ||
39 | CONFIG_IDE_GENERIC=y | ||
40 | CONFIG_NETDEVICES=y | ||
41 | CONFIG_NET_ETHERNET=y | ||
42 | CONFIG_SMC91X=y | ||
43 | # CONFIG_INPUT_KEYBOARD is not set | ||
44 | # CONFIG_INPUT_MOUSE is not set | ||
45 | # CONFIG_SERIO_I8042 is not set | ||
46 | # CONFIG_SERIO_SERPORT is not set | ||
47 | # CONFIG_VT is not set | ||
48 | CONFIG_SERIAL_M32R_SIO_CONSOLE=y | ||
49 | CONFIG_HW_RANDOM=y | ||
50 | CONFIG_EXT2_FS=y | ||
51 | CONFIG_EXT3_FS=y | ||
52 | CONFIG_ISO9660_FS=y | ||
53 | CONFIG_MSDOS_FS=m | ||
54 | CONFIG_VFAT_FS=m | ||
55 | CONFIG_PROC_KCORE=y | ||
56 | CONFIG_TMPFS=y | ||
57 | CONFIG_JFFS2_FS=y | ||
58 | CONFIG_ROMFS_FS=y | ||
59 | CONFIG_NFS_FS=y | ||
60 | CONFIG_NFS_V3=y | ||
61 | CONFIG_ROOT_NFS=y | ||
62 | CONFIG_NLS=y | ||
diff --git a/arch/m32r/configs/oaks32r_defconfig b/arch/m32r/configs/oaks32r_defconfig deleted file mode 100644 index 5ccab127f6ad..000000000000 --- a/arch/m32r/configs/oaks32r_defconfig +++ /dev/null | |||
@@ -1,43 +0,0 @@ | |||
1 | CONFIG_BSD_PROCESS_ACCT=y | ||
2 | CONFIG_LOG_BUF_SHIFT=14 | ||
3 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | ||
4 | CONFIG_EXPERT=y | ||
5 | # CONFIG_KALLSYMS is not set | ||
6 | # CONFIG_FUTEX is not set | ||
7 | # CONFIG_EPOLL is not set | ||
8 | CONFIG_SLAB=y | ||
9 | CONFIG_MODULES=y | ||
10 | CONFIG_MODULE_UNLOAD=y | ||
11 | # CONFIG_BLK_DEV_BSG is not set | ||
12 | CONFIG_PLAT_OAKS32R=y | ||
13 | CONFIG_CHIP_M32102=y | ||
14 | CONFIG_MEMORY_START=0x01000000 | ||
15 | CONFIG_MEMORY_SIZE=0x00800000 | ||
16 | CONFIG_IRAM_START=0x00f00000 | ||
17 | CONFIG_IRAM_SIZE=0x00010000 | ||
18 | CONFIG_PREEMPT=y | ||
19 | CONFIG_BINFMT_FLAT=y | ||
20 | CONFIG_NET=y | ||
21 | CONFIG_PACKET=y | ||
22 | CONFIG_UNIX=y | ||
23 | CONFIG_INET=y | ||
24 | CONFIG_IP_PNP=y | ||
25 | CONFIG_IP_PNP_DHCP=y | ||
26 | # CONFIG_IPV6 is not set | ||
27 | # CONFIG_FW_LOADER is not set | ||
28 | CONFIG_BLK_DEV_LOOP=y | ||
29 | CONFIG_BLK_DEV_NBD=y | ||
30 | CONFIG_BLK_DEV_RAM=y | ||
31 | CONFIG_NETDEVICES=y | ||
32 | # CONFIG_INPUT_MOUSEDEV is not set | ||
33 | # CONFIG_INPUT_KEYBOARD is not set | ||
34 | # CONFIG_INPUT_MOUSE is not set | ||
35 | # CONFIG_SERIO_I8042 is not set | ||
36 | # CONFIG_VT is not set | ||
37 | CONFIG_SERIAL_M32R_SIO_CONSOLE=y | ||
38 | CONFIG_HW_RANDOM=y | ||
39 | CONFIG_EXT2_FS=y | ||
40 | CONFIG_NFS_FS=y | ||
41 | CONFIG_NFS_V3=y | ||
42 | CONFIG_ROOT_NFS=y | ||
43 | CONFIG_NLS=y | ||
diff --git a/arch/m32r/configs/opsput_defconfig b/arch/m32r/configs/opsput_defconfig deleted file mode 100644 index 3ce1d08355e5..000000000000 --- a/arch/m32r/configs/opsput_defconfig +++ /dev/null | |||
@@ -1,63 +0,0 @@ | |||
1 | CONFIG_SYSVIPC=y | ||
2 | CONFIG_BSD_PROCESS_ACCT=y | ||
3 | CONFIG_IKCONFIG=y | ||
4 | CONFIG_LOG_BUF_SHIFT=14 | ||
5 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | ||
6 | CONFIG_EXPERT=y | ||
7 | # CONFIG_KALLSYMS is not set | ||
8 | # CONFIG_FUTEX is not set | ||
9 | # CONFIG_EPOLL is not set | ||
10 | CONFIG_SLAB=y | ||
11 | CONFIG_MODULES=y | ||
12 | CONFIG_MODULE_UNLOAD=y | ||
13 | # CONFIG_BLK_DEV_BSG is not set | ||
14 | CONFIG_PLAT_OPSPUT=y | ||
15 | CONFIG_CHIP_OPSP=y | ||
16 | CONFIG_MEMORY_START=0x08000000 | ||
17 | CONFIG_MEMORY_SIZE=0x01000000 | ||
18 | CONFIG_IRAM_START=0x00f00000 | ||
19 | CONFIG_IRAM_SIZE=0x00010000 | ||
20 | CONFIG_PCCARD=y | ||
21 | CONFIG_M32R_CFC=y | ||
22 | CONFIG_NET=y | ||
23 | CONFIG_PACKET=y | ||
24 | CONFIG_UNIX=y | ||
25 | CONFIG_INET=y | ||
26 | CONFIG_IP_PNP=y | ||
27 | CONFIG_IP_PNP_DHCP=y | ||
28 | # CONFIG_IPV6 is not set | ||
29 | CONFIG_BLK_DEV_LOOP=y | ||
30 | CONFIG_BLK_DEV_RAM=y | ||
31 | CONFIG_SCSI=m | ||
32 | CONFIG_BLK_DEV_SD=m | ||
33 | CONFIG_BLK_DEV_SR=m | ||
34 | CONFIG_CHR_DEV_SG=m | ||
35 | CONFIG_SCSI_MULTI_LUN=y | ||
36 | CONFIG_NETDEVICES=y | ||
37 | CONFIG_NET_ETHERNET=y | ||
38 | CONFIG_SMC91X=y | ||
39 | # CONFIG_INPUT_MOUSEDEV is not set | ||
40 | # CONFIG_INPUT_KEYBOARD is not set | ||
41 | # CONFIG_INPUT_MOUSE is not set | ||
42 | # CONFIG_SERIO_I8042 is not set | ||
43 | # CONFIG_VT is not set | ||
44 | CONFIG_SERIAL_M32R_SIO_CONSOLE=y | ||
45 | CONFIG_SERIAL_M32R_PLDSIO=y | ||
46 | CONFIG_HW_RANDOM=y | ||
47 | CONFIG_DS1302=y | ||
48 | CONFIG_EXT2_FS=y | ||
49 | CONFIG_EXT3_FS=y | ||
50 | CONFIG_ISO9660_FS=m | ||
51 | CONFIG_JOLIET=y | ||
52 | CONFIG_UDF_FS=m | ||
53 | CONFIG_MSDOS_FS=m | ||
54 | CONFIG_VFAT_FS=m | ||
55 | CONFIG_PROC_KCORE=y | ||
56 | CONFIG_TMPFS=y | ||
57 | CONFIG_NFS_FS=y | ||
58 | CONFIG_NFS_V3=y | ||
59 | CONFIG_ROOT_NFS=y | ||
60 | CONFIG_NLS=y | ||
61 | CONFIG_DEBUG_KERNEL=y | ||
62 | # CONFIG_DEBUG_BUGVERBOSE is not set | ||
63 | CONFIG_DEBUG_INFO=y | ||
diff --git a/arch/m32r/configs/usrv_defconfig b/arch/m32r/configs/usrv_defconfig deleted file mode 100644 index cb8c051c3d46..000000000000 --- a/arch/m32r/configs/usrv_defconfig +++ /dev/null | |||
@@ -1,78 +0,0 @@ | |||
1 | CONFIG_SYSVIPC=y | ||
2 | CONFIG_POSIX_MQUEUE=y | ||
3 | CONFIG_BSD_PROCESS_ACCT=y | ||
4 | CONFIG_LOG_BUF_SHIFT=15 | ||
5 | CONFIG_BLK_DEV_INITRD=y | ||
6 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | ||
7 | CONFIG_EXPERT=y | ||
8 | CONFIG_KALLSYMS_EXTRA_PASS=y | ||
9 | CONFIG_SLAB=y | ||
10 | CONFIG_MODULES=y | ||
11 | CONFIG_MODULE_UNLOAD=y | ||
12 | # CONFIG_BLK_DEV_BSG is not set | ||
13 | # CONFIG_IOSCHED_DEADLINE is not set | ||
14 | # CONFIG_IOSCHED_CFQ is not set | ||
15 | CONFIG_PLAT_USRV=y | ||
16 | CONFIG_BUS_CLOCK=50000000 | ||
17 | CONFIG_MEMORY_START=0x08000000 | ||
18 | CONFIG_MEMORY_SIZE=0x02000000 | ||
19 | # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set | ||
20 | CONFIG_SMP=y | ||
21 | CONFIG_PCCARD=y | ||
22 | CONFIG_M32R_CFC=y | ||
23 | CONFIG_M32R_CFC_NUM=2 | ||
24 | CONFIG_NET=y | ||
25 | CONFIG_PACKET=y | ||
26 | CONFIG_UNIX=y | ||
27 | CONFIG_XFRM_USER=y | ||
28 | CONFIG_INET=y | ||
29 | CONFIG_IP_MULTICAST=y | ||
30 | CONFIG_IP_PNP=y | ||
31 | CONFIG_INET_AH=y | ||
32 | CONFIG_INET_ESP=y | ||
33 | CONFIG_INET_IPCOMP=y | ||
34 | # CONFIG_IPV6 is not set | ||
35 | CONFIG_MTD=y | ||
36 | CONFIG_MTD_BLOCK=y | ||
37 | CONFIG_MTD_CFI=y | ||
38 | CONFIG_MTD_CFI_ADV_OPTIONS=y | ||
39 | CONFIG_MTD_CFI_BE_BYTE_SWAP=y | ||
40 | CONFIG_MTD_CFI_GEOMETRY=y | ||
41 | # CONFIG_MTD_MAP_BANK_WIDTH_1 is not set | ||
42 | # CONFIG_MTD_MAP_BANK_WIDTH_4 is not set | ||
43 | # CONFIG_MTD_CFI_I2 is not set | ||
44 | CONFIG_MTD_CFI_AMDSTD=y | ||
45 | CONFIG_MTD_RAM=y | ||
46 | CONFIG_MTD_ROM=y | ||
47 | CONFIG_BLK_DEV_LOOP=y | ||
48 | CONFIG_BLK_DEV_RAM=y | ||
49 | CONFIG_IDE=y | ||
50 | CONFIG_BLK_DEV_IDECS=y | ||
51 | CONFIG_NETDEVICES=y | ||
52 | CONFIG_NET_PCMCIA=y | ||
53 | CONFIG_PCMCIA_PCNET=y | ||
54 | # CONFIG_INPUT is not set | ||
55 | # CONFIG_SERIO is not set | ||
56 | # CONFIG_VT is not set | ||
57 | CONFIG_SERIAL_8250=y | ||
58 | CONFIG_SERIAL_8250_CONSOLE=y | ||
59 | # CONFIG_SERIAL_M32R_SIO is not set | ||
60 | # CONFIG_HWMON is not set | ||
61 | CONFIG_EXT2_FS=y | ||
62 | CONFIG_EXT3_FS=y | ||
63 | # CONFIG_EXT3_FS_XATTR is not set | ||
64 | CONFIG_PROC_KCORE=y | ||
65 | CONFIG_TMPFS=y | ||
66 | CONFIG_JFFS2_FS=y | ||
67 | CONFIG_CRAMFS=y | ||
68 | CONFIG_NFS_FS=y | ||
69 | CONFIG_NFS_V3=y | ||
70 | CONFIG_ROOT_NFS=y | ||
71 | CONFIG_DEBUG_KERNEL=y | ||
72 | CONFIG_DEBUG_INFO=y | ||
73 | CONFIG_FRAME_POINTER=y | ||
74 | CONFIG_CRYPTO_ECB=y | ||
75 | CONFIG_CRYPTO_PCBC=m | ||
76 | CONFIG_CRYPTO_MICHAEL_MIC=y | ||
77 | CONFIG_CRYPTO_AES=y | ||
78 | CONFIG_CRYPTO_ARC4=y | ||
diff --git a/arch/m32r/include/asm/Kbuild b/arch/m32r/include/asm/Kbuild deleted file mode 100644 index 985ef1d9f556..000000000000 --- a/arch/m32r/include/asm/Kbuild +++ /dev/null | |||
@@ -1,13 +0,0 @@ | |||
1 | generic-y += current.h | ||
2 | generic-y += dma-mapping.h | ||
3 | generic-y += exec.h | ||
4 | generic-y += extable.h | ||
5 | generic-y += irq_work.h | ||
6 | generic-y += kprobes.h | ||
7 | generic-y += mcs_spinlock.h | ||
8 | generic-y += mm-arch-hooks.h | ||
9 | generic-y += module.h | ||
10 | generic-y += preempt.h | ||
11 | generic-y += sections.h | ||
12 | generic-y += trace_clock.h | ||
13 | generic-y += word-at-a-time.h | ||
diff --git a/arch/m32r/include/asm/addrspace.h b/arch/m32r/include/asm/addrspace.h deleted file mode 100644 index 81782c122da4..000000000000 --- a/arch/m32r/include/asm/addrspace.h +++ /dev/null | |||
@@ -1,57 +0,0 @@ | |||
1 | /* | ||
2 | * This file is subject to the terms and conditions of the GNU General Public | ||
3 | * License. See the file "COPYING" in the main directory of this archive | ||
4 | * for more details. | ||
5 | * | ||
6 | * Copyright (C) 2001 by Hiroyuki Kondo | ||
7 | * | ||
8 | * Defitions for the address spaces of the M32R CPUs. | ||
9 | */ | ||
10 | #ifndef __ASM_M32R_ADDRSPACE_H | ||
11 | #define __ASM_M32R_ADDRSPACE_H | ||
12 | |||
13 | /* | ||
14 | * Memory segments (32bit kernel mode addresses) | ||
15 | */ | ||
16 | #define KUSEG 0x00000000 | ||
17 | #define KSEG0 0x80000000 | ||
18 | #define KSEG1 0xa0000000 | ||
19 | #define KSEG2 0xc0000000 | ||
20 | #define KSEG3 0xe0000000 | ||
21 | |||
22 | #define K0BASE KSEG0 | ||
23 | |||
24 | /* | ||
25 | * Returns the kernel segment base of a given address | ||
26 | */ | ||
27 | #ifndef __ASSEMBLY__ | ||
28 | #define KSEGX(a) (((unsigned long)(a)) & 0xe0000000) | ||
29 | #else | ||
30 | #define KSEGX(a) ((a) & 0xe0000000) | ||
31 | #endif | ||
32 | |||
33 | /* | ||
34 | * Returns the physical address of a KSEG0/KSEG1 address | ||
35 | */ | ||
36 | #ifndef __ASSEMBLY__ | ||
37 | #define PHYSADDR(a) (((unsigned long)(a)) & 0x1fffffff) | ||
38 | #else | ||
39 | #define PHYSADDR(a) ((a) & 0x1fffffff) | ||
40 | #endif | ||
41 | |||
42 | /* | ||
43 | * Map an address to a certain kernel segment | ||
44 | */ | ||
45 | #ifndef __ASSEMBLY__ | ||
46 | #define KSEG0ADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | KSEG0)) | ||
47 | #define KSEG1ADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | KSEG1)) | ||
48 | #define KSEG2ADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | KSEG2)) | ||
49 | #define KSEG3ADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | KSEG3)) | ||
50 | #else | ||
51 | #define KSEG0ADDR(a) (((a) & 0x1fffffff) | KSEG0) | ||
52 | #define KSEG1ADDR(a) (((a) & 0x1fffffff) | KSEG1) | ||
53 | #define KSEG2ADDR(a) (((a) & 0x1fffffff) | KSEG2) | ||
54 | #define KSEG3ADDR(a) (((a) & 0x1fffffff) | KSEG3) | ||
55 | #endif | ||
56 | |||
57 | #endif /* __ASM_M32R_ADDRSPACE_H */ | ||
diff --git a/arch/m32r/include/asm/asm-offsets.h b/arch/m32r/include/asm/asm-offsets.h deleted file mode 100644 index d370ee36a182..000000000000 --- a/arch/m32r/include/asm/asm-offsets.h +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | #include <generated/asm-offsets.h> | ||
diff --git a/arch/m32r/include/asm/assembler.h b/arch/m32r/include/asm/assembler.h deleted file mode 100644 index ed90d894f285..000000000000 --- a/arch/m32r/include/asm/assembler.h +++ /dev/null | |||
@@ -1,231 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifndef _ASM_M32R_ASSEMBLER_H | ||
3 | #define _ASM_M32R_ASSEMBLER_H | ||
4 | |||
5 | /* | ||
6 | * linux/asm-m32r/assembler.h | ||
7 | * | ||
8 | * Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org> | ||
9 | * | ||
10 | * This file contains M32R architecture specific macro definitions. | ||
11 | */ | ||
12 | |||
13 | #include <linux/stringify.h> | ||
14 | |||
15 | #undef __STR | ||
16 | |||
17 | #ifdef __ASSEMBLY__ | ||
18 | #define __STR(x) x | ||
19 | #else | ||
20 | #define __STR(x) __stringify(x) | ||
21 | #endif | ||
22 | |||
23 | #ifdef CONFIG_SMP | ||
24 | #define M32R_LOCK __STR(lock) | ||
25 | #define M32R_UNLOCK __STR(unlock) | ||
26 | #else | ||
27 | #define M32R_LOCK __STR(ld) | ||
28 | #define M32R_UNLOCK __STR(st) | ||
29 | #endif | ||
30 | |||
31 | #ifdef __ASSEMBLY__ | ||
32 | #undef ENTRY | ||
33 | #define ENTRY(name) ENTRY_M name | ||
34 | .macro ENTRY_M name | ||
35 | .global \name | ||
36 | ALIGN | ||
37 | \name: | ||
38 | .endm | ||
39 | #endif | ||
40 | |||
41 | |||
42 | /** | ||
43 | * LDIMM - load immediate value | ||
44 | * STI - enable interruption | ||
45 | * CLI - disable interruption | ||
46 | */ | ||
47 | |||
48 | #ifdef __ASSEMBLY__ | ||
49 | |||
50 | #define LDIMM(reg,x) LDIMM reg x | ||
51 | .macro LDIMM reg x | ||
52 | seth \reg, #high(\x) | ||
53 | or3 \reg, \reg, #low(\x) | ||
54 | .endm | ||
55 | |||
56 | #if !(defined(CONFIG_CHIP_M32102) || defined(CONFIG_CHIP_M32104)) | ||
57 | #define ENABLE_INTERRUPTS(reg) ENABLE_INTERRUPTS reg | ||
58 | .macro ENABLE_INTERRUPTS reg | ||
59 | setpsw #0x40 -> nop | ||
60 | ; WORKAROUND: "-> nop" is a workaround for the M32700(TS1). | ||
61 | .endm | ||
62 | |||
63 | #define DISABLE_INTERRUPTS(reg) DISABLE_INTERRUPTS reg | ||
64 | .macro DISABLE_INTERRUPTS reg | ||
65 | clrpsw #0x40 -> nop | ||
66 | ; WORKAROUND: "-> nop" is a workaround for the M32700(TS1). | ||
67 | .endm | ||
68 | #else /* CONFIG_CHIP_M32102 || CONFIG_CHIP_M32104 */ | ||
69 | #define ENABLE_INTERRUPTS(reg) ENABLE_INTERRUPTS reg | ||
70 | .macro ENABLE_INTERRUPTS reg | ||
71 | mvfc \reg, psw | ||
72 | or3 \reg, \reg, #0x0040 | ||
73 | mvtc \reg, psw | ||
74 | .endm | ||
75 | |||
76 | #define DISABLE_INTERRUPTS(reg) DISABLE_INTERRUPTS reg | ||
77 | .macro DISABLE_INTERRUPTS reg | ||
78 | mvfc \reg, psw | ||
79 | and3 \reg, \reg, #0xffbf | ||
80 | mvtc \reg, psw | ||
81 | .endm | ||
82 | #endif /* CONFIG_CHIP_M32102 */ | ||
83 | |||
84 | .macro SAVE_ALL | ||
85 | push r0 ; orig_r0 | ||
86 | push sp ; spi (r15) | ||
87 | push lr ; r14 | ||
88 | push r13 | ||
89 | mvfc r13, cr3 ; spu | ||
90 | push r13 | ||
91 | mvfc r13, bbpc | ||
92 | push r13 | ||
93 | mvfc r13, bbpsw | ||
94 | push r13 | ||
95 | mvfc r13, bpc | ||
96 | push r13 | ||
97 | mvfc r13, psw | ||
98 | push r13 | ||
99 | #if defined(CONFIG_ISA_M32R2) && defined(CONFIG_ISA_DSP_LEVEL2) | ||
100 | mvfaclo r13, a1 | ||
101 | push r13 | ||
102 | mvfachi r13, a1 | ||
103 | push r13 | ||
104 | mvfaclo r13, a0 | ||
105 | push r13 | ||
106 | mvfachi r13, a0 | ||
107 | push r13 | ||
108 | #elif defined(CONFIG_ISA_M32R2) || defined(CONFIG_ISA_M32R) | ||
109 | mvfaclo r13 | ||
110 | push r13 | ||
111 | mvfachi r13 | ||
112 | push r13 | ||
113 | ldi r13, #0 | ||
114 | push r13 ; dummy push acc1h | ||
115 | push r13 ; dummy push acc1l | ||
116 | #else | ||
117 | #error unknown isa configuration | ||
118 | #endif | ||
119 | ldi r13, #-1 | ||
120 | push r13 ; syscall_nr (default: -1) | ||
121 | push r12 | ||
122 | push r11 | ||
123 | push r10 | ||
124 | push r9 | ||
125 | push r8 | ||
126 | push r7 | ||
127 | push r3 | ||
128 | push r2 | ||
129 | push r1 | ||
130 | push r0 | ||
131 | addi sp, #-4 ; room for implicit pt_regs parameter | ||
132 | push r6 | ||
133 | push r5 | ||
134 | push r4 | ||
135 | .endm | ||
136 | |||
137 | .macro RESTORE_ALL | ||
138 | pop r4 | ||
139 | pop r5 | ||
140 | pop r6 | ||
141 | addi sp, #4 | ||
142 | pop r0 | ||
143 | pop r1 | ||
144 | pop r2 | ||
145 | pop r3 | ||
146 | pop r7 | ||
147 | pop r8 | ||
148 | pop r9 | ||
149 | pop r10 | ||
150 | pop r11 | ||
151 | pop r12 | ||
152 | addi r15, #4 ; Skip syscall number | ||
153 | #if defined(CONFIG_ISA_M32R2) && defined(CONFIG_ISA_DSP_LEVEL2) | ||
154 | pop r13 | ||
155 | mvtachi r13, a0 | ||
156 | pop r13 | ||
157 | mvtaclo r13, a0 | ||
158 | pop r13 | ||
159 | mvtachi r13, a1 | ||
160 | pop r13 | ||
161 | mvtaclo r13, a1 | ||
162 | #elif defined(CONFIG_ISA_M32R2) || defined(CONFIG_ISA_M32R) | ||
163 | pop r13 ; dummy pop acc1h | ||
164 | pop r13 ; dummy pop acc1l | ||
165 | pop r13 | ||
166 | mvtachi r13 | ||
167 | pop r13 | ||
168 | mvtaclo r13 | ||
169 | #else | ||
170 | #error unknown isa configuration | ||
171 | #endif | ||
172 | pop r14 | ||
173 | mvtc r14, psw | ||
174 | pop r14 | ||
175 | mvtc r14, bpc | ||
176 | addi sp, #8 ; Skip bbpsw, bbpc | ||
177 | pop r14 | ||
178 | mvtc r14, cr3 ; spu | ||
179 | pop r13 | ||
180 | pop lr ; r14 | ||
181 | pop sp ; spi (r15) | ||
182 | addi sp, #4 ; Skip orig_r0 | ||
183 | .fillinsn | ||
184 | 1: rte | ||
185 | .section .fixup,"ax" | ||
186 | 2: bl do_exit | ||
187 | .previous | ||
188 | .section __ex_table,"a" | ||
189 | ALIGN | ||
190 | .long 1b, 2b | ||
191 | .previous | ||
192 | .endm | ||
193 | |||
194 | #define GET_CURRENT(reg) get_current reg | ||
195 | .macro get_current reg | ||
196 | ldi \reg, #-8192 | ||
197 | and \reg, sp | ||
198 | .endm | ||
199 | |||
200 | #if !(defined(CONFIG_CHIP_M32102) || defined(CONFIG_CHIP_M32104)) | ||
201 | .macro SWITCH_TO_KERNEL_STACK | ||
202 | ; switch to kernel stack (spi) | ||
203 | clrpsw #0x80 -> nop | ||
204 | .endm | ||
205 | #else /* CONFIG_CHIP_M32102 || CONFIG_CHIP_M32104 */ | ||
206 | .macro SWITCH_TO_KERNEL_STACK | ||
207 | push r0 ; save r0 for working | ||
208 | mvfc r0, psw | ||
209 | and3 r0, r0, #0x00ff7f | ||
210 | mvtc r0, psw | ||
211 | slli r0, #16 | ||
212 | bltz r0, 1f ; check BSM-bit | ||
213 | ; | ||
214 | ;; called from kernel context: previous stack = spi | ||
215 | pop r0 ; retrieve r0 | ||
216 | bra 2f | ||
217 | .fillinsn | ||
218 | 1: | ||
219 | ;; called from user context: previous stack = spu | ||
220 | mvfc r0, cr3 ; spu | ||
221 | addi r0, #4 | ||
222 | mvtc r0, cr3 ; spu | ||
223 | ld r0, @(-4,r0) ; retrieve r0 | ||
224 | .fillinsn | ||
225 | 2: | ||
226 | .endm | ||
227 | #endif /* CONFIG_CHIP_M32102 || CONFIG_CHIP_M32104 */ | ||
228 | |||
229 | #endif /* __ASSEMBLY__ */ | ||
230 | |||
231 | #endif /* _ASM_M32R_ASSEMBLER_H */ | ||
diff --git a/arch/m32r/include/asm/atomic.h b/arch/m32r/include/asm/atomic.h deleted file mode 100644 index 8bf67e55ff54..000000000000 --- a/arch/m32r/include/asm/atomic.h +++ /dev/null | |||
@@ -1,275 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifndef _ASM_M32R_ATOMIC_H | ||
3 | #define _ASM_M32R_ATOMIC_H | ||
4 | |||
5 | /* | ||
6 | * linux/include/asm-m32r/atomic.h | ||
7 | * | ||
8 | * M32R version: | ||
9 | * Copyright (C) 2001, 2002 Hitoshi Yamamoto | ||
10 | * Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org> | ||
11 | */ | ||
12 | |||
13 | #include <linux/types.h> | ||
14 | #include <asm/assembler.h> | ||
15 | #include <asm/cmpxchg.h> | ||
16 | #include <asm/dcache_clear.h> | ||
17 | #include <asm/barrier.h> | ||
18 | |||
19 | /* | ||
20 | * Atomic operations that C can't guarantee us. Useful for | ||
21 | * resource counting etc.. | ||
22 | */ | ||
23 | |||
24 | #define ATOMIC_INIT(i) { (i) } | ||
25 | |||
26 | /** | ||
27 | * atomic_read - read atomic variable | ||
28 | * @v: pointer of type atomic_t | ||
29 | * | ||
30 | * Atomically reads the value of @v. | ||
31 | */ | ||
32 | #define atomic_read(v) READ_ONCE((v)->counter) | ||
33 | |||
34 | /** | ||
35 | * atomic_set - set atomic variable | ||
36 | * @v: pointer of type atomic_t | ||
37 | * @i: required value | ||
38 | * | ||
39 | * Atomically sets the value of @v to @i. | ||
40 | */ | ||
41 | #define atomic_set(v,i) WRITE_ONCE(((v)->counter), (i)) | ||
42 | |||
43 | #ifdef CONFIG_CHIP_M32700_TS1 | ||
44 | #define __ATOMIC_CLOBBER , "r4" | ||
45 | #else | ||
46 | #define __ATOMIC_CLOBBER | ||
47 | #endif | ||
48 | |||
49 | #define ATOMIC_OP(op) \ | ||
50 | static __inline__ void atomic_##op(int i, atomic_t *v) \ | ||
51 | { \ | ||
52 | unsigned long flags; \ | ||
53 | int result; \ | ||
54 | \ | ||
55 | local_irq_save(flags); \ | ||
56 | __asm__ __volatile__ ( \ | ||
57 | "# atomic_" #op " \n\t" \ | ||
58 | DCACHE_CLEAR("%0", "r4", "%1") \ | ||
59 | M32R_LOCK" %0, @%1; \n\t" \ | ||
60 | #op " %0, %2; \n\t" \ | ||
61 | M32R_UNLOCK" %0, @%1; \n\t" \ | ||
62 | : "=&r" (result) \ | ||
63 | : "r" (&v->counter), "r" (i) \ | ||
64 | : "memory" \ | ||
65 | __ATOMIC_CLOBBER \ | ||
66 | ); \ | ||
67 | local_irq_restore(flags); \ | ||
68 | } \ | ||
69 | |||
70 | #define ATOMIC_OP_RETURN(op) \ | ||
71 | static __inline__ int atomic_##op##_return(int i, atomic_t *v) \ | ||
72 | { \ | ||
73 | unsigned long flags; \ | ||
74 | int result; \ | ||
75 | \ | ||
76 | local_irq_save(flags); \ | ||
77 | __asm__ __volatile__ ( \ | ||
78 | "# atomic_" #op "_return \n\t" \ | ||
79 | DCACHE_CLEAR("%0", "r4", "%1") \ | ||
80 | M32R_LOCK" %0, @%1; \n\t" \ | ||
81 | #op " %0, %2; \n\t" \ | ||
82 | M32R_UNLOCK" %0, @%1; \n\t" \ | ||
83 | : "=&r" (result) \ | ||
84 | : "r" (&v->counter), "r" (i) \ | ||
85 | : "memory" \ | ||
86 | __ATOMIC_CLOBBER \ | ||
87 | ); \ | ||
88 | local_irq_restore(flags); \ | ||
89 | \ | ||
90 | return result; \ | ||
91 | } | ||
92 | |||
93 | #define ATOMIC_FETCH_OP(op) \ | ||
94 | static __inline__ int atomic_fetch_##op(int i, atomic_t *v) \ | ||
95 | { \ | ||
96 | unsigned long flags; \ | ||
97 | int result, val; \ | ||
98 | \ | ||
99 | local_irq_save(flags); \ | ||
100 | __asm__ __volatile__ ( \ | ||
101 | "# atomic_fetch_" #op " \n\t" \ | ||
102 | DCACHE_CLEAR("%0", "r4", "%2") \ | ||
103 | M32R_LOCK" %1, @%2; \n\t" \ | ||
104 | "mv %0, %1 \n\t" \ | ||
105 | #op " %1, %3; \n\t" \ | ||
106 | M32R_UNLOCK" %1, @%2; \n\t" \ | ||
107 | : "=&r" (result), "=&r" (val) \ | ||
108 | : "r" (&v->counter), "r" (i) \ | ||
109 | : "memory" \ | ||
110 | __ATOMIC_CLOBBER \ | ||
111 | ); \ | ||
112 | local_irq_restore(flags); \ | ||
113 | \ | ||
114 | return result; \ | ||
115 | } | ||
116 | |||
117 | #define ATOMIC_OPS(op) ATOMIC_OP(op) ATOMIC_OP_RETURN(op) ATOMIC_FETCH_OP(op) | ||
118 | |||
119 | ATOMIC_OPS(add) | ||
120 | ATOMIC_OPS(sub) | ||
121 | |||
122 | #undef ATOMIC_OPS | ||
123 | #define ATOMIC_OPS(op) ATOMIC_OP(op) ATOMIC_FETCH_OP(op) | ||
124 | |||
125 | ATOMIC_OPS(and) | ||
126 | ATOMIC_OPS(or) | ||
127 | ATOMIC_OPS(xor) | ||
128 | |||
129 | #undef ATOMIC_OPS | ||
130 | #undef ATOMIC_FETCH_OP | ||
131 | #undef ATOMIC_OP_RETURN | ||
132 | #undef ATOMIC_OP | ||
133 | |||
134 | /** | ||
135 | * atomic_sub_and_test - subtract value from variable and test result | ||
136 | * @i: integer value to subtract | ||
137 | * @v: pointer of type atomic_t | ||
138 | * | ||
139 | * Atomically subtracts @i from @v and returns | ||
140 | * true if the result is zero, or false for all | ||
141 | * other cases. | ||
142 | */ | ||
143 | #define atomic_sub_and_test(i,v) (atomic_sub_return((i), (v)) == 0) | ||
144 | |||
145 | /** | ||
146 | * atomic_inc_return - increment atomic variable and return it | ||
147 | * @v: pointer of type atomic_t | ||
148 | * | ||
149 | * Atomically increments @v by 1 and returns the result. | ||
150 | */ | ||
151 | static __inline__ int atomic_inc_return(atomic_t *v) | ||
152 | { | ||
153 | unsigned long flags; | ||
154 | int result; | ||
155 | |||
156 | local_irq_save(flags); | ||
157 | __asm__ __volatile__ ( | ||
158 | "# atomic_inc_return \n\t" | ||
159 | DCACHE_CLEAR("%0", "r4", "%1") | ||
160 | M32R_LOCK" %0, @%1; \n\t" | ||
161 | "addi %0, #1; \n\t" | ||
162 | M32R_UNLOCK" %0, @%1; \n\t" | ||
163 | : "=&r" (result) | ||
164 | : "r" (&v->counter) | ||
165 | : "memory" | ||
166 | __ATOMIC_CLOBBER | ||
167 | ); | ||
168 | local_irq_restore(flags); | ||
169 | |||
170 | return result; | ||
171 | } | ||
172 | |||
173 | /** | ||
174 | * atomic_dec_return - decrement atomic variable and return it | ||
175 | * @v: pointer of type atomic_t | ||
176 | * | ||
177 | * Atomically decrements @v by 1 and returns the result. | ||
178 | */ | ||
179 | static __inline__ int atomic_dec_return(atomic_t *v) | ||
180 | { | ||
181 | unsigned long flags; | ||
182 | int result; | ||
183 | |||
184 | local_irq_save(flags); | ||
185 | __asm__ __volatile__ ( | ||
186 | "# atomic_dec_return \n\t" | ||
187 | DCACHE_CLEAR("%0", "r4", "%1") | ||
188 | M32R_LOCK" %0, @%1; \n\t" | ||
189 | "addi %0, #-1; \n\t" | ||
190 | M32R_UNLOCK" %0, @%1; \n\t" | ||
191 | : "=&r" (result) | ||
192 | : "r" (&v->counter) | ||
193 | : "memory" | ||
194 | __ATOMIC_CLOBBER | ||
195 | ); | ||
196 | local_irq_restore(flags); | ||
197 | |||
198 | return result; | ||
199 | } | ||
200 | |||
201 | /** | ||
202 | * atomic_inc - increment atomic variable | ||
203 | * @v: pointer of type atomic_t | ||
204 | * | ||
205 | * Atomically increments @v by 1. | ||
206 | */ | ||
207 | #define atomic_inc(v) ((void)atomic_inc_return(v)) | ||
208 | |||
209 | /** | ||
210 | * atomic_dec - decrement atomic variable | ||
211 | * @v: pointer of type atomic_t | ||
212 | * | ||
213 | * Atomically decrements @v by 1. | ||
214 | */ | ||
215 | #define atomic_dec(v) ((void)atomic_dec_return(v)) | ||
216 | |||
217 | /** | ||
218 | * atomic_inc_and_test - increment and test | ||
219 | * @v: pointer of type atomic_t | ||
220 | * | ||
221 | * Atomically increments @v by 1 | ||
222 | * and returns true if the result is zero, or false for all | ||
223 | * other cases. | ||
224 | */ | ||
225 | #define atomic_inc_and_test(v) (atomic_inc_return(v) == 0) | ||
226 | |||
227 | /** | ||
228 | * atomic_dec_and_test - decrement and test | ||
229 | * @v: pointer of type atomic_t | ||
230 | * | ||
231 | * Atomically decrements @v by 1 and | ||
232 | * returns true if the result is 0, or false for all | ||
233 | * other cases. | ||
234 | */ | ||
235 | #define atomic_dec_and_test(v) (atomic_dec_return(v) == 0) | ||
236 | |||
237 | /** | ||
238 | * atomic_add_negative - add and test if negative | ||
239 | * @v: pointer of type atomic_t | ||
240 | * @i: integer value to add | ||
241 | * | ||
242 | * Atomically adds @i to @v and returns true | ||
243 | * if the result is negative, or false when | ||
244 | * result is greater than or equal to zero. | ||
245 | */ | ||
246 | #define atomic_add_negative(i,v) (atomic_add_return((i), (v)) < 0) | ||
247 | |||
248 | #define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n))) | ||
249 | #define atomic_xchg(v, new) (xchg(&((v)->counter), new)) | ||
250 | |||
251 | /** | ||
252 | * __atomic_add_unless - add unless the number is a given value | ||
253 | * @v: pointer of type atomic_t | ||
254 | * @a: the amount to add to v... | ||
255 | * @u: ...unless v is equal to u. | ||
256 | * | ||
257 | * Atomically adds @a to @v, so long as it was not @u. | ||
258 | * Returns the old value of @v. | ||
259 | */ | ||
260 | static __inline__ int __atomic_add_unless(atomic_t *v, int a, int u) | ||
261 | { | ||
262 | int c, old; | ||
263 | c = atomic_read(v); | ||
264 | for (;;) { | ||
265 | if (unlikely(c == (u))) | ||
266 | break; | ||
267 | old = atomic_cmpxchg((v), c, c + (a)); | ||
268 | if (likely(old == c)) | ||
269 | break; | ||
270 | c = old; | ||
271 | } | ||
272 | return c; | ||
273 | } | ||
274 | |||
275 | #endif /* _ASM_M32R_ATOMIC_H */ | ||
diff --git a/arch/m32r/include/asm/barrier.h b/arch/m32r/include/asm/barrier.h deleted file mode 100644 index 1a40265e8d88..000000000000 --- a/arch/m32r/include/asm/barrier.h +++ /dev/null | |||
@@ -1,16 +0,0 @@ | |||
1 | /* | ||
2 | * This file is subject to the terms and conditions of the GNU General Public | ||
3 | * License. See the file "COPYING" in the main directory of this archive | ||
4 | * for more details. | ||
5 | * | ||
6 | * Copyright (C) 2001 Hiroyuki Kondo, Hirokazu Takata, and Hitoshi Yamamoto | ||
7 | * Copyright (C) 2004, 2006 Hirokazu Takata <takata at linux-m32r.org> | ||
8 | */ | ||
9 | #ifndef _ASM_M32R_BARRIER_H | ||
10 | #define _ASM_M32R_BARRIER_H | ||
11 | |||
12 | #define nop() __asm__ __volatile__ ("nop" : : ) | ||
13 | |||
14 | #include <asm-generic/barrier.h> | ||
15 | |||
16 | #endif /* _ASM_M32R_BARRIER_H */ | ||
diff --git a/arch/m32r/include/asm/bitops.h b/arch/m32r/include/asm/bitops.h deleted file mode 100644 index 64e70e57c154..000000000000 --- a/arch/m32r/include/asm/bitops.h +++ /dev/null | |||
@@ -1,274 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifndef _ASM_M32R_BITOPS_H | ||
3 | #define _ASM_M32R_BITOPS_H | ||
4 | |||
5 | /* | ||
6 | * linux/include/asm-m32r/bitops.h | ||
7 | * | ||
8 | * Copyright 1992, Linus Torvalds. | ||
9 | * | ||
10 | * M32R version: | ||
11 | * Copyright (C) 2001, 2002 Hitoshi Yamamoto | ||
12 | * Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org> | ||
13 | */ | ||
14 | |||
15 | #ifndef _LINUX_BITOPS_H | ||
16 | #error only <linux/bitops.h> can be included directly | ||
17 | #endif | ||
18 | |||
19 | #include <linux/compiler.h> | ||
20 | #include <linux/irqflags.h> | ||
21 | #include <asm/assembler.h> | ||
22 | #include <asm/byteorder.h> | ||
23 | #include <asm/dcache_clear.h> | ||
24 | #include <asm/types.h> | ||
25 | #include <asm/barrier.h> | ||
26 | |||
27 | /* | ||
28 | * These have to be done with inline assembly: that way the bit-setting | ||
29 | * is guaranteed to be atomic. All bit operations return 0 if the bit | ||
30 | * was cleared before the operation and != 0 if it was not. | ||
31 | * | ||
32 | * bit 0 is the LSB of addr; bit 32 is the LSB of (addr+1). | ||
33 | */ | ||
34 | |||
35 | /** | ||
36 | * set_bit - Atomically set a bit in memory | ||
37 | * @nr: the bit to set | ||
38 | * @addr: the address to start counting from | ||
39 | * | ||
40 | * This function is atomic and may not be reordered. See __set_bit() | ||
41 | * if you do not require the atomic guarantees. | ||
42 | * Note that @nr may be almost arbitrarily large; this function is not | ||
43 | * restricted to acting on a single-word quantity. | ||
44 | */ | ||
45 | static __inline__ void set_bit(int nr, volatile void * addr) | ||
46 | { | ||
47 | __u32 mask; | ||
48 | volatile __u32 *a = addr; | ||
49 | unsigned long flags; | ||
50 | unsigned long tmp; | ||
51 | |||
52 | a += (nr >> 5); | ||
53 | mask = (1 << (nr & 0x1F)); | ||
54 | |||
55 | local_irq_save(flags); | ||
56 | __asm__ __volatile__ ( | ||
57 | DCACHE_CLEAR("%0", "r6", "%1") | ||
58 | M32R_LOCK" %0, @%1; \n\t" | ||
59 | "or %0, %2; \n\t" | ||
60 | M32R_UNLOCK" %0, @%1; \n\t" | ||
61 | : "=&r" (tmp) | ||
62 | : "r" (a), "r" (mask) | ||
63 | : "memory" | ||
64 | #ifdef CONFIG_CHIP_M32700_TS1 | ||
65 | , "r6" | ||
66 | #endif /* CONFIG_CHIP_M32700_TS1 */ | ||
67 | ); | ||
68 | local_irq_restore(flags); | ||
69 | } | ||
70 | |||
71 | /** | ||
72 | * clear_bit - Clears a bit in memory | ||
73 | * @nr: Bit to clear | ||
74 | * @addr: Address to start counting from | ||
75 | * | ||
76 | * clear_bit() is atomic and may not be reordered. However, it does | ||
77 | * not contain a memory barrier, so if it is used for locking purposes, | ||
78 | * you should call smp_mb__before_atomic() and/or smp_mb__after_atomic() | ||
79 | * in order to ensure changes are visible on other processors. | ||
80 | */ | ||
81 | static __inline__ void clear_bit(int nr, volatile void * addr) | ||
82 | { | ||
83 | __u32 mask; | ||
84 | volatile __u32 *a = addr; | ||
85 | unsigned long flags; | ||
86 | unsigned long tmp; | ||
87 | |||
88 | a += (nr >> 5); | ||
89 | mask = (1 << (nr & 0x1F)); | ||
90 | |||
91 | local_irq_save(flags); | ||
92 | |||
93 | __asm__ __volatile__ ( | ||
94 | DCACHE_CLEAR("%0", "r6", "%1") | ||
95 | M32R_LOCK" %0, @%1; \n\t" | ||
96 | "and %0, %2; \n\t" | ||
97 | M32R_UNLOCK" %0, @%1; \n\t" | ||
98 | : "=&r" (tmp) | ||
99 | : "r" (a), "r" (~mask) | ||
100 | : "memory" | ||
101 | #ifdef CONFIG_CHIP_M32700_TS1 | ||
102 | , "r6" | ||
103 | #endif /* CONFIG_CHIP_M32700_TS1 */ | ||
104 | ); | ||
105 | local_irq_restore(flags); | ||
106 | } | ||
107 | |||
108 | /** | ||
109 | * change_bit - Toggle a bit in memory | ||
110 | * @nr: Bit to clear | ||
111 | * @addr: Address to start counting from | ||
112 | * | ||
113 | * change_bit() is atomic and may not be reordered. | ||
114 | * Note that @nr may be almost arbitrarily large; this function is not | ||
115 | * restricted to acting on a single-word quantity. | ||
116 | */ | ||
117 | static __inline__ void change_bit(int nr, volatile void * addr) | ||
118 | { | ||
119 | __u32 mask; | ||
120 | volatile __u32 *a = addr; | ||
121 | unsigned long flags; | ||
122 | unsigned long tmp; | ||
123 | |||
124 | a += (nr >> 5); | ||
125 | mask = (1 << (nr & 0x1F)); | ||
126 | |||
127 | local_irq_save(flags); | ||
128 | __asm__ __volatile__ ( | ||
129 | DCACHE_CLEAR("%0", "r6", "%1") | ||
130 | M32R_LOCK" %0, @%1; \n\t" | ||
131 | "xor %0, %2; \n\t" | ||
132 | M32R_UNLOCK" %0, @%1; \n\t" | ||
133 | : "=&r" (tmp) | ||
134 | : "r" (a), "r" (mask) | ||
135 | : "memory" | ||
136 | #ifdef CONFIG_CHIP_M32700_TS1 | ||
137 | , "r6" | ||
138 | #endif /* CONFIG_CHIP_M32700_TS1 */ | ||
139 | ); | ||
140 | local_irq_restore(flags); | ||
141 | } | ||
142 | |||
143 | /** | ||
144 | * test_and_set_bit - Set a bit and return its old value | ||
145 | * @nr: Bit to set | ||
146 | * @addr: Address to count from | ||
147 | * | ||
148 | * This operation is atomic and cannot be reordered. | ||
149 | * It also implies a memory barrier. | ||
150 | */ | ||
151 | static __inline__ int test_and_set_bit(int nr, volatile void * addr) | ||
152 | { | ||
153 | __u32 mask, oldbit; | ||
154 | volatile __u32 *a = addr; | ||
155 | unsigned long flags; | ||
156 | unsigned long tmp; | ||
157 | |||
158 | a += (nr >> 5); | ||
159 | mask = (1 << (nr & 0x1F)); | ||
160 | |||
161 | local_irq_save(flags); | ||
162 | __asm__ __volatile__ ( | ||
163 | DCACHE_CLEAR("%0", "%1", "%2") | ||
164 | M32R_LOCK" %0, @%2; \n\t" | ||
165 | "mv %1, %0; \n\t" | ||
166 | "and %0, %3; \n\t" | ||
167 | "or %1, %3; \n\t" | ||
168 | M32R_UNLOCK" %1, @%2; \n\t" | ||
169 | : "=&r" (oldbit), "=&r" (tmp) | ||
170 | : "r" (a), "r" (mask) | ||
171 | : "memory" | ||
172 | ); | ||
173 | local_irq_restore(flags); | ||
174 | |||
175 | return (oldbit != 0); | ||
176 | } | ||
177 | |||
178 | /** | ||
179 | * test_and_clear_bit - Clear a bit and return its old value | ||
180 | * @nr: Bit to set | ||
181 | * @addr: Address to count from | ||
182 | * | ||
183 | * This operation is atomic and cannot be reordered. | ||
184 | * It also implies a memory barrier. | ||
185 | */ | ||
186 | static __inline__ int test_and_clear_bit(int nr, volatile void * addr) | ||
187 | { | ||
188 | __u32 mask, oldbit; | ||
189 | volatile __u32 *a = addr; | ||
190 | unsigned long flags; | ||
191 | unsigned long tmp; | ||
192 | |||
193 | a += (nr >> 5); | ||
194 | mask = (1 << (nr & 0x1F)); | ||
195 | |||
196 | local_irq_save(flags); | ||
197 | |||
198 | __asm__ __volatile__ ( | ||
199 | DCACHE_CLEAR("%0", "%1", "%3") | ||
200 | M32R_LOCK" %0, @%3; \n\t" | ||
201 | "mv %1, %0; \n\t" | ||
202 | "and %0, %2; \n\t" | ||
203 | "not %2, %2; \n\t" | ||
204 | "and %1, %2; \n\t" | ||
205 | M32R_UNLOCK" %1, @%3; \n\t" | ||
206 | : "=&r" (oldbit), "=&r" (tmp), "+r" (mask) | ||
207 | : "r" (a) | ||
208 | : "memory" | ||
209 | ); | ||
210 | local_irq_restore(flags); | ||
211 | |||
212 | return (oldbit != 0); | ||
213 | } | ||
214 | |||
215 | /** | ||
216 | * test_and_change_bit - Change a bit and return its old value | ||
217 | * @nr: Bit to set | ||
218 | * @addr: Address to count from | ||
219 | * | ||
220 | * This operation is atomic and cannot be reordered. | ||
221 | * It also implies a memory barrier. | ||
222 | */ | ||
223 | static __inline__ int test_and_change_bit(int nr, volatile void * addr) | ||
224 | { | ||
225 | __u32 mask, oldbit; | ||
226 | volatile __u32 *a = addr; | ||
227 | unsigned long flags; | ||
228 | unsigned long tmp; | ||
229 | |||
230 | a += (nr >> 5); | ||
231 | mask = (1 << (nr & 0x1F)); | ||
232 | |||
233 | local_irq_save(flags); | ||
234 | __asm__ __volatile__ ( | ||
235 | DCACHE_CLEAR("%0", "%1", "%2") | ||
236 | M32R_LOCK" %0, @%2; \n\t" | ||
237 | "mv %1, %0; \n\t" | ||
238 | "and %0, %3; \n\t" | ||
239 | "xor %1, %3; \n\t" | ||
240 | M32R_UNLOCK" %1, @%2; \n\t" | ||
241 | : "=&r" (oldbit), "=&r" (tmp) | ||
242 | : "r" (a), "r" (mask) | ||
243 | : "memory" | ||
244 | ); | ||
245 | local_irq_restore(flags); | ||
246 | |||
247 | return (oldbit != 0); | ||
248 | } | ||
249 | |||
250 | #include <asm-generic/bitops/non-atomic.h> | ||
251 | #include <asm-generic/bitops/ffz.h> | ||
252 | #include <asm-generic/bitops/__ffs.h> | ||
253 | #include <asm-generic/bitops/fls.h> | ||
254 | #include <asm-generic/bitops/__fls.h> | ||
255 | #include <asm-generic/bitops/fls64.h> | ||
256 | |||
257 | #ifdef __KERNEL__ | ||
258 | |||
259 | #include <asm-generic/bitops/sched.h> | ||
260 | #include <asm-generic/bitops/find.h> | ||
261 | #include <asm-generic/bitops/ffs.h> | ||
262 | #include <asm-generic/bitops/hweight.h> | ||
263 | #include <asm-generic/bitops/lock.h> | ||
264 | |||
265 | #endif /* __KERNEL__ */ | ||
266 | |||
267 | #ifdef __KERNEL__ | ||
268 | |||
269 | #include <asm-generic/bitops/le.h> | ||
270 | #include <asm-generic/bitops/ext2-atomic.h> | ||
271 | |||
272 | #endif /* __KERNEL__ */ | ||
273 | |||
274 | #endif /* _ASM_M32R_BITOPS_H */ | ||
diff --git a/arch/m32r/include/asm/bug.h b/arch/m32r/include/asm/bug.h deleted file mode 100644 index 7197688254da..000000000000 --- a/arch/m32r/include/asm/bug.h +++ /dev/null | |||
@@ -1,5 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifndef _M32R_BUG_H | ||
3 | #define _M32R_BUG_H | ||
4 | #include <asm-generic/bug.h> | ||
5 | #endif | ||
diff --git a/arch/m32r/include/asm/bugs.h b/arch/m32r/include/asm/bugs.h deleted file mode 100644 index 74a6d428aebe..000000000000 --- a/arch/m32r/include/asm/bugs.h +++ /dev/null | |||
@@ -1,20 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifndef _ASM_M32R_BUGS_H | ||
3 | #define _ASM_M32R_BUGS_H | ||
4 | |||
5 | /* | ||
6 | * This is included by init/main.c to check for architecture-dependent bugs. | ||
7 | * | ||
8 | * Needs: | ||
9 | * void check_bugs(void); | ||
10 | */ | ||
11 | #include <asm/processor.h> | ||
12 | |||
13 | static void __init check_bugs(void) | ||
14 | { | ||
15 | extern unsigned long loops_per_jiffy; | ||
16 | |||
17 | current_cpu_data.loops_per_jiffy = loops_per_jiffy; | ||
18 | } | ||
19 | |||
20 | #endif /* _ASM_M32R_BUGS_H */ | ||
diff --git a/arch/m32r/include/asm/cache.h b/arch/m32r/include/asm/cache.h deleted file mode 100644 index 47a766a258f8..000000000000 --- a/arch/m32r/include/asm/cache.h +++ /dev/null | |||
@@ -1,9 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifndef _ASM_M32R_CACHE_H | ||
3 | #define _ASM_M32R_CACHE_H | ||
4 | |||
5 | /* L1 cache line size */ | ||
6 | #define L1_CACHE_SHIFT 4 | ||
7 | #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) | ||
8 | |||
9 | #endif /* _ASM_M32R_CACHE_H */ | ||
diff --git a/arch/m32r/include/asm/cachectl.h b/arch/m32r/include/asm/cachectl.h deleted file mode 100644 index 12f73f6c1759..000000000000 --- a/arch/m32r/include/asm/cachectl.h +++ /dev/null | |||
@@ -1,27 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | /* | ||
3 | * cachectl.h -- defines for M32R cache control system calls | ||
4 | * | ||
5 | * Copyright (C) 2003 by Kazuhiro Inaoka | ||
6 | */ | ||
7 | #ifndef __ASM_M32R_CACHECTL | ||
8 | #define __ASM_M32R_CACHECTL | ||
9 | |||
10 | /* | ||
11 | * Options for cacheflush system call | ||
12 | * | ||
13 | * cacheflush() is currently fluch_cache_all(). | ||
14 | */ | ||
15 | #define ICACHE (1<<0) /* flush instruction cache */ | ||
16 | #define DCACHE (1<<1) /* writeback and flush data cache */ | ||
17 | #define BCACHE (ICACHE|DCACHE) /* flush both caches */ | ||
18 | |||
19 | /* | ||
20 | * Caching modes for the cachectl(2) call | ||
21 | * | ||
22 | * cachectl(2) is currently not supported and returns ENOSYS. | ||
23 | */ | ||
24 | #define CACHEABLE 0 /* make pages cacheable */ | ||
25 | #define UNCACHEABLE 1 /* make pages uncacheable */ | ||
26 | |||
27 | #endif /* __ASM_M32R_CACHECTL */ | ||
diff --git a/arch/m32r/include/asm/cacheflush.h b/arch/m32r/include/asm/cacheflush.h deleted file mode 100644 index 5ad2a3045483..000000000000 --- a/arch/m32r/include/asm/cacheflush.h +++ /dev/null | |||
@@ -1,73 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifndef _ASM_M32R_CACHEFLUSH_H | ||
3 | #define _ASM_M32R_CACHEFLUSH_H | ||
4 | |||
5 | #include <linux/mm.h> | ||
6 | |||
7 | extern void _flush_cache_all(void); | ||
8 | extern void _flush_cache_copyback_all(void); | ||
9 | |||
10 | #if defined(CONFIG_CHIP_M32700) || defined(CONFIG_CHIP_OPSP) || defined(CONFIG_CHIP_M32104) | ||
11 | #define flush_cache_all() do { } while (0) | ||
12 | #define flush_cache_mm(mm) do { } while (0) | ||
13 | #define flush_cache_dup_mm(mm) do { } while (0) | ||
14 | #define flush_cache_range(vma, start, end) do { } while (0) | ||
15 | #define flush_cache_page(vma, vmaddr, pfn) do { } while (0) | ||
16 | #define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0 | ||
17 | #define flush_dcache_page(page) do { } while (0) | ||
18 | #define flush_dcache_mmap_lock(mapping) do { } while (0) | ||
19 | #define flush_dcache_mmap_unlock(mapping) do { } while (0) | ||
20 | #ifndef CONFIG_SMP | ||
21 | #define flush_icache_range(start, end) _flush_cache_copyback_all() | ||
22 | #define flush_icache_page(vma,pg) _flush_cache_copyback_all() | ||
23 | #define flush_icache_user_range(vma,pg,adr,len) _flush_cache_copyback_all() | ||
24 | #define flush_cache_sigtramp(addr) _flush_cache_copyback_all() | ||
25 | #else /* CONFIG_SMP */ | ||
26 | extern void smp_flush_cache_all(void); | ||
27 | #define flush_icache_range(start, end) smp_flush_cache_all() | ||
28 | #define flush_icache_page(vma,pg) smp_flush_cache_all() | ||
29 | #define flush_icache_user_range(vma,pg,adr,len) smp_flush_cache_all() | ||
30 | #define flush_cache_sigtramp(addr) _flush_cache_copyback_all() | ||
31 | #endif /* CONFIG_SMP */ | ||
32 | #elif defined(CONFIG_CHIP_M32102) | ||
33 | #define flush_cache_all() do { } while (0) | ||
34 | #define flush_cache_mm(mm) do { } while (0) | ||
35 | #define flush_cache_dup_mm(mm) do { } while (0) | ||
36 | #define flush_cache_range(vma, start, end) do { } while (0) | ||
37 | #define flush_cache_page(vma, vmaddr, pfn) do { } while (0) | ||
38 | #define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0 | ||
39 | #define flush_dcache_page(page) do { } while (0) | ||
40 | #define flush_dcache_mmap_lock(mapping) do { } while (0) | ||
41 | #define flush_dcache_mmap_unlock(mapping) do { } while (0) | ||
42 | #define flush_icache_range(start, end) _flush_cache_all() | ||
43 | #define flush_icache_page(vma,pg) _flush_cache_all() | ||
44 | #define flush_icache_user_range(vma,pg,adr,len) _flush_cache_all() | ||
45 | #define flush_cache_sigtramp(addr) _flush_cache_all() | ||
46 | #else | ||
47 | #define flush_cache_all() do { } while (0) | ||
48 | #define flush_cache_mm(mm) do { } while (0) | ||
49 | #define flush_cache_dup_mm(mm) do { } while (0) | ||
50 | #define flush_cache_range(vma, start, end) do { } while (0) | ||
51 | #define flush_cache_page(vma, vmaddr, pfn) do { } while (0) | ||
52 | #define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0 | ||
53 | #define flush_dcache_page(page) do { } while (0) | ||
54 | #define flush_dcache_mmap_lock(mapping) do { } while (0) | ||
55 | #define flush_dcache_mmap_unlock(mapping) do { } while (0) | ||
56 | #define flush_icache_range(start, end) do { } while (0) | ||
57 | #define flush_icache_page(vma,pg) do { } while (0) | ||
58 | #define flush_icache_user_range(vma,pg,adr,len) do { } while (0) | ||
59 | #define flush_cache_sigtramp(addr) do { } while (0) | ||
60 | #endif /* CONFIG_CHIP_* */ | ||
61 | |||
62 | #define flush_cache_vmap(start, end) do { } while (0) | ||
63 | #define flush_cache_vunmap(start, end) do { } while (0) | ||
64 | |||
65 | #define copy_to_user_page(vma, page, vaddr, dst, src, len) \ | ||
66 | do { \ | ||
67 | memcpy(dst, src, len); \ | ||
68 | flush_icache_user_range(vma, page, vaddr, len); \ | ||
69 | } while (0) | ||
70 | #define copy_from_user_page(vma, page, vaddr, dst, src, len) \ | ||
71 | memcpy(dst, src, len) | ||
72 | |||
73 | #endif /* _ASM_M32R_CACHEFLUSH_H */ | ||
diff --git a/arch/m32r/include/asm/checksum.h b/arch/m32r/include/asm/checksum.h deleted file mode 100644 index d68e93c9bd62..000000000000 --- a/arch/m32r/include/asm/checksum.h +++ /dev/null | |||
@@ -1,202 +0,0 @@ | |||
1 | #ifdef __KERNEL__ | ||
2 | #ifndef _ASM_M32R_CHECKSUM_H | ||
3 | #define _ASM_M32R_CHECKSUM_H | ||
4 | |||
5 | /* | ||
6 | * include/asm-m32r/checksum.h | ||
7 | * | ||
8 | * IP/TCP/UDP checksum routines | ||
9 | * | ||
10 | * This file is subject to the terms and conditions of the GNU General Public | ||
11 | * License. See the file "COPYING" in the main directory of this archive | ||
12 | * for more details. | ||
13 | * | ||
14 | * Some code taken from mips and parisc architecture. | ||
15 | * | ||
16 | * Copyright (C) 2001, 2002 Hiroyuki Kondo, Hirokazu Takata | ||
17 | * Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org> | ||
18 | */ | ||
19 | |||
20 | #include <linux/in6.h> | ||
21 | |||
22 | /* | ||
23 | * computes the checksum of a memory block at buff, length len, | ||
24 | * and adds in "sum" (32-bit) | ||
25 | * | ||
26 | * returns a 32-bit number suitable for feeding into itself | ||
27 | * or csum_tcpudp_magic | ||
28 | * | ||
29 | * this function must be called with even lengths, except | ||
30 | * for the last fragment, which may be odd | ||
31 | * | ||
32 | * it's best to have buff aligned on a 32-bit boundary | ||
33 | */ | ||
34 | asmlinkage __wsum csum_partial(const void *buff, int len, __wsum sum); | ||
35 | |||
36 | /* | ||
37 | * The same as csum_partial, but copies from src while it checksums. | ||
38 | * | ||
39 | * Here even more important to align src and dst on a 32-bit (or even | ||
40 | * better 64-bit) boundary | ||
41 | */ | ||
42 | extern __wsum csum_partial_copy_nocheck(const void *src, void *dst, | ||
43 | int len, __wsum sum); | ||
44 | |||
45 | /* | ||
46 | * This is a new version of the above that records errors it finds in *errp, | ||
47 | * but continues and zeros thre rest of the buffer. | ||
48 | */ | ||
49 | extern __wsum csum_partial_copy_from_user(const void __user *src, void *dst, | ||
50 | int len, __wsum sum, | ||
51 | int *err_ptr); | ||
52 | |||
53 | /* | ||
54 | * Fold a partial checksum | ||
55 | */ | ||
56 | |||
57 | static inline __sum16 csum_fold(__wsum sum) | ||
58 | { | ||
59 | unsigned long tmpreg; | ||
60 | __asm__( | ||
61 | " sll3 %1, %0, #16 \n" | ||
62 | " cmp %0, %0 \n" | ||
63 | " addx %0, %1 \n" | ||
64 | " ldi %1, #0 \n" | ||
65 | " srli %0, #16 \n" | ||
66 | " addx %0, %1 \n" | ||
67 | " xor3 %0, %0, #0x0000ffff \n" | ||
68 | : "=r" (sum), "=&r" (tmpreg) | ||
69 | : "0" (sum) | ||
70 | : "cbit" | ||
71 | ); | ||
72 | return (__force __sum16)sum; | ||
73 | } | ||
74 | |||
75 | /* | ||
76 | * This is a version of ip_compute_csum() optimized for IP headers, | ||
77 | * which always checksum on 4 octet boundaries. | ||
78 | */ | ||
79 | static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl) | ||
80 | { | ||
81 | unsigned long tmpreg0, tmpreg1; | ||
82 | __wsum sum; | ||
83 | |||
84 | __asm__ __volatile__( | ||
85 | " ld %0, @%1+ \n" | ||
86 | " addi %2, #-4 \n" | ||
87 | "# bgez %2, 2f \n" | ||
88 | " cmp %0, %0 \n" | ||
89 | " ld %3, @%1+ \n" | ||
90 | " ld %4, @%1+ \n" | ||
91 | " addx %0, %3 \n" | ||
92 | " ld %3, @%1+ \n" | ||
93 | " addx %0, %4 \n" | ||
94 | " addx %0, %3 \n" | ||
95 | " .fillinsn\n" | ||
96 | "1: \n" | ||
97 | " ld %4, @%1+ \n" | ||
98 | " addi %2, #-1 \n" | ||
99 | " addx %0, %4 \n" | ||
100 | " bgtz %2, 1b \n" | ||
101 | "\n" | ||
102 | " ldi %3, #0 \n" | ||
103 | " addx %0, %3 \n" | ||
104 | " .fillinsn\n" | ||
105 | "2: \n" | ||
106 | /* Since the input registers which are loaded with iph and ihl | ||
107 | are modified, we must also specify them as outputs, or gcc | ||
108 | will assume they contain their original values. */ | ||
109 | : "=&r" (sum), "=r" (iph), "=r" (ihl), "=&r" (tmpreg0), "=&r" (tmpreg1) | ||
110 | : "1" (iph), "2" (ihl) | ||
111 | : "cbit", "memory"); | ||
112 | |||
113 | return csum_fold(sum); | ||
114 | } | ||
115 | |||
116 | static inline __wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr, | ||
117 | __u32 len, __u8 proto, | ||
118 | __wsum sum) | ||
119 | { | ||
120 | #if defined(__LITTLE_ENDIAN) | ||
121 | unsigned long len_proto = (proto + len) << 8; | ||
122 | #else | ||
123 | unsigned long len_proto = proto + len; | ||
124 | #endif | ||
125 | unsigned long tmpreg; | ||
126 | |||
127 | __asm__( | ||
128 | " cmp %0, %0 \n" | ||
129 | " addx %0, %2 \n" | ||
130 | " addx %0, %3 \n" | ||
131 | " addx %0, %4 \n" | ||
132 | " ldi %1, #0 \n" | ||
133 | " addx %0, %1 \n" | ||
134 | : "=r" (sum), "=&r" (tmpreg) | ||
135 | : "r" (daddr), "r" (saddr), "r" (len_proto), "0" (sum) | ||
136 | : "cbit" | ||
137 | ); | ||
138 | |||
139 | return sum; | ||
140 | } | ||
141 | |||
142 | /* | ||
143 | * computes the checksum of the TCP/UDP pseudo-header | ||
144 | * returns a 16-bit checksum, already complemented | ||
145 | */ | ||
146 | static inline __sum16 csum_tcpudp_magic(__be32 saddr, __be32 daddr, | ||
147 | __u32 len, __u8 proto, | ||
148 | __wsum sum) | ||
149 | { | ||
150 | return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum)); | ||
151 | } | ||
152 | |||
153 | /* | ||
154 | * this routine is used for miscellaneous IP-like checksums, mainly | ||
155 | * in icmp.c | ||
156 | */ | ||
157 | |||
158 | static inline __sum16 ip_compute_csum(const void *buff, int len) | ||
159 | { | ||
160 | return csum_fold (csum_partial(buff, len, 0)); | ||
161 | } | ||
162 | |||
163 | #define _HAVE_ARCH_IPV6_CSUM | ||
164 | static inline __sum16 csum_ipv6_magic(const struct in6_addr *saddr, | ||
165 | const struct in6_addr *daddr, | ||
166 | __u32 len, unsigned short proto, | ||
167 | __wsum sum) | ||
168 | { | ||
169 | unsigned long tmpreg0, tmpreg1, tmpreg2, tmpreg3; | ||
170 | __asm__( | ||
171 | " ld %1, @(%5) \n" | ||
172 | " ld %2, @(4,%5) \n" | ||
173 | " ld %3, @(8,%5) \n" | ||
174 | " ld %4, @(12,%5) \n" | ||
175 | " add %0, %1 \n" | ||
176 | " addx %0, %2 \n" | ||
177 | " addx %0, %3 \n" | ||
178 | " addx %0, %4 \n" | ||
179 | " ld %1, @(%6) \n" | ||
180 | " ld %2, @(4,%6) \n" | ||
181 | " ld %3, @(8,%6) \n" | ||
182 | " ld %4, @(12,%6) \n" | ||
183 | " addx %0, %1 \n" | ||
184 | " addx %0, %2 \n" | ||
185 | " addx %0, %3 \n" | ||
186 | " addx %0, %4 \n" | ||
187 | " addx %0, %7 \n" | ||
188 | " addx %0, %8 \n" | ||
189 | " ldi %1, #0 \n" | ||
190 | " addx %0, %1 \n" | ||
191 | : "=&r" (sum), "=&r" (tmpreg0), "=&r" (tmpreg1), | ||
192 | "=&r" (tmpreg2), "=&r" (tmpreg3) | ||
193 | : "r" (saddr), "r" (daddr), | ||
194 | "r" (htonl(len)), "r" (htonl(proto)), "0" (sum) | ||
195 | : "cbit" | ||
196 | ); | ||
197 | |||
198 | return csum_fold(sum); | ||
199 | } | ||
200 | |||
201 | #endif /* _ASM_M32R_CHECKSUM_H */ | ||
202 | #endif /* __KERNEL__ */ | ||
diff --git a/arch/m32r/include/asm/cmpxchg.h b/arch/m32r/include/asm/cmpxchg.h deleted file mode 100644 index 1ccdce5ff0ac..000000000000 --- a/arch/m32r/include/asm/cmpxchg.h +++ /dev/null | |||
@@ -1,225 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifndef _ASM_M32R_CMPXCHG_H | ||
3 | #define _ASM_M32R_CMPXCHG_H | ||
4 | |||
5 | /* | ||
6 | * M32R version: | ||
7 | * Copyright (C) 2001, 2002 Hitoshi Yamamoto | ||
8 | * Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org> | ||
9 | */ | ||
10 | |||
11 | #include <linux/irqflags.h> | ||
12 | #include <asm/assembler.h> | ||
13 | #include <asm/dcache_clear.h> | ||
14 | |||
15 | extern void __xchg_called_with_bad_pointer(void); | ||
16 | |||
17 | static __always_inline unsigned long | ||
18 | __xchg(unsigned long x, volatile void *ptr, int size) | ||
19 | { | ||
20 | unsigned long flags; | ||
21 | unsigned long tmp = 0; | ||
22 | |||
23 | local_irq_save(flags); | ||
24 | |||
25 | switch (size) { | ||
26 | #ifndef CONFIG_SMP | ||
27 | case 1: | ||
28 | __asm__ __volatile__ ( | ||
29 | "ldb %0, @%2 \n\t" | ||
30 | "stb %1, @%2 \n\t" | ||
31 | : "=&r" (tmp) : "r" (x), "r" (ptr) : "memory"); | ||
32 | break; | ||
33 | case 2: | ||
34 | __asm__ __volatile__ ( | ||
35 | "ldh %0, @%2 \n\t" | ||
36 | "sth %1, @%2 \n\t" | ||
37 | : "=&r" (tmp) : "r" (x), "r" (ptr) : "memory"); | ||
38 | break; | ||
39 | case 4: | ||
40 | __asm__ __volatile__ ( | ||
41 | "ld %0, @%2 \n\t" | ||
42 | "st %1, @%2 \n\t" | ||
43 | : "=&r" (tmp) : "r" (x), "r" (ptr) : "memory"); | ||
44 | break; | ||
45 | #else /* CONFIG_SMP */ | ||
46 | case 4: | ||
47 | __asm__ __volatile__ ( | ||
48 | DCACHE_CLEAR("%0", "r4", "%2") | ||
49 | "lock %0, @%2; \n\t" | ||
50 | "unlock %1, @%2; \n\t" | ||
51 | : "=&r" (tmp) : "r" (x), "r" (ptr) | ||
52 | : "memory" | ||
53 | #ifdef CONFIG_CHIP_M32700_TS1 | ||
54 | , "r4" | ||
55 | #endif /* CONFIG_CHIP_M32700_TS1 */ | ||
56 | ); | ||
57 | break; | ||
58 | #endif /* CONFIG_SMP */ | ||
59 | default: | ||
60 | __xchg_called_with_bad_pointer(); | ||
61 | } | ||
62 | |||
63 | local_irq_restore(flags); | ||
64 | |||
65 | return (tmp); | ||
66 | } | ||
67 | |||
68 | #define xchg(ptr, x) ({ \ | ||
69 | ((__typeof__(*(ptr)))__xchg((unsigned long)(x), (ptr), \ | ||
70 | sizeof(*(ptr)))); \ | ||
71 | }) | ||
72 | |||
73 | static __always_inline unsigned long | ||
74 | __xchg_local(unsigned long x, volatile void *ptr, int size) | ||
75 | { | ||
76 | unsigned long flags; | ||
77 | unsigned long tmp = 0; | ||
78 | |||
79 | local_irq_save(flags); | ||
80 | |||
81 | switch (size) { | ||
82 | case 1: | ||
83 | __asm__ __volatile__ ( | ||
84 | "ldb %0, @%2 \n\t" | ||
85 | "stb %1, @%2 \n\t" | ||
86 | : "=&r" (tmp) : "r" (x), "r" (ptr) : "memory"); | ||
87 | break; | ||
88 | case 2: | ||
89 | __asm__ __volatile__ ( | ||
90 | "ldh %0, @%2 \n\t" | ||
91 | "sth %1, @%2 \n\t" | ||
92 | : "=&r" (tmp) : "r" (x), "r" (ptr) : "memory"); | ||
93 | break; | ||
94 | case 4: | ||
95 | __asm__ __volatile__ ( | ||
96 | "ld %0, @%2 \n\t" | ||
97 | "st %1, @%2 \n\t" | ||
98 | : "=&r" (tmp) : "r" (x), "r" (ptr) : "memory"); | ||
99 | break; | ||
100 | default: | ||
101 | __xchg_called_with_bad_pointer(); | ||
102 | } | ||
103 | |||
104 | local_irq_restore(flags); | ||
105 | |||
106 | return (tmp); | ||
107 | } | ||
108 | |||
109 | #define xchg_local(ptr, x) \ | ||
110 | ((__typeof__(*(ptr)))__xchg_local((unsigned long)(x), (ptr), \ | ||
111 | sizeof(*(ptr)))) | ||
112 | |||
113 | static inline unsigned long | ||
114 | __cmpxchg_u32(volatile unsigned int *p, unsigned int old, unsigned int new) | ||
115 | { | ||
116 | unsigned long flags; | ||
117 | unsigned int retval; | ||
118 | |||
119 | local_irq_save(flags); | ||
120 | __asm__ __volatile__ ( | ||
121 | DCACHE_CLEAR("%0", "r4", "%1") | ||
122 | M32R_LOCK" %0, @%1; \n" | ||
123 | " bne %0, %2, 1f; \n" | ||
124 | M32R_UNLOCK" %3, @%1; \n" | ||
125 | " bra 2f; \n" | ||
126 | " .fillinsn \n" | ||
127 | "1:" | ||
128 | M32R_UNLOCK" %0, @%1; \n" | ||
129 | " .fillinsn \n" | ||
130 | "2:" | ||
131 | : "=&r" (retval) | ||
132 | : "r" (p), "r" (old), "r" (new) | ||
133 | : "cbit", "memory" | ||
134 | #ifdef CONFIG_CHIP_M32700_TS1 | ||
135 | , "r4" | ||
136 | #endif /* CONFIG_CHIP_M32700_TS1 */ | ||
137 | ); | ||
138 | local_irq_restore(flags); | ||
139 | |||
140 | return retval; | ||
141 | } | ||
142 | |||
143 | static inline unsigned long | ||
144 | __cmpxchg_local_u32(volatile unsigned int *p, unsigned int old, | ||
145 | unsigned int new) | ||
146 | { | ||
147 | unsigned long flags; | ||
148 | unsigned int retval; | ||
149 | |||
150 | local_irq_save(flags); | ||
151 | __asm__ __volatile__ ( | ||
152 | DCACHE_CLEAR("%0", "r4", "%1") | ||
153 | "ld %0, @%1; \n" | ||
154 | " bne %0, %2, 1f; \n" | ||
155 | "st %3, @%1; \n" | ||
156 | " bra 2f; \n" | ||
157 | " .fillinsn \n" | ||
158 | "1:" | ||
159 | "st %0, @%1; \n" | ||
160 | " .fillinsn \n" | ||
161 | "2:" | ||
162 | : "=&r" (retval) | ||
163 | : "r" (p), "r" (old), "r" (new) | ||
164 | : "cbit", "memory" | ||
165 | #ifdef CONFIG_CHIP_M32700_TS1 | ||
166 | , "r4" | ||
167 | #endif /* CONFIG_CHIP_M32700_TS1 */ | ||
168 | ); | ||
169 | local_irq_restore(flags); | ||
170 | |||
171 | return retval; | ||
172 | } | ||
173 | |||
174 | /* This function doesn't exist, so you'll get a linker error | ||
175 | if something tries to do an invalid cmpxchg(). */ | ||
176 | extern void __cmpxchg_called_with_bad_pointer(void); | ||
177 | |||
178 | static inline unsigned long | ||
179 | __cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size) | ||
180 | { | ||
181 | switch (size) { | ||
182 | case 4: | ||
183 | return __cmpxchg_u32(ptr, old, new); | ||
184 | #if 0 /* we don't have __cmpxchg_u64 */ | ||
185 | case 8: | ||
186 | return __cmpxchg_u64(ptr, old, new); | ||
187 | #endif /* 0 */ | ||
188 | } | ||
189 | __cmpxchg_called_with_bad_pointer(); | ||
190 | return old; | ||
191 | } | ||
192 | |||
193 | #define cmpxchg(ptr, o, n) ({ \ | ||
194 | ((__typeof__(*(ptr))) \ | ||
195 | __cmpxchg((ptr), (unsigned long)(o), \ | ||
196 | (unsigned long)(n), \ | ||
197 | sizeof(*(ptr)))); \ | ||
198 | }) | ||
199 | |||
200 | #include <asm-generic/cmpxchg-local.h> | ||
201 | |||
202 | static inline unsigned long __cmpxchg_local(volatile void *ptr, | ||
203 | unsigned long old, | ||
204 | unsigned long new, int size) | ||
205 | { | ||
206 | switch (size) { | ||
207 | case 4: | ||
208 | return __cmpxchg_local_u32(ptr, old, new); | ||
209 | default: | ||
210 | return __cmpxchg_local_generic(ptr, old, new, size); | ||
211 | } | ||
212 | |||
213 | return old; | ||
214 | } | ||
215 | |||
216 | /* | ||
217 | * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make | ||
218 | * them available. | ||
219 | */ | ||
220 | #define cmpxchg_local(ptr, o, n) \ | ||
221 | ((__typeof__(*(ptr)))__cmpxchg_local((ptr), (unsigned long)(o), \ | ||
222 | (unsigned long)(n), sizeof(*(ptr)))) | ||
223 | #define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n)) | ||
224 | |||
225 | #endif /* _ASM_M32R_CMPXCHG_H */ | ||
diff --git a/arch/m32r/include/asm/dcache_clear.h b/arch/m32r/include/asm/dcache_clear.h deleted file mode 100644 index a0ae06c2e9e7..000000000000 --- a/arch/m32r/include/asm/dcache_clear.h +++ /dev/null | |||
@@ -1,29 +0,0 @@ | |||
1 | /* | ||
2 | * This file is subject to the terms and conditions of the GNU General Public | ||
3 | * License. See the file "COPYING" in the main directory of this archive | ||
4 | * for more details. | ||
5 | * | ||
6 | * Copyright (C) 2001 Hiroyuki Kondo, Hirokazu Takata, and Hitoshi Yamamoto | ||
7 | * Copyright (C) 2004, 2006 Hirokazu Takata <takata at linux-m32r.org> | ||
8 | */ | ||
9 | #ifndef _ASM_M32R_DCACHE_CLEAR_H | ||
10 | #define _ASM_M32R_DCACHE_CLEAR_H | ||
11 | |||
12 | #ifdef CONFIG_CHIP_M32700_TS1 | ||
13 | #define DCACHE_CLEAR(reg0, reg1, addr) \ | ||
14 | "seth "reg1", #high(dcache_dummy); \n\t" \ | ||
15 | "or3 "reg1", "reg1", #low(dcache_dummy); \n\t" \ | ||
16 | "lock "reg0", @"reg1"; \n\t" \ | ||
17 | "add3 "reg0", "addr", #0x1000; \n\t" \ | ||
18 | "ld "reg0", @"reg0"; \n\t" \ | ||
19 | "add3 "reg0", "addr", #0x2000; \n\t" \ | ||
20 | "ld "reg0", @"reg0"; \n\t" \ | ||
21 | "unlock "reg0", @"reg1"; \n\t" | ||
22 | /* FIXME: This workaround code cannot handle kernel modules | ||
23 | * correctly under SMP environment. | ||
24 | */ | ||
25 | #else /* CONFIG_CHIP_M32700_TS1 */ | ||
26 | #define DCACHE_CLEAR(reg0, reg1, addr) | ||
27 | #endif /* CONFIG_CHIP_M32700_TS1 */ | ||
28 | |||
29 | #endif /* _ASM_M32R_DCACHE_CLEAR_H */ | ||
diff --git a/arch/m32r/include/asm/delay.h b/arch/m32r/include/asm/delay.h deleted file mode 100644 index 9670e127b7b2..000000000000 --- a/arch/m32r/include/asm/delay.h +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | #include <asm-generic/delay.h> | ||
diff --git a/arch/m32r/include/asm/device.h b/arch/m32r/include/asm/device.h deleted file mode 100644 index 5203fc87f080..000000000000 --- a/arch/m32r/include/asm/device.h +++ /dev/null | |||
@@ -1,10 +0,0 @@ | |||
1 | /* | ||
2 | * Arch specific extensions to struct device | ||
3 | * | ||
4 | * This file is released under the GPLv2 | ||
5 | */ | ||
6 | struct dev_archdata { | ||
7 | }; | ||
8 | |||
9 | struct pdev_archdata { | ||
10 | }; | ||
diff --git a/arch/m32r/include/asm/div64.h b/arch/m32r/include/asm/div64.h deleted file mode 100644 index 6cd978cefb28..000000000000 --- a/arch/m32r/include/asm/div64.h +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | #include <asm-generic/div64.h> | ||
diff --git a/arch/m32r/include/asm/dma.h b/arch/m32r/include/asm/dma.h deleted file mode 100644 index 661bc3b343ed..000000000000 --- a/arch/m32r/include/asm/dma.h +++ /dev/null | |||
@@ -1,13 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifndef _ASM_M32R_DMA_H | ||
3 | #define _ASM_M32R_DMA_H | ||
4 | |||
5 | #include <asm/io.h> | ||
6 | |||
7 | /* | ||
8 | * The maximum address that we can perform a DMA transfer | ||
9 | * to on this platform | ||
10 | */ | ||
11 | #define MAX_DMA_ADDRESS (PAGE_OFFSET+0x20000000) | ||
12 | |||
13 | #endif /* _ASM_M32R_DMA_H */ | ||
diff --git a/arch/m32r/include/asm/elf.h b/arch/m32r/include/asm/elf.h deleted file mode 100644 index 576b2ff57957..000000000000 --- a/arch/m32r/include/asm/elf.h +++ /dev/null | |||
@@ -1,132 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifndef _ASM_M32R__ELF_H | ||
3 | #define _ASM_M32R__ELF_H | ||
4 | |||
5 | /* | ||
6 | * ELF-specific definitions. | ||
7 | * | ||
8 | * Copyright (C) 1999-2004, Renesas Technology Corp. | ||
9 | * Hirokazu Takata <takata at linux-m32r.org> | ||
10 | */ | ||
11 | |||
12 | #include <asm/ptrace.h> | ||
13 | #include <asm/user.h> | ||
14 | #include <asm/page.h> | ||
15 | |||
16 | /* M32R relocation types */ | ||
17 | #define R_M32R_NONE 0 | ||
18 | #define R_M32R_16 1 | ||
19 | #define R_M32R_32 2 | ||
20 | #define R_M32R_24 3 | ||
21 | #define R_M32R_10_PCREL 4 | ||
22 | #define R_M32R_18_PCREL 5 | ||
23 | #define R_M32R_26_PCREL 6 | ||
24 | #define R_M32R_HI16_ULO 7 | ||
25 | #define R_M32R_HI16_SLO 8 | ||
26 | #define R_M32R_LO16 9 | ||
27 | #define R_M32R_SDA16 10 | ||
28 | #define R_M32R_GNU_VTINHERIT 11 | ||
29 | #define R_M32R_GNU_VTENTRY 12 | ||
30 | |||
31 | #define R_M32R_16_RELA 33 | ||
32 | #define R_M32R_32_RELA 34 | ||
33 | #define R_M32R_24_RELA 35 | ||
34 | #define R_M32R_10_PCREL_RELA 36 | ||
35 | #define R_M32R_18_PCREL_RELA 37 | ||
36 | #define R_M32R_26_PCREL_RELA 38 | ||
37 | #define R_M32R_HI16_ULO_RELA 39 | ||
38 | #define R_M32R_HI16_SLO_RELA 40 | ||
39 | #define R_M32R_LO16_RELA 41 | ||
40 | #define R_M32R_SDA16_RELA 42 | ||
41 | #define R_M32R_RELA_GNU_VTINHERIT 43 | ||
42 | #define R_M32R_RELA_GNU_VTENTRY 44 | ||
43 | |||
44 | #define R_M32R_GOT24 48 | ||
45 | #define R_M32R_26_PLTREL 49 | ||
46 | #define R_M32R_COPY 50 | ||
47 | #define R_M32R_GLOB_DAT 51 | ||
48 | #define R_M32R_JMP_SLOT 52 | ||
49 | #define R_M32R_RELATIVE 53 | ||
50 | #define R_M32R_GOTOFF 54 | ||
51 | #define R_M32R_GOTPC24 55 | ||
52 | #define R_M32R_GOT16_HI_ULO 56 | ||
53 | #define R_M32R_GOT16_HI_SLO 57 | ||
54 | #define R_M32R_GOT16_LO 58 | ||
55 | #define R_M32R_GOTPC_HI_ULO 59 | ||
56 | #define R_M32R_GOTPC_HI_SLO 60 | ||
57 | #define R_M32R_GOTPC_LO 61 | ||
58 | #define R_M32R_GOTOFF_HI_ULO 62 | ||
59 | #define R_M32R_GOTOFF_HI_SLO 63 | ||
60 | #define R_M32R_GOTOFF_LO 64 | ||
61 | |||
62 | #define R_M32R_NUM 256 | ||
63 | |||
64 | /* | ||
65 | * ELF register definitions.. | ||
66 | */ | ||
67 | #define ELF_NGREG (sizeof (struct pt_regs) / sizeof(elf_greg_t)) | ||
68 | |||
69 | typedef unsigned long elf_greg_t; | ||
70 | typedef elf_greg_t elf_gregset_t[ELF_NGREG]; | ||
71 | |||
72 | /* We have no FP mumumu. */ | ||
73 | typedef double elf_fpreg_t; | ||
74 | typedef elf_fpreg_t elf_fpregset_t; | ||
75 | |||
76 | /* | ||
77 | * This is used to ensure we don't load something for the wrong architecture. | ||
78 | */ | ||
79 | #define elf_check_arch(x) \ | ||
80 | (((x)->e_machine == EM_M32R) || ((x)->e_machine == EM_CYGNUS_M32R)) | ||
81 | |||
82 | /* | ||
83 | * These are used to set parameters in the core dumps. | ||
84 | */ | ||
85 | #define ELF_CLASS ELFCLASS32 | ||
86 | #if defined(__LITTLE_ENDIAN__) | ||
87 | #define ELF_DATA ELFDATA2LSB | ||
88 | #elif defined(__BIG_ENDIAN__) | ||
89 | #define ELF_DATA ELFDATA2MSB | ||
90 | #else | ||
91 | #error no endian defined | ||
92 | #endif | ||
93 | #define ELF_ARCH EM_M32R | ||
94 | |||
95 | /* r0 is set by ld.so to a pointer to a function which might be | ||
96 | * registered using 'atexit'. This provides a mean for the dynamic | ||
97 | * linker to call DT_FINI functions for shared libraries that have | ||
98 | * been loaded before the code runs. | ||
99 | * | ||
100 | * So that we can use the same startup file with static executables, | ||
101 | * we start programs with a value of 0 to indicate that there is no | ||
102 | * such function. | ||
103 | */ | ||
104 | #define ELF_PLAT_INIT(_r, load_addr) (_r)->r0 = 0 | ||
105 | |||
106 | #define ELF_EXEC_PAGESIZE PAGE_SIZE | ||
107 | |||
108 | /* | ||
109 | * This is the location that an ET_DYN program is loaded if exec'ed. | ||
110 | * Typical use of this is to invoke "./ld.so someprog" to test out a | ||
111 | * new version of the loader. We need to make sure that it is out of | ||
112 | * the way of the program that it will "exec", and that there is | ||
113 | * sufficient room for the brk. | ||
114 | */ | ||
115 | #define ELF_ET_DYN_BASE (TASK_SIZE / 3 * 2) | ||
116 | |||
117 | /* regs is struct pt_regs, pr_reg is elf_gregset_t (which is | ||
118 | now struct_user_regs, they are different) */ | ||
119 | |||
120 | #define ELF_CORE_COPY_REGS(pr_reg, regs) \ | ||
121 | memcpy((char *)pr_reg, (char *)regs, sizeof (struct pt_regs)); | ||
122 | |||
123 | /* This yields a mask that user programs can use to figure out what | ||
124 | instruction set this CPU supports. */ | ||
125 | #define ELF_HWCAP (0) | ||
126 | |||
127 | /* This yields a string that ld.so will use to load implementation | ||
128 | specific libraries for optimization. This is more specific in | ||
129 | intent than poking at uname or /proc/cpuinfo. */ | ||
130 | #define ELF_PLATFORM (NULL) | ||
131 | |||
132 | #endif /* _ASM_M32R__ELF_H */ | ||
diff --git a/arch/m32r/include/asm/emergency-restart.h b/arch/m32r/include/asm/emergency-restart.h deleted file mode 100644 index cca44d5ae264..000000000000 --- a/arch/m32r/include/asm/emergency-restart.h +++ /dev/null | |||
@@ -1,7 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifndef _ASM_EMERGENCY_RESTART_H | ||
3 | #define _ASM_EMERGENCY_RESTART_H | ||
4 | |||
5 | #include <asm-generic/emergency-restart.h> | ||
6 | |||
7 | #endif /* _ASM_EMERGENCY_RESTART_H */ | ||
diff --git a/arch/m32r/include/asm/fb.h b/arch/m32r/include/asm/fb.h deleted file mode 100644 index 9a0bca2686fd..000000000000 --- a/arch/m32r/include/asm/fb.h +++ /dev/null | |||
@@ -1,20 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifndef _ASM_FB_H_ | ||
3 | #define _ASM_FB_H_ | ||
4 | |||
5 | #include <linux/fb.h> | ||
6 | #include <linux/fs.h> | ||
7 | #include <asm/page.h> | ||
8 | |||
9 | static inline void fb_pgprotect(struct file *file, struct vm_area_struct *vma, | ||
10 | unsigned long off) | ||
11 | { | ||
12 | vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot); | ||
13 | } | ||
14 | |||
15 | static inline int fb_is_primary_device(struct fb_info *info) | ||
16 | { | ||
17 | return 0; | ||
18 | } | ||
19 | |||
20 | #endif /* _ASM_FB_H_ */ | ||
diff --git a/arch/m32r/include/asm/flat.h b/arch/m32r/include/asm/flat.h deleted file mode 100644 index dfcb0e4eb256..000000000000 --- a/arch/m32r/include/asm/flat.h +++ /dev/null | |||
@@ -1,143 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-m32r/flat.h | ||
3 | * | ||
4 | * uClinux flat-format executables | ||
5 | * | ||
6 | * Copyright (C) 2004 Kazuhiro Inaoka | ||
7 | * | ||
8 | * This file is subject to the terms and conditions of the GNU General Public | ||
9 | * License. See the file "COPYING" in the main directory of this archive for | ||
10 | * more details. | ||
11 | */ | ||
12 | #ifndef __ASM_M32R_FLAT_H | ||
13 | #define __ASM_M32R_FLAT_H | ||
14 | |||
15 | #define flat_argvp_envp_on_stack() 0 | ||
16 | #define flat_old_ram_flag(flags) (flags) | ||
17 | #define flat_set_persistent(relval, p) 0 | ||
18 | #define flat_reloc_valid(reloc, size) \ | ||
19 | (((reloc) - textlen_for_m32r_lo16_data) <= (size)) | ||
20 | |||
21 | /* Convert a relocation entry into an address. */ | ||
22 | static inline unsigned long | ||
23 | flat_get_relocate_addr (unsigned long relval) | ||
24 | { | ||
25 | return relval & 0x00ffffff; /* Mask out top 8-bits */ | ||
26 | } | ||
27 | |||
28 | #define flat_m32r_get_reloc_type(relval) ((relval) >> 24) | ||
29 | |||
30 | #define M32R_SETH_OPCODE 0xd0c00000 /* SETH instruction code */ | ||
31 | |||
32 | #define FLAT_M32R_32 0x00 /* 32bits reloc */ | ||
33 | #define FLAT_M32R_24 0x01 /* unsigned 24bits reloc */ | ||
34 | #define FLAT_M32R_16 0x02 /* 16bits reloc */ | ||
35 | #define FLAT_M32R_LO16 0x03 /* signed low 16bits reloc (low()) */ | ||
36 | #define FLAT_M32R_LO16_DATA 0x04 /* signed low 16bits reloc (low()) | ||
37 | for a symbol in .data section */ | ||
38 | /* High 16bits of an address used | ||
39 | when the lower 16bbits are treated | ||
40 | as unsigned. | ||
41 | To create SETH instruction only. | ||
42 | 0x1X: X means a number of register. | ||
43 | 0x10 - 0x3F are reserved. */ | ||
44 | #define FLAT_M32R_HI16_ULO 0x10 /* reloc for SETH Rn,#high(imm16) */ | ||
45 | /* High 16bits of an address used | ||
46 | when the lower 16bbits are treated | ||
47 | as signed. | ||
48 | To create SETH instruction only. | ||
49 | 0x2X: X means a number of register. | ||
50 | 0x20 - 0x4F are reserved. */ | ||
51 | #define FLAT_M32R_HI16_SLO 0x20 /* reloc for SETH Rn,#shigh(imm16) */ | ||
52 | |||
53 | static unsigned long textlen_for_m32r_lo16_data = 0; | ||
54 | |||
55 | static inline unsigned long m32r_flat_get_addr_from_rp (u32 *rp, | ||
56 | u32 relval, | ||
57 | u32 textlen) | ||
58 | { | ||
59 | unsigned int reloc = flat_m32r_get_reloc_type (relval); | ||
60 | textlen_for_m32r_lo16_data = 0; | ||
61 | if (reloc & 0xf0) { | ||
62 | unsigned long addr = htonl(*rp); | ||
63 | switch (reloc & 0xf0) | ||
64 | { | ||
65 | case FLAT_M32R_HI16_ULO: | ||
66 | case FLAT_M32R_HI16_SLO: | ||
67 | if (addr == 0) { | ||
68 | /* put "seth Rn,#0x0" instead of 0 (addr). */ | ||
69 | *rp = (M32R_SETH_OPCODE | ((reloc & 0x0f)<<24)); | ||
70 | } | ||
71 | return addr; | ||
72 | default: | ||
73 | break; | ||
74 | } | ||
75 | } else { | ||
76 | switch (reloc) | ||
77 | { | ||
78 | case FLAT_M32R_LO16: | ||
79 | return htonl(*rp) & 0xFFFF; | ||
80 | case FLAT_M32R_LO16_DATA: | ||
81 | /* FIXME: The return value will decrease by textlen | ||
82 | at m32r_flat_put_addr_at_rp () */ | ||
83 | textlen_for_m32r_lo16_data = textlen; | ||
84 | return (htonl(*rp) & 0xFFFF) + textlen; | ||
85 | case FLAT_M32R_16: | ||
86 | return htons(*(unsigned short *)rp) & 0xFFFF; | ||
87 | case FLAT_M32R_24: | ||
88 | return htonl(*rp) & 0xFFFFFF; | ||
89 | case FLAT_M32R_32: | ||
90 | return htonl(*rp); | ||
91 | default: | ||
92 | break; | ||
93 | } | ||
94 | } | ||
95 | return ~0; /* bogus value */ | ||
96 | } | ||
97 | |||
98 | static inline int flat_put_addr_at_rp(u32 *rp, u32 addr, u32 relval) | ||
99 | { | ||
100 | unsigned int reloc = flat_m32r_get_reloc_type (relval); | ||
101 | if (reloc & 0xf0) { | ||
102 | unsigned long Rn = reloc & 0x0f; /* get a number of register */ | ||
103 | Rn <<= 24; /* 0x0R000000 */ | ||
104 | reloc &= 0xf0; | ||
105 | switch (reloc) | ||
106 | { | ||
107 | case FLAT_M32R_HI16_ULO: /* To create SETH Rn,#high(imm16) */ | ||
108 | *rp = (M32R_SETH_OPCODE | Rn | ||
109 | | ((addr >> 16) & 0xFFFF)); | ||
110 | break; | ||
111 | case FLAT_M32R_HI16_SLO: /* To create SETH Rn,#shigh(imm16) */ | ||
112 | *rp = (M32R_SETH_OPCODE | Rn | ||
113 | | (((addr >> 16) + ((addr & 0x8000) ? 1 : 0)) | ||
114 | & 0xFFFF)); | ||
115 | break; | ||
116 | } | ||
117 | } else { | ||
118 | switch (reloc) { | ||
119 | case FLAT_M32R_LO16_DATA: | ||
120 | addr -= textlen_for_m32r_lo16_data; | ||
121 | textlen_for_m32r_lo16_data = 0; | ||
122 | case FLAT_M32R_LO16: | ||
123 | *rp = (htonl(*rp) & 0xFFFF0000) | (addr & 0xFFFF); | ||
124 | break; | ||
125 | case FLAT_M32R_16: | ||
126 | *(unsigned short *)rp = addr & 0xFFFF; | ||
127 | break; | ||
128 | case FLAT_M32R_24: | ||
129 | *rp = (htonl(*rp) & 0xFF000000) | (addr & 0xFFFFFF); | ||
130 | break; | ||
131 | case FLAT_M32R_32: | ||
132 | *rp = addr; | ||
133 | break; | ||
134 | } | ||
135 | } | ||
136 | return 0; | ||
137 | } | ||
138 | |||
139 | // kludge - text_len is a local variable in the only user. | ||
140 | #define flat_get_addr_from_rp(rp, relval, flags, addr, persistent) \ | ||
141 | (m32r_flat_get_addr_from_rp(rp, relval, text_len), 0) | ||
142 | |||
143 | #endif /* __ASM_M32R_FLAT_H */ | ||
diff --git a/arch/m32r/include/asm/ftrace.h b/arch/m32r/include/asm/ftrace.h deleted file mode 100644 index 40a8c178f10d..000000000000 --- a/arch/m32r/include/asm/ftrace.h +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | /* empty */ | ||
diff --git a/arch/m32r/include/asm/futex.h b/arch/m32r/include/asm/futex.h deleted file mode 100644 index 6a332a9f099c..000000000000 --- a/arch/m32r/include/asm/futex.h +++ /dev/null | |||
@@ -1,6 +0,0 @@ | |||
1 | #ifndef _ASM_FUTEX_H | ||
2 | #define _ASM_FUTEX_H | ||
3 | |||
4 | #include <asm-generic/futex.h> | ||
5 | |||
6 | #endif | ||
diff --git a/arch/m32r/include/asm/hardirq.h b/arch/m32r/include/asm/hardirq.h deleted file mode 100644 index 10c23de02b3a..000000000000 --- a/arch/m32r/include/asm/hardirq.h +++ /dev/null | |||
@@ -1,10 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifdef __KERNEL__ | ||
3 | #ifndef __ASM_HARDIRQ_H | ||
4 | #define __ASM_HARDIRQ_H | ||
5 | |||
6 | #include <asm/irq.h> | ||
7 | #include <asm-generic/hardirq.h> | ||
8 | |||
9 | #endif /* __ASM_HARDIRQ_H */ | ||
10 | #endif /* __KERNEL__ */ | ||
diff --git a/arch/m32r/include/asm/hw_irq.h b/arch/m32r/include/asm/hw_irq.h deleted file mode 100644 index 7138537cda03..000000000000 --- a/arch/m32r/include/asm/hw_irq.h +++ /dev/null | |||
@@ -1,4 +0,0 @@ | |||
1 | #ifndef _ASM_M32R_HW_IRQ_H | ||
2 | #define _ASM_M32R_HW_IRQ_H | ||
3 | |||
4 | #endif /* _ASM_M32R_HW_IRQ_H */ | ||
diff --git a/arch/m32r/include/asm/io.h b/arch/m32r/include/asm/io.h deleted file mode 100644 index a4272d8f0d9c..000000000000 --- a/arch/m32r/include/asm/io.h +++ /dev/null | |||
@@ -1,225 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifndef _ASM_M32R_IO_H | ||
3 | #define _ASM_M32R_IO_H | ||
4 | |||
5 | #include <linux/string.h> | ||
6 | #include <linux/compiler.h> | ||
7 | #include <asm/page.h> /* __va */ | ||
8 | |||
9 | #ifdef __KERNEL__ | ||
10 | |||
11 | #define IO_SPACE_LIMIT 0xFFFFFFFF | ||
12 | |||
13 | /** | ||
14 | * virt_to_phys - map virtual addresses to physical | ||
15 | * @address: address to remap | ||
16 | * | ||
17 | * The returned physical address is the physical (CPU) mapping for | ||
18 | * the memory address given. It is only valid to use this function on | ||
19 | * addresses directly mapped or allocated via kmalloc. | ||
20 | * | ||
21 | * This function does not give bus mappings for DMA transfers. In | ||
22 | * almost all conceivable cases a device driver should not be using | ||
23 | * this function | ||
24 | */ | ||
25 | |||
26 | static inline unsigned long virt_to_phys(volatile void * address) | ||
27 | { | ||
28 | return __pa(address); | ||
29 | } | ||
30 | |||
31 | /** | ||
32 | * phys_to_virt - map physical address to virtual | ||
33 | * @address: address to remap | ||
34 | * | ||
35 | * The returned virtual address is a current CPU mapping for | ||
36 | * the memory address given. It is only valid to use this function on | ||
37 | * addresses that have a kernel mapping | ||
38 | * | ||
39 | * This function does not handle bus mappings for DMA transfers. In | ||
40 | * almost all conceivable cases a device driver should not be using | ||
41 | * this function | ||
42 | */ | ||
43 | |||
44 | static inline void *phys_to_virt(unsigned long address) | ||
45 | { | ||
46 | return __va(address); | ||
47 | } | ||
48 | |||
49 | extern void __iomem * | ||
50 | __ioremap(unsigned long offset, unsigned long size, unsigned long flags); | ||
51 | |||
52 | /** | ||
53 | * ioremap - map bus memory into CPU space | ||
54 | * @offset: bus address of the memory | ||
55 | * @size: size of the resource to map | ||
56 | * | ||
57 | * ioremap performs a platform specific sequence of operations to | ||
58 | * make bus memory CPU accessible via the readb/readw/readl/writeb/ | ||
59 | * writew/writel functions and the other mmio helpers. The returned | ||
60 | * address is not guaranteed to be usable directly as a virtual | ||
61 | * address. | ||
62 | */ | ||
63 | |||
64 | static inline void __iomem *ioremap(unsigned long offset, unsigned long size) | ||
65 | { | ||
66 | return __ioremap(offset, size, 0); | ||
67 | } | ||
68 | |||
69 | extern void iounmap(volatile void __iomem *addr); | ||
70 | #define ioremap_nocache(off,size) ioremap(off,size) | ||
71 | #define ioremap_wc ioremap_nocache | ||
72 | #define ioremap_wt ioremap_nocache | ||
73 | #define ioremap_uc ioremap_nocache | ||
74 | |||
75 | /* | ||
76 | * IO bus memory addresses are also 1:1 with the physical address | ||
77 | */ | ||
78 | #define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT) | ||
79 | #define page_to_bus page_to_phys | ||
80 | #define virt_to_bus virt_to_phys | ||
81 | |||
82 | extern unsigned char _inb(unsigned long); | ||
83 | extern unsigned short _inw(unsigned long); | ||
84 | extern unsigned long _inl(unsigned long); | ||
85 | extern unsigned char _inb_p(unsigned long); | ||
86 | extern unsigned short _inw_p(unsigned long); | ||
87 | extern unsigned long _inl_p(unsigned long); | ||
88 | extern void _outb(unsigned char, unsigned long); | ||
89 | extern void _outw(unsigned short, unsigned long); | ||
90 | extern void _outl(unsigned long, unsigned long); | ||
91 | extern void _outb_p(unsigned char, unsigned long); | ||
92 | extern void _outw_p(unsigned short, unsigned long); | ||
93 | extern void _outl_p(unsigned long, unsigned long); | ||
94 | extern void _insb(unsigned int, void *, unsigned long); | ||
95 | extern void _insw(unsigned int, void *, unsigned long); | ||
96 | extern void _insl(unsigned int, void *, unsigned long); | ||
97 | extern void _outsb(unsigned int, const void *, unsigned long); | ||
98 | extern void _outsw(unsigned int, const void *, unsigned long); | ||
99 | extern void _outsl(unsigned int, const void *, unsigned long); | ||
100 | |||
101 | static inline unsigned char _readb(unsigned long addr) | ||
102 | { | ||
103 | return *(volatile unsigned char __force *)addr; | ||
104 | } | ||
105 | |||
106 | static inline unsigned short _readw(unsigned long addr) | ||
107 | { | ||
108 | return *(volatile unsigned short __force *)addr; | ||
109 | } | ||
110 | |||
111 | static inline unsigned long _readl(unsigned long addr) | ||
112 | { | ||
113 | return *(volatile unsigned long __force *)addr; | ||
114 | } | ||
115 | |||
116 | static inline void _writeb(unsigned char b, unsigned long addr) | ||
117 | { | ||
118 | *(volatile unsigned char __force *)addr = b; | ||
119 | } | ||
120 | |||
121 | static inline void _writew(unsigned short w, unsigned long addr) | ||
122 | { | ||
123 | *(volatile unsigned short __force *)addr = w; | ||
124 | } | ||
125 | |||
126 | static inline void _writel(unsigned long l, unsigned long addr) | ||
127 | { | ||
128 | *(volatile unsigned long __force *)addr = l; | ||
129 | } | ||
130 | |||
131 | #define inb _inb | ||
132 | #define inw _inw | ||
133 | #define inl _inl | ||
134 | #define outb _outb | ||
135 | #define outw _outw | ||
136 | #define outl _outl | ||
137 | |||
138 | #define inb_p _inb_p | ||
139 | #define inw_p _inw_p | ||
140 | #define inl_p _inl_p | ||
141 | #define outb_p _outb_p | ||
142 | #define outw_p _outw_p | ||
143 | #define outl_p _outl_p | ||
144 | |||
145 | #define insb _insb | ||
146 | #define insw _insw | ||
147 | #define insl _insl | ||
148 | #define outsb _outsb | ||
149 | #define outsw _outsw | ||
150 | #define outsl _outsl | ||
151 | |||
152 | #define readb(addr) _readb((unsigned long)(addr)) | ||
153 | #define readw(addr) _readw((unsigned long)(addr)) | ||
154 | #define readl(addr) _readl((unsigned long)(addr)) | ||
155 | #define __raw_readb readb | ||
156 | #define __raw_readw readw | ||
157 | #define __raw_readl readl | ||
158 | #define readb_relaxed readb | ||
159 | #define readw_relaxed readw | ||
160 | #define readl_relaxed readl | ||
161 | |||
162 | #define writeb(val, addr) _writeb((val), (unsigned long)(addr)) | ||
163 | #define writew(val, addr) _writew((val), (unsigned long)(addr)) | ||
164 | #define writel(val, addr) _writel((val), (unsigned long)(addr)) | ||
165 | #define __raw_writeb writeb | ||
166 | #define __raw_writew writew | ||
167 | #define __raw_writel writel | ||
168 | #define writeb_relaxed writeb | ||
169 | #define writew_relaxed writew | ||
170 | #define writel_relaxed writel | ||
171 | |||
172 | #define ioread8 readb | ||
173 | #define ioread16 readw | ||
174 | #define ioread32 readl | ||
175 | #define iowrite8 writeb | ||
176 | #define iowrite16 writew | ||
177 | #define iowrite32 writel | ||
178 | |||
179 | #define ioread8_rep(p, dst, count) insb((unsigned long)(p), (dst), (count)) | ||
180 | #define ioread16_rep(p, dst, count) insw((unsigned long)(p), (dst), (count)) | ||
181 | #define ioread32_rep(p, dst, count) insl((unsigned long)(p), (dst), (count)) | ||
182 | |||
183 | #define iowrite8_rep(p, src, count) outsb((unsigned long)(p), (src), (count)) | ||
184 | #define iowrite16_rep(p, src, count) outsw((unsigned long)(p), (src), (count)) | ||
185 | #define iowrite32_rep(p, src, count) outsl((unsigned long)(p), (src), (count)) | ||
186 | |||
187 | #define ioread16be(addr) be16_to_cpu(readw(addr)) | ||
188 | #define ioread32be(addr) be32_to_cpu(readl(addr)) | ||
189 | #define iowrite16be(v, addr) writew(cpu_to_be16(v), (addr)) | ||
190 | #define iowrite32be(v, addr) writel(cpu_to_be32(v), (addr)) | ||
191 | |||
192 | #define mmiowb() | ||
193 | |||
194 | static inline void | ||
195 | memset_io(volatile void __iomem *addr, unsigned char val, int count) | ||
196 | { | ||
197 | memset((void __force *) addr, val, count); | ||
198 | } | ||
199 | |||
200 | static inline void | ||
201 | memcpy_fromio(void *dst, volatile void __iomem *src, int count) | ||
202 | { | ||
203 | memcpy(dst, (void __force *) src, count); | ||
204 | } | ||
205 | |||
206 | static inline void | ||
207 | memcpy_toio(volatile void __iomem *dst, const void *src, int count) | ||
208 | { | ||
209 | memcpy((void __force *) dst, src, count); | ||
210 | } | ||
211 | |||
212 | /* | ||
213 | * Convert a physical pointer to a virtual kernel pointer for /dev/mem | ||
214 | * access | ||
215 | */ | ||
216 | #define xlate_dev_mem_ptr(p) __va(p) | ||
217 | |||
218 | /* | ||
219 | * Convert a virtual cached pointer to an uncached pointer | ||
220 | */ | ||
221 | #define xlate_dev_kmem_ptr(p) p | ||
222 | |||
223 | #endif /* __KERNEL__ */ | ||
224 | |||
225 | #endif /* _ASM_M32R_IO_H */ | ||
diff --git a/arch/m32r/include/asm/irq.h b/arch/m32r/include/asm/irq.h deleted file mode 100644 index 85b475fff90e..000000000000 --- a/arch/m32r/include/asm/irq.h +++ /dev/null | |||
@@ -1,91 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifdef __KERNEL__ | ||
3 | #ifndef _ASM_M32R_IRQ_H | ||
4 | #define _ASM_M32R_IRQ_H | ||
5 | |||
6 | |||
7 | #if defined(CONFIG_PLAT_USRV) | ||
8 | /* | ||
9 | * IRQ definitions for M32700UT | ||
10 | * M32700 Chip: 64 interrupts | ||
11 | * ICU of M32700UT-on-board PLD: 32 interrupts cascaded to INT1# chip pin | ||
12 | */ | ||
13 | #define M32700UT_NUM_CPU_IRQ (64) | ||
14 | #define M32700UT_NUM_PLD_IRQ (32) | ||
15 | #define M32700UT_IRQ_BASE 0 | ||
16 | #define M32700UT_CPU_IRQ_BASE M32700UT_IRQ_BASE | ||
17 | #define M32700UT_PLD_IRQ_BASE (M32700UT_CPU_IRQ_BASE + M32700UT_NUM_CPU_IRQ) | ||
18 | |||
19 | #define NR_IRQS (M32700UT_NUM_CPU_IRQ + M32700UT_NUM_PLD_IRQ) | ||
20 | #elif defined(CONFIG_PLAT_M32700UT) | ||
21 | /* | ||
22 | * IRQ definitions for M32700UT(Rev.C) + M32R-LAN | ||
23 | * M32700 Chip: 64 interrupts | ||
24 | * ICU of M32700UT-on-board PLD: 32 interrupts cascaded to INT1# chip pin | ||
25 | * ICU of M32R-LCD-on-board PLD: 32 interrupts cascaded to INT2# chip pin | ||
26 | * ICU of M32R-LAN-on-board PLD: 32 interrupts cascaded to INT0# chip pin | ||
27 | */ | ||
28 | #define M32700UT_NUM_CPU_IRQ (64) | ||
29 | #define M32700UT_NUM_PLD_IRQ (32) | ||
30 | #define M32700UT_NUM_LCD_PLD_IRQ (32) | ||
31 | #define M32700UT_NUM_LAN_PLD_IRQ (32) | ||
32 | #define M32700UT_IRQ_BASE 0 | ||
33 | #define M32700UT_CPU_IRQ_BASE (M32700UT_IRQ_BASE) | ||
34 | #define M32700UT_PLD_IRQ_BASE \ | ||
35 | (M32700UT_CPU_IRQ_BASE + M32700UT_NUM_CPU_IRQ) | ||
36 | #define M32700UT_LCD_PLD_IRQ_BASE \ | ||
37 | (M32700UT_PLD_IRQ_BASE + M32700UT_NUM_PLD_IRQ) | ||
38 | #define M32700UT_LAN_PLD_IRQ_BASE \ | ||
39 | (M32700UT_LCD_PLD_IRQ_BASE + M32700UT_NUM_LCD_PLD_IRQ) | ||
40 | |||
41 | #define NR_IRQS \ | ||
42 | (M32700UT_NUM_CPU_IRQ + M32700UT_NUM_PLD_IRQ \ | ||
43 | + M32700UT_NUM_LCD_PLD_IRQ + M32700UT_NUM_LAN_PLD_IRQ) | ||
44 | #elif defined(CONFIG_PLAT_OPSPUT) | ||
45 | /* | ||
46 | * IRQ definitions for OPSPUT + M32R-LAN | ||
47 | * OPSP Chip: 64 interrupts | ||
48 | * ICU of OPSPUT-on-board PLD: 32 interrupts cascaded to INT1# chip pin | ||
49 | * ICU of M32R-LCD-on-board PLD: 32 interrupts cascaded to INT2# chip pin | ||
50 | * ICU of M32R-LAN-on-board PLD: 32 interrupts cascaded to INT0# chip pin | ||
51 | */ | ||
52 | #define OPSPUT_NUM_CPU_IRQ (64) | ||
53 | #define OPSPUT_NUM_PLD_IRQ (32) | ||
54 | #define OPSPUT_NUM_LCD_PLD_IRQ (32) | ||
55 | #define OPSPUT_NUM_LAN_PLD_IRQ (32) | ||
56 | #define OPSPUT_IRQ_BASE 0 | ||
57 | #define OPSPUT_CPU_IRQ_BASE (OPSPUT_IRQ_BASE) | ||
58 | #define OPSPUT_PLD_IRQ_BASE \ | ||
59 | (OPSPUT_CPU_IRQ_BASE + OPSPUT_NUM_CPU_IRQ) | ||
60 | #define OPSPUT_LCD_PLD_IRQ_BASE \ | ||
61 | (OPSPUT_PLD_IRQ_BASE + OPSPUT_NUM_PLD_IRQ) | ||
62 | #define OPSPUT_LAN_PLD_IRQ_BASE \ | ||
63 | (OPSPUT_LCD_PLD_IRQ_BASE + OPSPUT_NUM_LCD_PLD_IRQ) | ||
64 | |||
65 | #define NR_IRQS \ | ||
66 | (OPSPUT_NUM_CPU_IRQ + OPSPUT_NUM_PLD_IRQ \ | ||
67 | + OPSPUT_NUM_LCD_PLD_IRQ + OPSPUT_NUM_LAN_PLD_IRQ) | ||
68 | |||
69 | #elif defined(CONFIG_PLAT_M32104UT) | ||
70 | /* | ||
71 | * IRQ definitions for M32104UT | ||
72 | * M32104 Chip: 64 interrupts | ||
73 | * ICU of M32104UT-on-board PLD: 32 interrupts cascaded to INT1# chip pin | ||
74 | */ | ||
75 | #define M32104UT_NUM_CPU_IRQ (64) | ||
76 | #define M32104UT_NUM_PLD_IRQ (32) | ||
77 | #define M32104UT_IRQ_BASE 0 | ||
78 | #define M32104UT_CPU_IRQ_BASE M32104UT_IRQ_BASE | ||
79 | #define M32104UT_PLD_IRQ_BASE (M32104UT_CPU_IRQ_BASE + M32104UT_NUM_CPU_IRQ) | ||
80 | |||
81 | #define NR_IRQS \ | ||
82 | (M32104UT_NUM_CPU_IRQ + M32104UT_NUM_PLD_IRQ) | ||
83 | |||
84 | #else | ||
85 | #define NR_IRQS 64 | ||
86 | #endif | ||
87 | |||
88 | #define irq_canonicalize(irq) (irq) | ||
89 | |||
90 | #endif /* _ASM_M32R_IRQ_H */ | ||
91 | #endif /* __KERNEL__ */ | ||
diff --git a/arch/m32r/include/asm/irq_regs.h b/arch/m32r/include/asm/irq_regs.h deleted file mode 100644 index 3dd9c0b70270..000000000000 --- a/arch/m32r/include/asm/irq_regs.h +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | #include <asm-generic/irq_regs.h> | ||
diff --git a/arch/m32r/include/asm/irqflags.h b/arch/m32r/include/asm/irqflags.h deleted file mode 100644 index 1f92d29982ae..000000000000 --- a/arch/m32r/include/asm/irqflags.h +++ /dev/null | |||
@@ -1,104 +0,0 @@ | |||
1 | /* | ||
2 | * This file is subject to the terms and conditions of the GNU General Public | ||
3 | * License. See the file "COPYING" in the main directory of this archive | ||
4 | * for more details. | ||
5 | * | ||
6 | * Copyright (C) 2001 Hiroyuki Kondo, Hirokazu Takata, and Hitoshi Yamamoto | ||
7 | * Copyright (C) 2004, 2006 Hirokazu Takata <takata at linux-m32r.org> | ||
8 | */ | ||
9 | |||
10 | #ifndef _ASM_M32R_IRQFLAGS_H | ||
11 | #define _ASM_M32R_IRQFLAGS_H | ||
12 | |||
13 | #include <linux/types.h> | ||
14 | |||
15 | static inline unsigned long arch_local_save_flags(void) | ||
16 | { | ||
17 | unsigned long flags; | ||
18 | asm volatile("mvfc %0,psw" : "=r"(flags)); | ||
19 | return flags; | ||
20 | } | ||
21 | |||
22 | static inline void arch_local_irq_disable(void) | ||
23 | { | ||
24 | #if !defined(CONFIG_CHIP_M32102) && !defined(CONFIG_CHIP_M32104) | ||
25 | asm volatile ( | ||
26 | "clrpsw #0x40 -> nop" | ||
27 | : : : "memory"); | ||
28 | #else | ||
29 | unsigned long tmpreg0, tmpreg1; | ||
30 | asm volatile ( | ||
31 | "ld24 %0, #0 ; Use 32-bit insn. \n\t" | ||
32 | "mvfc %1, psw ; No interrupt can be accepted here. \n\t" | ||
33 | "mvtc %0, psw \n\t" | ||
34 | "and3 %0, %1, #0xffbf \n\t" | ||
35 | "mvtc %0, psw \n\t" | ||
36 | : "=&r" (tmpreg0), "=&r" (tmpreg1) | ||
37 | : | ||
38 | : "cbit", "memory"); | ||
39 | #endif | ||
40 | } | ||
41 | |||
42 | static inline void arch_local_irq_enable(void) | ||
43 | { | ||
44 | #if !defined(CONFIG_CHIP_M32102) && !defined(CONFIG_CHIP_M32104) | ||
45 | asm volatile ( | ||
46 | "setpsw #0x40 -> nop" | ||
47 | : : : "memory"); | ||
48 | #else | ||
49 | unsigned long tmpreg; | ||
50 | asm volatile ( | ||
51 | "mvfc %0, psw; \n\t" | ||
52 | "or3 %0, %0, #0x0040; \n\t" | ||
53 | "mvtc %0, psw; \n\t" | ||
54 | : "=&r" (tmpreg) | ||
55 | : | ||
56 | : "cbit", "memory"); | ||
57 | #endif | ||
58 | } | ||
59 | |||
60 | static inline unsigned long arch_local_irq_save(void) | ||
61 | { | ||
62 | unsigned long flags; | ||
63 | |||
64 | #if !(defined(CONFIG_CHIP_M32102) || defined(CONFIG_CHIP_M32104)) | ||
65 | asm volatile ( | ||
66 | "mvfc %0, psw; \n\t" | ||
67 | "clrpsw #0x40 -> nop; \n\t" | ||
68 | : "=r" (flags) | ||
69 | : | ||
70 | : "memory"); | ||
71 | #else | ||
72 | unsigned long tmpreg; | ||
73 | asm volatile ( | ||
74 | "ld24 %1, #0 \n\t" | ||
75 | "mvfc %0, psw \n\t" | ||
76 | "mvtc %1, psw \n\t" | ||
77 | "and3 %1, %0, #0xffbf \n\t" | ||
78 | "mvtc %1, psw \n\t" | ||
79 | : "=r" (flags), "=&r" (tmpreg) | ||
80 | : | ||
81 | : "cbit", "memory"); | ||
82 | #endif | ||
83 | return flags; | ||
84 | } | ||
85 | |||
86 | static inline void arch_local_irq_restore(unsigned long flags) | ||
87 | { | ||
88 | asm volatile("mvtc %0,psw" | ||
89 | : | ||
90 | : "r" (flags) | ||
91 | : "cbit", "memory"); | ||
92 | } | ||
93 | |||
94 | static inline bool arch_irqs_disabled_flags(unsigned long flags) | ||
95 | { | ||
96 | return !(flags & 0x40); | ||
97 | } | ||
98 | |||
99 | static inline bool arch_irqs_disabled(void) | ||
100 | { | ||
101 | return arch_irqs_disabled_flags(arch_local_save_flags()); | ||
102 | } | ||
103 | |||
104 | #endif /* _ASM_M32R_IRQFLAGS_H */ | ||
diff --git a/arch/m32r/include/asm/kdebug.h b/arch/m32r/include/asm/kdebug.h deleted file mode 100644 index 6ece1b037665..000000000000 --- a/arch/m32r/include/asm/kdebug.h +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | #include <asm-generic/kdebug.h> | ||
diff --git a/arch/m32r/include/asm/kmap_types.h b/arch/m32r/include/asm/kmap_types.h deleted file mode 100644 index 3dcba0d17d40..000000000000 --- a/arch/m32r/include/asm/kmap_types.h +++ /dev/null | |||
@@ -1,13 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifndef __M32R_KMAP_TYPES_H | ||
3 | #define __M32R_KMAP_TYPES_H | ||
4 | |||
5 | #ifdef CONFIG_DEBUG_HIGHMEM | ||
6 | #define __WITH_KM_FENCE | ||
7 | #endif | ||
8 | |||
9 | #include <asm-generic/kmap_types.h> | ||
10 | |||
11 | #undef __WITH_KM_FENCE | ||
12 | |||
13 | #endif /* __M32R_KMAP_TYPES_H */ | ||
diff --git a/arch/m32r/include/asm/linkage.h b/arch/m32r/include/asm/linkage.h deleted file mode 100644 index f1aee6ec5bc3..000000000000 --- a/arch/m32r/include/asm/linkage.h +++ /dev/null | |||
@@ -1,8 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifndef __ASM_LINKAGE_H | ||
3 | #define __ASM_LINKAGE_H | ||
4 | |||
5 | #define __ALIGN .balign 4 | ||
6 | #define __ALIGN_STR ".balign 4" | ||
7 | |||
8 | #endif /* __ASM_LINKAGE_H */ | ||
diff --git a/arch/m32r/include/asm/local.h b/arch/m32r/include/asm/local.h deleted file mode 100644 index 6780680c185d..000000000000 --- a/arch/m32r/include/asm/local.h +++ /dev/null | |||
@@ -1,341 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifndef __M32R_LOCAL_H | ||
3 | #define __M32R_LOCAL_H | ||
4 | |||
5 | /* | ||
6 | * linux/include/asm-m32r/local.h | ||
7 | * | ||
8 | * M32R version: | ||
9 | * Copyright (C) 2001, 2002 Hitoshi Yamamoto | ||
10 | * Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org> | ||
11 | * Copyright (C) 2007 Mathieu Desnoyers <mathieu.desnoyers@polymtl.ca> | ||
12 | */ | ||
13 | |||
14 | #include <linux/percpu.h> | ||
15 | #include <asm/assembler.h> | ||
16 | #include <asm/local.h> | ||
17 | |||
18 | /* | ||
19 | * Atomic operations that C can't guarantee us. Useful for | ||
20 | * resource counting etc.. | ||
21 | */ | ||
22 | |||
23 | /* | ||
24 | * Make sure gcc doesn't try to be clever and move things around | ||
25 | * on us. We need to use _exactly_ the address the user gave us, | ||
26 | * not some alias that contains the same information. | ||
27 | */ | ||
28 | typedef struct { volatile int counter; } local_t; | ||
29 | |||
30 | #define LOCAL_INIT(i) { (i) } | ||
31 | |||
32 | /** | ||
33 | * local_read - read local variable | ||
34 | * @l: pointer of type local_t | ||
35 | * | ||
36 | * Atomically reads the value of @l. | ||
37 | */ | ||
38 | #define local_read(l) ((l)->counter) | ||
39 | |||
40 | /** | ||
41 | * local_set - set local variable | ||
42 | * @l: pointer of type local_t | ||
43 | * @i: required value | ||
44 | * | ||
45 | * Atomically sets the value of @l to @i. | ||
46 | */ | ||
47 | #define local_set(l, i) (((l)->counter) = (i)) | ||
48 | |||
49 | /** | ||
50 | * local_add_return - add long to local variable and return it | ||
51 | * @i: long value to add | ||
52 | * @l: pointer of type local_t | ||
53 | * | ||
54 | * Atomically adds @i to @l and return (@i + @l). | ||
55 | */ | ||
56 | static inline long local_add_return(long i, local_t *l) | ||
57 | { | ||
58 | unsigned long flags; | ||
59 | long result; | ||
60 | |||
61 | local_irq_save(flags); | ||
62 | __asm__ __volatile__ ( | ||
63 | "# local_add_return \n\t" | ||
64 | DCACHE_CLEAR("%0", "r4", "%1") | ||
65 | "ld %0, @%1; \n\t" | ||
66 | "add %0, %2; \n\t" | ||
67 | "st %0, @%1; \n\t" | ||
68 | : "=&r" (result) | ||
69 | : "r" (&l->counter), "r" (i) | ||
70 | : "memory" | ||
71 | #ifdef CONFIG_CHIP_M32700_TS1 | ||
72 | , "r4" | ||
73 | #endif /* CONFIG_CHIP_M32700_TS1 */ | ||
74 | ); | ||
75 | local_irq_restore(flags); | ||
76 | |||
77 | return result; | ||
78 | } | ||
79 | |||
80 | /** | ||
81 | * local_sub_return - subtract long from local variable and return it | ||
82 | * @i: long value to subtract | ||
83 | * @l: pointer of type local_t | ||
84 | * | ||
85 | * Atomically subtracts @i from @l and return (@l - @i). | ||
86 | */ | ||
87 | static inline long local_sub_return(long i, local_t *l) | ||
88 | { | ||
89 | unsigned long flags; | ||
90 | long result; | ||
91 | |||
92 | local_irq_save(flags); | ||
93 | __asm__ __volatile__ ( | ||
94 | "# local_sub_return \n\t" | ||
95 | DCACHE_CLEAR("%0", "r4", "%1") | ||
96 | "ld %0, @%1; \n\t" | ||
97 | "sub %0, %2; \n\t" | ||
98 | "st %0, @%1; \n\t" | ||
99 | : "=&r" (result) | ||
100 | : "r" (&l->counter), "r" (i) | ||
101 | : "memory" | ||
102 | #ifdef CONFIG_CHIP_M32700_TS1 | ||
103 | , "r4" | ||
104 | #endif /* CONFIG_CHIP_M32700_TS1 */ | ||
105 | ); | ||
106 | local_irq_restore(flags); | ||
107 | |||
108 | return result; | ||
109 | } | ||
110 | |||
111 | /** | ||
112 | * local_add - add long to local variable | ||
113 | * @i: long value to add | ||
114 | * @l: pointer of type local_t | ||
115 | * | ||
116 | * Atomically adds @i to @l. | ||
117 | */ | ||
118 | #define local_add(i, l) ((void) local_add_return((i), (l))) | ||
119 | |||
120 | /** | ||
121 | * local_sub - subtract the local variable | ||
122 | * @i: long value to subtract | ||
123 | * @l: pointer of type local_t | ||
124 | * | ||
125 | * Atomically subtracts @i from @l. | ||
126 | */ | ||
127 | #define local_sub(i, l) ((void) local_sub_return((i), (l))) | ||
128 | |||
129 | /** | ||
130 | * local_sub_and_test - subtract value from variable and test result | ||
131 | * @i: integer value to subtract | ||
132 | * @l: pointer of type local_t | ||
133 | * | ||
134 | * Atomically subtracts @i from @l and returns | ||
135 | * true if the result is zero, or false for all | ||
136 | * other cases. | ||
137 | */ | ||
138 | #define local_sub_and_test(i, l) (local_sub_return((i), (l)) == 0) | ||
139 | |||
140 | /** | ||
141 | * local_inc_return - increment local variable and return it | ||
142 | * @l: pointer of type local_t | ||
143 | * | ||
144 | * Atomically increments @l by 1 and returns the result. | ||
145 | */ | ||
146 | static inline long local_inc_return(local_t *l) | ||
147 | { | ||
148 | unsigned long flags; | ||
149 | long result; | ||
150 | |||
151 | local_irq_save(flags); | ||
152 | __asm__ __volatile__ ( | ||
153 | "# local_inc_return \n\t" | ||
154 | DCACHE_CLEAR("%0", "r4", "%1") | ||
155 | "ld %0, @%1; \n\t" | ||
156 | "addi %0, #1; \n\t" | ||
157 | "st %0, @%1; \n\t" | ||
158 | : "=&r" (result) | ||
159 | : "r" (&l->counter) | ||
160 | : "memory" | ||
161 | #ifdef CONFIG_CHIP_M32700_TS1 | ||
162 | , "r4" | ||
163 | #endif /* CONFIG_CHIP_M32700_TS1 */ | ||
164 | ); | ||
165 | local_irq_restore(flags); | ||
166 | |||
167 | return result; | ||
168 | } | ||
169 | |||
170 | /** | ||
171 | * local_dec_return - decrement local variable and return it | ||
172 | * @l: pointer of type local_t | ||
173 | * | ||
174 | * Atomically decrements @l by 1 and returns the result. | ||
175 | */ | ||
176 | static inline long local_dec_return(local_t *l) | ||
177 | { | ||
178 | unsigned long flags; | ||
179 | long result; | ||
180 | |||
181 | local_irq_save(flags); | ||
182 | __asm__ __volatile__ ( | ||
183 | "# local_dec_return \n\t" | ||
184 | DCACHE_CLEAR("%0", "r4", "%1") | ||
185 | "ld %0, @%1; \n\t" | ||
186 | "addi %0, #-1; \n\t" | ||
187 | "st %0, @%1; \n\t" | ||
188 | : "=&r" (result) | ||
189 | : "r" (&l->counter) | ||
190 | : "memory" | ||
191 | #ifdef CONFIG_CHIP_M32700_TS1 | ||
192 | , "r4" | ||
193 | #endif /* CONFIG_CHIP_M32700_TS1 */ | ||
194 | ); | ||
195 | local_irq_restore(flags); | ||
196 | |||
197 | return result; | ||
198 | } | ||
199 | |||
200 | /** | ||
201 | * local_inc - increment local variable | ||
202 | * @l: pointer of type local_t | ||
203 | * | ||
204 | * Atomically increments @l by 1. | ||
205 | */ | ||
206 | #define local_inc(l) ((void)local_inc_return(l)) | ||
207 | |||
208 | /** | ||
209 | * local_dec - decrement local variable | ||
210 | * @l: pointer of type local_t | ||
211 | * | ||
212 | * Atomically decrements @l by 1. | ||
213 | */ | ||
214 | #define local_dec(l) ((void)local_dec_return(l)) | ||
215 | |||
216 | /** | ||
217 | * local_inc_and_test - increment and test | ||
218 | * @l: pointer of type local_t | ||
219 | * | ||
220 | * Atomically increments @l by 1 | ||
221 | * and returns true if the result is zero, or false for all | ||
222 | * other cases. | ||
223 | */ | ||
224 | #define local_inc_and_test(l) (local_inc_return(l) == 0) | ||
225 | |||
226 | /** | ||
227 | * local_dec_and_test - decrement and test | ||
228 | * @l: pointer of type local_t | ||
229 | * | ||
230 | * Atomically decrements @l by 1 and | ||
231 | * returns true if the result is 0, or false for all | ||
232 | * other cases. | ||
233 | */ | ||
234 | #define local_dec_and_test(l) (local_dec_return(l) == 0) | ||
235 | |||
236 | /** | ||
237 | * local_add_negative - add and test if negative | ||
238 | * @l: pointer of type local_t | ||
239 | * @i: integer value to add | ||
240 | * | ||
241 | * Atomically adds @i to @l and returns true | ||
242 | * if the result is negative, or false when | ||
243 | * result is greater than or equal to zero. | ||
244 | */ | ||
245 | #define local_add_negative(i, l) (local_add_return((i), (l)) < 0) | ||
246 | |||
247 | #define local_cmpxchg(l, o, n) (cmpxchg_local(&((l)->counter), (o), (n))) | ||
248 | #define local_xchg(v, new) (xchg_local(&((l)->counter), new)) | ||
249 | |||
250 | /** | ||
251 | * local_add_unless - add unless the number is a given value | ||
252 | * @l: pointer of type local_t | ||
253 | * @a: the amount to add to l... | ||
254 | * @u: ...unless l is equal to u. | ||
255 | * | ||
256 | * Atomically adds @a to @l, so long as it was not @u. | ||
257 | * Returns non-zero if @l was not @u, and zero otherwise. | ||
258 | */ | ||
259 | static inline int local_add_unless(local_t *l, long a, long u) | ||
260 | { | ||
261 | long c, old; | ||
262 | c = local_read(l); | ||
263 | for (;;) { | ||
264 | if (unlikely(c == (u))) | ||
265 | break; | ||
266 | old = local_cmpxchg((l), c, c + (a)); | ||
267 | if (likely(old == c)) | ||
268 | break; | ||
269 | c = old; | ||
270 | } | ||
271 | return c != (u); | ||
272 | } | ||
273 | |||
274 | #define local_inc_not_zero(l) local_add_unless((l), 1, 0) | ||
275 | |||
276 | static inline void local_clear_mask(unsigned long mask, local_t *addr) | ||
277 | { | ||
278 | unsigned long flags; | ||
279 | unsigned long tmp; | ||
280 | |||
281 | local_irq_save(flags); | ||
282 | __asm__ __volatile__ ( | ||
283 | "# local_clear_mask \n\t" | ||
284 | DCACHE_CLEAR("%0", "r5", "%1") | ||
285 | "ld %0, @%1; \n\t" | ||
286 | "and %0, %2; \n\t" | ||
287 | "st %0, @%1; \n\t" | ||
288 | : "=&r" (tmp) | ||
289 | : "r" (addr), "r" (~mask) | ||
290 | : "memory" | ||
291 | #ifdef CONFIG_CHIP_M32700_TS1 | ||
292 | , "r5" | ||
293 | #endif /* CONFIG_CHIP_M32700_TS1 */ | ||
294 | ); | ||
295 | local_irq_restore(flags); | ||
296 | } | ||
297 | |||
298 | static inline void local_set_mask(unsigned long mask, local_t *addr) | ||
299 | { | ||
300 | unsigned long flags; | ||
301 | unsigned long tmp; | ||
302 | |||
303 | local_irq_save(flags); | ||
304 | __asm__ __volatile__ ( | ||
305 | "# local_set_mask \n\t" | ||
306 | DCACHE_CLEAR("%0", "r5", "%1") | ||
307 | "ld %0, @%1; \n\t" | ||
308 | "or %0, %2; \n\t" | ||
309 | "st %0, @%1; \n\t" | ||
310 | : "=&r" (tmp) | ||
311 | : "r" (addr), "r" (mask) | ||
312 | : "memory" | ||
313 | #ifdef CONFIG_CHIP_M32700_TS1 | ||
314 | , "r5" | ||
315 | #endif /* CONFIG_CHIP_M32700_TS1 */ | ||
316 | ); | ||
317 | local_irq_restore(flags); | ||
318 | } | ||
319 | |||
320 | /* Atomic operations are already serializing on m32r */ | ||
321 | #define smp_mb__before_local_dec() barrier() | ||
322 | #define smp_mb__after_local_dec() barrier() | ||
323 | #define smp_mb__before_local_inc() barrier() | ||
324 | #define smp_mb__after_local_inc() barrier() | ||
325 | |||
326 | /* Use these for per-cpu local_t variables: on some archs they are | ||
327 | * much more efficient than these naive implementations. Note they take | ||
328 | * a variable, not an address. | ||
329 | */ | ||
330 | |||
331 | #define __local_inc(l) ((l)->a.counter++) | ||
332 | #define __local_dec(l) ((l)->a.counter++) | ||
333 | #define __local_add(i, l) ((l)->a.counter += (i)) | ||
334 | #define __local_sub(i, l) ((l)->a.counter -= (i)) | ||
335 | |||
336 | /* Use these for per-cpu local_t variables: on some archs they are | ||
337 | * much more efficient than these naive implementations. Note they take | ||
338 | * a variable, not an address. | ||
339 | */ | ||
340 | |||
341 | #endif /* __M32R_LOCAL_H */ | ||
diff --git a/arch/m32r/include/asm/local64.h b/arch/m32r/include/asm/local64.h deleted file mode 100644 index 36c93b5cc239..000000000000 --- a/arch/m32r/include/asm/local64.h +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | #include <asm-generic/local64.h> | ||
diff --git a/arch/m32r/include/asm/m32102.h b/arch/m32r/include/asm/m32102.h deleted file mode 100644 index f0a986fece65..000000000000 --- a/arch/m32r/include/asm/m32102.h +++ /dev/null | |||
@@ -1,315 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifndef _M32102_H_ | ||
3 | #define _M32102_H_ | ||
4 | |||
5 | /* | ||
6 | * Renesas M32R 32102 group | ||
7 | * | ||
8 | * Copyright (c) 2001 Hitoshi Yamamoto | ||
9 | * Copyright (c) 2003, 2004 Renesas Technology Corp. | ||
10 | */ | ||
11 | |||
12 | /*======================================================================* | ||
13 | * Special Function Register | ||
14 | *======================================================================*/ | ||
15 | #if !defined(CONFIG_CHIP_M32104) | ||
16 | #define M32R_SFR_OFFSET (0x00E00000) /* 0x00E00000-0x00EFFFFF 1[MB] */ | ||
17 | #else | ||
18 | #define M32R_SFR_OFFSET (0x00700000) /* 0x00700000-0x007FFFFF 1[MB] */ | ||
19 | #endif | ||
20 | |||
21 | /* | ||
22 | * Clock and Power Management registers. | ||
23 | */ | ||
24 | #define M32R_CPM_OFFSET (0x000F4000+M32R_SFR_OFFSET) | ||
25 | |||
26 | #define M32R_CPM_CPUCLKCR_PORTL (0x00+M32R_CPM_OFFSET) | ||
27 | #define M32R_CPM_CLKMOD_PORTL (0x04+M32R_CPM_OFFSET) | ||
28 | #define M32R_CPM_PLLCR_PORTL (0x08+M32R_CPM_OFFSET) | ||
29 | |||
30 | /* | ||
31 | * DMA Controller registers. | ||
32 | */ | ||
33 | #define M32R_DMA_OFFSET (0x000F8000+M32R_SFR_OFFSET) | ||
34 | |||
35 | #define M32R_DMAEN_PORTL (0x000+M32R_DMA_OFFSET) | ||
36 | #define M32R_DMAISTS_PORTL (0x004+M32R_DMA_OFFSET) | ||
37 | #define M32R_DMAEDET_PORTL (0x008+M32R_DMA_OFFSET) | ||
38 | #define M32R_DMAASTS_PORTL (0x00c+M32R_DMA_OFFSET) | ||
39 | |||
40 | #define M32R_DMA0CR0_PORTL (0x100+M32R_DMA_OFFSET) | ||
41 | #define M32R_DMA0CR1_PORTL (0x104+M32R_DMA_OFFSET) | ||
42 | #define M32R_DMA0CSA_PORTL (0x108+M32R_DMA_OFFSET) | ||
43 | #define M32R_DMA0RSA_PORTL (0x10c+M32R_DMA_OFFSET) | ||
44 | #define M32R_DMA0CDA_PORTL (0x110+M32R_DMA_OFFSET) | ||
45 | #define M32R_DMA0RDA_PORTL (0x114+M32R_DMA_OFFSET) | ||
46 | #define M32R_DMA0CBCUT_PORTL (0x118+M32R_DMA_OFFSET) | ||
47 | #define M32R_DMA0RBCUT_PORTL (0x11c+M32R_DMA_OFFSET) | ||
48 | |||
49 | #define M32R_DMA1CR0_PORTL (0x200+M32R_DMA_OFFSET) | ||
50 | #define M32R_DMA1CR1_PORTL (0x204+M32R_DMA_OFFSET) | ||
51 | #define M32R_DMA1CSA_PORTL (0x208+M32R_DMA_OFFSET) | ||
52 | #define M32R_DMA1RSA_PORTL (0x20c+M32R_DMA_OFFSET) | ||
53 | #define M32R_DMA1CDA_PORTL (0x210+M32R_DMA_OFFSET) | ||
54 | #define M32R_DMA1RDA_PORTL (0x214+M32R_DMA_OFFSET) | ||
55 | #define M32R_DMA1CBCUT_PORTL (0x218+M32R_DMA_OFFSET) | ||
56 | #define M32R_DMA1RBCUT_PORTL (0x21c+M32R_DMA_OFFSET) | ||
57 | |||
58 | /* | ||
59 | * Multi Function Timer registers. | ||
60 | */ | ||
61 | #define M32R_MFT_OFFSET (0x000FC000+M32R_SFR_OFFSET) | ||
62 | |||
63 | #define M32R_MFTCR_PORTL (0x000+M32R_MFT_OFFSET) /* MFT control */ | ||
64 | #define M32R_MFTRPR_PORTL (0x004+M32R_MFT_OFFSET) /* MFT real port */ | ||
65 | |||
66 | #define M32R_MFT0_OFFSET (0x100+M32R_MFT_OFFSET) | ||
67 | #define M32R_MFT0MOD_PORTL (0x00+M32R_MFT0_OFFSET) /* MFT0 mode */ | ||
68 | #define M32R_MFT0BOS_PORTL (0x04+M32R_MFT0_OFFSET) /* MFT0 b-port output status */ | ||
69 | #define M32R_MFT0CUT_PORTL (0x08+M32R_MFT0_OFFSET) /* MFT0 count */ | ||
70 | #define M32R_MFT0RLD_PORTL (0x0C+M32R_MFT0_OFFSET) /* MFT0 reload */ | ||
71 | #define M32R_MFT0CMPRLD_PORTL (0x10+M32R_MFT0_OFFSET) /* MFT0 compare reload */ | ||
72 | |||
73 | #define M32R_MFT1_OFFSET (0x200+M32R_MFT_OFFSET) | ||
74 | #define M32R_MFT1MOD_PORTL (0x00+M32R_MFT1_OFFSET) /* MFT1 mode */ | ||
75 | #define M32R_MFT1BOS_PORTL (0x04+M32R_MFT1_OFFSET) /* MFT1 b-port output status */ | ||
76 | #define M32R_MFT1CUT_PORTL (0x08+M32R_MFT1_OFFSET) /* MFT1 count */ | ||
77 | #define M32R_MFT1RLD_PORTL (0x0C+M32R_MFT1_OFFSET) /* MFT1 reload */ | ||
78 | #define M32R_MFT1CMPRLD_PORTL (0x10+M32R_MFT1_OFFSET) /* MFT1 compare reload */ | ||
79 | |||
80 | #define M32R_MFT2_OFFSET (0x300+M32R_MFT_OFFSET) | ||
81 | #define M32R_MFT2MOD_PORTL (0x00+M32R_MFT2_OFFSET) /* MFT2 mode */ | ||
82 | #define M32R_MFT2BOS_PORTL (0x04+M32R_MFT2_OFFSET) /* MFT2 b-port output status */ | ||
83 | #define M32R_MFT2CUT_PORTL (0x08+M32R_MFT2_OFFSET) /* MFT2 count */ | ||
84 | #define M32R_MFT2RLD_PORTL (0x0C+M32R_MFT2_OFFSET) /* MFT2 reload */ | ||
85 | #define M32R_MFT2CMPRLD_PORTL (0x10+M32R_MFT2_OFFSET) /* MFT2 compare reload */ | ||
86 | |||
87 | #define M32R_MFT3_OFFSET (0x400+M32R_MFT_OFFSET) | ||
88 | #define M32R_MFT3MOD_PORTL (0x00+M32R_MFT3_OFFSET) /* MFT3 mode */ | ||
89 | #define M32R_MFT3BOS_PORTL (0x04+M32R_MFT3_OFFSET) /* MFT3 b-port output status */ | ||
90 | #define M32R_MFT3CUT_PORTL (0x08+M32R_MFT3_OFFSET) /* MFT3 count */ | ||
91 | #define M32R_MFT3RLD_PORTL (0x0C+M32R_MFT3_OFFSET) /* MFT3 reload */ | ||
92 | #define M32R_MFT3CMPRLD_PORTL (0x10+M32R_MFT3_OFFSET) /* MFT3 compare reload */ | ||
93 | |||
94 | #define M32R_MFT4_OFFSET (0x500+M32R_MFT_OFFSET) | ||
95 | #define M32R_MFT4MOD_PORTL (0x00+M32R_MFT4_OFFSET) /* MFT4 mode */ | ||
96 | #define M32R_MFT4BOS_PORTL (0x04+M32R_MFT4_OFFSET) /* MFT4 b-port output status */ | ||
97 | #define M32R_MFT4CUT_PORTL (0x08+M32R_MFT4_OFFSET) /* MFT4 count */ | ||
98 | #define M32R_MFT4RLD_PORTL (0x0C+M32R_MFT4_OFFSET) /* MFT4 reload */ | ||
99 | #define M32R_MFT4CMPRLD_PORTL (0x10+M32R_MFT4_OFFSET) /* MFT4 compare reload */ | ||
100 | |||
101 | #define M32R_MFT5_OFFSET (0x600+M32R_MFT_OFFSET) | ||
102 | #define M32R_MFT5MOD_PORTL (0x00+M32R_MFT5_OFFSET) /* MFT4 mode */ | ||
103 | #define M32R_MFT5BOS_PORTL (0x04+M32R_MFT5_OFFSET) /* MFT4 b-port output status */ | ||
104 | #define M32R_MFT5CUT_PORTL (0x08+M32R_MFT5_OFFSET) /* MFT4 count */ | ||
105 | #define M32R_MFT5RLD_PORTL (0x0C+M32R_MFT5_OFFSET) /* MFT4 reload */ | ||
106 | #define M32R_MFT5CMPRLD_PORTL (0x10+M32R_MFT5_OFFSET) /* MFT4 compare reload */ | ||
107 | |||
108 | #if (defined(CONFIG_CHIP_M32700) && !defined(CONFIG_PLAT_MAPPI2)) \ | ||
109 | || defined(CONFIG_CHIP_M32104) | ||
110 | #define M32R_MFTCR_MFT0MSK (1UL<<31) /* b0 */ | ||
111 | #define M32R_MFTCR_MFT1MSK (1UL<<30) /* b1 */ | ||
112 | #define M32R_MFTCR_MFT2MSK (1UL<<29) /* b2 */ | ||
113 | #define M32R_MFTCR_MFT3MSK (1UL<<28) /* b3 */ | ||
114 | #define M32R_MFTCR_MFT4MSK (1UL<<27) /* b4 */ | ||
115 | #define M32R_MFTCR_MFT5MSK (1UL<<26) /* b5 */ | ||
116 | #define M32R_MFTCR_MFT0EN (1UL<<23) /* b8 */ | ||
117 | #define M32R_MFTCR_MFT1EN (1UL<<22) /* b9 */ | ||
118 | #define M32R_MFTCR_MFT2EN (1UL<<21) /* b10 */ | ||
119 | #define M32R_MFTCR_MFT3EN (1UL<<20) /* b11 */ | ||
120 | #define M32R_MFTCR_MFT4EN (1UL<<19) /* b12 */ | ||
121 | #define M32R_MFTCR_MFT5EN (1UL<<18) /* b13 */ | ||
122 | #else | ||
123 | #define M32R_MFTCR_MFT0MSK (1UL<<15) /* b16 */ | ||
124 | #define M32R_MFTCR_MFT1MSK (1UL<<14) /* b17 */ | ||
125 | #define M32R_MFTCR_MFT2MSK (1UL<<13) /* b18 */ | ||
126 | #define M32R_MFTCR_MFT3MSK (1UL<<12) /* b19 */ | ||
127 | #define M32R_MFTCR_MFT4MSK (1UL<<11) /* b20 */ | ||
128 | #define M32R_MFTCR_MFT5MSK (1UL<<10) /* b21 */ | ||
129 | #define M32R_MFTCR_MFT0EN (1UL<<7) /* b24 */ | ||
130 | #define M32R_MFTCR_MFT1EN (1UL<<6) /* b25 */ | ||
131 | #define M32R_MFTCR_MFT2EN (1UL<<5) /* b26 */ | ||
132 | #define M32R_MFTCR_MFT3EN (1UL<<4) /* b27 */ | ||
133 | #define M32R_MFTCR_MFT4EN (1UL<<3) /* b28 */ | ||
134 | #define M32R_MFTCR_MFT5EN (1UL<<2) /* b29 */ | ||
135 | #endif | ||
136 | |||
137 | #define M32R_MFTMOD_CC_MASK (1UL<<15) /* b16 */ | ||
138 | #define M32R_MFTMOD_TCCR (1UL<<13) /* b18 */ | ||
139 | #define M32R_MFTMOD_GTSEL000 (0UL<<8) /* b21-23 : 000 */ | ||
140 | #define M32R_MFTMOD_GTSEL001 (1UL<<8) /* b21-23 : 001 */ | ||
141 | #define M32R_MFTMOD_GTSEL010 (2UL<<8) /* b21-23 : 010 */ | ||
142 | #define M32R_MFTMOD_GTSEL011 (3UL<<8) /* b21-23 : 011 */ | ||
143 | #define M32R_MFTMOD_GTSEL110 (6UL<<8) /* b21-23 : 110 */ | ||
144 | #define M32R_MFTMOD_GTSEL111 (7UL<<8) /* b21-23 : 111 */ | ||
145 | #define M32R_MFTMOD_CMSEL (1UL<<3) /* b28 */ | ||
146 | #define M32R_MFTMOD_CSSEL000 (0UL<<0) /* b29-b31 : 000 */ | ||
147 | #define M32R_MFTMOD_CSSEL001 (1UL<<0) /* b29-b31 : 001 */ | ||
148 | #define M32R_MFTMOD_CSSEL010 (2UL<<0) /* b29-b31 : 010 */ | ||
149 | #define M32R_MFTMOD_CSSEL011 (3UL<<0) /* b29-b31 : 011 */ | ||
150 | #define M32R_MFTMOD_CSSEL100 (4UL<<0) /* b29-b31 : 100 */ | ||
151 | #define M32R_MFTMOD_CSSEL110 (6UL<<0) /* b29-b31 : 110 */ | ||
152 | |||
153 | /* | ||
154 | * Serial I/O registers. | ||
155 | */ | ||
156 | #define M32R_SIO_OFFSET (0x000FD000+M32R_SFR_OFFSET) | ||
157 | |||
158 | #define M32R_SIO0_CR_PORTL (0x000+M32R_SIO_OFFSET) | ||
159 | #define M32R_SIO0_MOD0_PORTL (0x004+M32R_SIO_OFFSET) | ||
160 | #define M32R_SIO0_MOD1_PORTL (0x008+M32R_SIO_OFFSET) | ||
161 | #define M32R_SIO0_STS_PORTL (0x00C+M32R_SIO_OFFSET) | ||
162 | #define M32R_SIO0_TRCR_PORTL (0x010+M32R_SIO_OFFSET) | ||
163 | #define M32R_SIO0_BAUR_PORTL (0x014+M32R_SIO_OFFSET) | ||
164 | #define M32R_SIO0_RBAUR_PORTL (0x018+M32R_SIO_OFFSET) | ||
165 | #define M32R_SIO0_TXB_PORTL (0x01C+M32R_SIO_OFFSET) | ||
166 | #define M32R_SIO0_RXB_PORTL (0x020+M32R_SIO_OFFSET) | ||
167 | |||
168 | /* | ||
169 | * Interrupt Control Unit registers. | ||
170 | */ | ||
171 | #define M32R_ICU_OFFSET (0x000FF000+M32R_SFR_OFFSET) | ||
172 | #define M32R_ICU_ISTS_PORTL (0x004+M32R_ICU_OFFSET) | ||
173 | #define M32R_ICU_IREQ0_PORTL (0x008+M32R_ICU_OFFSET) | ||
174 | #define M32R_ICU_IREQ1_PORTL (0x00C+M32R_ICU_OFFSET) | ||
175 | #define M32R_ICU_SBICR_PORTL (0x018+M32R_ICU_OFFSET) | ||
176 | #define M32R_ICU_IMASK_PORTL (0x01C+M32R_ICU_OFFSET) | ||
177 | #define M32R_ICU_CR1_PORTL (0x200+M32R_ICU_OFFSET) /* INT0 */ | ||
178 | #define M32R_ICU_CR2_PORTL (0x204+M32R_ICU_OFFSET) /* INT1 */ | ||
179 | #define M32R_ICU_CR3_PORTL (0x208+M32R_ICU_OFFSET) /* INT2 */ | ||
180 | #define M32R_ICU_CR4_PORTL (0x20C+M32R_ICU_OFFSET) /* INT3 */ | ||
181 | #define M32R_ICU_CR5_PORTL (0x210+M32R_ICU_OFFSET) /* INT4 */ | ||
182 | #define M32R_ICU_CR6_PORTL (0x214+M32R_ICU_OFFSET) /* INT5 */ | ||
183 | #define M32R_ICU_CR7_PORTL (0x218+M32R_ICU_OFFSET) /* INT6 */ | ||
184 | #define M32R_ICU_CR8_PORTL (0x219+M32R_ICU_OFFSET) /* INT7 */ | ||
185 | #define M32R_ICU_CR16_PORTL (0x23C+M32R_ICU_OFFSET) /* MFT0 */ | ||
186 | #define M32R_ICU_CR17_PORTL (0x240+M32R_ICU_OFFSET) /* MFT1 */ | ||
187 | #define M32R_ICU_CR18_PORTL (0x244+M32R_ICU_OFFSET) /* MFT2 */ | ||
188 | #define M32R_ICU_CR19_PORTL (0x248+M32R_ICU_OFFSET) /* MFT3 */ | ||
189 | #define M32R_ICU_CR20_PORTL (0x24C+M32R_ICU_OFFSET) /* MFT4 */ | ||
190 | #define M32R_ICU_CR21_PORTL (0x250+M32R_ICU_OFFSET) /* MFT5 */ | ||
191 | #define M32R_ICU_CR32_PORTL (0x27C+M32R_ICU_OFFSET) /* DMA0 */ | ||
192 | #define M32R_ICU_CR33_PORTL (0x280+M32R_ICU_OFFSET) /* DMA1 */ | ||
193 | #define M32R_ICU_CR48_PORTL (0x2BC+M32R_ICU_OFFSET) /* SIO0 */ | ||
194 | #define M32R_ICU_CR49_PORTL (0x2C0+M32R_ICU_OFFSET) /* SIO0 */ | ||
195 | #define M32R_ICU_CR50_PORTL (0x2C4+M32R_ICU_OFFSET) /* SIO1 */ | ||
196 | #define M32R_ICU_CR51_PORTL (0x2C8+M32R_ICU_OFFSET) /* SIO1 */ | ||
197 | #define M32R_ICU_CR52_PORTL (0x2CC+M32R_ICU_OFFSET) /* SIO2 */ | ||
198 | #define M32R_ICU_CR53_PORTL (0x2D0+M32R_ICU_OFFSET) /* SIO2 */ | ||
199 | #define M32R_ICU_CR54_PORTL (0x2D4+M32R_ICU_OFFSET) /* SIO3 */ | ||
200 | #define M32R_ICU_CR55_PORTL (0x2D8+M32R_ICU_OFFSET) /* SIO3 */ | ||
201 | #define M32R_ICU_CR56_PORTL (0x2DC+M32R_ICU_OFFSET) /* SIO4 */ | ||
202 | #define M32R_ICU_CR57_PORTL (0x2E0+M32R_ICU_OFFSET) /* SIO4 */ | ||
203 | |||
204 | #ifdef CONFIG_SMP | ||
205 | #define M32R_ICU_IPICR0_PORTL (0x2dc+M32R_ICU_OFFSET) /* IPI0 */ | ||
206 | #define M32R_ICU_IPICR1_PORTL (0x2e0+M32R_ICU_OFFSET) /* IPI1 */ | ||
207 | #define M32R_ICU_IPICR2_PORTL (0x2e4+M32R_ICU_OFFSET) /* IPI2 */ | ||
208 | #define M32R_ICU_IPICR3_PORTL (0x2e8+M32R_ICU_OFFSET) /* IPI3 */ | ||
209 | #define M32R_ICU_IPICR4_PORTL (0x2ec+M32R_ICU_OFFSET) /* IPI4 */ | ||
210 | #define M32R_ICU_IPICR5_PORTL (0x2f0+M32R_ICU_OFFSET) /* IPI5 */ | ||
211 | #define M32R_ICU_IPICR6_PORTL (0x2f4+M32R_ICU_OFFSET) /* IPI6 */ | ||
212 | #define M32R_ICU_IPICR7_PORTL (0x2f8+M32R_ICU_OFFSET) /* IPI7 */ | ||
213 | #endif /* CONFIG_SMP */ | ||
214 | |||
215 | #define M32R_ICUIMASK_IMSK0 (0UL<<16) /* b13-b15: Disable interrupt */ | ||
216 | #define M32R_ICUIMASK_IMSK1 (1UL<<16) /* b13-b15: Enable level 0 interrupt */ | ||
217 | #define M32R_ICUIMASK_IMSK2 (2UL<<16) /* b13-b15: Enable level 0,1 interrupt */ | ||
218 | #define M32R_ICUIMASK_IMSK3 (3UL<<16) /* b13-b15: Enable level 0-2 interrupt */ | ||
219 | #define M32R_ICUIMASK_IMSK4 (4UL<<16) /* b13-b15: Enable level 0-3 interrupt */ | ||
220 | #define M32R_ICUIMASK_IMSK5 (5UL<<16) /* b13-b15: Enable level 0-4 interrupt */ | ||
221 | #define M32R_ICUIMASK_IMSK6 (6UL<<16) /* b13-b15: Enable level 0-5 interrupt */ | ||
222 | #define M32R_ICUIMASK_IMSK7 (7UL<<16) /* b13-b15: Enable level 0-6 interrupt */ | ||
223 | |||
224 | #define M32R_ICUCR_IEN (1UL<<12) /* b19: Interrupt enable */ | ||
225 | #define M32R_ICUCR_IRQ (1UL<<8) /* b23: Interrupt request */ | ||
226 | #define M32R_ICUCR_ISMOD00 (0UL<<4) /* b26-b27: Interrupt sense mode Edge HtoL */ | ||
227 | #define M32R_ICUCR_ISMOD01 (1UL<<4) /* b26-b27: Interrupt sense mode Level L */ | ||
228 | #define M32R_ICUCR_ISMOD10 (2UL<<4) /* b26-b27: Interrupt sense mode Edge LtoH*/ | ||
229 | #define M32R_ICUCR_ISMOD11 (3UL<<4) /* b26-b27: Interrupt sense mode Level H */ | ||
230 | #define M32R_ICUCR_ILEVEL0 (0UL<<0) /* b29-b31: Interrupt priority level 0 */ | ||
231 | #define M32R_ICUCR_ILEVEL1 (1UL<<0) /* b29-b31: Interrupt priority level 1 */ | ||
232 | #define M32R_ICUCR_ILEVEL2 (2UL<<0) /* b29-b31: Interrupt priority level 2 */ | ||
233 | #define M32R_ICUCR_ILEVEL3 (3UL<<0) /* b29-b31: Interrupt priority level 3 */ | ||
234 | #define M32R_ICUCR_ILEVEL4 (4UL<<0) /* b29-b31: Interrupt priority level 4 */ | ||
235 | #define M32R_ICUCR_ILEVEL5 (5UL<<0) /* b29-b31: Interrupt priority level 5 */ | ||
236 | #define M32R_ICUCR_ILEVEL6 (6UL<<0) /* b29-b31: Interrupt priority level 6 */ | ||
237 | #define M32R_ICUCR_ILEVEL7 (7UL<<0) /* b29-b31: Disable interrupt */ | ||
238 | |||
239 | #define M32R_IRQ_INT0 (1) /* INT0 */ | ||
240 | #define M32R_IRQ_INT1 (2) /* INT1 */ | ||
241 | #define M32R_IRQ_INT2 (3) /* INT2 */ | ||
242 | #define M32R_IRQ_INT3 (4) /* INT3 */ | ||
243 | #define M32R_IRQ_INT4 (5) /* INT4 */ | ||
244 | #define M32R_IRQ_INT5 (6) /* INT5 */ | ||
245 | #define M32R_IRQ_INT6 (7) /* INT6 */ | ||
246 | #define M32R_IRQ_MFT0 (16) /* MFT0 */ | ||
247 | #define M32R_IRQ_MFT1 (17) /* MFT1 */ | ||
248 | #define M32R_IRQ_MFT2 (18) /* MFT2 */ | ||
249 | #define M32R_IRQ_MFT3 (19) /* MFT3 */ | ||
250 | #ifdef CONFIG_CHIP_M32104 | ||
251 | #define M32R_IRQ_MFTX0 (24) /* MFTX0 */ | ||
252 | #define M32R_IRQ_MFTX1 (25) /* MFTX1 */ | ||
253 | #define M32R_IRQ_DMA0 (32) /* DMA0 */ | ||
254 | #define M32R_IRQ_DMA1 (33) /* DMA1 */ | ||
255 | #define M32R_IRQ_DMA2 (34) /* DMA2 */ | ||
256 | #define M32R_IRQ_DMA3 (35) /* DMA3 */ | ||
257 | #define M32R_IRQ_SIO0_R (40) /* SIO0 send */ | ||
258 | #define M32R_IRQ_SIO0_S (41) /* SIO0 receive */ | ||
259 | #define M32R_IRQ_SIO1_R (42) /* SIO1 send */ | ||
260 | #define M32R_IRQ_SIO1_S (43) /* SIO1 receive */ | ||
261 | #define M32R_IRQ_SIO2_R (44) /* SIO2 send */ | ||
262 | #define M32R_IRQ_SIO2_S (45) /* SIO2 receive */ | ||
263 | #define M32R_IRQ_SIO3_R (46) /* SIO3 send */ | ||
264 | #define M32R_IRQ_SIO3_S (47) /* SIO3 receive */ | ||
265 | #define M32R_IRQ_ADC (56) /* ADC */ | ||
266 | #define M32R_IRQ_PC (57) /* PC */ | ||
267 | #else /* ! M32104 */ | ||
268 | #define M32R_IRQ_DMA0 (32) /* DMA0 */ | ||
269 | #define M32R_IRQ_DMA1 (33) /* DMA1 */ | ||
270 | #define M32R_IRQ_SIO0_R (48) /* SIO0 send */ | ||
271 | #define M32R_IRQ_SIO0_S (49) /* SIO0 receive */ | ||
272 | #define M32R_IRQ_SIO1_R (50) /* SIO1 send */ | ||
273 | #define M32R_IRQ_SIO1_S (51) /* SIO1 receive */ | ||
274 | #define M32R_IRQ_SIO2_R (52) /* SIO2 send */ | ||
275 | #define M32R_IRQ_SIO2_S (53) /* SIO2 receive */ | ||
276 | #define M32R_IRQ_SIO3_R (54) /* SIO3 send */ | ||
277 | #define M32R_IRQ_SIO3_S (55) /* SIO3 receive */ | ||
278 | #define M32R_IRQ_SIO4_R (56) /* SIO4 send */ | ||
279 | #define M32R_IRQ_SIO4_S (57) /* SIO4 receive */ | ||
280 | #endif /* ! M32104 */ | ||
281 | |||
282 | #ifdef CONFIG_SMP | ||
283 | #define M32R_IRQ_IPI0 (56) | ||
284 | #define M32R_IRQ_IPI1 (57) | ||
285 | #define M32R_IRQ_IPI2 (58) | ||
286 | #define M32R_IRQ_IPI3 (59) | ||
287 | #define M32R_IRQ_IPI4 (60) | ||
288 | #define M32R_IRQ_IPI5 (61) | ||
289 | #define M32R_IRQ_IPI6 (62) | ||
290 | #define M32R_IRQ_IPI7 (63) | ||
291 | #define M32R_CPUID_PORTL (0xffffffe0) | ||
292 | |||
293 | #define M32R_FPGA_TOP (0x000F0000+M32R_SFR_OFFSET) | ||
294 | |||
295 | #define M32R_FPGA_NUM_OF_CPUS_PORTL (0x00+M32R_FPGA_TOP) | ||
296 | #define M32R_FPGA_CPU_NAME0_PORTL (0x10+M32R_FPGA_TOP) | ||
297 | #define M32R_FPGA_CPU_NAME1_PORTL (0x14+M32R_FPGA_TOP) | ||
298 | #define M32R_FPGA_CPU_NAME2_PORTL (0x18+M32R_FPGA_TOP) | ||
299 | #define M32R_FPGA_CPU_NAME3_PORTL (0x1c+M32R_FPGA_TOP) | ||
300 | #define M32R_FPGA_MODEL_ID0_PORTL (0x20+M32R_FPGA_TOP) | ||
301 | #define M32R_FPGA_MODEL_ID1_PORTL (0x24+M32R_FPGA_TOP) | ||
302 | #define M32R_FPGA_MODEL_ID2_PORTL (0x28+M32R_FPGA_TOP) | ||
303 | #define M32R_FPGA_MODEL_ID3_PORTL (0x2c+M32R_FPGA_TOP) | ||
304 | #define M32R_FPGA_VERSION0_PORTL (0x30+M32R_FPGA_TOP) | ||
305 | #define M32R_FPGA_VERSION1_PORTL (0x34+M32R_FPGA_TOP) | ||
306 | |||
307 | #endif /* CONFIG_SMP */ | ||
308 | |||
309 | #ifndef __ASSEMBLY__ | ||
310 | typedef struct { | ||
311 | unsigned long icucr; /* ICU Control Register */ | ||
312 | } icu_data_t; | ||
313 | #endif | ||
314 | |||
315 | #endif /* _M32102_H_ */ | ||
diff --git a/arch/m32r/include/asm/m32104ut/m32104ut_pld.h b/arch/m32r/include/asm/m32104ut/m32104ut_pld.h deleted file mode 100644 index 1feae9709f24..000000000000 --- a/arch/m32r/include/asm/m32104ut/m32104ut_pld.h +++ /dev/null | |||
@@ -1,161 +0,0 @@ | |||
1 | #ifndef _M32104UT_M32104UT_PLD_H | ||
2 | #define _M32104UT_M32104UT_PLD_H | ||
3 | |||
4 | /* | ||
5 | * include/asm-m32r/m32104ut/m32104ut_pld.h | ||
6 | * | ||
7 | * Definitions for Programmable Logic Device(PLD) on M32104UT board. | ||
8 | * Based on m32700ut_pld.h | ||
9 | * | ||
10 | * Copyright (c) 2002 Takeo Takahashi | ||
11 | * Copyright (c) 2005 Naoto Sugai | ||
12 | * | ||
13 | * This file is subject to the terms and conditions of the GNU General | ||
14 | * Public License. See the file "COPYING" in the main directory of | ||
15 | * this archive for more details. | ||
16 | */ | ||
17 | |||
18 | #if defined(CONFIG_PLAT_M32104UT) | ||
19 | #define PLD_PLAT_BASE 0x02c00000 | ||
20 | #else | ||
21 | #error "no platform configuration" | ||
22 | #endif | ||
23 | |||
24 | #ifndef __ASSEMBLY__ | ||
25 | /* | ||
26 | * C functions use non-cache address. | ||
27 | */ | ||
28 | #define PLD_BASE (PLD_PLAT_BASE /* + NONCACHE_OFFSET */) | ||
29 | #define __reg8 (volatile unsigned char *) | ||
30 | #define __reg16 (volatile unsigned short *) | ||
31 | #define __reg32 (volatile unsigned int *) | ||
32 | #else | ||
33 | #define PLD_BASE (PLD_PLAT_BASE + NONCACHE_OFFSET) | ||
34 | #define __reg8 | ||
35 | #define __reg16 | ||
36 | #define __reg32 | ||
37 | #endif /* __ASSEMBLY__ */ | ||
38 | |||
39 | /* CFC */ | ||
40 | #define PLD_CFRSTCR __reg16(PLD_BASE + 0x0000) | ||
41 | #define PLD_CFSTS __reg16(PLD_BASE + 0x0002) | ||
42 | #define PLD_CFIMASK __reg16(PLD_BASE + 0x0004) | ||
43 | #define PLD_CFBUFCR __reg16(PLD_BASE + 0x0006) | ||
44 | |||
45 | /* MMC */ | ||
46 | #define PLD_MMCCR __reg16(PLD_BASE + 0x4000) | ||
47 | #define PLD_MMCMOD __reg16(PLD_BASE + 0x4002) | ||
48 | #define PLD_MMCSTS __reg16(PLD_BASE + 0x4006) | ||
49 | #define PLD_MMCBAUR __reg16(PLD_BASE + 0x400a) | ||
50 | #define PLD_MMCCMDBCUT __reg16(PLD_BASE + 0x400c) | ||
51 | #define PLD_MMCCDTBCUT __reg16(PLD_BASE + 0x400e) | ||
52 | #define PLD_MMCDET __reg16(PLD_BASE + 0x4010) | ||
53 | #define PLD_MMCWP __reg16(PLD_BASE + 0x4012) | ||
54 | #define PLD_MMCWDATA __reg16(PLD_BASE + 0x5000) | ||
55 | #define PLD_MMCRDATA __reg16(PLD_BASE + 0x6000) | ||
56 | #define PLD_MMCCMDDATA __reg16(PLD_BASE + 0x7000) | ||
57 | #define PLD_MMCRSPDATA __reg16(PLD_BASE + 0x7006) | ||
58 | |||
59 | /* ICU | ||
60 | * ICUISTS: status register | ||
61 | * ICUIREQ0: request register | ||
62 | * ICUIREQ1: request register | ||
63 | * ICUCR3: control register for CFIREQ# interrupt | ||
64 | * ICUCR4: control register for CFC Card insert interrupt | ||
65 | * ICUCR5: control register for CFC Card eject interrupt | ||
66 | * ICUCR6: control register for external interrupt | ||
67 | * ICUCR11: control register for MMC Card insert/eject interrupt | ||
68 | * ICUCR13: control register for SC error interrupt | ||
69 | * ICUCR14: control register for SC receive interrupt | ||
70 | * ICUCR15: control register for SC send interrupt | ||
71 | */ | ||
72 | |||
73 | #define PLD_IRQ_INT0 (M32104UT_PLD_IRQ_BASE + 0) /* None */ | ||
74 | #define PLD_IRQ_CFIREQ (M32104UT_PLD_IRQ_BASE + 3) /* CF IREQ */ | ||
75 | #define PLD_IRQ_CFC_INSERT (M32104UT_PLD_IRQ_BASE + 4) /* CF Insert */ | ||
76 | #define PLD_IRQ_CFC_EJECT (M32104UT_PLD_IRQ_BASE + 5) /* CF Eject */ | ||
77 | #define PLD_IRQ_EXINT (M32104UT_PLD_IRQ_BASE + 6) /* EXINT */ | ||
78 | #define PLD_IRQ_MMCCARD (M32104UT_PLD_IRQ_BASE + 11) /* MMC Insert/Eject */ | ||
79 | #define PLD_IRQ_SC_ERROR (M32104UT_PLD_IRQ_BASE + 13) /* SC error */ | ||
80 | #define PLD_IRQ_SC_RCV (M32104UT_PLD_IRQ_BASE + 14) /* SC receive */ | ||
81 | #define PLD_IRQ_SC_SND (M32104UT_PLD_IRQ_BASE + 15) /* SC send */ | ||
82 | |||
83 | #define PLD_ICUISTS __reg16(PLD_BASE + 0x8002) | ||
84 | #define PLD_ICUISTS_VECB_MASK (0xf000) | ||
85 | #define PLD_ICUISTS_VECB(x) ((x) & PLD_ICUISTS_VECB_MASK) | ||
86 | #define PLD_ICUISTS_ISN_MASK (0x07c0) | ||
87 | #define PLD_ICUISTS_ISN(x) ((x) & PLD_ICUISTS_ISN_MASK) | ||
88 | #define PLD_ICUCR3 __reg16(PLD_BASE + 0x8104) | ||
89 | #define PLD_ICUCR4 __reg16(PLD_BASE + 0x8106) | ||
90 | #define PLD_ICUCR5 __reg16(PLD_BASE + 0x8108) | ||
91 | #define PLD_ICUCR6 __reg16(PLD_BASE + 0x810a) | ||
92 | #define PLD_ICUCR11 __reg16(PLD_BASE + 0x8114) | ||
93 | #define PLD_ICUCR13 __reg16(PLD_BASE + 0x8118) | ||
94 | #define PLD_ICUCR14 __reg16(PLD_BASE + 0x811a) | ||
95 | #define PLD_ICUCR15 __reg16(PLD_BASE + 0x811c) | ||
96 | #define PLD_ICUCR_IEN (0x1000) | ||
97 | #define PLD_ICUCR_IREQ (0x0100) | ||
98 | #define PLD_ICUCR_ISMOD00 (0x0000) /* Low edge */ | ||
99 | #define PLD_ICUCR_ISMOD01 (0x0010) /* Low level */ | ||
100 | #define PLD_ICUCR_ISMOD02 (0x0020) /* High edge */ | ||
101 | #define PLD_ICUCR_ISMOD03 (0x0030) /* High level */ | ||
102 | #define PLD_ICUCR_ILEVEL0 (0x0000) | ||
103 | #define PLD_ICUCR_ILEVEL1 (0x0001) | ||
104 | #define PLD_ICUCR_ILEVEL2 (0x0002) | ||
105 | #define PLD_ICUCR_ILEVEL3 (0x0003) | ||
106 | #define PLD_ICUCR_ILEVEL4 (0x0004) | ||
107 | #define PLD_ICUCR_ILEVEL5 (0x0005) | ||
108 | #define PLD_ICUCR_ILEVEL6 (0x0006) | ||
109 | #define PLD_ICUCR_ILEVEL7 (0x0007) | ||
110 | |||
111 | /* Power Control of MMC and CF */ | ||
112 | #define PLD_CPCR __reg16(PLD_BASE + 0x14000) | ||
113 | #define PLD_CPCR_CDP 0x0001 | ||
114 | |||
115 | /* LED Control | ||
116 | * | ||
117 | * 1: DIP swich side | ||
118 | * 2: Reset switch side | ||
119 | */ | ||
120 | #define PLD_IOLEDCR __reg16(PLD_BASE + 0x14002) | ||
121 | #define PLD_IOLED_1_ON 0x001 | ||
122 | #define PLD_IOLED_1_OFF 0x000 | ||
123 | #define PLD_IOLED_2_ON 0x002 | ||
124 | #define PLD_IOLED_2_OFF 0x000 | ||
125 | |||
126 | /* DIP Switch | ||
127 | * 0: Write-protect of Flash Memory (0:protected, 1:non-protected) | ||
128 | * 1: - | ||
129 | * 2: - | ||
130 | * 3: - | ||
131 | */ | ||
132 | #define PLD_IOSWSTS __reg16(PLD_BASE + 0x14004) | ||
133 | #define PLD_IOSWSTS_IOSW2 0x0200 | ||
134 | #define PLD_IOSWSTS_IOSW1 0x0100 | ||
135 | #define PLD_IOSWSTS_IOWP0 0x0001 | ||
136 | |||
137 | /* CRC */ | ||
138 | #define PLD_CRC7DATA __reg16(PLD_BASE + 0x18000) | ||
139 | #define PLD_CRC7INDATA __reg16(PLD_BASE + 0x18002) | ||
140 | #define PLD_CRC16DATA __reg16(PLD_BASE + 0x18004) | ||
141 | #define PLD_CRC16INDATA __reg16(PLD_BASE + 0x18006) | ||
142 | #define PLD_CRC16ADATA __reg16(PLD_BASE + 0x18008) | ||
143 | #define PLD_CRC16AINDATA __reg16(PLD_BASE + 0x1800a) | ||
144 | |||
145 | /* RTC */ | ||
146 | #define PLD_RTCCR __reg16(PLD_BASE + 0x1c000) | ||
147 | #define PLD_RTCBAUR __reg16(PLD_BASE + 0x1c002) | ||
148 | #define PLD_RTCWRDATA __reg16(PLD_BASE + 0x1c004) | ||
149 | #define PLD_RTCRDDATA __reg16(PLD_BASE + 0x1c006) | ||
150 | #define PLD_RTCRSTODT __reg16(PLD_BASE + 0x1c008) | ||
151 | |||
152 | /* SIM Card */ | ||
153 | #define PLD_SCCR __reg16(PLD_BASE + 0x38000) | ||
154 | #define PLD_SCMOD __reg16(PLD_BASE + 0x38004) | ||
155 | #define PLD_SCSTS __reg16(PLD_BASE + 0x38006) | ||
156 | #define PLD_SCINTCR __reg16(PLD_BASE + 0x38008) | ||
157 | #define PLD_SCBAUR __reg16(PLD_BASE + 0x3800a) | ||
158 | #define PLD_SCTXB __reg16(PLD_BASE + 0x3800c) | ||
159 | #define PLD_SCRXB __reg16(PLD_BASE + 0x3800e) | ||
160 | |||
161 | #endif /* _M32104UT_M32104UT_PLD_H */ | ||
diff --git a/arch/m32r/include/asm/m32700ut/m32700ut_lan.h b/arch/m32r/include/asm/m32700ut/m32700ut_lan.h deleted file mode 100644 index aae810a4fb2c..000000000000 --- a/arch/m32r/include/asm/m32700ut/m32700ut_lan.h +++ /dev/null | |||
@@ -1,103 +0,0 @@ | |||
1 | #ifndef _M32700UT_M32700UT_LAN_H | ||
2 | #define _M32700UT_M32700UT_LAN_H | ||
3 | |||
4 | /* | ||
5 | * include/asm-m32r/m32700ut/m32700ut_lan.h | ||
6 | * | ||
7 | * M32700UT-LAN board | ||
8 | * | ||
9 | * Copyright (c) 2002 Takeo Takahashi | ||
10 | * | ||
11 | * This file is subject to the terms and conditions of the GNU General | ||
12 | * Public License. See the file "COPYING" in the main directory of | ||
13 | * this archive for more details. | ||
14 | */ | ||
15 | |||
16 | #ifndef __ASSEMBLY__ | ||
17 | /* | ||
18 | * C functions use non-cache address. | ||
19 | */ | ||
20 | #define M32700UT_LAN_BASE (0x10000000 /* + NONCACHE_OFFSET */) | ||
21 | #else | ||
22 | #define M32700UT_LAN_BASE (0x10000000 + NONCACHE_OFFSET) | ||
23 | #endif /* __ASSEMBLY__ */ | ||
24 | |||
25 | /* ICU | ||
26 | * ICUISTS: status register | ||
27 | * ICUIREQ0: request register | ||
28 | * ICUIREQ1: request register | ||
29 | * ICUCR3: control register for CFIREQ# interrupt | ||
30 | * ICUCR4: control register for CFC Card insert interrupt | ||
31 | * ICUCR5: control register for CFC Card eject interrupt | ||
32 | * ICUCR6: control register for external interrupt | ||
33 | * ICUCR11: control register for MMC Card insert/eject interrupt | ||
34 | * ICUCR13: control register for SC error interrupt | ||
35 | * ICUCR14: control register for SC receive interrupt | ||
36 | * ICUCR15: control register for SC send interrupt | ||
37 | * ICUCR16: control register for SIO0 receive interrupt | ||
38 | * ICUCR17: control register for SIO0 send interrupt | ||
39 | */ | ||
40 | #define M32700UT_LAN_IRQ_LAN (M32700UT_LAN_PLD_IRQ_BASE + 1) /* LAN */ | ||
41 | #define M32700UT_LAN_IRQ_I2C (M32700UT_LAN_PLD_IRQ_BASE + 3) /* I2C */ | ||
42 | |||
43 | #define M32700UT_LAN_ICUISTS __reg16(M32700UT_LAN_BASE + 0xc0002) | ||
44 | #define M32700UT_LAN_ICUISTS_VECB_MASK (0xf000) | ||
45 | #define M32700UT_LAN_VECB(x) ((x) & M32700UT_LAN_ICUISTS_VECB_MASK) | ||
46 | #define M32700UT_LAN_ICUISTS_ISN_MASK (0x07c0) | ||
47 | #define M32700UT_LAN_ICUISTS_ISN(x) ((x) & M32700UT_LAN_ICUISTS_ISN_MASK) | ||
48 | #define M32700UT_LAN_ICUIREQ0 __reg16(M32700UT_LAN_BASE + 0xc0004) | ||
49 | #define M32700UT_LAN_ICUCR1 __reg16(M32700UT_LAN_BASE + 0xc0010) | ||
50 | #define M32700UT_LAN_ICUCR3 __reg16(M32700UT_LAN_BASE + 0xc0014) | ||
51 | |||
52 | /* | ||
53 | * AR register on PLD | ||
54 | */ | ||
55 | #define ARVCR0 __reg32(M32700UT_LAN_BASE + 0x40000) | ||
56 | #define ARVCR0_VDS 0x00080000 | ||
57 | #define ARVCR0_RST 0x00010000 | ||
58 | #define ARVCR1 __reg32(M32700UT_LAN_BASE + 0x40004) | ||
59 | #define ARVCR1_QVGA 0x02000000 | ||
60 | #define ARVCR1_NORMAL 0x01000000 | ||
61 | #define ARVCR1_HIEN 0x00010000 | ||
62 | #define ARVHCOUNT __reg32(M32700UT_LAN_BASE + 0x40008) | ||
63 | #define ARDATA __reg32(M32700UT_LAN_BASE + 0x40010) | ||
64 | #define ARINTSEL __reg32(M32700UT_LAN_BASE + 0x40014) | ||
65 | #define ARINTSEL_INT3 0x10000000 /* CPU INT3 */ | ||
66 | #define ARDATA32 __reg32(M32700UT_LAN_BASE + 0x04040010) // Block 5 | ||
67 | /* | ||
68 | #define ARINTSEL_SEL2 0x00002000 | ||
69 | #define ARINTSEL_SEL3 0x00001000 | ||
70 | #define ARINTSEL_SEL6 0x00000200 | ||
71 | #define ARINTSEL_SEL7 0x00000100 | ||
72 | #define ARINTSEL_SEL9 0x00000040 | ||
73 | #define ARINTSEL_SEL10 0x00000020 | ||
74 | #define ARINTSEL_SEL11 0x00000010 | ||
75 | #define ARINTSEL_SEL12 0x00000008 | ||
76 | */ | ||
77 | |||
78 | /* | ||
79 | * I2C register on PLD | ||
80 | */ | ||
81 | #define PLDI2CCR __reg32(M32700UT_LAN_BASE + 0x40040) | ||
82 | #define PLDI2CCR_ES0 0x00000001 /* enable I2C interface */ | ||
83 | #define PLDI2CMOD __reg32(M32700UT_LAN_BASE + 0x40044) | ||
84 | #define PLDI2CMOD_ACKCLK 0x00000200 | ||
85 | #define PLDI2CMOD_DTWD 0x00000100 | ||
86 | #define PLDI2CMOD_10BT 0x00000004 | ||
87 | #define PLDI2CMOD_ATM_NORMAL 0x00000000 | ||
88 | #define PLDI2CMOD_ATM_AUTO 0x00000003 | ||
89 | #define PLDI2CACK __reg32(M32700UT_LAN_BASE + 0x40048) | ||
90 | #define PLDI2CACK_ACK 0x00000001 | ||
91 | #define PLDI2CFREQ __reg32(M32700UT_LAN_BASE + 0x4004c) | ||
92 | #define PLDI2CCND __reg32(M32700UT_LAN_BASE + 0x40050) | ||
93 | #define PLDI2CCND_START 0x00000001 | ||
94 | #define PLDI2CCND_STOP 0x00000002 | ||
95 | #define PLDI2CSTEN __reg32(M32700UT_LAN_BASE + 0x40054) | ||
96 | #define PLDI2CSTEN_STEN 0x00000001 | ||
97 | #define PLDI2CDATA __reg32(M32700UT_LAN_BASE + 0x40060) | ||
98 | #define PLDI2CSTS __reg32(M32700UT_LAN_BASE + 0x40064) | ||
99 | #define PLDI2CSTS_TRX 0x00000020 | ||
100 | #define PLDI2CSTS_BB 0x00000010 | ||
101 | #define PLDI2CSTS_NOACK 0x00000001 /* 0:ack, 1:noack */ | ||
102 | |||
103 | #endif /* _M32700UT_M32700UT_LAN_H */ | ||
diff --git a/arch/m32r/include/asm/m32700ut/m32700ut_lcd.h b/arch/m32r/include/asm/m32700ut/m32700ut_lcd.h deleted file mode 100644 index 4c2489079788..000000000000 --- a/arch/m32r/include/asm/m32700ut/m32700ut_lcd.h +++ /dev/null | |||
@@ -1,55 +0,0 @@ | |||
1 | #ifndef _M32700UT_M32700UT_LCD_H | ||
2 | #define _M32700UT_M32700UT_LCD_H | ||
3 | |||
4 | /* | ||
5 | * include/asm-m32r/m32700ut/m32700ut_lcd.h | ||
6 | * | ||
7 | * M32700UT-LCD board | ||
8 | * | ||
9 | * Copyright (c) 2002 Takeo Takahashi | ||
10 | * | ||
11 | * This file is subject to the terms and conditions of the GNU General | ||
12 | * Public License. See the file "COPYING" in the main directory of | ||
13 | * this archive for more details. | ||
14 | */ | ||
15 | |||
16 | #ifndef __ASSEMBLY__ | ||
17 | /* | ||
18 | * C functions use non-cache address. | ||
19 | */ | ||
20 | #define M32700UT_LCD_BASE (0x10000000 /* + NONCACHE_OFFSET */) | ||
21 | #else | ||
22 | #define M32700UT_LCD_BASE (0x10000000 + NONCACHE_OFFSET) | ||
23 | #endif /* __ASSEMBLY__ */ | ||
24 | |||
25 | /* | ||
26 | * ICU | ||
27 | */ | ||
28 | #define M32700UT_LCD_IRQ_BAT_INT (M32700UT_LCD_PLD_IRQ_BASE + 1) | ||
29 | #define M32700UT_LCD_IRQ_USB_INT1 (M32700UT_LCD_PLD_IRQ_BASE + 2) | ||
30 | #define M32700UT_LCD_IRQ_AUDT0 (M32700UT_LCD_PLD_IRQ_BASE + 3) | ||
31 | #define M32700UT_LCD_IRQ_AUDT2 (M32700UT_LCD_PLD_IRQ_BASE + 4) | ||
32 | #define M32700UT_LCD_IRQ_BATSIO_RCV (M32700UT_LCD_PLD_IRQ_BASE + 16) | ||
33 | #define M32700UT_LCD_IRQ_BATSIO_SND (M32700UT_LCD_PLD_IRQ_BASE + 17) | ||
34 | #define M32700UT_LCD_IRQ_ASNDSIO_RCV (M32700UT_LCD_PLD_IRQ_BASE + 18) | ||
35 | #define M32700UT_LCD_IRQ_ASNDSIO_SND (M32700UT_LCD_PLD_IRQ_BASE + 19) | ||
36 | #define M32700UT_LCD_IRQ_ACNLSIO_SND (M32700UT_LCD_PLD_IRQ_BASE + 21) | ||
37 | |||
38 | #define M32700UT_LCD_ICUISTS __reg16(M32700UT_LCD_BASE + 0x300002) | ||
39 | #define M32700UT_LCD_ICUISTS_VECB_MASK (0xf000) | ||
40 | #define M32700UT_LCD_VECB(x) ((x) & M32700UT_LCD_ICUISTS_VECB_MASK) | ||
41 | #define M32700UT_LCD_ICUISTS_ISN_MASK (0x07c0) | ||
42 | #define M32700UT_LCD_ICUISTS_ISN(x) ((x) & M32700UT_LCD_ICUISTS_ISN_MASK) | ||
43 | #define M32700UT_LCD_ICUIREQ0 __reg16(M32700UT_LCD_BASE + 0x300004) | ||
44 | #define M32700UT_LCD_ICUIREQ1 __reg16(M32700UT_LCD_BASE + 0x300006) | ||
45 | #define M32700UT_LCD_ICUCR1 __reg16(M32700UT_LCD_BASE + 0x300020) | ||
46 | #define M32700UT_LCD_ICUCR2 __reg16(M32700UT_LCD_BASE + 0x300022) | ||
47 | #define M32700UT_LCD_ICUCR3 __reg16(M32700UT_LCD_BASE + 0x300024) | ||
48 | #define M32700UT_LCD_ICUCR4 __reg16(M32700UT_LCD_BASE + 0x300026) | ||
49 | #define M32700UT_LCD_ICUCR16 __reg16(M32700UT_LCD_BASE + 0x300030) | ||
50 | #define M32700UT_LCD_ICUCR17 __reg16(M32700UT_LCD_BASE + 0x300032) | ||
51 | #define M32700UT_LCD_ICUCR18 __reg16(M32700UT_LCD_BASE + 0x300034) | ||
52 | #define M32700UT_LCD_ICUCR19 __reg16(M32700UT_LCD_BASE + 0x300036) | ||
53 | #define M32700UT_LCD_ICUCR21 __reg16(M32700UT_LCD_BASE + 0x30003a) | ||
54 | |||
55 | #endif /* _M32700UT_M32700UT_LCD_H */ | ||
diff --git a/arch/m32r/include/asm/m32700ut/m32700ut_pld.h b/arch/m32r/include/asm/m32700ut/m32700ut_pld.h deleted file mode 100644 index 35294670b187..000000000000 --- a/arch/m32r/include/asm/m32700ut/m32700ut_pld.h +++ /dev/null | |||
@@ -1,259 +0,0 @@ | |||
1 | #ifndef _M32700UT_M32700UT_PLD_H | ||
2 | #define _M32700UT_M32700UT_PLD_H | ||
3 | |||
4 | /* | ||
5 | * include/asm-m32r/m32700ut/m32700ut_pld.h | ||
6 | * | ||
7 | * Definitions for Programmable Logic Device(PLD) on M32700UT board. | ||
8 | * | ||
9 | * Copyright (c) 2002 Takeo Takahashi | ||
10 | * | ||
11 | * This file is subject to the terms and conditions of the GNU General | ||
12 | * Public License. See the file "COPYING" in the main directory of | ||
13 | * this archive for more details. | ||
14 | */ | ||
15 | |||
16 | #if defined(CONFIG_PLAT_M32700UT) || defined(CONFIG_PLAT_USRV) | ||
17 | #define PLD_PLAT_BASE 0x04c00000 | ||
18 | #else | ||
19 | #error "no platform configuration" | ||
20 | #endif | ||
21 | |||
22 | #ifndef __ASSEMBLY__ | ||
23 | /* | ||
24 | * C functions use non-cache address. | ||
25 | */ | ||
26 | #define PLD_BASE (PLD_PLAT_BASE /* + NONCACHE_OFFSET */) | ||
27 | #define __reg8 (volatile unsigned char *) | ||
28 | #define __reg16 (volatile unsigned short *) | ||
29 | #define __reg32 (volatile unsigned int *) | ||
30 | #else | ||
31 | #define PLD_BASE (PLD_PLAT_BASE + NONCACHE_OFFSET) | ||
32 | #define __reg8 | ||
33 | #define __reg16 | ||
34 | #define __reg32 | ||
35 | #endif /* __ASSEMBLY__ */ | ||
36 | |||
37 | /* CFC */ | ||
38 | #define PLD_CFRSTCR __reg16(PLD_BASE + 0x0000) | ||
39 | #define PLD_CFSTS __reg16(PLD_BASE + 0x0002) | ||
40 | #define PLD_CFIMASK __reg16(PLD_BASE + 0x0004) | ||
41 | #define PLD_CFBUFCR __reg16(PLD_BASE + 0x0006) | ||
42 | #define PLD_CFVENCR __reg16(PLD_BASE + 0x0008) | ||
43 | #define PLD_CFCR0 __reg16(PLD_BASE + 0x000a) | ||
44 | #define PLD_CFCR1 __reg16(PLD_BASE + 0x000c) | ||
45 | #define PLD_IDERSTCR __reg16(PLD_BASE + 0x0010) | ||
46 | |||
47 | /* MMC */ | ||
48 | #define PLD_MMCCR __reg16(PLD_BASE + 0x4000) | ||
49 | #define PLD_MMCMOD __reg16(PLD_BASE + 0x4002) | ||
50 | #define PLD_MMCSTS __reg16(PLD_BASE + 0x4006) | ||
51 | #define PLD_MMCBAUR __reg16(PLD_BASE + 0x400a) | ||
52 | #define PLD_MMCCMDBCUT __reg16(PLD_BASE + 0x400c) | ||
53 | #define PLD_MMCCDTBCUT __reg16(PLD_BASE + 0x400e) | ||
54 | #define PLD_MMCDET __reg16(PLD_BASE + 0x4010) | ||
55 | #define PLD_MMCWP __reg16(PLD_BASE + 0x4012) | ||
56 | #define PLD_MMCWDATA __reg16(PLD_BASE + 0x5000) | ||
57 | #define PLD_MMCRDATA __reg16(PLD_BASE + 0x6000) | ||
58 | #define PLD_MMCCMDDATA __reg16(PLD_BASE + 0x7000) | ||
59 | #define PLD_MMCRSPDATA __reg16(PLD_BASE + 0x7006) | ||
60 | |||
61 | /* ICU | ||
62 | * ICUISTS: status register | ||
63 | * ICUIREQ0: request register | ||
64 | * ICUIREQ1: request register | ||
65 | * ICUCR3: control register for CFIREQ# interrupt | ||
66 | * ICUCR4: control register for CFC Card insert interrupt | ||
67 | * ICUCR5: control register for CFC Card eject interrupt | ||
68 | * ICUCR6: control register for external interrupt | ||
69 | * ICUCR11: control register for MMC Card insert/eject interrupt | ||
70 | * ICUCR13: control register for SC error interrupt | ||
71 | * ICUCR14: control register for SC receive interrupt | ||
72 | * ICUCR15: control register for SC send interrupt | ||
73 | * ICUCR16: control register for SIO0 receive interrupt | ||
74 | * ICUCR17: control register for SIO0 send interrupt | ||
75 | */ | ||
76 | #if !defined(CONFIG_PLAT_USRV) | ||
77 | #define PLD_IRQ_INT0 (M32700UT_PLD_IRQ_BASE + 0) /* None */ | ||
78 | #define PLD_IRQ_INT1 (M32700UT_PLD_IRQ_BASE + 1) /* reserved */ | ||
79 | #define PLD_IRQ_INT2 (M32700UT_PLD_IRQ_BASE + 2) /* reserved */ | ||
80 | #define PLD_IRQ_CFIREQ (M32700UT_PLD_IRQ_BASE + 3) /* CF IREQ */ | ||
81 | #define PLD_IRQ_CFC_INSERT (M32700UT_PLD_IRQ_BASE + 4) /* CF Insert */ | ||
82 | #define PLD_IRQ_CFC_EJECT (M32700UT_PLD_IRQ_BASE + 5) /* CF Eject */ | ||
83 | #define PLD_IRQ_EXINT (M32700UT_PLD_IRQ_BASE + 6) /* EXINT */ | ||
84 | #define PLD_IRQ_INT7 (M32700UT_PLD_IRQ_BASE + 7) /* reserved */ | ||
85 | #define PLD_IRQ_INT8 (M32700UT_PLD_IRQ_BASE + 8) /* reserved */ | ||
86 | #define PLD_IRQ_INT9 (M32700UT_PLD_IRQ_BASE + 9) /* reserved */ | ||
87 | #define PLD_IRQ_INT10 (M32700UT_PLD_IRQ_BASE + 10) /* reserved */ | ||
88 | #define PLD_IRQ_MMCCARD (M32700UT_PLD_IRQ_BASE + 11) /* MMC Insert/Eject */ | ||
89 | #define PLD_IRQ_INT12 (M32700UT_PLD_IRQ_BASE + 12) /* reserved */ | ||
90 | #define PLD_IRQ_SC_ERROR (M32700UT_PLD_IRQ_BASE + 13) /* SC error */ | ||
91 | #define PLD_IRQ_SC_RCV (M32700UT_PLD_IRQ_BASE + 14) /* SC receive */ | ||
92 | #define PLD_IRQ_SC_SND (M32700UT_PLD_IRQ_BASE + 15) /* SC send */ | ||
93 | #define PLD_IRQ_SIO0_RCV (M32700UT_PLD_IRQ_BASE + 16) /* SIO receive */ | ||
94 | #define PLD_IRQ_SIO0_SND (M32700UT_PLD_IRQ_BASE + 17) /* SIO send */ | ||
95 | #define PLD_IRQ_INT18 (M32700UT_PLD_IRQ_BASE + 18) /* reserved */ | ||
96 | #define PLD_IRQ_INT19 (M32700UT_PLD_IRQ_BASE + 19) /* reserved */ | ||
97 | #define PLD_IRQ_INT20 (M32700UT_PLD_IRQ_BASE + 20) /* reserved */ | ||
98 | #define PLD_IRQ_INT21 (M32700UT_PLD_IRQ_BASE + 21) /* reserved */ | ||
99 | #define PLD_IRQ_INT22 (M32700UT_PLD_IRQ_BASE + 22) /* reserved */ | ||
100 | #define PLD_IRQ_INT23 (M32700UT_PLD_IRQ_BASE + 23) /* reserved */ | ||
101 | #define PLD_IRQ_INT24 (M32700UT_PLD_IRQ_BASE + 24) /* reserved */ | ||
102 | #define PLD_IRQ_INT25 (M32700UT_PLD_IRQ_BASE + 25) /* reserved */ | ||
103 | #define PLD_IRQ_INT26 (M32700UT_PLD_IRQ_BASE + 26) /* reserved */ | ||
104 | #define PLD_IRQ_INT27 (M32700UT_PLD_IRQ_BASE + 27) /* reserved */ | ||
105 | #define PLD_IRQ_INT28 (M32700UT_PLD_IRQ_BASE + 28) /* reserved */ | ||
106 | #define PLD_IRQ_INT29 (M32700UT_PLD_IRQ_BASE + 29) /* reserved */ | ||
107 | #define PLD_IRQ_INT30 (M32700UT_PLD_IRQ_BASE + 30) /* reserved */ | ||
108 | #define PLD_IRQ_INT31 (M32700UT_PLD_IRQ_BASE + 31) /* reserved */ | ||
109 | |||
110 | #else /* CONFIG_PLAT_USRV */ | ||
111 | |||
112 | #define PLD_IRQ_INT0 (M32700UT_PLD_IRQ_BASE + 0) /* None */ | ||
113 | #define PLD_IRQ_INT1 (M32700UT_PLD_IRQ_BASE + 1) /* reserved */ | ||
114 | #define PLD_IRQ_INT2 (M32700UT_PLD_IRQ_BASE + 2) /* reserved */ | ||
115 | #define PLD_IRQ_CF0 (M32700UT_PLD_IRQ_BASE + 3) /* CF0# */ | ||
116 | #define PLD_IRQ_CF1 (M32700UT_PLD_IRQ_BASE + 4) /* CF1# */ | ||
117 | #define PLD_IRQ_CF2 (M32700UT_PLD_IRQ_BASE + 5) /* CF2# */ | ||
118 | #define PLD_IRQ_CF3 (M32700UT_PLD_IRQ_BASE + 6) /* CF3# */ | ||
119 | #define PLD_IRQ_CF4 (M32700UT_PLD_IRQ_BASE + 7) /* CF4# */ | ||
120 | #define PLD_IRQ_INT8 (M32700UT_PLD_IRQ_BASE + 8) /* reserved */ | ||
121 | #define PLD_IRQ_INT9 (M32700UT_PLD_IRQ_BASE + 9) /* reserved */ | ||
122 | #define PLD_IRQ_INT10 (M32700UT_PLD_IRQ_BASE + 10) /* reserved */ | ||
123 | #define PLD_IRQ_INT11 (M32700UT_PLD_IRQ_BASE + 11) /* reserved */ | ||
124 | #define PLD_IRQ_UART0 (M32700UT_PLD_IRQ_BASE + 12) /* UARTIRQ0 */ | ||
125 | #define PLD_IRQ_UART1 (M32700UT_PLD_IRQ_BASE + 13) /* UARTIRQ1 */ | ||
126 | #define PLD_IRQ_INT14 (M32700UT_PLD_IRQ_BASE + 14) /* reserved */ | ||
127 | #define PLD_IRQ_INT15 (M32700UT_PLD_IRQ_BASE + 15) /* reserved */ | ||
128 | #define PLD_IRQ_SNDINT (M32700UT_PLD_IRQ_BASE + 16) /* SNDINT# */ | ||
129 | #define PLD_IRQ_INT17 (M32700UT_PLD_IRQ_BASE + 17) /* reserved */ | ||
130 | #define PLD_IRQ_INT18 (M32700UT_PLD_IRQ_BASE + 18) /* reserved */ | ||
131 | #define PLD_IRQ_INT19 (M32700UT_PLD_IRQ_BASE + 19) /* reserved */ | ||
132 | #define PLD_IRQ_INT20 (M32700UT_PLD_IRQ_BASE + 20) /* reserved */ | ||
133 | #define PLD_IRQ_INT21 (M32700UT_PLD_IRQ_BASE + 21) /* reserved */ | ||
134 | #define PLD_IRQ_INT22 (M32700UT_PLD_IRQ_BASE + 22) /* reserved */ | ||
135 | #define PLD_IRQ_INT23 (M32700UT_PLD_IRQ_BASE + 23) /* reserved */ | ||
136 | #define PLD_IRQ_INT24 (M32700UT_PLD_IRQ_BASE + 24) /* reserved */ | ||
137 | #define PLD_IRQ_INT25 (M32700UT_PLD_IRQ_BASE + 25) /* reserved */ | ||
138 | #define PLD_IRQ_INT26 (M32700UT_PLD_IRQ_BASE + 26) /* reserved */ | ||
139 | #define PLD_IRQ_INT27 (M32700UT_PLD_IRQ_BASE + 27) /* reserved */ | ||
140 | #define PLD_IRQ_INT28 (M32700UT_PLD_IRQ_BASE + 28) /* reserved */ | ||
141 | #define PLD_IRQ_INT29 (M32700UT_PLD_IRQ_BASE + 29) /* reserved */ | ||
142 | #define PLD_IRQ_INT30 (M32700UT_PLD_IRQ_BASE + 30) /* reserved */ | ||
143 | |||
144 | #endif /* CONFIG_PLAT_USRV */ | ||
145 | |||
146 | #define PLD_ICUISTS __reg16(PLD_BASE + 0x8002) | ||
147 | #define PLD_ICUISTS_VECB_MASK (0xf000) | ||
148 | #define PLD_ICUISTS_VECB(x) ((x) & PLD_ICUISTS_VECB_MASK) | ||
149 | #define PLD_ICUISTS_ISN_MASK (0x07c0) | ||
150 | #define PLD_ICUISTS_ISN(x) ((x) & PLD_ICUISTS_ISN_MASK) | ||
151 | #define PLD_ICUIREQ0 __reg16(PLD_BASE + 0x8004) | ||
152 | #define PLD_ICUIREQ1 __reg16(PLD_BASE + 0x8006) | ||
153 | #define PLD_ICUCR1 __reg16(PLD_BASE + 0x8100) | ||
154 | #define PLD_ICUCR2 __reg16(PLD_BASE + 0x8102) | ||
155 | #define PLD_ICUCR3 __reg16(PLD_BASE + 0x8104) | ||
156 | #define PLD_ICUCR4 __reg16(PLD_BASE + 0x8106) | ||
157 | #define PLD_ICUCR5 __reg16(PLD_BASE + 0x8108) | ||
158 | #define PLD_ICUCR6 __reg16(PLD_BASE + 0x810a) | ||
159 | #define PLD_ICUCR7 __reg16(PLD_BASE + 0x810c) | ||
160 | #define PLD_ICUCR8 __reg16(PLD_BASE + 0x810e) | ||
161 | #define PLD_ICUCR9 __reg16(PLD_BASE + 0x8110) | ||
162 | #define PLD_ICUCR10 __reg16(PLD_BASE + 0x8112) | ||
163 | #define PLD_ICUCR11 __reg16(PLD_BASE + 0x8114) | ||
164 | #define PLD_ICUCR12 __reg16(PLD_BASE + 0x8116) | ||
165 | #define PLD_ICUCR13 __reg16(PLD_BASE + 0x8118) | ||
166 | #define PLD_ICUCR14 __reg16(PLD_BASE + 0x811a) | ||
167 | #define PLD_ICUCR15 __reg16(PLD_BASE + 0x811c) | ||
168 | #define PLD_ICUCR16 __reg16(PLD_BASE + 0x811e) | ||
169 | #define PLD_ICUCR17 __reg16(PLD_BASE + 0x8120) | ||
170 | #define PLD_ICUCR_IEN (0x1000) | ||
171 | #define PLD_ICUCR_IREQ (0x0100) | ||
172 | #define PLD_ICUCR_ISMOD00 (0x0000) /* Low edge */ | ||
173 | #define PLD_ICUCR_ISMOD01 (0x0010) /* Low level */ | ||
174 | #define PLD_ICUCR_ISMOD02 (0x0020) /* High edge */ | ||
175 | #define PLD_ICUCR_ISMOD03 (0x0030) /* High level */ | ||
176 | #define PLD_ICUCR_ILEVEL0 (0x0000) | ||
177 | #define PLD_ICUCR_ILEVEL1 (0x0001) | ||
178 | #define PLD_ICUCR_ILEVEL2 (0x0002) | ||
179 | #define PLD_ICUCR_ILEVEL3 (0x0003) | ||
180 | #define PLD_ICUCR_ILEVEL4 (0x0004) | ||
181 | #define PLD_ICUCR_ILEVEL5 (0x0005) | ||
182 | #define PLD_ICUCR_ILEVEL6 (0x0006) | ||
183 | #define PLD_ICUCR_ILEVEL7 (0x0007) | ||
184 | |||
185 | /* Power Control of MMC and CF */ | ||
186 | #define PLD_CPCR __reg16(PLD_BASE + 0x14000) | ||
187 | #define PLD_CPCR_CF 0x0001 | ||
188 | #define PLD_CPCR_MMC 0x0002 | ||
189 | |||
190 | /* LED Control | ||
191 | * | ||
192 | * 1: DIP swich side | ||
193 | * 2: Reset switch side | ||
194 | */ | ||
195 | #define PLD_IOLEDCR __reg16(PLD_BASE + 0x14002) | ||
196 | #define PLD_IOLED_1_ON 0x001 | ||
197 | #define PLD_IOLED_1_OFF 0x000 | ||
198 | #define PLD_IOLED_2_ON 0x002 | ||
199 | #define PLD_IOLED_2_OFF 0x000 | ||
200 | |||
201 | /* DIP Switch | ||
202 | * 0: Write-protect of Flash Memory (0:protected, 1:non-protected) | ||
203 | * 1: - | ||
204 | * 2: - | ||
205 | * 3: - | ||
206 | */ | ||
207 | #define PLD_IOSWSTS __reg16(PLD_BASE + 0x14004) | ||
208 | #define PLD_IOSWSTS_IOSW2 0x0200 | ||
209 | #define PLD_IOSWSTS_IOSW1 0x0100 | ||
210 | #define PLD_IOSWSTS_IOWP0 0x0001 | ||
211 | |||
212 | /* CRC */ | ||
213 | #define PLD_CRC7DATA __reg16(PLD_BASE + 0x18000) | ||
214 | #define PLD_CRC7INDATA __reg16(PLD_BASE + 0x18002) | ||
215 | #define PLD_CRC16DATA __reg16(PLD_BASE + 0x18004) | ||
216 | #define PLD_CRC16INDATA __reg16(PLD_BASE + 0x18006) | ||
217 | #define PLD_CRC16ADATA __reg16(PLD_BASE + 0x18008) | ||
218 | #define PLD_CRC16AINDATA __reg16(PLD_BASE + 0x1800a) | ||
219 | |||
220 | /* RTC */ | ||
221 | #define PLD_RTCCR __reg16(PLD_BASE + 0x1c000) | ||
222 | #define PLD_RTCBAUR __reg16(PLD_BASE + 0x1c002) | ||
223 | #define PLD_RTCWRDATA __reg16(PLD_BASE + 0x1c004) | ||
224 | #define PLD_RTCRDDATA __reg16(PLD_BASE + 0x1c006) | ||
225 | #define PLD_RTCRSTODT __reg16(PLD_BASE + 0x1c008) | ||
226 | |||
227 | /* SIO0 */ | ||
228 | #define PLD_ESIO0CR __reg16(PLD_BASE + 0x20000) | ||
229 | #define PLD_ESIO0CR_TXEN 0x0001 | ||
230 | #define PLD_ESIO0CR_RXEN 0x0002 | ||
231 | #define PLD_ESIO0MOD0 __reg16(PLD_BASE + 0x20002) | ||
232 | #define PLD_ESIO0MOD0_CTSS 0x0040 | ||
233 | #define PLD_ESIO0MOD0_RTSS 0x0080 | ||
234 | #define PLD_ESIO0MOD1 __reg16(PLD_BASE + 0x20004) | ||
235 | #define PLD_ESIO0MOD1_LMFS 0x0010 | ||
236 | #define PLD_ESIO0STS __reg16(PLD_BASE + 0x20006) | ||
237 | #define PLD_ESIO0STS_TEMP 0x0001 | ||
238 | #define PLD_ESIO0STS_TXCP 0x0002 | ||
239 | #define PLD_ESIO0STS_RXCP 0x0004 | ||
240 | #define PLD_ESIO0STS_TXSC 0x0100 | ||
241 | #define PLD_ESIO0STS_RXSC 0x0200 | ||
242 | #define PLD_ESIO0STS_TXREADY (PLD_ESIO0STS_TXCP | PLD_ESIO0STS_TEMP) | ||
243 | #define PLD_ESIO0INTCR __reg16(PLD_BASE + 0x20008) | ||
244 | #define PLD_ESIO0INTCR_TXIEN 0x0002 | ||
245 | #define PLD_ESIO0INTCR_RXCEN 0x0004 | ||
246 | #define PLD_ESIO0BAUR __reg16(PLD_BASE + 0x2000a) | ||
247 | #define PLD_ESIO0TXB __reg16(PLD_BASE + 0x2000c) | ||
248 | #define PLD_ESIO0RXB __reg16(PLD_BASE + 0x2000e) | ||
249 | |||
250 | /* SIM Card */ | ||
251 | #define PLD_SCCR __reg16(PLD_BASE + 0x38000) | ||
252 | #define PLD_SCMOD __reg16(PLD_BASE + 0x38004) | ||
253 | #define PLD_SCSTS __reg16(PLD_BASE + 0x38006) | ||
254 | #define PLD_SCINTCR __reg16(PLD_BASE + 0x38008) | ||
255 | #define PLD_SCBAUR __reg16(PLD_BASE + 0x3800a) | ||
256 | #define PLD_SCTXB __reg16(PLD_BASE + 0x3800c) | ||
257 | #define PLD_SCRXB __reg16(PLD_BASE + 0x3800e) | ||
258 | |||
259 | #endif /* _M32700UT_M32700UT_PLD.H */ | ||
diff --git a/arch/m32r/include/asm/m32r.h b/arch/m32r/include/asm/m32r.h deleted file mode 100644 index d27f056d92f3..000000000000 --- a/arch/m32r/include/asm/m32r.h +++ /dev/null | |||
@@ -1,161 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifndef _ASM_M32R_M32R_H_ | ||
3 | #define _ASM_M32R_M32R_H_ | ||
4 | |||
5 | /* | ||
6 | * Renesas M32R processor | ||
7 | * | ||
8 | * Copyright (C) 2003, 2004 Renesas Technology Corp. | ||
9 | */ | ||
10 | |||
11 | |||
12 | /* Chip type */ | ||
13 | #if defined(CONFIG_CHIP_XNUX_MP) || defined(CONFIG_CHIP_XNUX2_MP) | ||
14 | #include <asm/m32r_mp_fpga.h> | ||
15 | #elif defined(CONFIG_CHIP_VDEC2) || defined(CONFIG_CHIP_XNUX2) \ | ||
16 | || defined(CONFIG_CHIP_M32700) || defined(CONFIG_CHIP_M32102) \ | ||
17 | || defined(CONFIG_CHIP_OPSP) || defined(CONFIG_CHIP_M32104) | ||
18 | #include <asm/m32102.h> | ||
19 | #endif | ||
20 | |||
21 | /* Platform type */ | ||
22 | #if defined(CONFIG_PLAT_M32700UT) | ||
23 | #include <asm/m32700ut/m32700ut_pld.h> | ||
24 | #include <asm/m32700ut/m32700ut_lan.h> | ||
25 | #include <asm/m32700ut/m32700ut_lcd.h> | ||
26 | /* for ei_handler:linux/arch/m32r/kernel/entry.S */ | ||
27 | #define M32R_INT1ICU_ISTS PLD_ICUISTS | ||
28 | #define M32R_INT1ICU_IRQ_BASE M32700UT_PLD_IRQ_BASE | ||
29 | #define M32R_INT0ICU_ISTS M32700UT_LAN_ICUISTS | ||
30 | #define M32R_INT0ICU_IRQ_BASE M32700UT_LAN_PLD_IRQ_BASE | ||
31 | #define M32R_INT2ICU_ISTS M32700UT_LCD_ICUISTS | ||
32 | #define M32R_INT2ICU_IRQ_BASE M32700UT_LCD_PLD_IRQ_BASE | ||
33 | #endif /* CONFIG_PLAT_M32700UT */ | ||
34 | |||
35 | #if defined(CONFIG_PLAT_OPSPUT) | ||
36 | #include <asm/opsput/opsput_pld.h> | ||
37 | #include <asm/opsput/opsput_lan.h> | ||
38 | #include <asm/opsput/opsput_lcd.h> | ||
39 | /* for ei_handler:linux/arch/m32r/kernel/entry.S */ | ||
40 | #define M32R_INT1ICU_ISTS PLD_ICUISTS | ||
41 | #define M32R_INT1ICU_IRQ_BASE OPSPUT_PLD_IRQ_BASE | ||
42 | #define M32R_INT0ICU_ISTS OPSPUT_LAN_ICUISTS | ||
43 | #define M32R_INT0ICU_IRQ_BASE OPSPUT_LAN_PLD_IRQ_BASE | ||
44 | #define M32R_INT2ICU_ISTS OPSPUT_LCD_ICUISTS | ||
45 | #define M32R_INT2ICU_IRQ_BASE OPSPUT_LCD_PLD_IRQ_BASE | ||
46 | #endif /* CONFIG_PLAT_OPSPUT */ | ||
47 | |||
48 | #if defined(CONFIG_PLAT_MAPPI2) | ||
49 | #include <asm/mappi2/mappi2_pld.h> | ||
50 | #endif /* CONFIG_PLAT_MAPPI2 */ | ||
51 | |||
52 | #if defined(CONFIG_PLAT_MAPPI3) | ||
53 | #include <asm/mappi3/mappi3_pld.h> | ||
54 | #endif /* CONFIG_PLAT_MAPPI3 */ | ||
55 | |||
56 | #if defined(CONFIG_PLAT_USRV) | ||
57 | #include <asm/m32700ut/m32700ut_pld.h> | ||
58 | /* for ei_handler:linux/arch/m32r/kernel/entry.S */ | ||
59 | #define M32R_INT1ICU_ISTS PLD_ICUISTS | ||
60 | #define M32R_INT1ICU_IRQ_BASE M32700UT_PLD_IRQ_BASE | ||
61 | #endif | ||
62 | |||
63 | #if defined(CONFIG_PLAT_M32104UT) | ||
64 | #include <asm/m32104ut/m32104ut_pld.h> | ||
65 | /* for ei_handler:linux/arch/m32r/kernel/entry.S */ | ||
66 | #define M32R_INT1ICU_ISTS PLD_ICUISTS | ||
67 | #define M32R_INT1ICU_IRQ_BASE M32104UT_PLD_IRQ_BASE | ||
68 | #endif /* CONFIG_PLAT_M32104 */ | ||
69 | |||
70 | /* | ||
71 | * M32R Register | ||
72 | */ | ||
73 | |||
74 | /* | ||
75 | * MMU Register | ||
76 | */ | ||
77 | |||
78 | #define MMU_REG_BASE (0xffff0000) | ||
79 | #define ITLB_BASE (0xfe000000) | ||
80 | #define DTLB_BASE (0xfe000800) | ||
81 | |||
82 | #define NR_TLB_ENTRIES CONFIG_TLB_ENTRIES | ||
83 | |||
84 | #define MATM MMU_REG_BASE /* MMU Address Translation Mode | ||
85 | Register */ | ||
86 | #define MPSZ (0x04 + MMU_REG_BASE) /* MMU Page Size Designation Register */ | ||
87 | #define MASID (0x08 + MMU_REG_BASE) /* MMU Address Space ID Register */ | ||
88 | #define MESTS (0x0c + MMU_REG_BASE) /* MMU Exception Status Register */ | ||
89 | #define MDEVA (0x10 + MMU_REG_BASE) /* MMU Operand Exception Virtual | ||
90 | Address Register */ | ||
91 | #define MDEVP (0x14 + MMU_REG_BASE) /* MMU Operand Exception Virtual Page | ||
92 | Number Register */ | ||
93 | #define MPTB (0x18 + MMU_REG_BASE) /* MMU Page Table Base Register */ | ||
94 | #define MSVA (0x20 + MMU_REG_BASE) /* MMU Search Virtual Address | ||
95 | Register */ | ||
96 | #define MTOP (0x24 + MMU_REG_BASE) /* MMU TLB Operation Register */ | ||
97 | #define MIDXI (0x28 + MMU_REG_BASE) /* MMU Index Register for | ||
98 | Instruciton */ | ||
99 | #define MIDXD (0x2c + MMU_REG_BASE) /* MMU Index Register for Operand */ | ||
100 | |||
101 | #define MATM_offset (MATM - MMU_REG_BASE) | ||
102 | #define MPSZ_offset (MPSZ - MMU_REG_BASE) | ||
103 | #define MASID_offset (MASID - MMU_REG_BASE) | ||
104 | #define MESTS_offset (MESTS - MMU_REG_BASE) | ||
105 | #define MDEVA_offset (MDEVA - MMU_REG_BASE) | ||
106 | #define MDEVP_offset (MDEVP - MMU_REG_BASE) | ||
107 | #define MPTB_offset (MPTB - MMU_REG_BASE) | ||
108 | #define MSVA_offset (MSVA - MMU_REG_BASE) | ||
109 | #define MTOP_offset (MTOP - MMU_REG_BASE) | ||
110 | #define MIDXI_offset (MIDXI - MMU_REG_BASE) | ||
111 | #define MIDXD_offset (MIDXD - MMU_REG_BASE) | ||
112 | |||
113 | #define MESTS_IT (1 << 0) /* Instruction TLB miss */ | ||
114 | #define MESTS_IA (1 << 1) /* Instruction Access Exception */ | ||
115 | #define MESTS_DT (1 << 4) /* Operand TLB miss */ | ||
116 | #define MESTS_DA (1 << 5) /* Operand Access Exception */ | ||
117 | #define MESTS_DRW (1 << 6) /* Operand Write Exception Flag */ | ||
118 | |||
119 | /* | ||
120 | * PSW (Processor Status Word) | ||
121 | */ | ||
122 | |||
123 | /* PSW bit */ | ||
124 | #define M32R_PSW_BIT_SM (7) /* Stack Mode */ | ||
125 | #define M32R_PSW_BIT_IE (6) /* Interrupt Enable */ | ||
126 | #define M32R_PSW_BIT_PM (3) /* Processor Mode [0:Supervisor,1:User] */ | ||
127 | #define M32R_PSW_BIT_C (0) /* Condition */ | ||
128 | #define M32R_PSW_BIT_BSM (7+8) /* Backup Stack Mode */ | ||
129 | #define M32R_PSW_BIT_BIE (6+8) /* Backup Interrupt Enable */ | ||
130 | #define M32R_PSW_BIT_BPM (3+8) /* Backup Processor Mode */ | ||
131 | #define M32R_PSW_BIT_BC (0+8) /* Backup Condition */ | ||
132 | |||
133 | /* PSW bit map */ | ||
134 | #define M32R_PSW_SM (1UL<< M32R_PSW_BIT_SM) /* Stack Mode */ | ||
135 | #define M32R_PSW_IE (1UL<< M32R_PSW_BIT_IE) /* Interrupt Enable */ | ||
136 | #define M32R_PSW_PM (1UL<< M32R_PSW_BIT_PM) /* Processor Mode */ | ||
137 | #define M32R_PSW_C (1UL<< M32R_PSW_BIT_C) /* Condition */ | ||
138 | #define M32R_PSW_BSM (1UL<< M32R_PSW_BIT_BSM) /* Backup Stack Mode */ | ||
139 | #define M32R_PSW_BIE (1UL<< M32R_PSW_BIT_BIE) /* Backup Interrupt Enable */ | ||
140 | #define M32R_PSW_BPM (1UL<< M32R_PSW_BIT_BPM) /* Backup Processor Mode */ | ||
141 | #define M32R_PSW_BC (1UL<< M32R_PSW_BIT_BC) /* Backup Condition */ | ||
142 | |||
143 | /* | ||
144 | * Direct address to SFR | ||
145 | */ | ||
146 | |||
147 | #include <asm/page.h> | ||
148 | #ifdef CONFIG_MMU | ||
149 | #define NONCACHE_OFFSET (__PAGE_OFFSET + 0x20000000) | ||
150 | #else | ||
151 | #define NONCACHE_OFFSET __PAGE_OFFSET | ||
152 | #endif /* CONFIG_MMU */ | ||
153 | |||
154 | #define M32R_ICU_ISTS_ADDR M32R_ICU_ISTS_PORTL+NONCACHE_OFFSET | ||
155 | #define M32R_ICU_IPICR_ADDR M32R_ICU_IPICR0_PORTL+NONCACHE_OFFSET | ||
156 | #define M32R_ICU_IMASK_ADDR M32R_ICU_IMASK_PORTL+NONCACHE_OFFSET | ||
157 | #define M32R_FPGA_CPU_NAME_ADDR M32R_FPGA_CPU_NAME0_PORTL+NONCACHE_OFFSET | ||
158 | #define M32R_FPGA_MODEL_ID_ADDR M32R_FPGA_MODEL_ID0_PORTL+NONCACHE_OFFSET | ||
159 | #define M32R_FPGA_VERSION_ADDR M32R_FPGA_VERSION0_PORTL+NONCACHE_OFFSET | ||
160 | |||
161 | #endif /* _ASM_M32R_M32R_H_ */ | ||
diff --git a/arch/m32r/include/asm/m32r_mp_fpga.h b/arch/m32r/include/asm/m32r_mp_fpga.h deleted file mode 100644 index 8eeaa9a420c5..000000000000 --- a/arch/m32r/include/asm/m32r_mp_fpga.h +++ /dev/null | |||
@@ -1,314 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifndef _ASM_M32R_M32R_MP_FPGA_ | ||
3 | #define _ASM_M32R_M32R_MP_FPGA_ | ||
4 | |||
5 | /* | ||
6 | * Renesas M32R-MP-FPGA | ||
7 | * | ||
8 | * Copyright (c) 2002 Hitoshi Yamamoto | ||
9 | * Copyright (c) 2003, 2004 Renesas Technology Corp. | ||
10 | */ | ||
11 | |||
12 | /* | ||
13 | * ======================================================== | ||
14 | * M32R-MP-FPGA Memory Map | ||
15 | * ======================================================== | ||
16 | * 0x00000000 : Block#0 : 64[MB] | ||
17 | * 0x03E00000 : SFR | ||
18 | * 0x03E00000 : reserved | ||
19 | * 0x03EF0000 : FPGA | ||
20 | * 0x03EF1000 : reserved | ||
21 | * 0x03EF4000 : CKM | ||
22 | * 0x03EF4000 : BSELC | ||
23 | * 0x03EF5000 : reserved | ||
24 | * 0x03EFC000 : MFT | ||
25 | * 0x03EFD000 : SIO | ||
26 | * 0x03EFE000 : reserved | ||
27 | * 0x03EFF000 : ICU | ||
28 | * 0x03F00000 : Internal SRAM 64[KB] | ||
29 | * 0x03F10000 : reserved | ||
30 | * -------------------------------------------------------- | ||
31 | * 0x04000000 : Block#1 : 64[MB] | ||
32 | * 0x04000000 : Debug board SRAM 4[MB] | ||
33 | * 0x04400000 : reserved | ||
34 | * -------------------------------------------------------- | ||
35 | * 0x08000000 : Block#2 : 64[MB] | ||
36 | * -------------------------------------------------------- | ||
37 | * 0x0C000000 : Block#3 : 64[MB] | ||
38 | * -------------------------------------------------------- | ||
39 | * 0x10000000 : Block#4 : 64[MB] | ||
40 | * -------------------------------------------------------- | ||
41 | * 0x14000000 : Block#5 : 64[MB] | ||
42 | * -------------------------------------------------------- | ||
43 | * 0x18000000 : Block#6 : 64[MB] | ||
44 | * -------------------------------------------------------- | ||
45 | * 0x1C000000 : Block#7 : 64[MB] | ||
46 | * -------------------------------------------------------- | ||
47 | * 0xFE000000 : TLB | ||
48 | * 0xFE000000 : ITLB | ||
49 | * 0xFE000080 : reserved | ||
50 | * 0xFE000800 : DTLB | ||
51 | * 0xFE000880 : reserved | ||
52 | * -------------------------------------------------------- | ||
53 | * 0xFF000000 : System area | ||
54 | * 0xFFFF0000 : MMU | ||
55 | * 0xFFFF0030 : reserved | ||
56 | * 0xFFFF8000 : Debug function | ||
57 | * 0xFFFFA000 : reserved | ||
58 | * 0xFFFFC000 : CPU control | ||
59 | * 0xFFFFFFFF | ||
60 | * ======================================================== | ||
61 | */ | ||
62 | |||
63 | /*======================================================================* | ||
64 | * Special Function Register | ||
65 | *======================================================================*/ | ||
66 | #define M32R_SFR_OFFSET (0x00E00000) /* 0x03E00000-0x03EFFFFF 1[MB] */ | ||
67 | |||
68 | /* | ||
69 | * FPGA registers. | ||
70 | */ | ||
71 | #define M32R_FPGA_TOP (0x000F0000+M32R_SFR_OFFSET) | ||
72 | |||
73 | #define M32R_FPGA_NUM_OF_CPUS_PORTL (0x00+M32R_FPGA_TOP) | ||
74 | #define M32R_FPGA_CPU_NAME0_PORTL (0x10+M32R_FPGA_TOP) | ||
75 | #define M32R_FPGA_CPU_NAME1_PORTL (0x14+M32R_FPGA_TOP) | ||
76 | #define M32R_FPGA_CPU_NAME2_PORTL (0x18+M32R_FPGA_TOP) | ||
77 | #define M32R_FPGA_CPU_NAME3_PORTL (0x1C+M32R_FPGA_TOP) | ||
78 | #define M32R_FPGA_MODEL_ID0_PORTL (0x20+M32R_FPGA_TOP) | ||
79 | #define M32R_FPGA_MODEL_ID1_PORTL (0x24+M32R_FPGA_TOP) | ||
80 | #define M32R_FPGA_MODEL_ID2_PORTL (0x28+M32R_FPGA_TOP) | ||
81 | #define M32R_FPGA_MODEL_ID3_PORTL (0x2C+M32R_FPGA_TOP) | ||
82 | #define M32R_FPGA_VERSION0_PORTL (0x30+M32R_FPGA_TOP) | ||
83 | #define M32R_FPGA_VERSION1_PORTL (0x34+M32R_FPGA_TOP) | ||
84 | |||
85 | /* | ||
86 | * Clock and Power Manager registers. | ||
87 | */ | ||
88 | #define M32R_CPM_OFFSET (0x000F4000+M32R_SFR_OFFSET) | ||
89 | |||
90 | #define M32R_CPM_CPUCLKCR_PORTL (0x00+M32R_CPM_OFFSET) | ||
91 | #define M32R_CPM_CLKMOD_PORTL (0x04+M32R_CPM_OFFSET) | ||
92 | #define M32R_CPM_PLLCR_PORTL (0x08+M32R_CPM_OFFSET) | ||
93 | |||
94 | /* | ||
95 | * Block SELect Controller registers. | ||
96 | */ | ||
97 | #define M32R_BSELC_OFFSET (0x000F5000+M32R_SFR_OFFSET) | ||
98 | |||
99 | #define M32R_BSEL0_CR0_PORTL (0x000+M32R_BSELC_OFFSET) | ||
100 | #define M32R_BSEL0_CR1_PORTL (0x004+M32R_BSELC_OFFSET) | ||
101 | #define M32R_BSEL1_CR0_PORTL (0x100+M32R_BSELC_OFFSET) | ||
102 | #define M32R_BSEL1_CR1_PORTL (0x104+M32R_BSELC_OFFSET) | ||
103 | #define M32R_BSEL2_CR0_PORTL (0x200+M32R_BSELC_OFFSET) | ||
104 | #define M32R_BSEL2_CR1_PORTL (0x204+M32R_BSELC_OFFSET) | ||
105 | #define M32R_BSEL3_CR0_PORTL (0x300+M32R_BSELC_OFFSET) | ||
106 | #define M32R_BSEL3_CR1_PORTL (0x304+M32R_BSELC_OFFSET) | ||
107 | #define M32R_BSEL4_CR0_PORTL (0x400+M32R_BSELC_OFFSET) | ||
108 | #define M32R_BSEL4_CR1_PORTL (0x404+M32R_BSELC_OFFSET) | ||
109 | #define M32R_BSEL5_CR0_PORTL (0x500+M32R_BSELC_OFFSET) | ||
110 | #define M32R_BSEL5_CR1_PORTL (0x504+M32R_BSELC_OFFSET) | ||
111 | #define M32R_BSEL6_CR0_PORTL (0x600+M32R_BSELC_OFFSET) | ||
112 | #define M32R_BSEL6_CR1_PORTL (0x604+M32R_BSELC_OFFSET) | ||
113 | #define M32R_BSEL7_CR0_PORTL (0x700+M32R_BSELC_OFFSET) | ||
114 | #define M32R_BSEL7_CR1_PORTL (0x704+M32R_BSELC_OFFSET) | ||
115 | |||
116 | /* | ||
117 | * Multi Function Timer registers. | ||
118 | */ | ||
119 | #define M32R_MFT_OFFSET (0x000FC000+M32R_SFR_OFFSET) | ||
120 | |||
121 | #define M32R_MFTCR_PORTL (0x000+M32R_MFT_OFFSET) /* MFT control */ | ||
122 | #define M32R_MFTRPR_PORTL (0x004+M32R_MFT_OFFSET) /* MFT real port */ | ||
123 | |||
124 | #define M32R_MFT0_OFFSET (0x100+M32R_MFT_OFFSET) | ||
125 | #define M32R_MFT0MOD_PORTL (0x00+M32R_MFT0_OFFSET) /* MFT0 mode */ | ||
126 | #define M32R_MFT0BOS_PORTL (0x04+M32R_MFT0_OFFSET) /* MFT0 b-port output status */ | ||
127 | #define M32R_MFT0CUT_PORTL (0x08+M32R_MFT0_OFFSET) /* MFT0 count */ | ||
128 | #define M32R_MFT0RLD_PORTL (0x0C+M32R_MFT0_OFFSET) /* MFT0 reload */ | ||
129 | #define M32R_MFT0CMPRLD_PORTL (0x10+M32R_MFT0_OFFSET) /* MFT0 compare reload */ | ||
130 | |||
131 | #define M32R_MFT1_OFFSET (0x200+M32R_MFT_OFFSET) | ||
132 | #define M32R_MFT1MOD_PORTL (0x00+M32R_MFT1_OFFSET) /* MFT1 mode */ | ||
133 | #define M32R_MFT1BOS_PORTL (0x04+M32R_MFT1_OFFSET) /* MFT1 b-port output status */ | ||
134 | #define M32R_MFT1CUT_PORTL (0x08+M32R_MFT1_OFFSET) /* MFT1 count */ | ||
135 | #define M32R_MFT1RLD_PORTL (0x0C+M32R_MFT1_OFFSET) /* MFT1 reload */ | ||
136 | #define M32R_MFT1CMPRLD_PORTL (0x10+M32R_MFT1_OFFSET) /* MFT1 compare reload */ | ||
137 | |||
138 | #define M32R_MFT2_OFFSET (0x300+M32R_MFT_OFFSET) | ||
139 | #define M32R_MFT2MOD_PORTL (0x00+M32R_MFT2_OFFSET) /* MFT2 mode */ | ||
140 | #define M32R_MFT2BOS_PORTL (0x04+M32R_MFT2_OFFSET) /* MFT2 b-port output status */ | ||
141 | #define M32R_MFT2CUT_PORTL (0x08+M32R_MFT2_OFFSET) /* MFT2 count */ | ||
142 | #define M32R_MFT2RLD_PORTL (0x0C+M32R_MFT2_OFFSET) /* MFT2 reload */ | ||
143 | #define M32R_MFT2CMPRLD_PORTL (0x10+M32R_MFT2_OFFSET) /* MFT2 compare reload */ | ||
144 | |||
145 | #define M32R_MFT3_OFFSET (0x400+M32R_MFT_OFFSET) | ||
146 | #define M32R_MFT3MOD_PORTL (0x00+M32R_MFT3_OFFSET) /* MFT3 mode */ | ||
147 | #define M32R_MFT3BOS_PORTL (0x04+M32R_MFT3_OFFSET) /* MFT3 b-port output status */ | ||
148 | #define M32R_MFT3CUT_PORTL (0x08+M32R_MFT3_OFFSET) /* MFT3 count */ | ||
149 | #define M32R_MFT3RLD_PORTL (0x0C+M32R_MFT3_OFFSET) /* MFT3 reload */ | ||
150 | #define M32R_MFT3CMPRLD_PORTL (0x10+M32R_MFT3_OFFSET) /* MFT3 compare reload */ | ||
151 | |||
152 | #define M32R_MFT4_OFFSET (0x500+M32R_MFT_OFFSET) | ||
153 | #define M32R_MFT4MOD_PORTL (0x00+M32R_MFT4_OFFSET) /* MFT4 mode */ | ||
154 | #define M32R_MFT4BOS_PORTL (0x04+M32R_MFT4_OFFSET) /* MFT4 b-port output status */ | ||
155 | #define M32R_MFT4CUT_PORTL (0x08+M32R_MFT4_OFFSET) /* MFT4 count */ | ||
156 | #define M32R_MFT4RLD_PORTL (0x0C+M32R_MFT4_OFFSET) /* MFT4 reload */ | ||
157 | #define M32R_MFT4CMPRLD_PORTL (0x10+M32R_MFT4_OFFSET) /* MFT4 compare reload */ | ||
158 | |||
159 | #define M32R_MFT5_OFFSET (0x600+M32R_MFT_OFFSET) | ||
160 | #define M32R_MFT5MOD_PORTL (0x00+M32R_MFT5_OFFSET) /* MFT4 mode */ | ||
161 | #define M32R_MFT5BOS_PORTL (0x04+M32R_MFT5_OFFSET) /* MFT4 b-port output status */ | ||
162 | #define M32R_MFT5CUT_PORTL (0x08+M32R_MFT5_OFFSET) /* MFT4 count */ | ||
163 | #define M32R_MFT5RLD_PORTL (0x0C+M32R_MFT5_OFFSET) /* MFT4 reload */ | ||
164 | #define M32R_MFT5CMPRLD_PORTL (0x10+M32R_MFT5_OFFSET) /* MFT4 compare reload */ | ||
165 | |||
166 | #define M32R_MFTCR_MFT0MSK (1UL<<15) /* b16 */ | ||
167 | #define M32R_MFTCR_MFT1MSK (1UL<<14) /* b17 */ | ||
168 | #define M32R_MFTCR_MFT2MSK (1UL<<13) /* b18 */ | ||
169 | #define M32R_MFTCR_MFT3MSK (1UL<<12) /* b19 */ | ||
170 | #define M32R_MFTCR_MFT4MSK (1UL<<11) /* b20 */ | ||
171 | #define M32R_MFTCR_MFT5MSK (1UL<<10) /* b21 */ | ||
172 | #define M32R_MFTCR_MFT0EN (1UL<<7) /* b24 */ | ||
173 | #define M32R_MFTCR_MFT1EN (1UL<<6) /* b25 */ | ||
174 | #define M32R_MFTCR_MFT2EN (1UL<<5) /* b26 */ | ||
175 | #define M32R_MFTCR_MFT3EN (1UL<<4) /* b27 */ | ||
176 | #define M32R_MFTCR_MFT4EN (1UL<<3) /* b28 */ | ||
177 | #define M32R_MFTCR_MFT5EN (1UL<<2) /* b29 */ | ||
178 | |||
179 | #define M32R_MFTMOD_CC_MASK (1UL<<15) /* b16 */ | ||
180 | #define M32R_MFTMOD_TCCR (1UL<<13) /* b18 */ | ||
181 | #define M32R_MFTMOD_GTSEL000 (0UL<<8) /* b21-23 : 000 */ | ||
182 | #define M32R_MFTMOD_GTSEL001 (1UL<<8) /* b21-23 : 001 */ | ||
183 | #define M32R_MFTMOD_GTSEL010 (2UL<<8) /* b21-23 : 010 */ | ||
184 | #define M32R_MFTMOD_GTSEL011 (3UL<<8) /* b21-23 : 011 */ | ||
185 | #define M32R_MFTMOD_GTSEL110 (6UL<<8) /* b21-23 : 110 */ | ||
186 | #define M32R_MFTMOD_GTSEL111 (7UL<<8) /* b21-23 : 111 */ | ||
187 | #define M32R_MFTMOD_CMSEL (1UL<<3) /* b28 */ | ||
188 | #define M32R_MFTMOD_CSSEL000 (0UL<<0) /* b29-b31 : 000 */ | ||
189 | #define M32R_MFTMOD_CSSEL001 (1UL<<0) /* b29-b31 : 001 */ | ||
190 | #define M32R_MFTMOD_CSSEL010 (2UL<<0) /* b29-b31 : 010 */ | ||
191 | #define M32R_MFTMOD_CSSEL011 (3UL<<0) /* b29-b31 : 011 */ | ||
192 | #define M32R_MFTMOD_CSSEL100 (4UL<<0) /* b29-b31 : 100 */ | ||
193 | #define M32R_MFTMOD_CSSEL110 (6UL<<0) /* b29-b31 : 110 */ | ||
194 | |||
195 | /* | ||
196 | * Serial I/O registers. | ||
197 | */ | ||
198 | #define M32R_SIO_OFFSET (0x000FD000+M32R_SFR_OFFSET) | ||
199 | |||
200 | #define M32R_SIO0_CR_PORTL (0x000+M32R_SIO_OFFSET) | ||
201 | #define M32R_SIO0_MOD0_PORTL (0x004+M32R_SIO_OFFSET) | ||
202 | #define M32R_SIO0_MOD1_PORTL (0x008+M32R_SIO_OFFSET) | ||
203 | #define M32R_SIO0_STS_PORTL (0x00C+M32R_SIO_OFFSET) | ||
204 | #define M32R_SIO0_TRCR_PORTL (0x010+M32R_SIO_OFFSET) | ||
205 | #define M32R_SIO0_BAUR_PORTL (0x014+M32R_SIO_OFFSET) | ||
206 | #define M32R_SIO0_RBAUR_PORTL (0x018+M32R_SIO_OFFSET) | ||
207 | #define M32R_SIO0_TXB_PORTL (0x01C+M32R_SIO_OFFSET) | ||
208 | #define M32R_SIO0_RXB_PORTL (0x020+M32R_SIO_OFFSET) | ||
209 | |||
210 | /* | ||
211 | * Interrupt Control Unit registers. | ||
212 | */ | ||
213 | #define M32R_ICU_OFFSET (0x000FF000+M32R_SFR_OFFSET) | ||
214 | |||
215 | #define M32R_ICU_ISTS_PORTL (0x004+M32R_ICU_OFFSET) | ||
216 | #define M32R_ICU_IREQ0_PORTL (0x008+M32R_ICU_OFFSET) | ||
217 | #define M32R_ICU_IREQ1_PORTL (0x00C+M32R_ICU_OFFSET) | ||
218 | #define M32R_ICU_SBICR_PORTL (0x018+M32R_ICU_OFFSET) | ||
219 | #define M32R_ICU_IMASK_PORTL (0x01C+M32R_ICU_OFFSET) | ||
220 | #define M32R_ICU_CR1_PORTL (0x200+M32R_ICU_OFFSET) /* INT0 */ | ||
221 | #define M32R_ICU_CR2_PORTL (0x204+M32R_ICU_OFFSET) /* INT1 */ | ||
222 | #define M32R_ICU_CR3_PORTL (0x208+M32R_ICU_OFFSET) /* INT2 */ | ||
223 | #define M32R_ICU_CR4_PORTL (0x20C+M32R_ICU_OFFSET) /* INT3 */ | ||
224 | #define M32R_ICU_CR5_PORTL (0x210+M32R_ICU_OFFSET) /* INT4 */ | ||
225 | #define M32R_ICU_CR6_PORTL (0x214+M32R_ICU_OFFSET) /* INT5 */ | ||
226 | #define M32R_ICU_CR7_PORTL (0x218+M32R_ICU_OFFSET) /* INT6 */ | ||
227 | #define M32R_ICU_CR8_PORTL (0x218+M32R_ICU_OFFSET) /* INT7 */ | ||
228 | #define M32R_ICU_CR32_PORTL (0x27C+M32R_ICU_OFFSET) /* SIO0 RX */ | ||
229 | #define M32R_ICU_CR33_PORTL (0x280+M32R_ICU_OFFSET) /* SIO0 TX */ | ||
230 | #define M32R_ICU_CR40_PORTL (0x29C+M32R_ICU_OFFSET) /* DMAC0 */ | ||
231 | #define M32R_ICU_CR41_PORTL (0x2A0+M32R_ICU_OFFSET) /* DMAC1 */ | ||
232 | #define M32R_ICU_CR48_PORTL (0x2BC+M32R_ICU_OFFSET) /* MFT0 */ | ||
233 | #define M32R_ICU_CR49_PORTL (0x2C0+M32R_ICU_OFFSET) /* MFT1 */ | ||
234 | #define M32R_ICU_CR50_PORTL (0x2C4+M32R_ICU_OFFSET) /* MFT2 */ | ||
235 | #define M32R_ICU_CR51_PORTL (0x2C8+M32R_ICU_OFFSET) /* MFT3 */ | ||
236 | #define M32R_ICU_CR52_PORTL (0x2CC+M32R_ICU_OFFSET) /* MFT4 */ | ||
237 | #define M32R_ICU_CR53_PORTL (0x2D0+M32R_ICU_OFFSET) /* MFT5 */ | ||
238 | #define M32R_ICU_IPICR0_PORTL (0x2DC+M32R_ICU_OFFSET) /* IPI0 */ | ||
239 | #define M32R_ICU_IPICR1_PORTL (0x2E0+M32R_ICU_OFFSET) /* IPI1 */ | ||
240 | #define M32R_ICU_IPICR2_PORTL (0x2E4+M32R_ICU_OFFSET) /* IPI2 */ | ||
241 | #define M32R_ICU_IPICR3_PORTL (0x2E8+M32R_ICU_OFFSET) /* IPI3 */ | ||
242 | #define M32R_ICU_IPICR4_PORTL (0x2EC+M32R_ICU_OFFSET) /* IPI4 */ | ||
243 | #define M32R_ICU_IPICR5_PORTL (0x2F0+M32R_ICU_OFFSET) /* IPI5 */ | ||
244 | #define M32R_ICU_IPICR6_PORTL (0x2F4+M32R_ICU_OFFSET) /* IPI6 */ | ||
245 | #define M32R_ICU_IPICR7_PORTL (0x2FC+M32R_ICU_OFFSET) /* IPI7 */ | ||
246 | |||
247 | #define M32R_ICUISTS_VECB(val) ((val>>28) & 0xF) | ||
248 | #define M32R_ICUISTS_ISN(val) ((val>>22) & 0x3F) | ||
249 | #define M32R_ICUISTS_PIML(val) ((val>>16) & 0x7) | ||
250 | |||
251 | #define M32R_ICUIMASK_IMSK0 (0UL<<16) /* b13-b15: Disable interrupt */ | ||
252 | #define M32R_ICUIMASK_IMSK1 (1UL<<16) /* b13-b15: Enable level 0 interrupt */ | ||
253 | #define M32R_ICUIMASK_IMSK2 (2UL<<16) /* b13-b15: Enable level 0,1 interrupt */ | ||
254 | #define M32R_ICUIMASK_IMSK3 (3UL<<16) /* b13-b15: Enable level 0-2 interrupt */ | ||
255 | #define M32R_ICUIMASK_IMSK4 (4UL<<16) /* b13-b15: Enable level 0-3 interrupt */ | ||
256 | #define M32R_ICUIMASK_IMSK5 (5UL<<16) /* b13-b15: Enable level 0-4 interrupt */ | ||
257 | #define M32R_ICUIMASK_IMSK6 (6UL<<16) /* b13-b15: Enable level 0-5 interrupt */ | ||
258 | #define M32R_ICUIMASK_IMSK7 (7UL<<16) /* b13-b15: Enable level 0-6 interrupt */ | ||
259 | |||
260 | #define M32R_ICUCR_IEN (1UL<<12) /* b19: Interrupt enable */ | ||
261 | #define M32R_ICUCR_IRQ (1UL<<8) /* b23: Interrupt request */ | ||
262 | #define M32R_ICUCR_ISMOD00 (0UL<<4) /* b26-b27: Interrupt sense mode Edge HtoL */ | ||
263 | #define M32R_ICUCR_ISMOD01 (1UL<<4) /* b26-b27: Interrupt sense mode Level L */ | ||
264 | #define M32R_ICUCR_ISMOD10 (2UL<<4) /* b26-b27: Interrupt sense mode Edge LtoH*/ | ||
265 | #define M32R_ICUCR_ISMOD11 (3UL<<4) /* b26-b27: Interrupt sense mode Level H */ | ||
266 | #define M32R_ICUCR_ILEVEL0 (0UL<<0) /* b29-b31: Interrupt priority level 0 */ | ||
267 | #define M32R_ICUCR_ILEVEL1 (1UL<<0) /* b29-b31: Interrupt priority level 1 */ | ||
268 | #define M32R_ICUCR_ILEVEL2 (2UL<<0) /* b29-b31: Interrupt priority level 2 */ | ||
269 | #define M32R_ICUCR_ILEVEL3 (3UL<<0) /* b29-b31: Interrupt priority level 3 */ | ||
270 | #define M32R_ICUCR_ILEVEL4 (4UL<<0) /* b29-b31: Interrupt priority level 4 */ | ||
271 | #define M32R_ICUCR_ILEVEL5 (5UL<<0) /* b29-b31: Interrupt priority level 5 */ | ||
272 | #define M32R_ICUCR_ILEVEL6 (6UL<<0) /* b29-b31: Interrupt priority level 6 */ | ||
273 | #define M32R_ICUCR_ILEVEL7 (7UL<<0) /* b29-b31: Disable interrupt */ | ||
274 | #define M32R_ICUCR_ILEVEL_MASK (7UL) | ||
275 | |||
276 | #define M32R_IRQ_INT0 (1) /* INT0 */ | ||
277 | #define M32R_IRQ_INT1 (2) /* INT1 */ | ||
278 | #define M32R_IRQ_INT2 (3) /* INT2 */ | ||
279 | #define M32R_IRQ_INT3 (4) /* INT3 */ | ||
280 | #define M32R_IRQ_INT4 (5) /* INT4 */ | ||
281 | #define M32R_IRQ_INT5 (6) /* INT5 */ | ||
282 | #define M32R_IRQ_INT6 (7) /* INT6 */ | ||
283 | #define M32R_IRQ_INT7 (8) /* INT7 */ | ||
284 | #define M32R_IRQ_MFT0 (16) /* MFT0 */ | ||
285 | #define M32R_IRQ_MFT1 (17) /* MFT1 */ | ||
286 | #define M32R_IRQ_MFT2 (18) /* MFT2 */ | ||
287 | #define M32R_IRQ_MFT3 (19) /* MFT3 */ | ||
288 | #define M32R_IRQ_MFT4 (20) /* MFT4 */ | ||
289 | #define M32R_IRQ_MFT5 (21) /* MFT5 */ | ||
290 | #define M32R_IRQ_DMAC0 (32) /* DMAC0 */ | ||
291 | #define M32R_IRQ_DMAC1 (33) /* DMAC1 */ | ||
292 | #define M32R_IRQ_SIO0_R (48) /* SIO0 receive */ | ||
293 | #define M32R_IRQ_SIO0_S (49) /* SIO0 send */ | ||
294 | #define M32R_IRQ_SIO1_R (50) /* SIO1 send */ | ||
295 | #define M32R_IRQ_SIO1_S (51) /* SIO1 receive */ | ||
296 | #define M32R_IRQ_IPI0 (56) /* IPI0 */ | ||
297 | #define M32R_IRQ_IPI1 (57) /* IPI1 */ | ||
298 | #define M32R_IRQ_IPI2 (58) /* IPI2 */ | ||
299 | #define M32R_IRQ_IPI3 (59) /* IPI3 */ | ||
300 | #define M32R_IRQ_IPI4 (60) /* IPI4 */ | ||
301 | #define M32R_IRQ_IPI5 (61) /* IPI5 */ | ||
302 | #define M32R_IRQ_IPI6 (62) /* IPI6 */ | ||
303 | #define M32R_IRQ_IPI7 (63) /* IPI7 */ | ||
304 | |||
305 | /*======================================================================* | ||
306 | * CPU | ||
307 | *======================================================================*/ | ||
308 | |||
309 | #define M32R_CPUID_PORTL (0xFFFFFFE0) | ||
310 | #define M32R_MCICAR_PORTL (0xFFFFFFF0) | ||
311 | #define M32R_MCDCAR_PORTL (0xFFFFFFF4) | ||
312 | #define M32R_MCCR_PORTL (0xFFFFFFFC) | ||
313 | |||
314 | #endif /* _ASM_M32R_M32R_MP_FPGA_ */ | ||
diff --git a/arch/m32r/include/asm/mappi2/mappi2_pld.h b/arch/m32r/include/asm/mappi2/mappi2_pld.h deleted file mode 100644 index 2624c9db7255..000000000000 --- a/arch/m32r/include/asm/mappi2/mappi2_pld.h +++ /dev/null | |||
@@ -1,150 +0,0 @@ | |||
1 | #ifndef _MAPPI2_PLD_H | ||
2 | #define _MAPPI2_PLD_H | ||
3 | |||
4 | /* | ||
5 | * include/asm-m32r/mappi2/mappi2_pld.h | ||
6 | * | ||
7 | * Definitions for Extended IO Logic on MAPPI2 board. | ||
8 | * based on m32700ut_pld.h | ||
9 | * | ||
10 | * This file is subject to the terms and conditions of the GNU General | ||
11 | * Public License. See the file "COPYING" in the main directory of | ||
12 | * this archive for more details. | ||
13 | */ | ||
14 | |||
15 | #ifndef __ASSEMBLY__ | ||
16 | /* FIXME: | ||
17 | * Some C functions use non-cache address, so can't define non-cache address. | ||
18 | */ | ||
19 | #define PLD_BASE (0x10c00000 /* + NONCACHE_OFFSET */) | ||
20 | #define __reg8 (volatile unsigned char *) | ||
21 | #define __reg16 (volatile unsigned short *) | ||
22 | #define __reg32 (volatile unsigned int *) | ||
23 | #else | ||
24 | #define PLD_BASE (0x10c00000 + NONCACHE_OFFSET) | ||
25 | #define __reg8 | ||
26 | #define __reg16 | ||
27 | #define __reg32 | ||
28 | #endif /* __ASSEMBLY__ */ | ||
29 | |||
30 | /* CFC */ | ||
31 | #define PLD_CFRSTCR __reg16(PLD_BASE + 0x0000) | ||
32 | #define PLD_CFSTS __reg16(PLD_BASE + 0x0002) | ||
33 | #define PLD_CFIMASK __reg16(PLD_BASE + 0x0004) | ||
34 | #define PLD_CFBUFCR __reg16(PLD_BASE + 0x0006) | ||
35 | #define PLD_CFCR0 __reg16(PLD_BASE + 0x000a) | ||
36 | #define PLD_CFCR1 __reg16(PLD_BASE + 0x000c) | ||
37 | |||
38 | /* MMC */ | ||
39 | #define PLD_MMCCR __reg16(PLD_BASE + 0x4000) | ||
40 | #define PLD_MMCMOD __reg16(PLD_BASE + 0x4002) | ||
41 | #define PLD_MMCSTS __reg16(PLD_BASE + 0x4006) | ||
42 | #define PLD_MMCBAUR __reg16(PLD_BASE + 0x400a) | ||
43 | #define PLD_MMCCMDBCUT __reg16(PLD_BASE + 0x400c) | ||
44 | #define PLD_MMCCDTBCUT __reg16(PLD_BASE + 0x400e) | ||
45 | #define PLD_MMCDET __reg16(PLD_BASE + 0x4010) | ||
46 | #define PLD_MMCWP __reg16(PLD_BASE + 0x4012) | ||
47 | #define PLD_MMCWDATA __reg16(PLD_BASE + 0x5000) | ||
48 | #define PLD_MMCRDATA __reg16(PLD_BASE + 0x6000) | ||
49 | #define PLD_MMCCMDDATA __reg16(PLD_BASE + 0x7000) | ||
50 | #define PLD_MMCRSPDATA __reg16(PLD_BASE + 0x7006) | ||
51 | |||
52 | /* Power Control of MMC and CF */ | ||
53 | #define PLD_CPCR __reg16(PLD_BASE + 0x14000) | ||
54 | |||
55 | |||
56 | /*==== ICU ====*/ | ||
57 | #define M32R_IRQ_PC104 (5) /* INT4(PC/104) */ | ||
58 | #define M32R_IRQ_I2C (28) /* I2C-BUS */ | ||
59 | #if 1 | ||
60 | #define PLD_IRQ_CFIREQ (40) /* CFC Card Interrupt */ | ||
61 | #define PLD_IRQ_CFC_INSERT (41) /* CFC Card Insert */ | ||
62 | #define PLD_IRQ_CFC_EJECT (42) /* CFC Card Eject */ | ||
63 | #define PLD_IRQ_MMCCARD (43) /* MMC Card Insert */ | ||
64 | #define PLD_IRQ_MMCIRQ (44) /* MMC Transfer Done */ | ||
65 | #else | ||
66 | #define PLD_IRQ_CFIREQ (34) /* CFC Card Interrupt */ | ||
67 | #define PLD_IRQ_CFC_INSERT (35) /* CFC Card Insert */ | ||
68 | #define PLD_IRQ_CFC_EJECT (36) /* CFC Card Eject */ | ||
69 | #define PLD_IRQ_MMCCARD (37) /* MMC Card Insert */ | ||
70 | #define PLD_IRQ_MMCIRQ (38) /* MMC Transfer Done */ | ||
71 | #endif | ||
72 | |||
73 | |||
74 | #if 0 | ||
75 | /* LED Control | ||
76 | * | ||
77 | * 1: DIP swich side | ||
78 | * 2: Reset switch side | ||
79 | */ | ||
80 | #define PLD_IOLEDCR __reg16(PLD_BASE + 0x14002) | ||
81 | #define PLD_IOLED_1_ON 0x001 | ||
82 | #define PLD_IOLED_1_OFF 0x000 | ||
83 | #define PLD_IOLED_2_ON 0x002 | ||
84 | #define PLD_IOLED_2_OFF 0x000 | ||
85 | |||
86 | /* DIP Switch | ||
87 | * 0: Write-protect of Flash Memory (0:protected, 1:non-protected) | ||
88 | * 1: - | ||
89 | * 2: - | ||
90 | * 3: - | ||
91 | */ | ||
92 | #define PLD_IOSWSTS __reg16(PLD_BASE + 0x14004) | ||
93 | #define PLD_IOSWSTS_IOSW2 0x0200 | ||
94 | #define PLD_IOSWSTS_IOSW1 0x0100 | ||
95 | #define PLD_IOSWSTS_IOWP0 0x0001 | ||
96 | |||
97 | #endif | ||
98 | |||
99 | /* CRC */ | ||
100 | #define PLD_CRC7DATA __reg16(PLD_BASE + 0x18000) | ||
101 | #define PLD_CRC7INDATA __reg16(PLD_BASE + 0x18002) | ||
102 | #define PLD_CRC16DATA __reg16(PLD_BASE + 0x18004) | ||
103 | #define PLD_CRC16INDATA __reg16(PLD_BASE + 0x18006) | ||
104 | #define PLD_CRC16ADATA __reg16(PLD_BASE + 0x18008) | ||
105 | #define PLD_CRC16AINDATA __reg16(PLD_BASE + 0x1800a) | ||
106 | |||
107 | |||
108 | #if 0 | ||
109 | /* RTC */ | ||
110 | #define PLD_RTCCR __reg16(PLD_BASE + 0x1c000) | ||
111 | #define PLD_RTCBAUR __reg16(PLD_BASE + 0x1c002) | ||
112 | #define PLD_RTCWRDATA __reg16(PLD_BASE + 0x1c004) | ||
113 | #define PLD_RTCRDDATA __reg16(PLD_BASE + 0x1c006) | ||
114 | #define PLD_RTCRSTODT __reg16(PLD_BASE + 0x1c008) | ||
115 | |||
116 | /* SIO0 */ | ||
117 | #define PLD_ESIO0CR __reg16(PLD_BASE + 0x20000) | ||
118 | #define PLD_ESIO0CR_TXEN 0x0001 | ||
119 | #define PLD_ESIO0CR_RXEN 0x0002 | ||
120 | #define PLD_ESIO0MOD0 __reg16(PLD_BASE + 0x20002) | ||
121 | #define PLD_ESIO0MOD0_CTSS 0x0040 | ||
122 | #define PLD_ESIO0MOD0_RTSS 0x0080 | ||
123 | #define PLD_ESIO0MOD1 __reg16(PLD_BASE + 0x20004) | ||
124 | #define PLD_ESIO0MOD1_LMFS 0x0010 | ||
125 | #define PLD_ESIO0STS __reg16(PLD_BASE + 0x20006) | ||
126 | #define PLD_ESIO0STS_TEMP 0x0001 | ||
127 | #define PLD_ESIO0STS_TXCP 0x0002 | ||
128 | #define PLD_ESIO0STS_RXCP 0x0004 | ||
129 | #define PLD_ESIO0STS_TXSC 0x0100 | ||
130 | #define PLD_ESIO0STS_RXSC 0x0200 | ||
131 | #define PLD_ESIO0STS_TXREADY (PLD_ESIO0STS_TXCP | PLD_ESIO0STS_TEMP) | ||
132 | #define PLD_ESIO0INTCR __reg16(PLD_BASE + 0x20008) | ||
133 | #define PLD_ESIO0INTCR_TXIEN 0x0002 | ||
134 | #define PLD_ESIO0INTCR_RXCEN 0x0004 | ||
135 | #define PLD_ESIO0BAUR __reg16(PLD_BASE + 0x2000a) | ||
136 | #define PLD_ESIO0TXB __reg16(PLD_BASE + 0x2000c) | ||
137 | #define PLD_ESIO0RXB __reg16(PLD_BASE + 0x2000e) | ||
138 | |||
139 | /* SIM Card */ | ||
140 | #define PLD_SCCR __reg16(PLD_BASE + 0x38000) | ||
141 | #define PLD_SCMOD __reg16(PLD_BASE + 0x38004) | ||
142 | #define PLD_SCSTS __reg16(PLD_BASE + 0x38006) | ||
143 | #define PLD_SCINTCR __reg16(PLD_BASE + 0x38008) | ||
144 | #define PLD_SCBAUR __reg16(PLD_BASE + 0x3800a) | ||
145 | #define PLD_SCTXB __reg16(PLD_BASE + 0x3800c) | ||
146 | #define PLD_SCRXB __reg16(PLD_BASE + 0x3800e) | ||
147 | |||
148 | #endif | ||
149 | |||
150 | #endif /* _MAPPI2_PLD.H */ | ||
diff --git a/arch/m32r/include/asm/mappi3/mappi3_pld.h b/arch/m32r/include/asm/mappi3/mappi3_pld.h deleted file mode 100644 index 451c40ee70af..000000000000 --- a/arch/m32r/include/asm/mappi3/mappi3_pld.h +++ /dev/null | |||
@@ -1,142 +0,0 @@ | |||
1 | #ifndef _MAPPI3_PLD_H | ||
2 | #define _MAPPI3_PLD_H | ||
3 | |||
4 | /* | ||
5 | * include/asm-m32r/mappi3/mappi3_pld.h | ||
6 | * | ||
7 | * Definitions for Extended IO Logic on MAPPI3 board. | ||
8 | * based on m32700ut_pld.h | ||
9 | * | ||
10 | * This file is subject to the terms and conditions of the GNU General | ||
11 | * Public License. See the file "COPYING" in the main directory of | ||
12 | * this archive for more details. | ||
13 | */ | ||
14 | |||
15 | #ifndef __ASSEMBLY__ | ||
16 | /* FIXME: | ||
17 | * Some C functions use non-cache address, so can't define non-cache address. | ||
18 | */ | ||
19 | #define PLD_BASE (0x1c000000 /* + NONCACHE_OFFSET */) | ||
20 | #define __reg8 (volatile unsigned char *) | ||
21 | #define __reg16 (volatile unsigned short *) | ||
22 | #define __reg32 (volatile unsigned int *) | ||
23 | #else | ||
24 | #define PLD_BASE (0x1c000000 + NONCACHE_OFFSET) | ||
25 | #define __reg8 | ||
26 | #define __reg16 | ||
27 | #define __reg32 | ||
28 | #endif /* __ASSEMBLY__ */ | ||
29 | |||
30 | /* CFC */ | ||
31 | #define PLD_CFRSTCR __reg16(PLD_BASE + 0x0000) | ||
32 | #define PLD_CFSTS __reg16(PLD_BASE + 0x0002) | ||
33 | #define PLD_CFIMASK __reg16(PLD_BASE + 0x0004) | ||
34 | #define PLD_CFBUFCR __reg16(PLD_BASE + 0x0006) | ||
35 | #define PLD_CFCR0 __reg16(PLD_BASE + 0x000a) | ||
36 | #define PLD_CFCR1 __reg16(PLD_BASE + 0x000c) | ||
37 | |||
38 | /* MMC */ | ||
39 | #define PLD_MMCCR __reg16(PLD_BASE + 0x4000) | ||
40 | #define PLD_MMCMOD __reg16(PLD_BASE + 0x4002) | ||
41 | #define PLD_MMCSTS __reg16(PLD_BASE + 0x4006) | ||
42 | #define PLD_MMCBAUR __reg16(PLD_BASE + 0x400a) | ||
43 | #define PLD_MMCCMDBCUT __reg16(PLD_BASE + 0x400c) | ||
44 | #define PLD_MMCCDTBCUT __reg16(PLD_BASE + 0x400e) | ||
45 | #define PLD_MMCDET __reg16(PLD_BASE + 0x4010) | ||
46 | #define PLD_MMCWP __reg16(PLD_BASE + 0x4012) | ||
47 | #define PLD_MMCWDATA __reg16(PLD_BASE + 0x5000) | ||
48 | #define PLD_MMCRDATA __reg16(PLD_BASE + 0x6000) | ||
49 | #define PLD_MMCCMDDATA __reg16(PLD_BASE + 0x7000) | ||
50 | #define PLD_MMCRSPDATA __reg16(PLD_BASE + 0x7006) | ||
51 | |||
52 | /* Power Control of MMC and CF */ | ||
53 | #define PLD_CPCR __reg16(PLD_BASE + 0x14000) | ||
54 | |||
55 | /* ICU */ | ||
56 | #define M32R_IRQ_PC104 (5) /* INT4(PC/104) */ | ||
57 | #define M32R_IRQ_I2C (28) /* I2C-BUS */ | ||
58 | #define PLD_IRQ_CFIREQ (6) /* INT5 CFC Card Interrupt */ | ||
59 | #define PLD_IRQ_CFC_INSERT (7) /* INT6 CFC Card Insert & Eject */ | ||
60 | #define PLD_IRQ_IDEIREQ (8) /* INT7 IDE Interrupt */ | ||
61 | #define PLD_IRQ_MMCCARD (43) /* MMC Card Insert */ | ||
62 | #define PLD_IRQ_MMCIRQ (44) /* MMC Transfer Done */ | ||
63 | |||
64 | #if 0 | ||
65 | /* LED Control | ||
66 | * | ||
67 | * 1: DIP swich side | ||
68 | * 2: Reset switch side | ||
69 | */ | ||
70 | #define PLD_IOLEDCR __reg16(PLD_BASE + 0x14002) | ||
71 | #define PLD_IOLED_1_ON 0x001 | ||
72 | #define PLD_IOLED_1_OFF 0x000 | ||
73 | #define PLD_IOLED_2_ON 0x002 | ||
74 | #define PLD_IOLED_2_OFF 0x000 | ||
75 | |||
76 | /* DIP Switch | ||
77 | * 0: Write-protect of Flash Memory (0:protected, 1:non-protected) | ||
78 | * 1: - | ||
79 | * 2: - | ||
80 | * 3: - | ||
81 | */ | ||
82 | #define PLD_IOSWSTS __reg16(PLD_BASE + 0x14004) | ||
83 | #define PLD_IOSWSTS_IOSW2 0x0200 | ||
84 | #define PLD_IOSWSTS_IOSW1 0x0100 | ||
85 | #define PLD_IOSWSTS_IOWP0 0x0001 | ||
86 | |||
87 | #endif | ||
88 | |||
89 | /* CRC */ | ||
90 | #define PLD_CRC7DATA __reg16(PLD_BASE + 0x18000) | ||
91 | #define PLD_CRC7INDATA __reg16(PLD_BASE + 0x18002) | ||
92 | #define PLD_CRC16DATA __reg16(PLD_BASE + 0x18004) | ||
93 | #define PLD_CRC16INDATA __reg16(PLD_BASE + 0x18006) | ||
94 | #define PLD_CRC16ADATA __reg16(PLD_BASE + 0x18008) | ||
95 | #define PLD_CRC16AINDATA __reg16(PLD_BASE + 0x1800a) | ||
96 | |||
97 | #if 0 | ||
98 | /* RTC */ | ||
99 | #define PLD_RTCCR __reg16(PLD_BASE + 0x1c000) | ||
100 | #define PLD_RTCBAUR __reg16(PLD_BASE + 0x1c002) | ||
101 | #define PLD_RTCWRDATA __reg16(PLD_BASE + 0x1c004) | ||
102 | #define PLD_RTCRDDATA __reg16(PLD_BASE + 0x1c006) | ||
103 | #define PLD_RTCRSTODT __reg16(PLD_BASE + 0x1c008) | ||
104 | |||
105 | /* SIO0 */ | ||
106 | #define PLD_ESIO0CR __reg16(PLD_BASE + 0x20000) | ||
107 | #define PLD_ESIO0CR_TXEN 0x0001 | ||
108 | #define PLD_ESIO0CR_RXEN 0x0002 | ||
109 | #define PLD_ESIO0MOD0 __reg16(PLD_BASE + 0x20002) | ||
110 | #define PLD_ESIO0MOD0_CTSS 0x0040 | ||
111 | #define PLD_ESIO0MOD0_RTSS 0x0080 | ||
112 | #define PLD_ESIO0MOD1 __reg16(PLD_BASE + 0x20004) | ||
113 | #define PLD_ESIO0MOD1_LMFS 0x0010 | ||
114 | #define PLD_ESIO0STS __reg16(PLD_BASE + 0x20006) | ||
115 | #define PLD_ESIO0STS_TEMP 0x0001 | ||
116 | #define PLD_ESIO0STS_TXCP 0x0002 | ||
117 | #define PLD_ESIO0STS_RXCP 0x0004 | ||
118 | #define PLD_ESIO0STS_TXSC 0x0100 | ||
119 | #define PLD_ESIO0STS_RXSC 0x0200 | ||
120 | #define PLD_ESIO0STS_TXREADY (PLD_ESIO0STS_TXCP | PLD_ESIO0STS_TEMP) | ||
121 | #define PLD_ESIO0INTCR __reg16(PLD_BASE + 0x20008) | ||
122 | #define PLD_ESIO0INTCR_TXIEN 0x0002 | ||
123 | #define PLD_ESIO0INTCR_RXCEN 0x0004 | ||
124 | #define PLD_ESIO0BAUR __reg16(PLD_BASE + 0x2000a) | ||
125 | #define PLD_ESIO0TXB __reg16(PLD_BASE + 0x2000c) | ||
126 | #define PLD_ESIO0RXB __reg16(PLD_BASE + 0x2000e) | ||
127 | |||
128 | /* SIM Card */ | ||
129 | #define PLD_SCCR __reg16(PLD_BASE + 0x38000) | ||
130 | #define PLD_SCMOD __reg16(PLD_BASE + 0x38004) | ||
131 | #define PLD_SCSTS __reg16(PLD_BASE + 0x38006) | ||
132 | #define PLD_SCINTCR __reg16(PLD_BASE + 0x38008) | ||
133 | #define PLD_SCBAUR __reg16(PLD_BASE + 0x3800a) | ||
134 | #define PLD_SCTXB __reg16(PLD_BASE + 0x3800c) | ||
135 | #define PLD_SCRXB __reg16(PLD_BASE + 0x3800e) | ||
136 | |||
137 | #endif | ||
138 | |||
139 | /* Reset Control */ | ||
140 | #define PLD_REBOOT __reg16(PLD_BASE + 0x38000) | ||
141 | |||
142 | #endif /* _MAPPI3_PLD.H */ | ||
diff --git a/arch/m32r/include/asm/mc146818rtc.h b/arch/m32r/include/asm/mc146818rtc.h deleted file mode 100644 index 4effa4704347..000000000000 --- a/arch/m32r/include/asm/mc146818rtc.h +++ /dev/null | |||
@@ -1,30 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | /* | ||
3 | * Machine dependent access functions for RTC registers. | ||
4 | */ | ||
5 | #ifndef _ASM_MC146818RTC_H | ||
6 | #define _ASM_MC146818RTC_H | ||
7 | |||
8 | #include <asm/io.h> | ||
9 | |||
10 | #ifndef RTC_PORT | ||
11 | #define RTC_PORT(x) ((x)) | ||
12 | #define RTC_ALWAYS_BCD 1 /* RTC operates in binary mode */ | ||
13 | #endif | ||
14 | |||
15 | /* | ||
16 | * The yet supported machines all access the RTC index register via | ||
17 | * an ISA port access but the way to access the date register differs ... | ||
18 | */ | ||
19 | #define CMOS_READ(addr) ({ \ | ||
20 | outb_p((addr),RTC_PORT(0)); \ | ||
21 | inb_p(RTC_PORT(1)); \ | ||
22 | }) | ||
23 | #define CMOS_WRITE(val, addr) ({ \ | ||
24 | outb_p((addr),RTC_PORT(0)); \ | ||
25 | outb_p((val),RTC_PORT(1)); \ | ||
26 | }) | ||
27 | |||
28 | #define RTC_IRQ 8 | ||
29 | |||
30 | #endif /* _ASM_MC146818RTC_H */ | ||
diff --git a/arch/m32r/include/asm/mmu.h b/arch/m32r/include/asm/mmu.h deleted file mode 100644 index 34bcccd8007d..000000000000 --- a/arch/m32r/include/asm/mmu.h +++ /dev/null | |||
@@ -1,22 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifndef _ASM_M32R_MMU_H | ||
3 | #define _ASM_M32R_MMU_H | ||
4 | |||
5 | #if !defined(CONFIG_MMU) | ||
6 | |||
7 | typedef struct { | ||
8 | unsigned long end_brk; | ||
9 | } mm_context_t; | ||
10 | |||
11 | #else /* CONFIG_MMU */ | ||
12 | |||
13 | /* Default "unsigned long" context */ | ||
14 | #ifndef CONFIG_SMP | ||
15 | typedef unsigned long mm_context_t; | ||
16 | #else | ||
17 | typedef unsigned long mm_context_t[NR_CPUS]; | ||
18 | #endif | ||
19 | |||
20 | #endif /* CONFIG_MMU */ | ||
21 | |||
22 | #endif /* _ASM_M32R_MMU_H */ | ||
diff --git a/arch/m32r/include/asm/mmu_context.h b/arch/m32r/include/asm/mmu_context.h deleted file mode 100644 index 8a499d0fb3a2..000000000000 --- a/arch/m32r/include/asm/mmu_context.h +++ /dev/null | |||
@@ -1,167 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifndef _ASM_M32R_MMU_CONTEXT_H | ||
3 | #define _ASM_M32R_MMU_CONTEXT_H | ||
4 | #ifdef __KERNEL__ | ||
5 | |||
6 | #include <asm/m32r.h> | ||
7 | |||
8 | #define MMU_CONTEXT_ASID_MASK (0x000000FF) | ||
9 | #define MMU_CONTEXT_VERSION_MASK (0xFFFFFF00) | ||
10 | #define MMU_CONTEXT_FIRST_VERSION (0x00000100) | ||
11 | #define NO_CONTEXT (0x00000000) | ||
12 | |||
13 | #ifndef __ASSEMBLY__ | ||
14 | |||
15 | #include <linux/atomic.h> | ||
16 | #include <linux/mm_types.h> | ||
17 | |||
18 | #include <asm/pgalloc.h> | ||
19 | #include <asm/mmu.h> | ||
20 | #include <asm/tlbflush.h> | ||
21 | #include <asm-generic/mm_hooks.h> | ||
22 | |||
23 | /* | ||
24 | * Cache of MMU context last used. | ||
25 | */ | ||
26 | #ifndef CONFIG_SMP | ||
27 | extern unsigned long mmu_context_cache_dat; | ||
28 | #define mmu_context_cache mmu_context_cache_dat | ||
29 | #define mm_context(mm) mm->context | ||
30 | #else /* not CONFIG_SMP */ | ||
31 | extern unsigned long mmu_context_cache_dat[]; | ||
32 | #define mmu_context_cache mmu_context_cache_dat[smp_processor_id()] | ||
33 | #define mm_context(mm) mm->context[smp_processor_id()] | ||
34 | #endif /* not CONFIG_SMP */ | ||
35 | |||
36 | #define set_tlb_tag(entry, tag) (*entry = (tag & PAGE_MASK)|get_asid()) | ||
37 | #define set_tlb_data(entry, data) (*entry = (data | _PAGE_PRESENT)) | ||
38 | |||
39 | #ifdef CONFIG_MMU | ||
40 | #define enter_lazy_tlb(mm, tsk) do { } while (0) | ||
41 | |||
42 | static inline void get_new_mmu_context(struct mm_struct *mm) | ||
43 | { | ||
44 | unsigned long mc = ++mmu_context_cache; | ||
45 | |||
46 | if (!(mc & MMU_CONTEXT_ASID_MASK)) { | ||
47 | /* We exhaust ASID of this version. | ||
48 | Flush all TLB and start new cycle. */ | ||
49 | local_flush_tlb_all(); | ||
50 | /* Fix version if needed. | ||
51 | Note that we avoid version #0 to distinguish NO_CONTEXT. */ | ||
52 | if (!mc) | ||
53 | mmu_context_cache = mc = MMU_CONTEXT_FIRST_VERSION; | ||
54 | } | ||
55 | mm_context(mm) = mc; | ||
56 | } | ||
57 | |||
58 | /* | ||
59 | * Get MMU context if needed. | ||
60 | */ | ||
61 | static inline void get_mmu_context(struct mm_struct *mm) | ||
62 | { | ||
63 | if (mm) { | ||
64 | unsigned long mc = mmu_context_cache; | ||
65 | |||
66 | /* Check if we have old version of context. | ||
67 | If it's old, we need to get new context with new version. */ | ||
68 | if ((mm_context(mm) ^ mc) & MMU_CONTEXT_VERSION_MASK) | ||
69 | get_new_mmu_context(mm); | ||
70 | } | ||
71 | } | ||
72 | |||
73 | /* | ||
74 | * Initialize the context related info for a new mm_struct | ||
75 | * instance. | ||
76 | */ | ||
77 | static inline int init_new_context(struct task_struct *tsk, | ||
78 | struct mm_struct *mm) | ||
79 | { | ||
80 | #ifndef CONFIG_SMP | ||
81 | mm->context = NO_CONTEXT; | ||
82 | #else /* CONFIG_SMP */ | ||
83 | int num_cpus = num_online_cpus(); | ||
84 | int i; | ||
85 | |||
86 | for (i = 0 ; i < num_cpus ; i++) | ||
87 | mm->context[i] = NO_CONTEXT; | ||
88 | #endif /* CONFIG_SMP */ | ||
89 | |||
90 | return 0; | ||
91 | } | ||
92 | |||
93 | /* | ||
94 | * Destroy context related info for an mm_struct that is about | ||
95 | * to be put to rest. | ||
96 | */ | ||
97 | #define destroy_context(mm) do { } while (0) | ||
98 | |||
99 | static inline void set_asid(unsigned long asid) | ||
100 | { | ||
101 | *(volatile unsigned long *)MASID = (asid & MMU_CONTEXT_ASID_MASK); | ||
102 | } | ||
103 | |||
104 | static inline unsigned long get_asid(void) | ||
105 | { | ||
106 | unsigned long asid; | ||
107 | |||
108 | asid = *(volatile long *)MASID; | ||
109 | asid &= MMU_CONTEXT_ASID_MASK; | ||
110 | |||
111 | return asid; | ||
112 | } | ||
113 | |||
114 | /* | ||
115 | * After we have set current->mm to a new value, this activates | ||
116 | * the context for the new mm so we see the new mappings. | ||
117 | */ | ||
118 | static inline void activate_context(struct mm_struct *mm) | ||
119 | { | ||
120 | get_mmu_context(mm); | ||
121 | set_asid(mm_context(mm) & MMU_CONTEXT_ASID_MASK); | ||
122 | } | ||
123 | |||
124 | static inline void switch_mm(struct mm_struct *prev, | ||
125 | struct mm_struct *next, struct task_struct *tsk) | ||
126 | { | ||
127 | #ifdef CONFIG_SMP | ||
128 | int cpu = smp_processor_id(); | ||
129 | #endif /* CONFIG_SMP */ | ||
130 | |||
131 | if (prev != next) { | ||
132 | #ifdef CONFIG_SMP | ||
133 | cpumask_set_cpu(cpu, mm_cpumask(next)); | ||
134 | #endif /* CONFIG_SMP */ | ||
135 | /* Set MPTB = next->pgd */ | ||
136 | *(volatile unsigned long *)MPTB = (unsigned long)next->pgd; | ||
137 | activate_context(next); | ||
138 | } | ||
139 | #ifdef CONFIG_SMP | ||
140 | else | ||
141 | if (!cpumask_test_and_set_cpu(cpu, mm_cpumask(next))) | ||
142 | activate_context(next); | ||
143 | #endif /* CONFIG_SMP */ | ||
144 | } | ||
145 | |||
146 | #define deactivate_mm(tsk, mm) do { } while (0) | ||
147 | |||
148 | #define activate_mm(prev, next) \ | ||
149 | switch_mm((prev), (next), NULL) | ||
150 | |||
151 | #else /* not CONFIG_MMU */ | ||
152 | #define get_mmu_context(mm) do { } while (0) | ||
153 | #define init_new_context(tsk,mm) (0) | ||
154 | #define destroy_context(mm) do { } while (0) | ||
155 | #define set_asid(asid) do { } while (0) | ||
156 | #define get_asid() (0) | ||
157 | #define activate_context(mm) do { } while (0) | ||
158 | #define switch_mm(prev,next,tsk) do { } while (0) | ||
159 | #define deactivate_mm(mm,tsk) do { } while (0) | ||
160 | #define activate_mm(prev,next) do { } while (0) | ||
161 | #define enter_lazy_tlb(mm,tsk) do { } while (0) | ||
162 | #endif /* not CONFIG_MMU */ | ||
163 | |||
164 | #endif /* not __ASSEMBLY__ */ | ||
165 | |||
166 | #endif /* __KERNEL__ */ | ||
167 | #endif /* _ASM_M32R_MMU_CONTEXT_H */ | ||
diff --git a/arch/m32r/include/asm/mmzone.h b/arch/m32r/include/asm/mmzone.h deleted file mode 100644 index 568946c13ba6..000000000000 --- a/arch/m32r/include/asm/mmzone.h +++ /dev/null | |||
@@ -1,54 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | /* | ||
3 | * Written by Pat Gaughen (gone@us.ibm.com) Mar 2002 | ||
4 | * | ||
5 | */ | ||
6 | |||
7 | #ifndef _ASM_MMZONE_H_ | ||
8 | #define _ASM_MMZONE_H_ | ||
9 | |||
10 | #include <asm/smp.h> | ||
11 | |||
12 | #ifdef CONFIG_DISCONTIGMEM | ||
13 | |||
14 | extern struct pglist_data *node_data[]; | ||
15 | #define NODE_DATA(nid) (node_data[nid]) | ||
16 | |||
17 | #define node_localnr(pfn, nid) ((pfn) - NODE_DATA(nid)->node_start_pfn) | ||
18 | |||
19 | #define pmd_page(pmd) (pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT)) | ||
20 | /* | ||
21 | * pfn_valid should be made as fast as possible, and the current definition | ||
22 | * is valid for machines that are NUMA, but still contiguous, which is what | ||
23 | * is currently supported. A more generalised, but slower definition would | ||
24 | * be something like this - mbligh: | ||
25 | * ( pfn_to_pgdat(pfn) && ((pfn) < node_end_pfn(pfn_to_nid(pfn))) ) | ||
26 | */ | ||
27 | #if 1 /* M32R_FIXME */ | ||
28 | #define pfn_valid(pfn) (1) | ||
29 | #else | ||
30 | #define pfn_valid(pfn) ((pfn) < num_physpages) | ||
31 | #endif | ||
32 | |||
33 | /* | ||
34 | * generic node memory support, the following assumptions apply: | ||
35 | */ | ||
36 | |||
37 | static __inline__ int pfn_to_nid(unsigned long pfn) | ||
38 | { | ||
39 | int node; | ||
40 | |||
41 | for (node = 0 ; node < MAX_NUMNODES ; node++) | ||
42 | if (pfn >= node_start_pfn(node) && pfn < node_end_pfn(node)) | ||
43 | break; | ||
44 | |||
45 | return node; | ||
46 | } | ||
47 | |||
48 | static __inline__ struct pglist_data *pfn_to_pgdat(unsigned long pfn) | ||
49 | { | ||
50 | return(NODE_DATA(pfn_to_nid(pfn))); | ||
51 | } | ||
52 | |||
53 | #endif /* CONFIG_DISCONTIGMEM */ | ||
54 | #endif /* _ASM_MMZONE_H_ */ | ||
diff --git a/arch/m32r/include/asm/opsput/opsput_lan.h b/arch/m32r/include/asm/opsput/opsput_lan.h deleted file mode 100644 index a5f18dd1ab20..000000000000 --- a/arch/m32r/include/asm/opsput/opsput_lan.h +++ /dev/null | |||
@@ -1,52 +0,0 @@ | |||
1 | #ifndef _OPSPUT_OPSPUT_LAN_H | ||
2 | #define _OPSPUT_OPSPUT_LAN_H | ||
3 | |||
4 | /* | ||
5 | * include/asm-m32r/opsput/opsput_lan.h | ||
6 | * | ||
7 | * OPSPUT-LAN board | ||
8 | * | ||
9 | * Copyright (c) 2002-2004 Takeo Takahashi, Mamoru Sakugawa | ||
10 | * | ||
11 | * This file is subject to the terms and conditions of the GNU General | ||
12 | * Public License. See the file "COPYING" in the main directory of | ||
13 | * this archive for more details. | ||
14 | */ | ||
15 | |||
16 | #ifndef __ASSEMBLY__ | ||
17 | /* | ||
18 | * C functions use non-cache address. | ||
19 | */ | ||
20 | #define OPSPUT_LAN_BASE (0x10000000 /* + NONCACHE_OFFSET */) | ||
21 | #else | ||
22 | #define OPSPUT_LAN_BASE (0x10000000 + NONCACHE_OFFSET) | ||
23 | #endif /* __ASSEMBLY__ */ | ||
24 | |||
25 | /* ICU | ||
26 | * ICUISTS: status register | ||
27 | * ICUIREQ0: request register | ||
28 | * ICUIREQ1: request register | ||
29 | * ICUCR3: control register for CFIREQ# interrupt | ||
30 | * ICUCR4: control register for CFC Card insert interrupt | ||
31 | * ICUCR5: control register for CFC Card eject interrupt | ||
32 | * ICUCR6: control register for external interrupt | ||
33 | * ICUCR11: control register for MMC Card insert/eject interrupt | ||
34 | * ICUCR13: control register for SC error interrupt | ||
35 | * ICUCR14: control register for SC receive interrupt | ||
36 | * ICUCR15: control register for SC send interrupt | ||
37 | * ICUCR16: control register for SIO0 receive interrupt | ||
38 | * ICUCR17: control register for SIO0 send interrupt | ||
39 | */ | ||
40 | #define OPSPUT_LAN_IRQ_LAN (OPSPUT_LAN_PLD_IRQ_BASE + 1) /* LAN */ | ||
41 | #define OPSPUT_LAN_IRQ_I2C (OPSPUT_LAN_PLD_IRQ_BASE + 3) /* I2C */ | ||
42 | |||
43 | #define OPSPUT_LAN_ICUISTS __reg16(OPSPUT_LAN_BASE + 0xc0002) | ||
44 | #define OPSPUT_LAN_ICUISTS_VECB_MASK (0xf000) | ||
45 | #define OPSPUT_LAN_VECB(x) ((x) & OPSPUT_LAN_ICUISTS_VECB_MASK) | ||
46 | #define OPSPUT_LAN_ICUISTS_ISN_MASK (0x07c0) | ||
47 | #define OPSPUT_LAN_ICUISTS_ISN(x) ((x) & OPSPUT_LAN_ICUISTS_ISN_MASK) | ||
48 | #define OPSPUT_LAN_ICUIREQ0 __reg16(OPSPUT_LAN_BASE + 0xc0004) | ||
49 | #define OPSPUT_LAN_ICUCR1 __reg16(OPSPUT_LAN_BASE + 0xc0010) | ||
50 | #define OPSPUT_LAN_ICUCR3 __reg16(OPSPUT_LAN_BASE + 0xc0014) | ||
51 | |||
52 | #endif /* _OPSPUT_OPSPUT_LAN_H */ | ||
diff --git a/arch/m32r/include/asm/opsput/opsput_lcd.h b/arch/m32r/include/asm/opsput/opsput_lcd.h deleted file mode 100644 index 369c9f0832a6..000000000000 --- a/arch/m32r/include/asm/opsput/opsput_lcd.h +++ /dev/null | |||
@@ -1,55 +0,0 @@ | |||
1 | #ifndef _OPSPUT_OPSPUT_LCD_H | ||
2 | #define _OPSPUT_OPSPUT_LCD_H | ||
3 | |||
4 | /* | ||
5 | * include/asm-m32r/opsput/opsput_lcd.h | ||
6 | * | ||
7 | * OPSPUT-LCD board | ||
8 | * | ||
9 | * Copyright (c) 2002 Takeo Takahashi | ||
10 | * | ||
11 | * This file is subject to the terms and conditions of the GNU General | ||
12 | * Public License. See the file "COPYING" in the main directory of | ||
13 | * this archive for more details. | ||
14 | */ | ||
15 | |||
16 | #ifndef __ASSEMBLY__ | ||
17 | /* | ||
18 | * C functions use non-cache address. | ||
19 | */ | ||
20 | #define OPSPUT_LCD_BASE (0x10000000 /* + NONCACHE_OFFSET */) | ||
21 | #else | ||
22 | #define OPSPUT_LCD_BASE (0x10000000 + NONCACHE_OFFSET) | ||
23 | #endif /* __ASSEMBLY__ */ | ||
24 | |||
25 | /* | ||
26 | * ICU | ||
27 | */ | ||
28 | #define OPSPUT_LCD_IRQ_BAT_INT (OPSPUT_LCD_PLD_IRQ_BASE + 1) | ||
29 | #define OPSPUT_LCD_IRQ_USB_INT1 (OPSPUT_LCD_PLD_IRQ_BASE + 2) | ||
30 | #define OPSPUT_LCD_IRQ_AUDT0 (OPSPUT_LCD_PLD_IRQ_BASE + 3) | ||
31 | #define OPSPUT_LCD_IRQ_AUDT2 (OPSPUT_LCD_PLD_IRQ_BASE + 4) | ||
32 | #define OPSPUT_LCD_IRQ_BATSIO_RCV (OPSPUT_LCD_PLD_IRQ_BASE + 16) | ||
33 | #define OPSPUT_LCD_IRQ_BATSIO_SND (OPSPUT_LCD_PLD_IRQ_BASE + 17) | ||
34 | #define OPSPUT_LCD_IRQ_ASNDSIO_RCV (OPSPUT_LCD_PLD_IRQ_BASE + 18) | ||
35 | #define OPSPUT_LCD_IRQ_ASNDSIO_SND (OPSPUT_LCD_PLD_IRQ_BASE + 19) | ||
36 | #define OPSPUT_LCD_IRQ_ACNLSIO_SND (OPSPUT_LCD_PLD_IRQ_BASE + 21) | ||
37 | |||
38 | #define OPSPUT_LCD_ICUISTS __reg16(OPSPUT_LCD_BASE + 0x300002) | ||
39 | #define OPSPUT_LCD_ICUISTS_VECB_MASK (0xf000) | ||
40 | #define OPSPUT_LCD_VECB(x) ((x) & OPSPUT_LCD_ICUISTS_VECB_MASK) | ||
41 | #define OPSPUT_LCD_ICUISTS_ISN_MASK (0x07c0) | ||
42 | #define OPSPUT_LCD_ICUISTS_ISN(x) ((x) & OPSPUT_LCD_ICUISTS_ISN_MASK) | ||
43 | #define OPSPUT_LCD_ICUIREQ0 __reg16(OPSPUT_LCD_BASE + 0x300004) | ||
44 | #define OPSPUT_LCD_ICUIREQ1 __reg16(OPSPUT_LCD_BASE + 0x300006) | ||
45 | #define OPSPUT_LCD_ICUCR1 __reg16(OPSPUT_LCD_BASE + 0x300020) | ||
46 | #define OPSPUT_LCD_ICUCR2 __reg16(OPSPUT_LCD_BASE + 0x300022) | ||
47 | #define OPSPUT_LCD_ICUCR3 __reg16(OPSPUT_LCD_BASE + 0x300024) | ||
48 | #define OPSPUT_LCD_ICUCR4 __reg16(OPSPUT_LCD_BASE + 0x300026) | ||
49 | #define OPSPUT_LCD_ICUCR16 __reg16(OPSPUT_LCD_BASE + 0x300030) | ||
50 | #define OPSPUT_LCD_ICUCR17 __reg16(OPSPUT_LCD_BASE + 0x300032) | ||
51 | #define OPSPUT_LCD_ICUCR18 __reg16(OPSPUT_LCD_BASE + 0x300034) | ||
52 | #define OPSPUT_LCD_ICUCR19 __reg16(OPSPUT_LCD_BASE + 0x300036) | ||
53 | #define OPSPUT_LCD_ICUCR21 __reg16(OPSPUT_LCD_BASE + 0x30003a) | ||
54 | |||
55 | #endif /* _OPSPUT_OPSPUT_LCD_H */ | ||
diff --git a/arch/m32r/include/asm/opsput/opsput_pld.h b/arch/m32r/include/asm/opsput/opsput_pld.h deleted file mode 100644 index 6901401fe9eb..000000000000 --- a/arch/m32r/include/asm/opsput/opsput_pld.h +++ /dev/null | |||
@@ -1,255 +0,0 @@ | |||
1 | #ifndef _OPSPUT_OPSPUT_PLD_H | ||
2 | #define _OPSPUT_OPSPUT_PLD_H | ||
3 | |||
4 | /* | ||
5 | * include/asm-m32r/opsput/opsput_pld.h | ||
6 | * | ||
7 | * Definitions for Programmable Logic Device(PLD) on OPSPUT board. | ||
8 | * | ||
9 | * Copyright (c) 2002 Takeo Takahashi | ||
10 | * | ||
11 | * This file is subject to the terms and conditions of the GNU General | ||
12 | * Public License. See the file "COPYING" in the main directory of | ||
13 | * this archive for more details. | ||
14 | */ | ||
15 | |||
16 | #define PLD_PLAT_BASE 0x1cc00000 | ||
17 | |||
18 | #ifndef __ASSEMBLY__ | ||
19 | /* | ||
20 | * C functions use non-cache address. | ||
21 | */ | ||
22 | #define PLD_BASE (PLD_PLAT_BASE /* + NONCACHE_OFFSET */) | ||
23 | #define __reg8 (volatile unsigned char *) | ||
24 | #define __reg16 (volatile unsigned short *) | ||
25 | #define __reg32 (volatile unsigned int *) | ||
26 | #else | ||
27 | #define PLD_BASE (PLD_PLAT_BASE + NONCACHE_OFFSET) | ||
28 | #define __reg8 | ||
29 | #define __reg16 | ||
30 | #define __reg32 | ||
31 | #endif /* __ASSEMBLY__ */ | ||
32 | |||
33 | /* CFC */ | ||
34 | #define PLD_CFRSTCR __reg16(PLD_BASE + 0x0000) | ||
35 | #define PLD_CFSTS __reg16(PLD_BASE + 0x0002) | ||
36 | #define PLD_CFIMASK __reg16(PLD_BASE + 0x0004) | ||
37 | #define PLD_CFBUFCR __reg16(PLD_BASE + 0x0006) | ||
38 | #define PLD_CFVENCR __reg16(PLD_BASE + 0x0008) | ||
39 | #define PLD_CFCR0 __reg16(PLD_BASE + 0x000a) | ||
40 | #define PLD_CFCR1 __reg16(PLD_BASE + 0x000c) | ||
41 | #define PLD_IDERSTCR __reg16(PLD_BASE + 0x0010) | ||
42 | |||
43 | /* MMC */ | ||
44 | #define PLD_MMCCR __reg16(PLD_BASE + 0x4000) | ||
45 | #define PLD_MMCMOD __reg16(PLD_BASE + 0x4002) | ||
46 | #define PLD_MMCSTS __reg16(PLD_BASE + 0x4006) | ||
47 | #define PLD_MMCBAUR __reg16(PLD_BASE + 0x400a) | ||
48 | #define PLD_MMCCMDBCUT __reg16(PLD_BASE + 0x400c) | ||
49 | #define PLD_MMCCDTBCUT __reg16(PLD_BASE + 0x400e) | ||
50 | #define PLD_MMCDET __reg16(PLD_BASE + 0x4010) | ||
51 | #define PLD_MMCWP __reg16(PLD_BASE + 0x4012) | ||
52 | #define PLD_MMCWDATA __reg16(PLD_BASE + 0x5000) | ||
53 | #define PLD_MMCRDATA __reg16(PLD_BASE + 0x6000) | ||
54 | #define PLD_MMCCMDDATA __reg16(PLD_BASE + 0x7000) | ||
55 | #define PLD_MMCRSPDATA __reg16(PLD_BASE + 0x7006) | ||
56 | |||
57 | /* ICU | ||
58 | * ICUISTS: status register | ||
59 | * ICUIREQ0: request register | ||
60 | * ICUIREQ1: request register | ||
61 | * ICUCR3: control register for CFIREQ# interrupt | ||
62 | * ICUCR4: control register for CFC Card insert interrupt | ||
63 | * ICUCR5: control register for CFC Card eject interrupt | ||
64 | * ICUCR6: control register for external interrupt | ||
65 | * ICUCR11: control register for MMC Card insert/eject interrupt | ||
66 | * ICUCR13: control register for SC error interrupt | ||
67 | * ICUCR14: control register for SC receive interrupt | ||
68 | * ICUCR15: control register for SC send interrupt | ||
69 | * ICUCR16: control register for SIO0 receive interrupt | ||
70 | * ICUCR17: control register for SIO0 send interrupt | ||
71 | */ | ||
72 | #if !defined(CONFIG_PLAT_USRV) | ||
73 | #define PLD_IRQ_INT0 (OPSPUT_PLD_IRQ_BASE + 0) /* None */ | ||
74 | #define PLD_IRQ_INT1 (OPSPUT_PLD_IRQ_BASE + 1) /* reserved */ | ||
75 | #define PLD_IRQ_INT2 (OPSPUT_PLD_IRQ_BASE + 2) /* reserved */ | ||
76 | #define PLD_IRQ_CFIREQ (OPSPUT_PLD_IRQ_BASE + 3) /* CF IREQ */ | ||
77 | #define PLD_IRQ_CFC_INSERT (OPSPUT_PLD_IRQ_BASE + 4) /* CF Insert */ | ||
78 | #define PLD_IRQ_CFC_EJECT (OPSPUT_PLD_IRQ_BASE + 5) /* CF Eject */ | ||
79 | #define PLD_IRQ_EXINT (OPSPUT_PLD_IRQ_BASE + 6) /* EXINT */ | ||
80 | #define PLD_IRQ_INT7 (OPSPUT_PLD_IRQ_BASE + 7) /* reserved */ | ||
81 | #define PLD_IRQ_INT8 (OPSPUT_PLD_IRQ_BASE + 8) /* reserved */ | ||
82 | #define PLD_IRQ_INT9 (OPSPUT_PLD_IRQ_BASE + 9) /* reserved */ | ||
83 | #define PLD_IRQ_INT10 (OPSPUT_PLD_IRQ_BASE + 10) /* reserved */ | ||
84 | #define PLD_IRQ_MMCCARD (OPSPUT_PLD_IRQ_BASE + 11) /* MMC Insert/Eject */ | ||
85 | #define PLD_IRQ_INT12 (OPSPUT_PLD_IRQ_BASE + 12) /* reserved */ | ||
86 | #define PLD_IRQ_SC_ERROR (OPSPUT_PLD_IRQ_BASE + 13) /* SC error */ | ||
87 | #define PLD_IRQ_SC_RCV (OPSPUT_PLD_IRQ_BASE + 14) /* SC receive */ | ||
88 | #define PLD_IRQ_SC_SND (OPSPUT_PLD_IRQ_BASE + 15) /* SC send */ | ||
89 | #define PLD_IRQ_SIO0_RCV (OPSPUT_PLD_IRQ_BASE + 16) /* SIO receive */ | ||
90 | #define PLD_IRQ_SIO0_SND (OPSPUT_PLD_IRQ_BASE + 17) /* SIO send */ | ||
91 | #define PLD_IRQ_INT18 (OPSPUT_PLD_IRQ_BASE + 18) /* reserved */ | ||
92 | #define PLD_IRQ_INT19 (OPSPUT_PLD_IRQ_BASE + 19) /* reserved */ | ||
93 | #define PLD_IRQ_INT20 (OPSPUT_PLD_IRQ_BASE + 20) /* reserved */ | ||
94 | #define PLD_IRQ_INT21 (OPSPUT_PLD_IRQ_BASE + 21) /* reserved */ | ||
95 | #define PLD_IRQ_INT22 (OPSPUT_PLD_IRQ_BASE + 22) /* reserved */ | ||
96 | #define PLD_IRQ_INT23 (OPSPUT_PLD_IRQ_BASE + 23) /* reserved */ | ||
97 | #define PLD_IRQ_INT24 (OPSPUT_PLD_IRQ_BASE + 24) /* reserved */ | ||
98 | #define PLD_IRQ_INT25 (OPSPUT_PLD_IRQ_BASE + 25) /* reserved */ | ||
99 | #define PLD_IRQ_INT26 (OPSPUT_PLD_IRQ_BASE + 26) /* reserved */ | ||
100 | #define PLD_IRQ_INT27 (OPSPUT_PLD_IRQ_BASE + 27) /* reserved */ | ||
101 | #define PLD_IRQ_INT28 (OPSPUT_PLD_IRQ_BASE + 28) /* reserved */ | ||
102 | #define PLD_IRQ_INT29 (OPSPUT_PLD_IRQ_BASE + 29) /* reserved */ | ||
103 | #define PLD_IRQ_INT30 (OPSPUT_PLD_IRQ_BASE + 30) /* reserved */ | ||
104 | #define PLD_IRQ_INT31 (OPSPUT_PLD_IRQ_BASE + 31) /* reserved */ | ||
105 | |||
106 | #else /* CONFIG_PLAT_USRV */ | ||
107 | |||
108 | #define PLD_IRQ_INT0 (OPSPUT_PLD_IRQ_BASE + 0) /* None */ | ||
109 | #define PLD_IRQ_INT1 (OPSPUT_PLD_IRQ_BASE + 1) /* reserved */ | ||
110 | #define PLD_IRQ_INT2 (OPSPUT_PLD_IRQ_BASE + 2) /* reserved */ | ||
111 | #define PLD_IRQ_CF0 (OPSPUT_PLD_IRQ_BASE + 3) /* CF0# */ | ||
112 | #define PLD_IRQ_CF1 (OPSPUT_PLD_IRQ_BASE + 4) /* CF1# */ | ||
113 | #define PLD_IRQ_CF2 (OPSPUT_PLD_IRQ_BASE + 5) /* CF2# */ | ||
114 | #define PLD_IRQ_CF3 (OPSPUT_PLD_IRQ_BASE + 6) /* CF3# */ | ||
115 | #define PLD_IRQ_CF4 (OPSPUT_PLD_IRQ_BASE + 7) /* CF4# */ | ||
116 | #define PLD_IRQ_INT8 (OPSPUT_PLD_IRQ_BASE + 8) /* reserved */ | ||
117 | #define PLD_IRQ_INT9 (OPSPUT_PLD_IRQ_BASE + 9) /* reserved */ | ||
118 | #define PLD_IRQ_INT10 (OPSPUT_PLD_IRQ_BASE + 10) /* reserved */ | ||
119 | #define PLD_IRQ_INT11 (OPSPUT_PLD_IRQ_BASE + 11) /* reserved */ | ||
120 | #define PLD_IRQ_UART0 (OPSPUT_PLD_IRQ_BASE + 12) /* UARTIRQ0 */ | ||
121 | #define PLD_IRQ_UART1 (OPSPUT_PLD_IRQ_BASE + 13) /* UARTIRQ1 */ | ||
122 | #define PLD_IRQ_INT14 (OPSPUT_PLD_IRQ_BASE + 14) /* reserved */ | ||
123 | #define PLD_IRQ_INT15 (OPSPUT_PLD_IRQ_BASE + 15) /* reserved */ | ||
124 | #define PLD_IRQ_SNDINT (OPSPUT_PLD_IRQ_BASE + 16) /* SNDINT# */ | ||
125 | #define PLD_IRQ_INT17 (OPSPUT_PLD_IRQ_BASE + 17) /* reserved */ | ||
126 | #define PLD_IRQ_INT18 (OPSPUT_PLD_IRQ_BASE + 18) /* reserved */ | ||
127 | #define PLD_IRQ_INT19 (OPSPUT_PLD_IRQ_BASE + 19) /* reserved */ | ||
128 | #define PLD_IRQ_INT20 (OPSPUT_PLD_IRQ_BASE + 20) /* reserved */ | ||
129 | #define PLD_IRQ_INT21 (OPSPUT_PLD_IRQ_BASE + 21) /* reserved */ | ||
130 | #define PLD_IRQ_INT22 (OPSPUT_PLD_IRQ_BASE + 22) /* reserved */ | ||
131 | #define PLD_IRQ_INT23 (OPSPUT_PLD_IRQ_BASE + 23) /* reserved */ | ||
132 | #define PLD_IRQ_INT24 (OPSPUT_PLD_IRQ_BASE + 24) /* reserved */ | ||
133 | #define PLD_IRQ_INT25 (OPSPUT_PLD_IRQ_BASE + 25) /* reserved */ | ||
134 | #define PLD_IRQ_INT26 (OPSPUT_PLD_IRQ_BASE + 26) /* reserved */ | ||
135 | #define PLD_IRQ_INT27 (OPSPUT_PLD_IRQ_BASE + 27) /* reserved */ | ||
136 | #define PLD_IRQ_INT28 (OPSPUT_PLD_IRQ_BASE + 28) /* reserved */ | ||
137 | #define PLD_IRQ_INT29 (OPSPUT_PLD_IRQ_BASE + 29) /* reserved */ | ||
138 | #define PLD_IRQ_INT30 (OPSPUT_PLD_IRQ_BASE + 30) /* reserved */ | ||
139 | |||
140 | #endif /* CONFIG_PLAT_USRV */ | ||
141 | |||
142 | #define PLD_ICUISTS __reg16(PLD_BASE + 0x8002) | ||
143 | #define PLD_ICUISTS_VECB_MASK (0xf000) | ||
144 | #define PLD_ICUISTS_VECB(x) ((x) & PLD_ICUISTS_VECB_MASK) | ||
145 | #define PLD_ICUISTS_ISN_MASK (0x07c0) | ||
146 | #define PLD_ICUISTS_ISN(x) ((x) & PLD_ICUISTS_ISN_MASK) | ||
147 | #define PLD_ICUIREQ0 __reg16(PLD_BASE + 0x8004) | ||
148 | #define PLD_ICUIREQ1 __reg16(PLD_BASE + 0x8006) | ||
149 | #define PLD_ICUCR1 __reg16(PLD_BASE + 0x8100) | ||
150 | #define PLD_ICUCR2 __reg16(PLD_BASE + 0x8102) | ||
151 | #define PLD_ICUCR3 __reg16(PLD_BASE + 0x8104) | ||
152 | #define PLD_ICUCR4 __reg16(PLD_BASE + 0x8106) | ||
153 | #define PLD_ICUCR5 __reg16(PLD_BASE + 0x8108) | ||
154 | #define PLD_ICUCR6 __reg16(PLD_BASE + 0x810a) | ||
155 | #define PLD_ICUCR7 __reg16(PLD_BASE + 0x810c) | ||
156 | #define PLD_ICUCR8 __reg16(PLD_BASE + 0x810e) | ||
157 | #define PLD_ICUCR9 __reg16(PLD_BASE + 0x8110) | ||
158 | #define PLD_ICUCR10 __reg16(PLD_BASE + 0x8112) | ||
159 | #define PLD_ICUCR11 __reg16(PLD_BASE + 0x8114) | ||
160 | #define PLD_ICUCR12 __reg16(PLD_BASE + 0x8116) | ||
161 | #define PLD_ICUCR13 __reg16(PLD_BASE + 0x8118) | ||
162 | #define PLD_ICUCR14 __reg16(PLD_BASE + 0x811a) | ||
163 | #define PLD_ICUCR15 __reg16(PLD_BASE + 0x811c) | ||
164 | #define PLD_ICUCR16 __reg16(PLD_BASE + 0x811e) | ||
165 | #define PLD_ICUCR17 __reg16(PLD_BASE + 0x8120) | ||
166 | #define PLD_ICUCR_IEN (0x1000) | ||
167 | #define PLD_ICUCR_IREQ (0x0100) | ||
168 | #define PLD_ICUCR_ISMOD00 (0x0000) /* Low edge */ | ||
169 | #define PLD_ICUCR_ISMOD01 (0x0010) /* Low level */ | ||
170 | #define PLD_ICUCR_ISMOD02 (0x0020) /* High edge */ | ||
171 | #define PLD_ICUCR_ISMOD03 (0x0030) /* High level */ | ||
172 | #define PLD_ICUCR_ILEVEL0 (0x0000) | ||
173 | #define PLD_ICUCR_ILEVEL1 (0x0001) | ||
174 | #define PLD_ICUCR_ILEVEL2 (0x0002) | ||
175 | #define PLD_ICUCR_ILEVEL3 (0x0003) | ||
176 | #define PLD_ICUCR_ILEVEL4 (0x0004) | ||
177 | #define PLD_ICUCR_ILEVEL5 (0x0005) | ||
178 | #define PLD_ICUCR_ILEVEL6 (0x0006) | ||
179 | #define PLD_ICUCR_ILEVEL7 (0x0007) | ||
180 | |||
181 | /* Power Control of MMC and CF */ | ||
182 | #define PLD_CPCR __reg16(PLD_BASE + 0x14000) | ||
183 | #define PLD_CPCR_CF 0x0001 | ||
184 | #define PLD_CPCR_MMC 0x0002 | ||
185 | |||
186 | /* LED Control | ||
187 | * | ||
188 | * 1: DIP swich side | ||
189 | * 2: Reset switch side | ||
190 | */ | ||
191 | #define PLD_IOLEDCR __reg16(PLD_BASE + 0x14002) | ||
192 | #define PLD_IOLED_1_ON 0x001 | ||
193 | #define PLD_IOLED_1_OFF 0x000 | ||
194 | #define PLD_IOLED_2_ON 0x002 | ||
195 | #define PLD_IOLED_2_OFF 0x000 | ||
196 | |||
197 | /* DIP Switch | ||
198 | * 0: Write-protect of Flash Memory (0:protected, 1:non-protected) | ||
199 | * 1: - | ||
200 | * 2: - | ||
201 | * 3: - | ||
202 | */ | ||
203 | #define PLD_IOSWSTS __reg16(PLD_BASE + 0x14004) | ||
204 | #define PLD_IOSWSTS_IOSW2 0x0200 | ||
205 | #define PLD_IOSWSTS_IOSW1 0x0100 | ||
206 | #define PLD_IOSWSTS_IOWP0 0x0001 | ||
207 | |||
208 | /* CRC */ | ||
209 | #define PLD_CRC7DATA __reg16(PLD_BASE + 0x18000) | ||
210 | #define PLD_CRC7INDATA __reg16(PLD_BASE + 0x18002) | ||
211 | #define PLD_CRC16DATA __reg16(PLD_BASE + 0x18004) | ||
212 | #define PLD_CRC16INDATA __reg16(PLD_BASE + 0x18006) | ||
213 | #define PLD_CRC16ADATA __reg16(PLD_BASE + 0x18008) | ||
214 | #define PLD_CRC16AINDATA __reg16(PLD_BASE + 0x1800a) | ||
215 | |||
216 | /* RTC */ | ||
217 | #define PLD_RTCCR __reg16(PLD_BASE + 0x1c000) | ||
218 | #define PLD_RTCBAUR __reg16(PLD_BASE + 0x1c002) | ||
219 | #define PLD_RTCWRDATA __reg16(PLD_BASE + 0x1c004) | ||
220 | #define PLD_RTCRDDATA __reg16(PLD_BASE + 0x1c006) | ||
221 | #define PLD_RTCRSTODT __reg16(PLD_BASE + 0x1c008) | ||
222 | |||
223 | /* SIO0 */ | ||
224 | #define PLD_ESIO0CR __reg16(PLD_BASE + 0x20000) | ||
225 | #define PLD_ESIO0CR_TXEN 0x0001 | ||
226 | #define PLD_ESIO0CR_RXEN 0x0002 | ||
227 | #define PLD_ESIO0MOD0 __reg16(PLD_BASE + 0x20002) | ||
228 | #define PLD_ESIO0MOD0_CTSS 0x0040 | ||
229 | #define PLD_ESIO0MOD0_RTSS 0x0080 | ||
230 | #define PLD_ESIO0MOD1 __reg16(PLD_BASE + 0x20004) | ||
231 | #define PLD_ESIO0MOD1_LMFS 0x0010 | ||
232 | #define PLD_ESIO0STS __reg16(PLD_BASE + 0x20006) | ||
233 | #define PLD_ESIO0STS_TEMP 0x0001 | ||
234 | #define PLD_ESIO0STS_TXCP 0x0002 | ||
235 | #define PLD_ESIO0STS_RXCP 0x0004 | ||
236 | #define PLD_ESIO0STS_TXSC 0x0100 | ||
237 | #define PLD_ESIO0STS_RXSC 0x0200 | ||
238 | #define PLD_ESIO0STS_TXREADY (PLD_ESIO0STS_TXCP | PLD_ESIO0STS_TEMP) | ||
239 | #define PLD_ESIO0INTCR __reg16(PLD_BASE + 0x20008) | ||
240 | #define PLD_ESIO0INTCR_TXIEN 0x0002 | ||
241 | #define PLD_ESIO0INTCR_RXCEN 0x0004 | ||
242 | #define PLD_ESIO0BAUR __reg16(PLD_BASE + 0x2000a) | ||
243 | #define PLD_ESIO0TXB __reg16(PLD_BASE + 0x2000c) | ||
244 | #define PLD_ESIO0RXB __reg16(PLD_BASE + 0x2000e) | ||
245 | |||
246 | /* SIM Card */ | ||
247 | #define PLD_SCCR __reg16(PLD_BASE + 0x38000) | ||
248 | #define PLD_SCMOD __reg16(PLD_BASE + 0x38004) | ||
249 | #define PLD_SCSTS __reg16(PLD_BASE + 0x38006) | ||
250 | #define PLD_SCINTCR __reg16(PLD_BASE + 0x38008) | ||
251 | #define PLD_SCBAUR __reg16(PLD_BASE + 0x3800a) | ||
252 | #define PLD_SCTXB __reg16(PLD_BASE + 0x3800c) | ||
253 | #define PLD_SCRXB __reg16(PLD_BASE + 0x3800e) | ||
254 | |||
255 | #endif /* _OPSPUT_OPSPUT_PLD.H */ | ||
diff --git a/arch/m32r/include/asm/page.h b/arch/m32r/include/asm/page.h deleted file mode 100644 index fe4e38b394d3..000000000000 --- a/arch/m32r/include/asm/page.h +++ /dev/null | |||
@@ -1,90 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifndef _ASM_M32R_PAGE_H | ||
3 | #define _ASM_M32R_PAGE_H | ||
4 | |||
5 | #include <linux/const.h> | ||
6 | |||
7 | /* PAGE_SHIFT determines the page size */ | ||
8 | #define PAGE_SHIFT 12 | ||
9 | #define PAGE_SIZE (_AC(1, UL) << PAGE_SHIFT) | ||
10 | #define PAGE_MASK (~(PAGE_SIZE-1)) | ||
11 | |||
12 | #ifndef __ASSEMBLY__ | ||
13 | |||
14 | extern void clear_page(void *to); | ||
15 | extern void copy_page(void *to, void *from); | ||
16 | |||
17 | #define clear_user_page(page, vaddr, pg) clear_page(page) | ||
18 | #define copy_user_page(to, from, vaddr, pg) copy_page(to, from) | ||
19 | |||
20 | #define __alloc_zeroed_user_highpage(movableflags, vma, vaddr) \ | ||
21 | alloc_page_vma(GFP_HIGHUSER | __GFP_ZERO | movableflags, vma, vaddr) | ||
22 | #define __HAVE_ARCH_ALLOC_ZEROED_USER_HIGHPAGE | ||
23 | |||
24 | /* | ||
25 | * These are used to make use of C type-checking.. | ||
26 | */ | ||
27 | typedef struct { unsigned long pte; } pte_t; | ||
28 | typedef struct { unsigned long pmd; } pmd_t; | ||
29 | typedef struct { unsigned long pgd; } pgd_t; | ||
30 | #define pte_val(x) ((x).pte) | ||
31 | #define PTE_MASK PAGE_MASK | ||
32 | |||
33 | typedef struct { unsigned long pgprot; } pgprot_t; | ||
34 | typedef struct page *pgtable_t; | ||
35 | |||
36 | #define pmd_val(x) ((x).pmd) | ||
37 | #define pgd_val(x) ((x).pgd) | ||
38 | #define pgprot_val(x) ((x).pgprot) | ||
39 | |||
40 | #define __pte(x) ((pte_t) { (x) } ) | ||
41 | #define __pmd(x) ((pmd_t) { (x) } ) | ||
42 | #define __pgd(x) ((pgd_t) { (x) } ) | ||
43 | #define __pgprot(x) ((pgprot_t) { (x) } ) | ||
44 | |||
45 | #endif /* !__ASSEMBLY__ */ | ||
46 | |||
47 | /* | ||
48 | * This handles the memory map.. We could make this a config | ||
49 | * option, but too many people screw it up, and too few need | ||
50 | * it. | ||
51 | * | ||
52 | * A __PAGE_OFFSET of 0xC0000000 means that the kernel has | ||
53 | * a virtual address space of one gigabyte, which limits the | ||
54 | * amount of physical memory you can use to about 950MB. | ||
55 | * | ||
56 | * If you want more physical memory than this then see the CONFIG_HIGHMEM4G | ||
57 | * and CONFIG_HIGHMEM64G options in the kernel configuration. | ||
58 | */ | ||
59 | |||
60 | #define __MEMORY_START CONFIG_MEMORY_START | ||
61 | #define __MEMORY_SIZE CONFIG_MEMORY_SIZE | ||
62 | |||
63 | #ifdef CONFIG_MMU | ||
64 | #define __PAGE_OFFSET (0x80000000) | ||
65 | #else | ||
66 | #define __PAGE_OFFSET (0x00000000) | ||
67 | #endif | ||
68 | |||
69 | #define PAGE_OFFSET ((unsigned long)__PAGE_OFFSET) | ||
70 | #define __pa(x) ((unsigned long)(x) - PAGE_OFFSET) | ||
71 | #define __va(x) ((void *)((unsigned long)(x) + PAGE_OFFSET)) | ||
72 | |||
73 | #ifndef CONFIG_DISCONTIGMEM | ||
74 | #define PFN_BASE (CONFIG_MEMORY_START >> PAGE_SHIFT) | ||
75 | #define ARCH_PFN_OFFSET PFN_BASE | ||
76 | #define pfn_valid(pfn) (((pfn) - PFN_BASE) < max_mapnr) | ||
77 | #endif /* !CONFIG_DISCONTIGMEM */ | ||
78 | |||
79 | #define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT) | ||
80 | #define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT) | ||
81 | |||
82 | #define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \ | ||
83 | VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC ) | ||
84 | |||
85 | #define devmem_is_allowed(x) 1 | ||
86 | |||
87 | #include <asm-generic/memory_model.h> | ||
88 | #include <asm-generic/getorder.h> | ||
89 | |||
90 | #endif /* _ASM_M32R_PAGE_H */ | ||
diff --git a/arch/m32r/include/asm/pci.h b/arch/m32r/include/asm/pci.h deleted file mode 100644 index cbcb28b5f6ff..000000000000 --- a/arch/m32r/include/asm/pci.h +++ /dev/null | |||
@@ -1,7 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifndef _ASM_M32R_PCI_H | ||
3 | #define _ASM_M32R_PCI_H | ||
4 | |||
5 | #include <asm-generic/pci.h> | ||
6 | |||
7 | #endif /* _ASM_M32R_PCI_H */ | ||
diff --git a/arch/m32r/include/asm/percpu.h b/arch/m32r/include/asm/percpu.h deleted file mode 100644 index 41e1680d1117..000000000000 --- a/arch/m32r/include/asm/percpu.h +++ /dev/null | |||
@@ -1,7 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifndef __ARCH_M32R_PERCPU__ | ||
3 | #define __ARCH_M32R_PERCPU__ | ||
4 | |||
5 | #include <asm-generic/percpu.h> | ||
6 | |||
7 | #endif /* __ARCH_M32R_PERCPU__ */ | ||
diff --git a/arch/m32r/include/asm/pgalloc.h b/arch/m32r/include/asm/pgalloc.h deleted file mode 100644 index eed2cad57d68..000000000000 --- a/arch/m32r/include/asm/pgalloc.h +++ /dev/null | |||
@@ -1,82 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifndef _ASM_M32R_PGALLOC_H | ||
3 | #define _ASM_M32R_PGALLOC_H | ||
4 | |||
5 | #include <linux/mm.h> | ||
6 | |||
7 | #include <asm/io.h> | ||
8 | |||
9 | #define pmd_populate_kernel(mm, pmd, pte) \ | ||
10 | set_pmd(pmd, __pmd(_PAGE_TABLE + __pa(pte))) | ||
11 | |||
12 | static __inline__ void pmd_populate(struct mm_struct *mm, pmd_t *pmd, | ||
13 | pgtable_t pte) | ||
14 | { | ||
15 | set_pmd(pmd, __pmd(_PAGE_TABLE + page_to_phys(pte))); | ||
16 | } | ||
17 | #define pmd_pgtable(pmd) pmd_page(pmd) | ||
18 | |||
19 | /* | ||
20 | * Allocate and free page tables. | ||
21 | */ | ||
22 | static __inline__ pgd_t *pgd_alloc(struct mm_struct *mm) | ||
23 | { | ||
24 | pgd_t *pgd = (pgd_t *)__get_free_page(GFP_KERNEL|__GFP_ZERO); | ||
25 | |||
26 | return pgd; | ||
27 | } | ||
28 | |||
29 | static inline void pgd_free(struct mm_struct *mm, pgd_t *pgd) | ||
30 | { | ||
31 | free_page((unsigned long)pgd); | ||
32 | } | ||
33 | |||
34 | static __inline__ pte_t *pte_alloc_one_kernel(struct mm_struct *mm, | ||
35 | unsigned long address) | ||
36 | { | ||
37 | pte_t *pte = (pte_t *)__get_free_page(GFP_KERNEL|__GFP_ZERO); | ||
38 | |||
39 | return pte; | ||
40 | } | ||
41 | |||
42 | static __inline__ pgtable_t pte_alloc_one(struct mm_struct *mm, | ||
43 | unsigned long address) | ||
44 | { | ||
45 | struct page *pte = alloc_page(GFP_KERNEL|__GFP_ZERO); | ||
46 | |||
47 | if (!pte) | ||
48 | return NULL; | ||
49 | if (!pgtable_page_ctor(pte)) { | ||
50 | __free_page(pte); | ||
51 | return NULL; | ||
52 | } | ||
53 | return pte; | ||
54 | } | ||
55 | |||
56 | static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte) | ||
57 | { | ||
58 | free_page((unsigned long)pte); | ||
59 | } | ||
60 | |||
61 | static inline void pte_free(struct mm_struct *mm, pgtable_t pte) | ||
62 | { | ||
63 | pgtable_page_dtor(pte); | ||
64 | __free_page(pte); | ||
65 | } | ||
66 | |||
67 | #define __pte_free_tlb(tlb, pte, addr) pte_free((tlb)->mm, (pte)) | ||
68 | |||
69 | /* | ||
70 | * allocating and freeing a pmd is trivial: the 1-entry pmd is | ||
71 | * inside the pgd, so has no extra memory associated with it. | ||
72 | * (In the PAE case we free the pmds as part of the pgd.) | ||
73 | */ | ||
74 | |||
75 | #define pmd_alloc_one(mm, addr) ({ BUG(); ((pmd_t *)2); }) | ||
76 | #define pmd_free(mm, x) do { } while (0) | ||
77 | #define __pmd_free_tlb(tlb, x, addr) do { } while (0) | ||
78 | #define pgd_populate(mm, pmd, pte) BUG() | ||
79 | |||
80 | #define check_pgt_cache() do { } while (0) | ||
81 | |||
82 | #endif /* _ASM_M32R_PGALLOC_H */ | ||
diff --git a/arch/m32r/include/asm/pgtable-2level.h b/arch/m32r/include/asm/pgtable-2level.h deleted file mode 100644 index d7ab1e94e3cb..000000000000 --- a/arch/m32r/include/asm/pgtable-2level.h +++ /dev/null | |||
@@ -1,76 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifndef _ASM_M32R_PGTABLE_2LEVEL_H | ||
3 | #define _ASM_M32R_PGTABLE_2LEVEL_H | ||
4 | #ifdef __KERNEL__ | ||
5 | |||
6 | /* | ||
7 | * traditional M32R two-level paging structure: | ||
8 | */ | ||
9 | |||
10 | #define PGDIR_SHIFT 22 | ||
11 | #define PTRS_PER_PGD 1024 | ||
12 | |||
13 | /* | ||
14 | * the M32R is two-level, so we don't really have any | ||
15 | * PMD directory physically. | ||
16 | */ | ||
17 | #define __PAGETABLE_PMD_FOLDED | ||
18 | #define PMD_SHIFT 22 | ||
19 | #define PTRS_PER_PMD 1 | ||
20 | |||
21 | #define PTRS_PER_PTE 1024 | ||
22 | |||
23 | #define pte_ERROR(e) \ | ||
24 | printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e)) | ||
25 | #define pmd_ERROR(e) \ | ||
26 | printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e)) | ||
27 | #define pgd_ERROR(e) \ | ||
28 | printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e)) | ||
29 | |||
30 | /* | ||
31 | * The "pgd_xxx()" functions here are trivial for a folded two-level | ||
32 | * setup: the pgd is never bad, and a pmd always exists (as it's folded | ||
33 | * into the pgd entry) | ||
34 | */ | ||
35 | static inline int pgd_none(pgd_t pgd) { return 0; } | ||
36 | static inline int pgd_bad(pgd_t pgd) { return 0; } | ||
37 | static inline int pgd_present(pgd_t pgd) { return 1; } | ||
38 | #define pgd_clear(xp) do { } while (0) | ||
39 | |||
40 | /* | ||
41 | * Certain architectures need to do special things when PTEs | ||
42 | * within a page table are directly modified. Thus, the following | ||
43 | * hook is made available. | ||
44 | */ | ||
45 | #define set_pte(pteptr, pteval) (*(pteptr) = pteval) | ||
46 | #define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval) | ||
47 | |||
48 | /* | ||
49 | * (pmds are folded into pgds so this doesn't get actually called, | ||
50 | * but the define is needed for a generic inline function.) | ||
51 | */ | ||
52 | #define set_pmd(pmdptr, pmdval) (*(pmdptr) = pmdval) | ||
53 | #define set_pgd(pgdptr, pgdval) (*(pgdptr) = pgdval) | ||
54 | |||
55 | #define pgd_page_vaddr(pgd) \ | ||
56 | ((unsigned long) __va(pgd_val(pgd) & PAGE_MASK)) | ||
57 | |||
58 | #ifndef CONFIG_DISCONTIGMEM | ||
59 | #define pgd_page(pgd) (mem_map + ((pgd_val(pgd) >> PAGE_SHIFT) - PFN_BASE)) | ||
60 | #endif /* !CONFIG_DISCONTIGMEM */ | ||
61 | |||
62 | static inline pmd_t *pmd_offset(pgd_t * dir, unsigned long address) | ||
63 | { | ||
64 | return (pmd_t *) dir; | ||
65 | } | ||
66 | |||
67 | #define ptep_get_and_clear(mm,addr,xp) __pte(xchg(&(xp)->pte, 0)) | ||
68 | #define pte_same(a, b) (pte_val(a) == pte_val(b)) | ||
69 | #define pte_page(x) pfn_to_page(pte_pfn(x)) | ||
70 | #define pte_none(x) (!pte_val(x)) | ||
71 | #define pte_pfn(x) (pte_val(x) >> PAGE_SHIFT) | ||
72 | #define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot)) | ||
73 | #define pfn_pmd(pfn, prot) __pmd(((pfn) << PAGE_SHIFT) | pgprot_val(prot)) | ||
74 | |||
75 | #endif /* __KERNEL__ */ | ||
76 | #endif /* _ASM_M32R_PGTABLE_2LEVEL_H */ | ||
diff --git a/arch/m32r/include/asm/pgtable.h b/arch/m32r/include/asm/pgtable.h deleted file mode 100644 index eb7f9050c8d6..000000000000 --- a/arch/m32r/include/asm/pgtable.h +++ /dev/null | |||
@@ -1,348 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifndef _ASM_M32R_PGTABLE_H | ||
3 | #define _ASM_M32R_PGTABLE_H | ||
4 | |||
5 | #include <asm-generic/4level-fixup.h> | ||
6 | |||
7 | #ifdef __KERNEL__ | ||
8 | /* | ||
9 | * The Linux memory management assumes a three-level page table setup. On | ||
10 | * the M32R, we use that, but "fold" the mid level into the top-level page | ||
11 | * table, so that we physically have the same two-level page table as the | ||
12 | * M32R mmu expects. | ||
13 | * | ||
14 | * This file contains the functions and defines necessary to modify and use | ||
15 | * the M32R page table tree. | ||
16 | */ | ||
17 | |||
18 | /* CAUTION!: If you change macro definitions in this file, you might have to | ||
19 | * change arch/m32r/mmu.S manually. | ||
20 | */ | ||
21 | |||
22 | #ifndef __ASSEMBLY__ | ||
23 | |||
24 | #include <linux/threads.h> | ||
25 | #include <linux/bitops.h> | ||
26 | #include <asm/processor.h> | ||
27 | #include <asm/addrspace.h> | ||
28 | #include <asm/page.h> | ||
29 | |||
30 | struct mm_struct; | ||
31 | struct vm_area_struct; | ||
32 | |||
33 | extern pgd_t swapper_pg_dir[1024]; | ||
34 | extern void paging_init(void); | ||
35 | |||
36 | /* | ||
37 | * ZERO_PAGE is a global shared page that is always zero: used | ||
38 | * for zero-mapped memory areas etc.. | ||
39 | */ | ||
40 | extern unsigned long empty_zero_page[1024]; | ||
41 | #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page)) | ||
42 | |||
43 | #endif /* !__ASSEMBLY__ */ | ||
44 | |||
45 | #ifndef __ASSEMBLY__ | ||
46 | #include <asm/pgtable-2level.h> | ||
47 | #endif | ||
48 | |||
49 | #define pgtable_cache_init() do { } while (0) | ||
50 | |||
51 | #define PMD_SIZE (1UL << PMD_SHIFT) | ||
52 | #define PMD_MASK (~(PMD_SIZE - 1)) | ||
53 | #define PGDIR_SIZE (1UL << PGDIR_SHIFT) | ||
54 | #define PGDIR_MASK (~(PGDIR_SIZE - 1)) | ||
55 | |||
56 | #define USER_PTRS_PER_PGD (TASK_SIZE / PGDIR_SIZE) | ||
57 | #define FIRST_USER_ADDRESS 0UL | ||
58 | |||
59 | #ifndef __ASSEMBLY__ | ||
60 | /* Just any arbitrary offset to the start of the vmalloc VM area: the | ||
61 | * current 8MB value just means that there will be a 8MB "hole" after the | ||
62 | * physical memory until the kernel virtual memory starts. That means that | ||
63 | * any out-of-bounds memory accesses will hopefully be caught. | ||
64 | * The vmalloc() routines leaves a hole of 4kB between each vmalloced | ||
65 | * area for the same reason. ;) | ||
66 | */ | ||
67 | #define VMALLOC_START KSEG2 | ||
68 | #define VMALLOC_END KSEG3 | ||
69 | |||
70 | /* | ||
71 | * M32R TLB format | ||
72 | * | ||
73 | * [0] [1:19] [20:23] [24:31] | ||
74 | * +-----------------------+----+-------------+ | ||
75 | * | VPN |0000| ASID | | ||
76 | * +-----------------------+----+-------------+ | ||
77 | * +-+---------------------+----+-+---+-+-+-+-+ | ||
78 | * |0 PPN |0000|N|AC |L|G|V| | | ||
79 | * +-+---------------------+----+-+---+-+-+-+-+ | ||
80 | * RWX | ||
81 | */ | ||
82 | |||
83 | #define _PAGE_BIT_DIRTY 0 /* software: page changed */ | ||
84 | #define _PAGE_BIT_PRESENT 1 /* Valid: page is valid */ | ||
85 | #define _PAGE_BIT_GLOBAL 2 /* Global */ | ||
86 | #define _PAGE_BIT_LARGE 3 /* Large */ | ||
87 | #define _PAGE_BIT_EXEC 4 /* Execute */ | ||
88 | #define _PAGE_BIT_WRITE 5 /* Write */ | ||
89 | #define _PAGE_BIT_READ 6 /* Read */ | ||
90 | #define _PAGE_BIT_NONCACHABLE 7 /* Non cachable */ | ||
91 | #define _PAGE_BIT_ACCESSED 8 /* software: page referenced */ | ||
92 | #define _PAGE_BIT_PROTNONE 9 /* software: if not present */ | ||
93 | |||
94 | #define _PAGE_DIRTY (1UL << _PAGE_BIT_DIRTY) | ||
95 | #define _PAGE_PRESENT (1UL << _PAGE_BIT_PRESENT) | ||
96 | #define _PAGE_GLOBAL (1UL << _PAGE_BIT_GLOBAL) | ||
97 | #define _PAGE_LARGE (1UL << _PAGE_BIT_LARGE) | ||
98 | #define _PAGE_EXEC (1UL << _PAGE_BIT_EXEC) | ||
99 | #define _PAGE_WRITE (1UL << _PAGE_BIT_WRITE) | ||
100 | #define _PAGE_READ (1UL << _PAGE_BIT_READ) | ||
101 | #define _PAGE_NONCACHABLE (1UL << _PAGE_BIT_NONCACHABLE) | ||
102 | #define _PAGE_ACCESSED (1UL << _PAGE_BIT_ACCESSED) | ||
103 | #define _PAGE_PROTNONE (1UL << _PAGE_BIT_PROTNONE) | ||
104 | |||
105 | #define _PAGE_TABLE \ | ||
106 | ( _PAGE_PRESENT | _PAGE_WRITE | _PAGE_READ | _PAGE_ACCESSED \ | ||
107 | | _PAGE_DIRTY ) | ||
108 | #define _KERNPG_TABLE \ | ||
109 | ( _PAGE_PRESENT | _PAGE_WRITE | _PAGE_READ | _PAGE_ACCESSED \ | ||
110 | | _PAGE_DIRTY ) | ||
111 | #define _PAGE_CHG_MASK \ | ||
112 | ( PTE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY ) | ||
113 | |||
114 | #ifdef CONFIG_MMU | ||
115 | #define PAGE_NONE \ | ||
116 | __pgprot(_PAGE_PROTNONE | _PAGE_ACCESSED) | ||
117 | #define PAGE_SHARED \ | ||
118 | __pgprot(_PAGE_PRESENT | _PAGE_WRITE | _PAGE_READ | _PAGE_ACCESSED) | ||
119 | #define PAGE_SHARED_EXEC \ | ||
120 | __pgprot(_PAGE_PRESENT | _PAGE_EXEC | _PAGE_WRITE | _PAGE_READ \ | ||
121 | | _PAGE_ACCESSED) | ||
122 | #define PAGE_COPY \ | ||
123 | __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_ACCESSED) | ||
124 | #define PAGE_COPY_EXEC \ | ||
125 | __pgprot(_PAGE_PRESENT | _PAGE_EXEC | _PAGE_READ | _PAGE_ACCESSED) | ||
126 | #define PAGE_READONLY \ | ||
127 | __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_ACCESSED) | ||
128 | #define PAGE_READONLY_EXEC \ | ||
129 | __pgprot(_PAGE_PRESENT | _PAGE_EXEC | _PAGE_READ | _PAGE_ACCESSED) | ||
130 | |||
131 | #define __PAGE_KERNEL \ | ||
132 | ( _PAGE_PRESENT | _PAGE_EXEC | _PAGE_WRITE | _PAGE_READ | _PAGE_DIRTY \ | ||
133 | | _PAGE_ACCESSED ) | ||
134 | #define __PAGE_KERNEL_RO ( __PAGE_KERNEL & ~_PAGE_WRITE ) | ||
135 | #define __PAGE_KERNEL_NOCACHE ( __PAGE_KERNEL | _PAGE_NONCACHABLE) | ||
136 | |||
137 | #define MAKE_GLOBAL(x) __pgprot((x) | _PAGE_GLOBAL) | ||
138 | |||
139 | #define PAGE_KERNEL MAKE_GLOBAL(__PAGE_KERNEL) | ||
140 | #define PAGE_KERNEL_RO MAKE_GLOBAL(__PAGE_KERNEL_RO) | ||
141 | #define PAGE_KERNEL_NOCACHE MAKE_GLOBAL(__PAGE_KERNEL_NOCACHE) | ||
142 | |||
143 | #else | ||
144 | #define PAGE_NONE __pgprot(0) | ||
145 | #define PAGE_SHARED __pgprot(0) | ||
146 | #define PAGE_SHARED_EXEC __pgprot(0) | ||
147 | #define PAGE_COPY __pgprot(0) | ||
148 | #define PAGE_COPY_EXEC __pgprot(0) | ||
149 | #define PAGE_READONLY __pgprot(0) | ||
150 | #define PAGE_READONLY_EXEC __pgprot(0) | ||
151 | |||
152 | #define PAGE_KERNEL __pgprot(0) | ||
153 | #define PAGE_KERNEL_RO __pgprot(0) | ||
154 | #define PAGE_KERNEL_NOCACHE __pgprot(0) | ||
155 | #endif /* CONFIG_MMU */ | ||
156 | |||
157 | /* xwr */ | ||
158 | #define __P000 PAGE_NONE | ||
159 | #define __P001 PAGE_READONLY | ||
160 | #define __P010 PAGE_COPY | ||
161 | #define __P011 PAGE_COPY | ||
162 | #define __P100 PAGE_READONLY_EXEC | ||
163 | #define __P101 PAGE_READONLY_EXEC | ||
164 | #define __P110 PAGE_COPY_EXEC | ||
165 | #define __P111 PAGE_COPY_EXEC | ||
166 | |||
167 | #define __S000 PAGE_NONE | ||
168 | #define __S001 PAGE_READONLY | ||
169 | #define __S010 PAGE_SHARED | ||
170 | #define __S011 PAGE_SHARED | ||
171 | #define __S100 PAGE_READONLY_EXEC | ||
172 | #define __S101 PAGE_READONLY_EXEC | ||
173 | #define __S110 PAGE_SHARED_EXEC | ||
174 | #define __S111 PAGE_SHARED_EXEC | ||
175 | |||
176 | /* page table for 0-4MB for everybody */ | ||
177 | |||
178 | #define pte_present(x) (pte_val(x) & (_PAGE_PRESENT | _PAGE_PROTNONE)) | ||
179 | #define pte_clear(mm,addr,xp) do { set_pte_at(mm, addr, xp, __pte(0)); } while (0) | ||
180 | |||
181 | #define pmd_none(x) (!pmd_val(x)) | ||
182 | #define pmd_present(x) (pmd_val(x) & _PAGE_PRESENT) | ||
183 | #define pmd_clear(xp) do { set_pmd(xp, __pmd(0)); } while (0) | ||
184 | #define pmd_bad(x) ((pmd_val(x) & ~PAGE_MASK) != _KERNPG_TABLE) | ||
185 | |||
186 | #define pages_to_mb(x) ((x) >> (20 - PAGE_SHIFT)) | ||
187 | |||
188 | /* | ||
189 | * The following only work if pte_present() is true. | ||
190 | * Undefined behaviour if not.. | ||
191 | */ | ||
192 | static inline int pte_dirty(pte_t pte) | ||
193 | { | ||
194 | return pte_val(pte) & _PAGE_DIRTY; | ||
195 | } | ||
196 | |||
197 | static inline int pte_young(pte_t pte) | ||
198 | { | ||
199 | return pte_val(pte) & _PAGE_ACCESSED; | ||
200 | } | ||
201 | |||
202 | static inline int pte_write(pte_t pte) | ||
203 | { | ||
204 | return pte_val(pte) & _PAGE_WRITE; | ||
205 | } | ||
206 | |||
207 | static inline int pte_special(pte_t pte) | ||
208 | { | ||
209 | return 0; | ||
210 | } | ||
211 | |||
212 | static inline pte_t pte_mkclean(pte_t pte) | ||
213 | { | ||
214 | pte_val(pte) &= ~_PAGE_DIRTY; | ||
215 | return pte; | ||
216 | } | ||
217 | |||
218 | static inline pte_t pte_mkold(pte_t pte) | ||
219 | { | ||
220 | pte_val(pte) &= ~_PAGE_ACCESSED; | ||
221 | return pte; | ||
222 | } | ||
223 | |||
224 | static inline pte_t pte_wrprotect(pte_t pte) | ||
225 | { | ||
226 | pte_val(pte) &= ~_PAGE_WRITE; | ||
227 | return pte; | ||
228 | } | ||
229 | |||
230 | static inline pte_t pte_mkdirty(pte_t pte) | ||
231 | { | ||
232 | pte_val(pte) |= _PAGE_DIRTY; | ||
233 | return pte; | ||
234 | } | ||
235 | |||
236 | static inline pte_t pte_mkyoung(pte_t pte) | ||
237 | { | ||
238 | pte_val(pte) |= _PAGE_ACCESSED; | ||
239 | return pte; | ||
240 | } | ||
241 | |||
242 | static inline pte_t pte_mkwrite(pte_t pte) | ||
243 | { | ||
244 | pte_val(pte) |= _PAGE_WRITE; | ||
245 | return pte; | ||
246 | } | ||
247 | |||
248 | static inline pte_t pte_mkspecial(pte_t pte) | ||
249 | { | ||
250 | return pte; | ||
251 | } | ||
252 | |||
253 | static inline int ptep_test_and_clear_young(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep) | ||
254 | { | ||
255 | return test_and_clear_bit(_PAGE_BIT_ACCESSED, ptep); | ||
256 | } | ||
257 | |||
258 | static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep) | ||
259 | { | ||
260 | clear_bit(_PAGE_BIT_WRITE, ptep); | ||
261 | } | ||
262 | |||
263 | /* | ||
264 | * Macro and implementation to make a page protection as uncachable. | ||
265 | */ | ||
266 | static inline pgprot_t pgprot_noncached(pgprot_t _prot) | ||
267 | { | ||
268 | unsigned long prot = pgprot_val(_prot); | ||
269 | |||
270 | prot |= _PAGE_NONCACHABLE; | ||
271 | return __pgprot(prot); | ||
272 | } | ||
273 | |||
274 | #define pgprot_writecombine(prot) pgprot_noncached(prot) | ||
275 | |||
276 | /* | ||
277 | * Conversion functions: convert a page and protection to a page entry, | ||
278 | * and a page entry and page directory to the page they refer to. | ||
279 | */ | ||
280 | #define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), pgprot) | ||
281 | |||
282 | static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) | ||
283 | { | ||
284 | set_pte(&pte, __pte((pte_val(pte) & _PAGE_CHG_MASK) \ | ||
285 | | pgprot_val(newprot))); | ||
286 | |||
287 | return pte; | ||
288 | } | ||
289 | |||
290 | /* | ||
291 | * Conversion functions: convert a page and protection to a page entry, | ||
292 | * and a page entry and page directory to the page they refer to. | ||
293 | */ | ||
294 | |||
295 | static inline void pmd_set(pmd_t * pmdp, pte_t * ptep) | ||
296 | { | ||
297 | pmd_val(*pmdp) = (((unsigned long) ptep) & PAGE_MASK); | ||
298 | } | ||
299 | |||
300 | #define pmd_page_vaddr(pmd) \ | ||
301 | ((unsigned long) __va(pmd_val(pmd) & PAGE_MASK)) | ||
302 | |||
303 | #ifndef CONFIG_DISCONTIGMEM | ||
304 | #define pmd_page(pmd) (mem_map + ((pmd_val(pmd) >> PAGE_SHIFT) - PFN_BASE)) | ||
305 | #endif /* !CONFIG_DISCONTIGMEM */ | ||
306 | |||
307 | /* to find an entry in a page-table-directory. */ | ||
308 | #define pgd_index(address) \ | ||
309 | (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1)) | ||
310 | |||
311 | #define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address)) | ||
312 | |||
313 | /* to find an entry in a kernel page-table-directory */ | ||
314 | #define pgd_offset_k(address) pgd_offset(&init_mm, address) | ||
315 | |||
316 | #define pmd_index(address) \ | ||
317 | (((address) >> PMD_SHIFT) & (PTRS_PER_PMD - 1)) | ||
318 | |||
319 | #define pte_index(address) \ | ||
320 | (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)) | ||
321 | #define pte_offset_kernel(dir, address) \ | ||
322 | ((pte_t *)pmd_page_vaddr(*(dir)) + pte_index(address)) | ||
323 | #define pte_offset_map(dir, address) \ | ||
324 | ((pte_t *)page_address(pmd_page(*(dir))) + pte_index(address)) | ||
325 | #define pte_unmap(pte) do { } while (0) | ||
326 | |||
327 | /* Encode and de-code a swap entry */ | ||
328 | #define __swp_type(x) (((x).val >> 2) & 0x1f) | ||
329 | #define __swp_offset(x) ((x).val >> 10) | ||
330 | #define __swp_entry(type, offset) \ | ||
331 | ((swp_entry_t) { ((type) << 2) | ((offset) << 10) }) | ||
332 | #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) | ||
333 | #define __swp_entry_to_pte(x) ((pte_t) { (x).val }) | ||
334 | |||
335 | #endif /* !__ASSEMBLY__ */ | ||
336 | |||
337 | /* Needs to be defined here and not in linux/mm.h, as it is arch dependent */ | ||
338 | #define kern_addr_valid(addr) (1) | ||
339 | |||
340 | #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG | ||
341 | #define __HAVE_ARCH_PTEP_GET_AND_CLEAR | ||
342 | #define __HAVE_ARCH_PTEP_SET_WRPROTECT | ||
343 | #define __HAVE_ARCH_PTE_SAME | ||
344 | #include <asm-generic/pgtable.h> | ||
345 | |||
346 | #endif /* __KERNEL__ */ | ||
347 | |||
348 | #endif /* _ASM_M32R_PGTABLE_H */ | ||
diff --git a/arch/m32r/include/asm/processor.h b/arch/m32r/include/asm/processor.h deleted file mode 100644 index c70fa9ac7169..000000000000 --- a/arch/m32r/include/asm/processor.h +++ /dev/null | |||
@@ -1,127 +0,0 @@ | |||
1 | #ifndef _ASM_M32R_PROCESSOR_H | ||
2 | #define _ASM_M32R_PROCESSOR_H | ||
3 | |||
4 | /* | ||
5 | * include/asm-m32r/processor.h | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General Public | ||
8 | * License. See the file "COPYING" in the main directory of this archive | ||
9 | * for more details. | ||
10 | * | ||
11 | * Copyright (C) 1994 Linus Torvalds | ||
12 | * Copyright (C) 2001 Hiroyuki Kondo, Hirokazu Takata, and Hitoshi Yamamoto | ||
13 | * Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org> | ||
14 | */ | ||
15 | |||
16 | #include <linux/kernel.h> | ||
17 | #include <asm/cache.h> | ||
18 | #include <asm/ptrace.h> /* pt_regs */ | ||
19 | |||
20 | /* | ||
21 | * Default implementation of macro that returns current | ||
22 | * instruction pointer ("program counter"). | ||
23 | */ | ||
24 | #define current_text_addr() ({ __label__ _l; _l: &&_l; }) | ||
25 | |||
26 | /* | ||
27 | * CPU type and hardware bug flags. Kept separately for each CPU. | ||
28 | * Members of this structure are referenced in head.S, so think twice | ||
29 | * before touching them. [mj] | ||
30 | */ | ||
31 | |||
32 | struct cpuinfo_m32r { | ||
33 | unsigned long pgtable_cache_sz; | ||
34 | unsigned long cpu_clock; | ||
35 | unsigned long bus_clock; | ||
36 | unsigned long timer_divide; | ||
37 | unsigned long loops_per_jiffy; | ||
38 | }; | ||
39 | |||
40 | /* | ||
41 | * capabilities of CPUs | ||
42 | */ | ||
43 | |||
44 | extern struct cpuinfo_m32r boot_cpu_data; | ||
45 | |||
46 | #ifdef CONFIG_SMP | ||
47 | extern struct cpuinfo_m32r cpu_data[]; | ||
48 | #define current_cpu_data cpu_data[smp_processor_id()] | ||
49 | #else | ||
50 | #define cpu_data (&boot_cpu_data) | ||
51 | #define current_cpu_data boot_cpu_data | ||
52 | #endif | ||
53 | |||
54 | /* | ||
55 | * User space process size: 2GB (default). | ||
56 | */ | ||
57 | #ifdef CONFIG_MMU | ||
58 | #define TASK_SIZE (0x80000000UL) | ||
59 | #else | ||
60 | #define TASK_SIZE (0x00400000UL) | ||
61 | #endif | ||
62 | |||
63 | #ifdef __KERNEL__ | ||
64 | #define STACK_TOP TASK_SIZE | ||
65 | #define STACK_TOP_MAX STACK_TOP | ||
66 | #endif | ||
67 | |||
68 | /* This decides where the kernel will search for a free chunk of vm | ||
69 | * space during mmap's. | ||
70 | */ | ||
71 | #define TASK_UNMAPPED_BASE PAGE_ALIGN(TASK_SIZE / 3) | ||
72 | |||
73 | typedef struct { | ||
74 | unsigned long seg; | ||
75 | } mm_segment_t; | ||
76 | |||
77 | #define MAX_TRAPS 10 | ||
78 | |||
79 | struct debug_trap { | ||
80 | int nr_trap; | ||
81 | unsigned long addr[MAX_TRAPS]; | ||
82 | unsigned long insn[MAX_TRAPS]; | ||
83 | }; | ||
84 | |||
85 | struct thread_struct { | ||
86 | unsigned long address; | ||
87 | unsigned long trap_no; /* Trap number */ | ||
88 | unsigned long error_code; /* Error code of trap */ | ||
89 | unsigned long lr; /* saved pc */ | ||
90 | unsigned long sp; /* user stack pointer */ | ||
91 | struct debug_trap debug_trap; | ||
92 | }; | ||
93 | |||
94 | #define INIT_SP (sizeof(init_stack) + (unsigned long) &init_stack) | ||
95 | |||
96 | #define INIT_THREAD { \ | ||
97 | .sp = INIT_SP, \ | ||
98 | } | ||
99 | |||
100 | /* | ||
101 | * Do necessary setup to start up a newly executed thread. | ||
102 | */ | ||
103 | |||
104 | /* User process Backup PSW */ | ||
105 | #define USERPS_BPSW (M32R_PSW_BSM|M32R_PSW_BIE|M32R_PSW_BPM) | ||
106 | |||
107 | #define start_thread(regs, new_pc, new_spu) \ | ||
108 | do { \ | ||
109 | regs->psw = (regs->psw | USERPS_BPSW) & 0x0000FFFFUL; \ | ||
110 | regs->bpc = new_pc; \ | ||
111 | regs->spu = new_spu; \ | ||
112 | } while (0) | ||
113 | |||
114 | /* Forward declaration, a strange C thing */ | ||
115 | struct task_struct; | ||
116 | struct mm_struct; | ||
117 | |||
118 | /* Free all resources held by a thread. */ | ||
119 | extern void release_thread(struct task_struct *); | ||
120 | |||
121 | unsigned long get_wchan(struct task_struct *p); | ||
122 | #define KSTK_EIP(tsk) ((tsk)->thread.lr) | ||
123 | #define KSTK_ESP(tsk) ((tsk)->thread.sp) | ||
124 | |||
125 | #define cpu_relax() barrier() | ||
126 | |||
127 | #endif /* _ASM_M32R_PROCESSOR_H */ | ||
diff --git a/arch/m32r/include/asm/ptrace.h b/arch/m32r/include/asm/ptrace.h deleted file mode 100644 index fa58ccfff865..000000000000 --- a/arch/m32r/include/asm/ptrace.h +++ /dev/null | |||
@@ -1,44 +0,0 @@ | |||
1 | /* | ||
2 | * linux/include/asm-m32r/ptrace.h | ||
3 | * | ||
4 | * This file is subject to the terms and conditions of the GNU General Public | ||
5 | * License. See the file "COPYING" in the main directory of this archive | ||
6 | * for more details. | ||
7 | * | ||
8 | * M32R version: | ||
9 | * Copyright (C) 2001-2002, 2004 Hirokazu Takata <takata at linux-m32r.org> | ||
10 | */ | ||
11 | #ifndef _ASM_M32R_PTRACE_H | ||
12 | #define _ASM_M32R_PTRACE_H | ||
13 | |||
14 | |||
15 | #include <asm/m32r.h> /* M32R_PSW_BSM, M32R_PSW_BPM */ | ||
16 | #include <uapi/asm/ptrace.h> | ||
17 | |||
18 | #define arch_has_single_step() (1) | ||
19 | |||
20 | struct task_struct; | ||
21 | extern void init_debug_traps(struct task_struct *); | ||
22 | #define arch_ptrace_attach(child) \ | ||
23 | init_debug_traps(child) | ||
24 | |||
25 | #if defined(CONFIG_ISA_M32R2) || defined(CONFIG_CHIP_VDEC2) | ||
26 | #define user_mode(regs) ((M32R_PSW_BPM & (regs)->psw) != 0) | ||
27 | #elif defined(CONFIG_ISA_M32R) | ||
28 | #define user_mode(regs) ((M32R_PSW_BSM & (regs)->psw) != 0) | ||
29 | #else | ||
30 | #error unknown isa configuration | ||
31 | #endif | ||
32 | |||
33 | #define instruction_pointer(regs) ((regs)->bpc) | ||
34 | #define profile_pc(regs) instruction_pointer(regs) | ||
35 | #define user_stack_pointer(regs) ((regs)->spu) | ||
36 | |||
37 | extern void withdraw_debug_trap(struct pt_regs *regs); | ||
38 | |||
39 | #define task_pt_regs(task) \ | ||
40 | ((struct pt_regs *)(task_stack_page(task) + THREAD_SIZE) - 1) | ||
41 | #define current_pt_regs() ((struct pt_regs *) \ | ||
42 | ((unsigned long)current_thread_info() + THREAD_SIZE) - 1) | ||
43 | |||
44 | #endif /* _ASM_M32R_PTRACE_H */ | ||
diff --git a/arch/m32r/include/asm/rtc.h b/arch/m32r/include/asm/rtc.h deleted file mode 100644 index a94cf1edc60f..000000000000 --- a/arch/m32r/include/asm/rtc.h +++ /dev/null | |||
@@ -1,66 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifndef __RTC_H__ | ||
3 | #define __RTC_H__ | ||
4 | |||
5 | /* Dallas DS1302 clock/calendar register numbers. */ | ||
6 | # define RTC_SECONDS 0 | ||
7 | # define RTC_MINUTES 1 | ||
8 | # define RTC_HOURS 2 | ||
9 | # define RTC_DAY_OF_MONTH 3 | ||
10 | # define RTC_MONTH 4 | ||
11 | # define RTC_WEEKDAY 5 | ||
12 | # define RTC_YEAR 6 | ||
13 | # define RTC_CONTROL 7 | ||
14 | |||
15 | /* Bits in CONTROL register. */ | ||
16 | # define RTC_CONTROL_WRITEPROTECT 0x80 | ||
17 | # define RTC_TRICKLECHARGER 8 | ||
18 | |||
19 | /* Bits in TRICKLECHARGER register TCS TCS TCS TCS DS DS RS RS. */ | ||
20 | # define RTC_TCR_PATTERN 0xA0 /* 1010xxxx */ | ||
21 | # define RTC_TCR_1DIOD 0x04 /* xxxx01xx */ | ||
22 | # define RTC_TCR_2DIOD 0x08 /* xxxx10xx */ | ||
23 | # define RTC_TCR_DISABLED 0x00 /* xxxxxx00 Disabled */ | ||
24 | # define RTC_TCR_2KOHM 0x01 /* xxxxxx01 2KOhm */ | ||
25 | # define RTC_TCR_4KOHM 0x02 /* xxxxxx10 4kOhm */ | ||
26 | # define RTC_TCR_8KOHM 0x03 /* xxxxxx11 8kOhm */ | ||
27 | |||
28 | #ifdef CONFIG_DS1302 | ||
29 | extern unsigned char ds1302_readreg(int reg); | ||
30 | extern void ds1302_writereg(int reg, unsigned char val); | ||
31 | extern int ds1302_init(void); | ||
32 | # define CMOS_READ(x) ds1302_readreg(x) | ||
33 | # define CMOS_WRITE(val,reg) ds1302_writereg(reg,val) | ||
34 | # define RTC_INIT() ds1302_init() | ||
35 | #else | ||
36 | /* No RTC configured so we shouldn't try to access any. */ | ||
37 | # define CMOS_READ(x) 42 | ||
38 | # define CMOS_WRITE(x,y) | ||
39 | # define RTC_INIT() (-1) | ||
40 | #endif | ||
41 | |||
42 | /* | ||
43 | * The struct used to pass data via the following ioctl. Similar to the | ||
44 | * struct tm in <time.h>, but it needs to be here so that the kernel | ||
45 | * source is self contained, allowing cross-compiles, etc. etc. | ||
46 | */ | ||
47 | struct rtc_time { | ||
48 | int tm_sec; | ||
49 | int tm_min; | ||
50 | int tm_hour; | ||
51 | int tm_mday; | ||
52 | int tm_mon; | ||
53 | int tm_year; | ||
54 | int tm_wday; | ||
55 | int tm_yday; | ||
56 | int tm_isdst; | ||
57 | }; | ||
58 | |||
59 | /* ioctl() calls that are permitted to the /dev/rtc interface. */ | ||
60 | #define RTC_MAGIC 'p' | ||
61 | #define RTC_RD_TIME _IOR(RTC_MAGIC, 0x09, struct rtc_time) /* Read RTC time. */ | ||
62 | #define RTC_SET_TIME _IOW(RTC_MAGIC, 0x0a, struct rtc_time) /* Set RTC time. */ | ||
63 | #define RTC_SET_CHARGE _IOW(RTC_MAGIC, 0x0b, int) | ||
64 | #define RTC_MAX_IOCTL 0x0b | ||
65 | |||
66 | #endif /* __RTC_H__ */ | ||
diff --git a/arch/m32r/include/asm/s1d13806.h b/arch/m32r/include/asm/s1d13806.h deleted file mode 100644 index 79e98a259ebe..000000000000 --- a/arch/m32r/include/asm/s1d13806.h +++ /dev/null | |||
@@ -1,200 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | //---------------------------------------------------------------------------- | ||
3 | // | ||
4 | // File generated by S1D13806CFG.EXE | ||
5 | // | ||
6 | // Copyright (c) 2000,2001 Epson Research and Development, Inc. | ||
7 | // All rights reserved. | ||
8 | // | ||
9 | //---------------------------------------------------------------------------- | ||
10 | |||
11 | // Panel: (active) 640x480 77Hz STN Single 8-bit (PCLK=CLKI=25.175MHz) | ||
12 | // Memory: Embedded SDRAM (MCLK=CLKI3=50.000MHz) (BUSCLK=33.333MHz) | ||
13 | |||
14 | #define SWIVEL_VIEW 0 /* 0:none, 1:90 not completed */ | ||
15 | |||
16 | static struct s1d13xxxfb_regval s1d13xxxfb_initregs[] = { | ||
17 | |||
18 | {0x0001,0x00}, // Miscellaneous Register | ||
19 | {0x01FC,0x00}, // Display Mode Register | ||
20 | #if defined(CONFIG_PLAT_MAPPI) | ||
21 | {0x0004,0x00}, // General IO Pins Configuration Register 0 | ||
22 | {0x0005,0x00}, // General IO Pins Configuration Register 1 | ||
23 | {0x0008,0x00}, // General IO Pins Control Register 0 | ||
24 | {0x0009,0x00}, // General IO Pins Control Register 1 | ||
25 | {0x0010,0x00}, // Memory Clock Configuration Register | ||
26 | {0x0014,0x00}, // LCD Pixel Clock Configuration Register | ||
27 | {0x0018,0x00}, // CRT/TV Pixel Clock Configuration Register | ||
28 | {0x001C,0x00}, // MediaPlug Clock Configuration Register | ||
29 | /* | ||
30 | * .. 10MHz: 0x00 | ||
31 | * .. 30MHz: 0x01 | ||
32 | * 30MHz ..: 0x02 | ||
33 | */ | ||
34 | {0x001E,0x02}, // CPU To Memory Wait State Select Register | ||
35 | {0x0021,0x02}, // DRAM Refresh Rate Register | ||
36 | {0x002A,0x11}, // DRAM Timings Control Register 0 | ||
37 | {0x002B,0x13}, // DRAM Timings Control Register 1 | ||
38 | {0x0020,0x80}, // Memory Configuration Register | ||
39 | {0x0030,0x25}, // Panel Type Register | ||
40 | {0x0031,0x00}, // MOD Rate Register | ||
41 | {0x0032,0x4F}, // LCD Horizontal Display Width Register | ||
42 | {0x0034,0x12}, // LCD Horizontal Non-Display Period Register | ||
43 | {0x0035,0x01}, // TFT FPLINE Start Position Register | ||
44 | {0x0036,0x0B}, // TFT FPLINE Pulse Width Register | ||
45 | {0x0038,0xDF}, // LCD Vertical Display Height Register 0 | ||
46 | {0x0039,0x01}, // LCD Vertical Display Height Register 1 | ||
47 | {0x003A,0x2C}, // LCD Vertical Non-Display Period Register | ||
48 | {0x003B,0x0A}, // TFT FPFRAME Start Position Register | ||
49 | {0x003C,0x01}, // TFT FPFRAME Pulse Width Register | ||
50 | |||
51 | {0x0041,0x00}, // LCD Miscellaneous Register | ||
52 | {0x0042,0x00}, // LCD Display Start Address Register 0 | ||
53 | {0x0043,0x00}, // LCD Display Start Address Register 1 | ||
54 | {0x0044,0x00}, // LCD Display Start Address Register 2 | ||
55 | |||
56 | #elif defined(CONFIG_PLAT_M32700UT) || defined(CONFIG_PLAT_OPSPUT) || defined(CONFIG_PLAT_MAPPI3) | ||
57 | {0x0004,0x07}, // GPIO[0:7] direction | ||
58 | {0x0005,0x00}, // GPIO[8:12] direction | ||
59 | {0x0008,0x00}, // GPIO[0:7] data | ||
60 | {0x0009,0x00}, // GPIO[8:12] data | ||
61 | {0x0008,0x04}, // LCD panel Vcc on | ||
62 | {0x0008,0x05}, // LCD panel reset | ||
63 | {0x0010,0x01}, // Memory Clock Configuration Register | ||
64 | {0x0014,0x30}, // LCD Pixel Clock Configuration Register (CLKI 22MHz/4) | ||
65 | {0x0018,0x00}, // CRT/TV Pixel Clock Configuration Register | ||
66 | {0x001C,0x00}, // MediaPlug Clock Configuration Register(10MHz) | ||
67 | {0x001E,0x00}, // CPU To Memory Wait State Select Register | ||
68 | {0x0020,0x80}, // Memory Configuration Register | ||
69 | {0x0021,0x03}, // DRAM Refresh Rate Register | ||
70 | {0x002A,0x00}, // DRAM Timings Control Register 0 | ||
71 | {0x002B,0x01}, // DRAM Timings Control Register 1 | ||
72 | {0x0030,0x25}, // Panel Type Register | ||
73 | {0x0031,0x00}, // MOD Rate Register | ||
74 | {0x0032,0x1d}, // LCD Horizontal Display Width Register | ||
75 | {0x0034,0x05}, // LCD Horizontal Non-Display Period Register | ||
76 | {0x0035,0x01}, // TFT FPLINE Start Position Register | ||
77 | {0x0036,0x01}, // TFT FPLINE Pulse Width Register | ||
78 | {0x0038,0x3F}, // LCD Vertical Display Height Register 0 | ||
79 | {0x0039,0x01}, // LCD Vertical Display Height Register 1 | ||
80 | {0x003A,0x0b}, // LCD Vertical Non-Display Period Register | ||
81 | {0x003B,0x07}, // TFT FPFRAME Start Position Register | ||
82 | {0x003C,0x02}, // TFT FPFRAME Pulse Width Register | ||
83 | |||
84 | {0x0041,0x00}, // LCD Miscellaneous Register | ||
85 | #if (SWIVEL_VIEW == 0) | ||
86 | {0x0042,0x00}, // LCD Display Start Address Register 0 | ||
87 | {0x0043,0x00}, // LCD Display Start Address Register 1 | ||
88 | {0x0044,0x00}, // LCD Display Start Address Register 2 | ||
89 | |||
90 | #elif (SWIVEL_VIEW == 1) | ||
91 | // 1024 - W(320) = 0x2C0 | ||
92 | {0x0042,0xC0}, // LCD Display Start Address Register 0 | ||
93 | {0x0043,0x02}, // LCD Display Start Address Register 1 | ||
94 | {0x0044,0x00}, // LCD Display Start Address Register 2 | ||
95 | // 1024 | ||
96 | {0x0046,0x00}, // LCD Memory Address Offset Register 0 | ||
97 | {0x0047,0x02}, // LCD Memory Address Offset Register 1 | ||
98 | #else | ||
99 | #error unsupported SWIVEL_VIEW mode | ||
100 | #endif | ||
101 | #else | ||
102 | #error no platform configuration | ||
103 | #endif /* CONFIG_PLAT_XXX */ | ||
104 | |||
105 | {0x0048,0x00}, // LCD Pixel Panning Register | ||
106 | {0x004A,0x00}, // LCD Display FIFO High Threshold Control Register | ||
107 | {0x004B,0x00}, // LCD Display FIFO Low Threshold Control Register | ||
108 | {0x0050,0x4F}, // CRT/TV Horizontal Display Width Register | ||
109 | {0x0052,0x13}, // CRT/TV Horizontal Non-Display Period Register | ||
110 | {0x0053,0x01}, // CRT/TV HRTC Start Position Register | ||
111 | {0x0054,0x0B}, // CRT/TV HRTC Pulse Width Register | ||
112 | {0x0056,0xDF}, // CRT/TV Vertical Display Height Register 0 | ||
113 | {0x0057,0x01}, // CRT/TV Vertical Display Height Register 1 | ||
114 | {0x0058,0x2B}, // CRT/TV Vertical Non-Display Period Register | ||
115 | {0x0059,0x09}, // CRT/TV VRTC Start Position Register | ||
116 | {0x005A,0x01}, // CRT/TV VRTC Pulse Width Register | ||
117 | {0x005B,0x10}, // TV Output Control Register | ||
118 | |||
119 | {0x0062,0x00}, // CRT/TV Display Start Address Register 0 | ||
120 | {0x0063,0x00}, // CRT/TV Display Start Address Register 1 | ||
121 | {0x0064,0x00}, // CRT/TV Display Start Address Register 2 | ||
122 | |||
123 | {0x0068,0x00}, // CRT/TV Pixel Panning Register | ||
124 | {0x006A,0x00}, // CRT/TV Display FIFO High Threshold Control Register | ||
125 | {0x006B,0x00}, // CRT/TV Display FIFO Low Threshold Control Register | ||
126 | {0x0070,0x00}, // LCD Ink/Cursor Control Register | ||
127 | {0x0071,0x01}, // LCD Ink/Cursor Start Address Register | ||
128 | {0x0072,0x00}, // LCD Cursor X Position Register 0 | ||
129 | {0x0073,0x00}, // LCD Cursor X Position Register 1 | ||
130 | {0x0074,0x00}, // LCD Cursor Y Position Register 0 | ||
131 | {0x0075,0x00}, // LCD Cursor Y Position Register 1 | ||
132 | {0x0076,0x00}, // LCD Ink/Cursor Blue Color 0 Register | ||
133 | {0x0077,0x00}, // LCD Ink/Cursor Green Color 0 Register | ||
134 | {0x0078,0x00}, // LCD Ink/Cursor Red Color 0 Register | ||
135 | {0x007A,0x1F}, // LCD Ink/Cursor Blue Color 1 Register | ||
136 | {0x007B,0x3F}, // LCD Ink/Cursor Green Color 1 Register | ||
137 | {0x007C,0x1F}, // LCD Ink/Cursor Red Color 1 Register | ||
138 | {0x007E,0x00}, // LCD Ink/Cursor FIFO Threshold Register | ||
139 | {0x0080,0x00}, // CRT/TV Ink/Cursor Control Register | ||
140 | {0x0081,0x01}, // CRT/TV Ink/Cursor Start Address Register | ||
141 | {0x0082,0x00}, // CRT/TV Cursor X Position Register 0 | ||
142 | {0x0083,0x00}, // CRT/TV Cursor X Position Register 1 | ||
143 | {0x0084,0x00}, // CRT/TV Cursor Y Position Register 0 | ||
144 | {0x0085,0x00}, // CRT/TV Cursor Y Position Register 1 | ||
145 | {0x0086,0x00}, // CRT/TV Ink/Cursor Blue Color 0 Register | ||
146 | {0x0087,0x00}, // CRT/TV Ink/Cursor Green Color 0 Register | ||
147 | {0x0088,0x00}, // CRT/TV Ink/Cursor Red Color 0 Register | ||
148 | {0x008A,0x1F}, // CRT/TV Ink/Cursor Blue Color 1 Register | ||
149 | {0x008B,0x3F}, // CRT/TV Ink/Cursor Green Color 1 Register | ||
150 | {0x008C,0x1F}, // CRT/TV Ink/Cursor Red Color 1 Register | ||
151 | {0x008E,0x00}, // CRT/TV Ink/Cursor FIFO Threshold Register | ||
152 | {0x0100,0x00}, // BitBlt Control Register 0 | ||
153 | {0x0101,0x00}, // BitBlt Control Register 1 | ||
154 | {0x0102,0x00}, // BitBlt ROP Code/Color Expansion Register | ||
155 | {0x0103,0x00}, // BitBlt Operation Register | ||
156 | {0x0104,0x00}, // BitBlt Source Start Address Register 0 | ||
157 | {0x0105,0x00}, // BitBlt Source Start Address Register 1 | ||
158 | {0x0106,0x00}, // BitBlt Source Start Address Register 2 | ||
159 | {0x0108,0x00}, // BitBlt Destination Start Address Register 0 | ||
160 | {0x0109,0x00}, // BitBlt Destination Start Address Register 1 | ||
161 | {0x010A,0x00}, // BitBlt Destination Start Address Register 2 | ||
162 | {0x010C,0x00}, // BitBlt Memory Address Offset Register 0 | ||
163 | {0x010D,0x00}, // BitBlt Memory Address Offset Register 1 | ||
164 | {0x0110,0x00}, // BitBlt Width Register 0 | ||
165 | {0x0111,0x00}, // BitBlt Width Register 1 | ||
166 | {0x0112,0x00}, // BitBlt Height Register 0 | ||
167 | {0x0113,0x00}, // BitBlt Height Register 1 | ||
168 | {0x0114,0x00}, // BitBlt Background Color Register 0 | ||
169 | {0x0115,0x00}, // BitBlt Background Color Register 1 | ||
170 | {0x0118,0x00}, // BitBlt Foreground Color Register 0 | ||
171 | {0x0119,0x00}, // BitBlt Foreground Color Register 1 | ||
172 | {0x01E0,0x00}, // Look-Up Table Mode Register | ||
173 | {0x01E2,0x00}, // Look-Up Table Address Register | ||
174 | {0x01F0,0x10}, // Power Save Configuration Register | ||
175 | {0x01F1,0x00}, // Power Save Status Register | ||
176 | {0x01F4,0x00}, // CPU-to-Memory Access Watchdog Timer Register | ||
177 | #if (SWIVEL_VIEW == 0) | ||
178 | {0x01FC,0x01}, // Display Mode Register(0x01:LCD, 0x02:CRT, 0x03:LCD&CRT) | ||
179 | #elif (SWIVEL_VIEW == 1) | ||
180 | {0x01FC,0x41}, // Display Mode Register(0x01:LCD, 0x02:CRT, 0x03:LCD&CRT) | ||
181 | #else | ||
182 | #error unsupported SWIVEL_VIEW mode | ||
183 | #endif /* SWIVEL_VIEW */ | ||
184 | |||
185 | #if defined(CONFIG_PLAT_M32700UT) || defined(CONFIG_PLAT_OPSPUT) || defined(CONFIG_PLAT_MAPPI3) | ||
186 | {0x0008,0x07}, // LCD panel Vdd & Vg on | ||
187 | #endif | ||
188 | |||
189 | {0x0040,0x05}, // LCD Display Mode Register (2:4bpp,3:8bpp,5:16bpp) | ||
190 | #if defined(CONFIG_PLAT_MAPPI) | ||
191 | {0x0046,0x80}, // LCD Memory Address Offset Register 0 | ||
192 | {0x0047,0x02}, // LCD Memory Address Offset Register 1 | ||
193 | #elif defined(CONFIG_PLAT_M32700UT) || defined(CONFIG_PLAT_OPSPUT) || defined(CONFIG_PLAT_MAPPI3) | ||
194 | {0x0046,0xf0}, // LCD Memory Address Offset Register 0 | ||
195 | {0x0047,0x00}, // LCD Memory Address Offset Register 1 | ||
196 | #endif | ||
197 | {0x0060,0x05}, // CRT/TV Display Mode Register (2:4bpp,3:8bpp,5:16bpp) | ||
198 | {0x0066,0x80}, // CRT/TV Memory Address Offset Register 0 // takeo | ||
199 | {0x0067,0x02}, // CRT/TV Memory Address Offset Register 1 | ||
200 | }; | ||
diff --git a/arch/m32r/include/asm/segment.h b/arch/m32r/include/asm/segment.h deleted file mode 100644 index 4095f14728e5..000000000000 --- a/arch/m32r/include/asm/segment.h +++ /dev/null | |||
@@ -1,11 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifndef _ASM_M32R_SEGMENT_H | ||
3 | #define _ASM_M32R_SEGMENT_H | ||
4 | |||
5 | #define __KERNEL_CS 0x10 | ||
6 | #define __KERNEL_DS 0x18 | ||
7 | |||
8 | #define __USER_CS 0x23 | ||
9 | #define __USER_DS 0x2B | ||
10 | |||
11 | #endif /* _ASM_M32R_SEGMENT_H */ | ||
diff --git a/arch/m32r/include/asm/serial.h b/arch/m32r/include/asm/serial.h deleted file mode 100644 index b1375c841b4d..000000000000 --- a/arch/m32r/include/asm/serial.h +++ /dev/null | |||
@@ -1,10 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifndef _ASM_M32R_SERIAL_H | ||
3 | #define _ASM_M32R_SERIAL_H | ||
4 | |||
5 | /* include/asm-m32r/serial.h */ | ||
6 | |||
7 | |||
8 | #define BASE_BAUD 115200 | ||
9 | |||
10 | #endif /* _ASM_M32R_SERIAL_H */ | ||
diff --git a/arch/m32r/include/asm/setup.h b/arch/m32r/include/asm/setup.h deleted file mode 100644 index 71b4d6514078..000000000000 --- a/arch/m32r/include/asm/setup.h +++ /dev/null | |||
@@ -1,32 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifndef _ASM_M32R_SETUP_H | ||
3 | #define _ASM_M32R_SETUP_H | ||
4 | |||
5 | #include <uapi/asm/setup.h> | ||
6 | |||
7 | |||
8 | #define PARAM ((unsigned char *)empty_zero_page) | ||
9 | |||
10 | #define MOUNT_ROOT_RDONLY (*(unsigned long *) (PARAM+0x000)) | ||
11 | #define RAMDISK_FLAGS (*(unsigned long *) (PARAM+0x004)) | ||
12 | #define ORIG_ROOT_DEV (*(unsigned long *) (PARAM+0x008)) | ||
13 | #define LOADER_TYPE (*(unsigned long *) (PARAM+0x00c)) | ||
14 | #define INITRD_START (*(unsigned long *) (PARAM+0x010)) | ||
15 | #define INITRD_SIZE (*(unsigned long *) (PARAM+0x014)) | ||
16 | |||
17 | #define M32R_CPUCLK (*(unsigned long *) (PARAM+0x018)) | ||
18 | #define M32R_BUSCLK (*(unsigned long *) (PARAM+0x01c)) | ||
19 | #define M32R_TIMER_DIVIDE (*(unsigned long *) (PARAM+0x020)) | ||
20 | |||
21 | #define COMMAND_LINE ((char *) (PARAM+0x100)) | ||
22 | |||
23 | #define SCREEN_INFO (*(struct screen_info *) (PARAM+0x200)) | ||
24 | |||
25 | #define RAMDISK_IMAGE_START_MASK (0x07FF) | ||
26 | #define RAMDISK_PROMPT_FLAG (0x8000) | ||
27 | #define RAMDISK_LOAD_FLAG (0x4000) | ||
28 | |||
29 | extern unsigned long memory_start; | ||
30 | extern unsigned long memory_end; | ||
31 | |||
32 | #endif /* _ASM_M32R_SETUP_H */ | ||
diff --git a/arch/m32r/include/asm/shmparam.h b/arch/m32r/include/asm/shmparam.h deleted file mode 100644 index 1af73d92c96d..000000000000 --- a/arch/m32r/include/asm/shmparam.h +++ /dev/null | |||
@@ -1,7 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifndef _ASM_M32R_SHMPARAM_H | ||
3 | #define _ASM_M32R_SHMPARAM_H | ||
4 | |||
5 | #define SHMLBA PAGE_SIZE /* attach addr a multiple of this */ | ||
6 | |||
7 | #endif /* _ASM_M32R_SHMPARAM_H */ | ||
diff --git a/arch/m32r/include/asm/signal.h b/arch/m32r/include/asm/signal.h deleted file mode 100644 index 8bf57950d21e..000000000000 --- a/arch/m32r/include/asm/signal.h +++ /dev/null | |||
@@ -1,25 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifndef _ASM_M32R_SIGNAL_H | ||
3 | #define _ASM_M32R_SIGNAL_H | ||
4 | |||
5 | #include <uapi/asm/signal.h> | ||
6 | |||
7 | /* Most things should be clean enough to redefine this at will, if care | ||
8 | is taken to make libc match. */ | ||
9 | |||
10 | #define _NSIG 64 | ||
11 | #define _NSIG_BPW 32 | ||
12 | #define _NSIG_WORDS (_NSIG / _NSIG_BPW) | ||
13 | |||
14 | typedef unsigned long old_sigset_t; /* at least 32 bits */ | ||
15 | |||
16 | typedef struct { | ||
17 | unsigned long sig[_NSIG_WORDS]; | ||
18 | } sigset_t; | ||
19 | |||
20 | #define __ARCH_HAS_SA_RESTORER | ||
21 | #include <asm/sigcontext.h> | ||
22 | |||
23 | #undef __HAVE_ARCH_SIG_BITOPS | ||
24 | |||
25 | #endif /* _ASM_M32R_SIGNAL_H */ | ||
diff --git a/arch/m32r/include/asm/smp.h b/arch/m32r/include/asm/smp.h deleted file mode 100644 index 763f22700ce6..000000000000 --- a/arch/m32r/include/asm/smp.h +++ /dev/null | |||
@@ -1,113 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifndef _ASM_M32R_SMP_H | ||
3 | #define _ASM_M32R_SMP_H | ||
4 | |||
5 | #ifdef CONFIG_SMP | ||
6 | #ifndef __ASSEMBLY__ | ||
7 | |||
8 | #include <linux/cpumask.h> | ||
9 | #include <linux/spinlock.h> | ||
10 | #include <linux/threads.h> | ||
11 | #include <asm/m32r.h> | ||
12 | |||
13 | #define PHYSID_ARRAY_SIZE 1 | ||
14 | |||
15 | struct physid_mask | ||
16 | { | ||
17 | unsigned long mask[PHYSID_ARRAY_SIZE]; | ||
18 | }; | ||
19 | |||
20 | typedef struct physid_mask physid_mask_t; | ||
21 | |||
22 | #define physid_set(physid, map) set_bit(physid, (map).mask) | ||
23 | #define physid_clear(physid, map) clear_bit(physid, (map).mask) | ||
24 | #define physid_isset(physid, map) test_bit(physid, (map).mask) | ||
25 | #define physid_test_and_set(physid, map) test_and_set_bit(physid, (map).mask) | ||
26 | |||
27 | #define physids_and(dst, src1, src2) bitmap_and((dst).mask, (src1).mask, (src2).mask, MAX_APICS) | ||
28 | #define physids_or(dst, src1, src2) bitmap_or((dst).mask, (src1).mask, (src2).mask, MAX_APICS) | ||
29 | #define physids_clear(map) bitmap_zero((map).mask, MAX_APICS) | ||
30 | #define physids_complement(dst, src) bitmap_complement((dst).mask,(src).mask, MAX_APICS) | ||
31 | #define physids_empty(map) bitmap_empty((map).mask, MAX_APICS) | ||
32 | #define physids_equal(map1, map2) bitmap_equal((map1).mask, (map2).mask, MAX_APICS) | ||
33 | #define physids_weight(map) bitmap_weight((map).mask, MAX_APICS) | ||
34 | #define physids_shift_right(d, s, n) bitmap_shift_right((d).mask, (s).mask, n, MAX_APICS) | ||
35 | #define physids_shift_left(d, s, n) bitmap_shift_left((d).mask, (s).mask, n, MAX_APICS) | ||
36 | #define physids_coerce(map) ((map).mask[0]) | ||
37 | |||
38 | #define physids_promote(physids) \ | ||
39 | ({ \ | ||
40 | physid_mask_t __physid_mask = PHYSID_MASK_NONE; \ | ||
41 | __physid_mask.mask[0] = physids; \ | ||
42 | __physid_mask; \ | ||
43 | }) | ||
44 | |||
45 | #define physid_mask_of_physid(physid) \ | ||
46 | ({ \ | ||
47 | physid_mask_t __physid_mask = PHYSID_MASK_NONE; \ | ||
48 | physid_set(physid, __physid_mask); \ | ||
49 | __physid_mask; \ | ||
50 | }) | ||
51 | |||
52 | #define PHYSID_MASK_ALL { {[0 ... PHYSID_ARRAY_SIZE-1] = ~0UL} } | ||
53 | #define PHYSID_MASK_NONE { {[0 ... PHYSID_ARRAY_SIZE-1] = 0UL} } | ||
54 | |||
55 | extern physid_mask_t phys_cpu_present_map; | ||
56 | |||
57 | /* | ||
58 | * Some lowlevel functions might want to know about | ||
59 | * the real CPU ID <-> CPU # mapping. | ||
60 | */ | ||
61 | extern volatile int cpu_2_physid[NR_CPUS]; | ||
62 | #define cpu_to_physid(cpu_id) cpu_2_physid[cpu_id] | ||
63 | |||
64 | #define raw_smp_processor_id() (current_thread_info()->cpu) | ||
65 | |||
66 | extern cpumask_t cpu_callout_map; | ||
67 | |||
68 | static __inline__ int hard_smp_processor_id(void) | ||
69 | { | ||
70 | return (int)*(volatile long *)M32R_CPUID_PORTL; | ||
71 | } | ||
72 | |||
73 | static __inline__ int cpu_logical_map(int cpu) | ||
74 | { | ||
75 | return cpu; | ||
76 | } | ||
77 | |||
78 | static __inline__ int cpu_number_map(int cpu) | ||
79 | { | ||
80 | return cpu; | ||
81 | } | ||
82 | |||
83 | extern void smp_send_timer(void); | ||
84 | extern unsigned long send_IPI_mask_phys(const cpumask_t*, int, int); | ||
85 | |||
86 | extern void arch_send_call_function_single_ipi(int cpu); | ||
87 | extern void arch_send_call_function_ipi_mask(const struct cpumask *mask); | ||
88 | |||
89 | #endif /* not __ASSEMBLY__ */ | ||
90 | |||
91 | #define NO_PROC_ID (0xff) /* No processor magic marker */ | ||
92 | |||
93 | /* | ||
94 | * M32R-mp IPI | ||
95 | */ | ||
96 | #define RESCHEDULE_IPI (M32R_IRQ_IPI0-M32R_IRQ_IPI0) | ||
97 | #define INVALIDATE_TLB_IPI (M32R_IRQ_IPI1-M32R_IRQ_IPI0) | ||
98 | #define CALL_FUNCTION_IPI (M32R_IRQ_IPI2-M32R_IRQ_IPI0) | ||
99 | #define LOCAL_TIMER_IPI (M32R_IRQ_IPI3-M32R_IRQ_IPI0) | ||
100 | #define INVALIDATE_CACHE_IPI (M32R_IRQ_IPI4-M32R_IRQ_IPI0) | ||
101 | #define CPU_BOOT_IPI (M32R_IRQ_IPI5-M32R_IRQ_IPI0) | ||
102 | #define CALL_FUNC_SINGLE_IPI (M32R_IRQ_IPI6-M32R_IRQ_IPI0) | ||
103 | |||
104 | #define IPI_SHIFT (0) | ||
105 | #define NR_IPIS (8) | ||
106 | |||
107 | #else /* CONFIG_SMP */ | ||
108 | |||
109 | #define hard_smp_processor_id() 0 | ||
110 | |||
111 | #endif /* CONFIG_SMP */ | ||
112 | |||
113 | #endif /* _ASM_M32R_SMP_H */ | ||
diff --git a/arch/m32r/include/asm/spinlock.h b/arch/m32r/include/asm/spinlock.h deleted file mode 100644 index 0189f410f8f5..000000000000 --- a/arch/m32r/include/asm/spinlock.h +++ /dev/null | |||
@@ -1,308 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifndef _ASM_M32R_SPINLOCK_H | ||
3 | #define _ASM_M32R_SPINLOCK_H | ||
4 | |||
5 | /* | ||
6 | * linux/include/asm-m32r/spinlock.h | ||
7 | * | ||
8 | * M32R version: | ||
9 | * Copyright (C) 2001, 2002 Hitoshi Yamamoto | ||
10 | * Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org> | ||
11 | */ | ||
12 | |||
13 | #include <linux/compiler.h> | ||
14 | #include <linux/atomic.h> | ||
15 | #include <asm/dcache_clear.h> | ||
16 | #include <asm/page.h> | ||
17 | #include <asm/barrier.h> | ||
18 | #include <asm/processor.h> | ||
19 | |||
20 | /* | ||
21 | * Your basic SMP spinlocks, allowing only a single CPU anywhere | ||
22 | * | ||
23 | * (the type definitions are in asm/spinlock_types.h) | ||
24 | * | ||
25 | * Simple spin lock operations. There are two variants, one clears IRQ's | ||
26 | * on the local processor, one does not. | ||
27 | * | ||
28 | * We make no fairness assumptions. They have a cost. | ||
29 | */ | ||
30 | |||
31 | #define arch_spin_is_locked(x) (*(volatile int *)(&(x)->slock) <= 0) | ||
32 | |||
33 | /** | ||
34 | * arch_spin_trylock - Try spin lock and return a result | ||
35 | * @lock: Pointer to the lock variable | ||
36 | * | ||
37 | * arch_spin_trylock() tries to get the lock and returns a result. | ||
38 | * On the m32r, the result value is 1 (= Success) or 0 (= Failure). | ||
39 | */ | ||
40 | static inline int arch_spin_trylock(arch_spinlock_t *lock) | ||
41 | { | ||
42 | int oldval; | ||
43 | unsigned long tmp1, tmp2; | ||
44 | |||
45 | /* | ||
46 | * lock->slock : =1 : unlock | ||
47 | * : <=0 : lock | ||
48 | * { | ||
49 | * oldval = lock->slock; <--+ need atomic operation | ||
50 | * lock->slock = 0; <--+ | ||
51 | * } | ||
52 | */ | ||
53 | __asm__ __volatile__ ( | ||
54 | "# arch_spin_trylock \n\t" | ||
55 | "ldi %1, #0; \n\t" | ||
56 | "mvfc %2, psw; \n\t" | ||
57 | "clrpsw #0x40 -> nop; \n\t" | ||
58 | DCACHE_CLEAR("%0", "r6", "%3") | ||
59 | "lock %0, @%3; \n\t" | ||
60 | "unlock %1, @%3; \n\t" | ||
61 | "mvtc %2, psw; \n\t" | ||
62 | : "=&r" (oldval), "=&r" (tmp1), "=&r" (tmp2) | ||
63 | : "r" (&lock->slock) | ||
64 | : "memory" | ||
65 | #ifdef CONFIG_CHIP_M32700_TS1 | ||
66 | , "r6" | ||
67 | #endif /* CONFIG_CHIP_M32700_TS1 */ | ||
68 | ); | ||
69 | |||
70 | return (oldval > 0); | ||
71 | } | ||
72 | |||
73 | static inline void arch_spin_lock(arch_spinlock_t *lock) | ||
74 | { | ||
75 | unsigned long tmp0, tmp1; | ||
76 | |||
77 | /* | ||
78 | * lock->slock : =1 : unlock | ||
79 | * : <=0 : lock | ||
80 | * | ||
81 | * for ( ; ; ) { | ||
82 | * lock->slock -= 1; <-- need atomic operation | ||
83 | * if (lock->slock == 0) break; | ||
84 | * for ( ; lock->slock <= 0 ; ); | ||
85 | * } | ||
86 | */ | ||
87 | __asm__ __volatile__ ( | ||
88 | "# arch_spin_lock \n\t" | ||
89 | ".fillinsn \n" | ||
90 | "1: \n\t" | ||
91 | "mvfc %1, psw; \n\t" | ||
92 | "clrpsw #0x40 -> nop; \n\t" | ||
93 | DCACHE_CLEAR("%0", "r6", "%2") | ||
94 | "lock %0, @%2; \n\t" | ||
95 | "addi %0, #-1; \n\t" | ||
96 | "unlock %0, @%2; \n\t" | ||
97 | "mvtc %1, psw; \n\t" | ||
98 | "bltz %0, 2f; \n\t" | ||
99 | LOCK_SECTION_START(".balign 4 \n\t") | ||
100 | ".fillinsn \n" | ||
101 | "2: \n\t" | ||
102 | "ld %0, @%2; \n\t" | ||
103 | "bgtz %0, 1b; \n\t" | ||
104 | "bra 2b; \n\t" | ||
105 | LOCK_SECTION_END | ||
106 | : "=&r" (tmp0), "=&r" (tmp1) | ||
107 | : "r" (&lock->slock) | ||
108 | : "memory" | ||
109 | #ifdef CONFIG_CHIP_M32700_TS1 | ||
110 | , "r6" | ||
111 | #endif /* CONFIG_CHIP_M32700_TS1 */ | ||
112 | ); | ||
113 | } | ||
114 | |||
115 | static inline void arch_spin_unlock(arch_spinlock_t *lock) | ||
116 | { | ||
117 | mb(); | ||
118 | lock->slock = 1; | ||
119 | } | ||
120 | |||
121 | /* | ||
122 | * Read-write spinlocks, allowing multiple readers | ||
123 | * but only one writer. | ||
124 | * | ||
125 | * NOTE! it is quite common to have readers in interrupts | ||
126 | * but no interrupt writers. For those circumstances we | ||
127 | * can "mix" irq-safe locks - any writer needs to get a | ||
128 | * irq-safe write-lock, but readers can get non-irqsafe | ||
129 | * read-locks. | ||
130 | * | ||
131 | * On x86, we implement read-write locks as a 32-bit counter | ||
132 | * with the high bit (sign) being the "contended" bit. | ||
133 | * | ||
134 | * The inline assembly is non-obvious. Think about it. | ||
135 | * | ||
136 | * Changed to use the same technique as rw semaphores. See | ||
137 | * semaphore.h for details. -ben | ||
138 | */ | ||
139 | |||
140 | static inline void arch_read_lock(arch_rwlock_t *rw) | ||
141 | { | ||
142 | unsigned long tmp0, tmp1; | ||
143 | |||
144 | /* | ||
145 | * rw->lock : >0 : unlock | ||
146 | * : <=0 : lock | ||
147 | * | ||
148 | * for ( ; ; ) { | ||
149 | * rw->lock -= 1; <-- need atomic operation | ||
150 | * if (rw->lock >= 0) break; | ||
151 | * rw->lock += 1; <-- need atomic operation | ||
152 | * for ( ; rw->lock <= 0 ; ); | ||
153 | * } | ||
154 | */ | ||
155 | __asm__ __volatile__ ( | ||
156 | "# read_lock \n\t" | ||
157 | ".fillinsn \n" | ||
158 | "1: \n\t" | ||
159 | "mvfc %1, psw; \n\t" | ||
160 | "clrpsw #0x40 -> nop; \n\t" | ||
161 | DCACHE_CLEAR("%0", "r6", "%2") | ||
162 | "lock %0, @%2; \n\t" | ||
163 | "addi %0, #-1; \n\t" | ||
164 | "unlock %0, @%2; \n\t" | ||
165 | "mvtc %1, psw; \n\t" | ||
166 | "bltz %0, 2f; \n\t" | ||
167 | LOCK_SECTION_START(".balign 4 \n\t") | ||
168 | ".fillinsn \n" | ||
169 | "2: \n\t" | ||
170 | "clrpsw #0x40 -> nop; \n\t" | ||
171 | DCACHE_CLEAR("%0", "r6", "%2") | ||
172 | "lock %0, @%2; \n\t" | ||
173 | "addi %0, #1; \n\t" | ||
174 | "unlock %0, @%2; \n\t" | ||
175 | "mvtc %1, psw; \n\t" | ||
176 | ".fillinsn \n" | ||
177 | "3: \n\t" | ||
178 | "ld %0, @%2; \n\t" | ||
179 | "bgtz %0, 1b; \n\t" | ||
180 | "bra 3b; \n\t" | ||
181 | LOCK_SECTION_END | ||
182 | : "=&r" (tmp0), "=&r" (tmp1) | ||
183 | : "r" (&rw->lock) | ||
184 | : "memory" | ||
185 | #ifdef CONFIG_CHIP_M32700_TS1 | ||
186 | , "r6" | ||
187 | #endif /* CONFIG_CHIP_M32700_TS1 */ | ||
188 | ); | ||
189 | } | ||
190 | |||
191 | static inline void arch_write_lock(arch_rwlock_t *rw) | ||
192 | { | ||
193 | unsigned long tmp0, tmp1, tmp2; | ||
194 | |||
195 | /* | ||
196 | * rw->lock : =RW_LOCK_BIAS_STR : unlock | ||
197 | * : !=RW_LOCK_BIAS_STR : lock | ||
198 | * | ||
199 | * for ( ; ; ) { | ||
200 | * rw->lock -= RW_LOCK_BIAS_STR; <-- need atomic operation | ||
201 | * if (rw->lock == 0) break; | ||
202 | * rw->lock += RW_LOCK_BIAS_STR; <-- need atomic operation | ||
203 | * for ( ; rw->lock != RW_LOCK_BIAS_STR ; ) ; | ||
204 | * } | ||
205 | */ | ||
206 | __asm__ __volatile__ ( | ||
207 | "# write_lock \n\t" | ||
208 | "seth %1, #high(" RW_LOCK_BIAS_STR "); \n\t" | ||
209 | "or3 %1, %1, #low(" RW_LOCK_BIAS_STR "); \n\t" | ||
210 | ".fillinsn \n" | ||
211 | "1: \n\t" | ||
212 | "mvfc %2, psw; \n\t" | ||
213 | "clrpsw #0x40 -> nop; \n\t" | ||
214 | DCACHE_CLEAR("%0", "r7", "%3") | ||
215 | "lock %0, @%3; \n\t" | ||
216 | "sub %0, %1; \n\t" | ||
217 | "unlock %0, @%3; \n\t" | ||
218 | "mvtc %2, psw; \n\t" | ||
219 | "bnez %0, 2f; \n\t" | ||
220 | LOCK_SECTION_START(".balign 4 \n\t") | ||
221 | ".fillinsn \n" | ||
222 | "2: \n\t" | ||
223 | "clrpsw #0x40 -> nop; \n\t" | ||
224 | DCACHE_CLEAR("%0", "r7", "%3") | ||
225 | "lock %0, @%3; \n\t" | ||
226 | "add %0, %1; \n\t" | ||
227 | "unlock %0, @%3; \n\t" | ||
228 | "mvtc %2, psw; \n\t" | ||
229 | ".fillinsn \n" | ||
230 | "3: \n\t" | ||
231 | "ld %0, @%3; \n\t" | ||
232 | "beq %0, %1, 1b; \n\t" | ||
233 | "bra 3b; \n\t" | ||
234 | LOCK_SECTION_END | ||
235 | : "=&r" (tmp0), "=&r" (tmp1), "=&r" (tmp2) | ||
236 | : "r" (&rw->lock) | ||
237 | : "memory" | ||
238 | #ifdef CONFIG_CHIP_M32700_TS1 | ||
239 | , "r7" | ||
240 | #endif /* CONFIG_CHIP_M32700_TS1 */ | ||
241 | ); | ||
242 | } | ||
243 | |||
244 | static inline void arch_read_unlock(arch_rwlock_t *rw) | ||
245 | { | ||
246 | unsigned long tmp0, tmp1; | ||
247 | |||
248 | __asm__ __volatile__ ( | ||
249 | "# read_unlock \n\t" | ||
250 | "mvfc %1, psw; \n\t" | ||
251 | "clrpsw #0x40 -> nop; \n\t" | ||
252 | DCACHE_CLEAR("%0", "r6", "%2") | ||
253 | "lock %0, @%2; \n\t" | ||
254 | "addi %0, #1; \n\t" | ||
255 | "unlock %0, @%2; \n\t" | ||
256 | "mvtc %1, psw; \n\t" | ||
257 | : "=&r" (tmp0), "=&r" (tmp1) | ||
258 | : "r" (&rw->lock) | ||
259 | : "memory" | ||
260 | #ifdef CONFIG_CHIP_M32700_TS1 | ||
261 | , "r6" | ||
262 | #endif /* CONFIG_CHIP_M32700_TS1 */ | ||
263 | ); | ||
264 | } | ||
265 | |||
266 | static inline void arch_write_unlock(arch_rwlock_t *rw) | ||
267 | { | ||
268 | unsigned long tmp0, tmp1, tmp2; | ||
269 | |||
270 | __asm__ __volatile__ ( | ||
271 | "# write_unlock \n\t" | ||
272 | "seth %1, #high(" RW_LOCK_BIAS_STR "); \n\t" | ||
273 | "or3 %1, %1, #low(" RW_LOCK_BIAS_STR "); \n\t" | ||
274 | "mvfc %2, psw; \n\t" | ||
275 | "clrpsw #0x40 -> nop; \n\t" | ||
276 | DCACHE_CLEAR("%0", "r7", "%3") | ||
277 | "lock %0, @%3; \n\t" | ||
278 | "add %0, %1; \n\t" | ||
279 | "unlock %0, @%3; \n\t" | ||
280 | "mvtc %2, psw; \n\t" | ||
281 | : "=&r" (tmp0), "=&r" (tmp1), "=&r" (tmp2) | ||
282 | : "r" (&rw->lock) | ||
283 | : "memory" | ||
284 | #ifdef CONFIG_CHIP_M32700_TS1 | ||
285 | , "r7" | ||
286 | #endif /* CONFIG_CHIP_M32700_TS1 */ | ||
287 | ); | ||
288 | } | ||
289 | |||
290 | static inline int arch_read_trylock(arch_rwlock_t *lock) | ||
291 | { | ||
292 | atomic_t *count = (atomic_t*)lock; | ||
293 | if (atomic_dec_return(count) >= 0) | ||
294 | return 1; | ||
295 | atomic_inc(count); | ||
296 | return 0; | ||
297 | } | ||
298 | |||
299 | static inline int arch_write_trylock(arch_rwlock_t *lock) | ||
300 | { | ||
301 | atomic_t *count = (atomic_t *)lock; | ||
302 | if (atomic_sub_and_test(RW_LOCK_BIAS, count)) | ||
303 | return 1; | ||
304 | atomic_add(RW_LOCK_BIAS, count); | ||
305 | return 0; | ||
306 | } | ||
307 | |||
308 | #endif /* _ASM_M32R_SPINLOCK_H */ | ||
diff --git a/arch/m32r/include/asm/spinlock_types.h b/arch/m32r/include/asm/spinlock_types.h deleted file mode 100644 index bb0d17b64198..000000000000 --- a/arch/m32r/include/asm/spinlock_types.h +++ /dev/null | |||
@@ -1,24 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifndef _ASM_M32R_SPINLOCK_TYPES_H | ||
3 | #define _ASM_M32R_SPINLOCK_TYPES_H | ||
4 | |||
5 | #ifndef __LINUX_SPINLOCK_TYPES_H | ||
6 | # error "please don't include this file directly" | ||
7 | #endif | ||
8 | |||
9 | typedef struct { | ||
10 | volatile int slock; | ||
11 | } arch_spinlock_t; | ||
12 | |||
13 | #define __ARCH_SPIN_LOCK_UNLOCKED { 1 } | ||
14 | |||
15 | typedef struct { | ||
16 | volatile int lock; | ||
17 | } arch_rwlock_t; | ||
18 | |||
19 | #define RW_LOCK_BIAS 0x01000000 | ||
20 | #define RW_LOCK_BIAS_STR "0x01000000" | ||
21 | |||
22 | #define __ARCH_RW_LOCK_UNLOCKED { RW_LOCK_BIAS } | ||
23 | |||
24 | #endif /* _ASM_M32R_SPINLOCK_TYPES_H */ | ||
diff --git a/arch/m32r/include/asm/string.h b/arch/m32r/include/asm/string.h deleted file mode 100644 index a9ea3b6c3e5a..000000000000 --- a/arch/m32r/include/asm/string.h +++ /dev/null | |||
@@ -1,14 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifndef _ASM_M32R_STRING_H | ||
3 | #define _ASM_M32R_STRING_H | ||
4 | |||
5 | #define __HAVE_ARCH_STRLEN | ||
6 | extern size_t strlen(const char * s); | ||
7 | |||
8 | #define __HAVE_ARCH_MEMCPY | ||
9 | extern void *memcpy(void *__to, __const__ void *__from, size_t __n); | ||
10 | |||
11 | #define __HAVE_ARCH_MEMSET | ||
12 | extern void *memset(void *__s, int __c, size_t __count); | ||
13 | |||
14 | #endif /* _ASM_M32R_STRING_H */ | ||
diff --git a/arch/m32r/include/asm/switch_to.h b/arch/m32r/include/asm/switch_to.h deleted file mode 100644 index 4b262f7a8fe9..000000000000 --- a/arch/m32r/include/asm/switch_to.h +++ /dev/null | |||
@@ -1,51 +0,0 @@ | |||
1 | /* | ||
2 | * This file is subject to the terms and conditions of the GNU General Public | ||
3 | * License. See the file "COPYING" in the main directory of this archive | ||
4 | * for more details. | ||
5 | * | ||
6 | * Copyright (C) 2001 Hiroyuki Kondo, Hirokazu Takata, and Hitoshi Yamamoto | ||
7 | * Copyright (C) 2004, 2006 Hirokazu Takata <takata at linux-m32r.org> | ||
8 | */ | ||
9 | #ifndef _ASM_M32R_SWITCH_TO_H | ||
10 | #define _ASM_M32R_SWITCH_TO_H | ||
11 | |||
12 | /* | ||
13 | * switch_to(prev, next) should switch from task `prev' to `next' | ||
14 | * `prev' will never be the same as `next'. | ||
15 | * | ||
16 | * `next' and `prev' should be struct task_struct, but it isn't always defined | ||
17 | */ | ||
18 | |||
19 | #if defined(CONFIG_FRAME_POINTER) || \ | ||
20 | !defined(CONFIG_SCHED_OMIT_FRAME_POINTER) | ||
21 | #define M32R_PUSH_FP " push fp\n" | ||
22 | #define M32R_POP_FP " pop fp\n" | ||
23 | #else | ||
24 | #define M32R_PUSH_FP "" | ||
25 | #define M32R_POP_FP "" | ||
26 | #endif | ||
27 | |||
28 | #define switch_to(prev, next, last) do { \ | ||
29 | __asm__ __volatile__ ( \ | ||
30 | " seth lr, #high(1f) \n" \ | ||
31 | " or3 lr, lr, #low(1f) \n" \ | ||
32 | " st lr, @%4 ; store old LR \n" \ | ||
33 | " ld lr, @%5 ; load new LR \n" \ | ||
34 | M32R_PUSH_FP \ | ||
35 | " st sp, @%2 ; store old SP \n" \ | ||
36 | " ld sp, @%3 ; load new SP \n" \ | ||
37 | " push %1 ; store `prev' on new stack \n" \ | ||
38 | " jmp lr \n" \ | ||
39 | " .fillinsn \n" \ | ||
40 | "1: \n" \ | ||
41 | " pop %0 ; restore `__last' from new stack \n" \ | ||
42 | M32R_POP_FP \ | ||
43 | : "=r" (last) \ | ||
44 | : "0" (prev), \ | ||
45 | "r" (&(prev->thread.sp)), "r" (&(next->thread.sp)), \ | ||
46 | "r" (&(prev->thread.lr)), "r" (&(next->thread.lr)) \ | ||
47 | : "memory", "lr" \ | ||
48 | ); \ | ||
49 | } while(0) | ||
50 | |||
51 | #endif /* _ASM_M32R_SWITCH_TO_H */ | ||
diff --git a/arch/m32r/include/asm/syscall.h b/arch/m32r/include/asm/syscall.h deleted file mode 100644 index 22c8516d3c18..000000000000 --- a/arch/m32r/include/asm/syscall.h +++ /dev/null | |||
@@ -1,9 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifndef _ASM_M32R_SYSCALL_H | ||
3 | #define _ASM_M32R_SYSCALL_H | ||
4 | |||
5 | /* Definitions for the system call vector. */ | ||
6 | #define SYSCALL_VECTOR "2" | ||
7 | #define SYSCALL_VECTOR_ADDRESS "0xa0" | ||
8 | |||
9 | #endif /* _ASM_M32R_SYSCALL_H */ | ||
diff --git a/arch/m32r/include/asm/termios.h b/arch/m32r/include/asm/termios.h deleted file mode 100644 index 40274b89cea5..000000000000 --- a/arch/m32r/include/asm/termios.h +++ /dev/null | |||
@@ -1,52 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifndef _M32R_TERMIOS_H | ||
3 | #define _M32R_TERMIOS_H | ||
4 | |||
5 | #include <linux/module.h> | ||
6 | #include <uapi/asm/termios.h> | ||
7 | |||
8 | /* intr=^C quit=^\ erase=del kill=^U | ||
9 | eof=^D vtime=\0 vmin=\1 sxtc=\0 | ||
10 | start=^Q stop=^S susp=^Z eol=\0 | ||
11 | reprint=^R discard=^U werase=^W lnext=^V | ||
12 | eol2=\0 | ||
13 | */ | ||
14 | #define INIT_C_CC "\003\034\177\025\004\0\1\0\021\023\032\0\022\017\027\026\0" | ||
15 | |||
16 | /* | ||
17 | * Translate a "termio" structure into a "termios". Ugh. | ||
18 | */ | ||
19 | #define SET_LOW_TERMIOS_BITS(termios, termio, x) { \ | ||
20 | unsigned short __tmp; \ | ||
21 | get_user(__tmp,&(termio)->x); \ | ||
22 | *(unsigned short *) &(termios)->x = __tmp; \ | ||
23 | } | ||
24 | |||
25 | #define user_termio_to_kernel_termios(termios, termio) \ | ||
26 | ({ \ | ||
27 | SET_LOW_TERMIOS_BITS(termios, termio, c_iflag); \ | ||
28 | SET_LOW_TERMIOS_BITS(termios, termio, c_oflag); \ | ||
29 | SET_LOW_TERMIOS_BITS(termios, termio, c_cflag); \ | ||
30 | SET_LOW_TERMIOS_BITS(termios, termio, c_lflag); \ | ||
31 | copy_from_user((termios)->c_cc, (termio)->c_cc, NCC); \ | ||
32 | }) | ||
33 | |||
34 | /* | ||
35 | * Translate a "termios" structure into a "termio". Ugh. | ||
36 | */ | ||
37 | #define kernel_termios_to_user_termio(termio, termios) \ | ||
38 | ({ \ | ||
39 | put_user((termios)->c_iflag, &(termio)->c_iflag); \ | ||
40 | put_user((termios)->c_oflag, &(termio)->c_oflag); \ | ||
41 | put_user((termios)->c_cflag, &(termio)->c_cflag); \ | ||
42 | put_user((termios)->c_lflag, &(termio)->c_lflag); \ | ||
43 | put_user((termios)->c_line, &(termio)->c_line); \ | ||
44 | copy_to_user((termio)->c_cc, (termios)->c_cc, NCC); \ | ||
45 | }) | ||
46 | |||
47 | #define user_termios_to_kernel_termios(k, u) copy_from_user(k, u, sizeof(struct termios2)) | ||
48 | #define kernel_termios_to_user_termios(u, k) copy_to_user(u, k, sizeof(struct termios2)) | ||
49 | #define user_termios_to_kernel_termios_1(k, u) copy_from_user(k, u, sizeof(struct termios)) | ||
50 | #define kernel_termios_to_user_termios_1(u, k) copy_to_user(u, k, sizeof(struct termios)) | ||
51 | |||
52 | #endif /* _M32R_TERMIOS_H */ | ||
diff --git a/arch/m32r/include/asm/thread_info.h b/arch/m32r/include/asm/thread_info.h deleted file mode 100644 index ba00f1032587..000000000000 --- a/arch/m32r/include/asm/thread_info.h +++ /dev/null | |||
@@ -1,126 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifndef _ASM_M32R_THREAD_INFO_H | ||
3 | #define _ASM_M32R_THREAD_INFO_H | ||
4 | |||
5 | /* thread_info.h: m32r low-level thread information | ||
6 | * | ||
7 | * Copyright (C) 2002 David Howells (dhowells@redhat.com) | ||
8 | * - Incorporating suggestions made by Linus Torvalds and Dave Miller | ||
9 | * Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org> | ||
10 | */ | ||
11 | |||
12 | #ifdef __KERNEL__ | ||
13 | |||
14 | #ifndef __ASSEMBLY__ | ||
15 | #include <asm/processor.h> | ||
16 | #endif | ||
17 | |||
18 | /* | ||
19 | * low level task data that entry.S needs immediate access to | ||
20 | * - this struct should fit entirely inside of one cache line | ||
21 | * - this struct shares the supervisor stack pages | ||
22 | * - if the contents of this structure are changed, the assembly constants must also be changed | ||
23 | */ | ||
24 | #ifndef __ASSEMBLY__ | ||
25 | |||
26 | struct thread_info { | ||
27 | struct task_struct *task; /* main task structure */ | ||
28 | unsigned long flags; /* low level flags */ | ||
29 | unsigned long status; /* thread-synchronous flags */ | ||
30 | __u32 cpu; /* current CPU */ | ||
31 | int preempt_count; /* 0 => preemptable, <0 => BUG */ | ||
32 | |||
33 | mm_segment_t addr_limit; /* thread address space: | ||
34 | 0-0xBFFFFFFF for user-thread | ||
35 | 0-0xFFFFFFFF for kernel-thread | ||
36 | */ | ||
37 | |||
38 | __u8 supervisor_stack[0]; | ||
39 | }; | ||
40 | |||
41 | #endif /* !__ASSEMBLY__ */ | ||
42 | |||
43 | #define THREAD_SIZE (PAGE_SIZE << 1) | ||
44 | #define THREAD_SIZE_ORDER 1 | ||
45 | /* | ||
46 | * macros/functions for gaining access to the thread information structure | ||
47 | */ | ||
48 | #ifndef __ASSEMBLY__ | ||
49 | |||
50 | #define INIT_THREAD_INFO(tsk) \ | ||
51 | { \ | ||
52 | .task = &tsk, \ | ||
53 | .flags = 0, \ | ||
54 | .cpu = 0, \ | ||
55 | .preempt_count = INIT_PREEMPT_COUNT, \ | ||
56 | .addr_limit = KERNEL_DS, \ | ||
57 | } | ||
58 | |||
59 | /* how to get the thread information struct from C */ | ||
60 | static inline struct thread_info *current_thread_info(void) | ||
61 | { | ||
62 | struct thread_info *ti; | ||
63 | |||
64 | __asm__ __volatile__ ( | ||
65 | "ldi %0, #%1 \n\t" | ||
66 | "and %0, sp \n\t" | ||
67 | : "=r" (ti) : "i" (~(THREAD_SIZE - 1)) | ||
68 | ); | ||
69 | |||
70 | return ti; | ||
71 | } | ||
72 | |||
73 | #define TI_FLAG_FAULT_CODE_SHIFT 28 | ||
74 | |||
75 | static inline void set_thread_fault_code(unsigned int val) | ||
76 | { | ||
77 | struct thread_info *ti = current_thread_info(); | ||
78 | ti->flags = (ti->flags & (~0 >> (32 - TI_FLAG_FAULT_CODE_SHIFT))) | ||
79 | | (val << TI_FLAG_FAULT_CODE_SHIFT); | ||
80 | } | ||
81 | |||
82 | static inline unsigned int get_thread_fault_code(void) | ||
83 | { | ||
84 | struct thread_info *ti = current_thread_info(); | ||
85 | return ti->flags >> TI_FLAG_FAULT_CODE_SHIFT; | ||
86 | } | ||
87 | |||
88 | #endif | ||
89 | |||
90 | /* | ||
91 | * thread information flags | ||
92 | * - these are process state flags that various assembly files may need to access | ||
93 | * - pending work-to-be-done flags are in LSW | ||
94 | * - other flags in MSW | ||
95 | */ | ||
96 | #define TIF_SYSCALL_TRACE 0 /* syscall trace active */ | ||
97 | #define TIF_SIGPENDING 1 /* signal pending */ | ||
98 | #define TIF_NEED_RESCHED 2 /* rescheduling necessary */ | ||
99 | #define TIF_SINGLESTEP 3 /* restore singlestep on return to user mode */ | ||
100 | #define TIF_NOTIFY_RESUME 5 /* callback before returning to user */ | ||
101 | #define TIF_RESTORE_SIGMASK 8 /* restore signal mask in do_signal() */ | ||
102 | #define TIF_USEDFPU 16 /* FPU was used by this task this quantum (SMP) */ | ||
103 | #define TIF_MEMDIE 18 /* is terminating due to OOM killer */ | ||
104 | |||
105 | #define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE) | ||
106 | #define _TIF_SIGPENDING (1<<TIF_SIGPENDING) | ||
107 | #define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED) | ||
108 | #define _TIF_SINGLESTEP (1<<TIF_SINGLESTEP) | ||
109 | #define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME) | ||
110 | #define _TIF_USEDFPU (1<<TIF_USEDFPU) | ||
111 | |||
112 | #define _TIF_WORK_MASK (_TIF_SIGPENDING | _TIF_NEED_RESCHED | _TIF_NOTIFY_RESUME) | ||
113 | #define _TIF_ALLWORK_MASK (_TIF_WORK_MASK | _TIF_SYSCALL_TRACE) | ||
114 | |||
115 | /* | ||
116 | * Thread-synchronous status. | ||
117 | * | ||
118 | * This is different from the flags in that nobody else | ||
119 | * ever touches our thread-synchronous status, so we don't | ||
120 | * have to worry about atomic accesses. | ||
121 | */ | ||
122 | #define TS_USEDFPU 0x0001 /* FPU was used by this task this quantum (SMP) */ | ||
123 | |||
124 | #endif /* __KERNEL__ */ | ||
125 | |||
126 | #endif /* _ASM_M32R_THREAD_INFO_H */ | ||
diff --git a/arch/m32r/include/asm/timex.h b/arch/m32r/include/asm/timex.h deleted file mode 100644 index a4f9f852d9e6..000000000000 --- a/arch/m32r/include/asm/timex.h +++ /dev/null | |||
@@ -1,28 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifndef _ASM_M32R_TIMEX_H | ||
3 | #define _ASM_M32R_TIMEX_H | ||
4 | |||
5 | /* | ||
6 | * linux/include/asm-m32r/timex.h | ||
7 | * | ||
8 | * m32r architecture timex specifications | ||
9 | */ | ||
10 | |||
11 | #define CLOCK_TICK_RATE (CONFIG_BUS_CLOCK / CONFIG_TIMER_DIVIDE) | ||
12 | #define CLOCK_TICK_FACTOR 20 /* Factor of both 1000000 and CLOCK_TICK_RATE */ | ||
13 | |||
14 | #ifdef __KERNEL__ | ||
15 | /* | ||
16 | * Standard way to access the cycle counter. | ||
17 | * Currently only used on SMP. | ||
18 | */ | ||
19 | |||
20 | typedef unsigned long long cycles_t; | ||
21 | |||
22 | static __inline__ cycles_t get_cycles (void) | ||
23 | { | ||
24 | return 0; | ||
25 | } | ||
26 | #endif /* __KERNEL__ */ | ||
27 | |||
28 | #endif /* _ASM_M32R_TIMEX_H */ | ||
diff --git a/arch/m32r/include/asm/tlb.h b/arch/m32r/include/asm/tlb.h deleted file mode 100644 index 3576f88b6ea4..000000000000 --- a/arch/m32r/include/asm/tlb.h +++ /dev/null | |||
@@ -1,21 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifndef _M32R_TLB_H | ||
3 | #define _M32R_TLB_H | ||
4 | |||
5 | /* | ||
6 | * x86 doesn't need any special per-pte or | ||
7 | * per-vma handling.. | ||
8 | */ | ||
9 | #define tlb_start_vma(tlb, vma) do { } while (0) | ||
10 | #define tlb_end_vma(tlb, vma) do { } while (0) | ||
11 | #define __tlb_remove_tlb_entry(tlb, pte, address) do { } while (0) | ||
12 | |||
13 | /* | ||
14 | * .. because we flush the whole mm when it | ||
15 | * fills up. | ||
16 | */ | ||
17 | #define tlb_flush(tlb) flush_tlb_mm((tlb)->mm) | ||
18 | |||
19 | #include <asm-generic/tlb.h> | ||
20 | |||
21 | #endif /* _M32R_TLB_H */ | ||
diff --git a/arch/m32r/include/asm/tlbflush.h b/arch/m32r/include/asm/tlbflush.h deleted file mode 100644 index f6c7237316d0..000000000000 --- a/arch/m32r/include/asm/tlbflush.h +++ /dev/null | |||
@@ -1,98 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifndef _ASM_M32R_TLBFLUSH_H | ||
3 | #define _ASM_M32R_TLBFLUSH_H | ||
4 | |||
5 | #include <asm/m32r.h> | ||
6 | |||
7 | /* | ||
8 | * TLB flushing: | ||
9 | * | ||
10 | * - flush_tlb() flushes the current mm struct TLBs | ||
11 | * - flush_tlb_all() flushes all processes TLBs | ||
12 | * - flush_tlb_mm(mm) flushes the specified mm context TLB's | ||
13 | * - flush_tlb_page(vma, vmaddr) flushes one page | ||
14 | * - flush_tlb_range(vma, start, end) flushes a range of pages | ||
15 | * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages | ||
16 | */ | ||
17 | |||
18 | extern void local_flush_tlb_all(void); | ||
19 | extern void local_flush_tlb_mm(struct mm_struct *); | ||
20 | extern void local_flush_tlb_page(struct vm_area_struct *, unsigned long); | ||
21 | extern void local_flush_tlb_range(struct vm_area_struct *, unsigned long, | ||
22 | unsigned long); | ||
23 | |||
24 | #ifndef CONFIG_SMP | ||
25 | #ifdef CONFIG_MMU | ||
26 | #define flush_tlb_all() local_flush_tlb_all() | ||
27 | #define flush_tlb_mm(mm) local_flush_tlb_mm(mm) | ||
28 | #define flush_tlb_page(vma, page) local_flush_tlb_page(vma, page) | ||
29 | #define flush_tlb_range(vma, start, end) \ | ||
30 | local_flush_tlb_range(vma, start, end) | ||
31 | #define flush_tlb_kernel_range(start, end) local_flush_tlb_all() | ||
32 | #else /* CONFIG_MMU */ | ||
33 | #define flush_tlb_all() do { } while (0) | ||
34 | #define flush_tlb_mm(mm) do { } while (0) | ||
35 | #define flush_tlb_page(vma, vmaddr) do { } while (0) | ||
36 | #define flush_tlb_range(vma, start, end) do { } while (0) | ||
37 | #endif /* CONFIG_MMU */ | ||
38 | #else /* CONFIG_SMP */ | ||
39 | extern void smp_flush_tlb_all(void); | ||
40 | extern void smp_flush_tlb_mm(struct mm_struct *); | ||
41 | extern void smp_flush_tlb_page(struct vm_area_struct *, unsigned long); | ||
42 | extern void smp_flush_tlb_range(struct vm_area_struct *, unsigned long, | ||
43 | unsigned long); | ||
44 | |||
45 | #define flush_tlb_all() smp_flush_tlb_all() | ||
46 | #define flush_tlb_mm(mm) smp_flush_tlb_mm(mm) | ||
47 | #define flush_tlb_page(vma, page) smp_flush_tlb_page(vma, page) | ||
48 | #define flush_tlb_range(vma, start, end) \ | ||
49 | smp_flush_tlb_range(vma, start, end) | ||
50 | #define flush_tlb_kernel_range(start, end) smp_flush_tlb_all() | ||
51 | #endif /* CONFIG_SMP */ | ||
52 | |||
53 | static __inline__ void __flush_tlb_page(unsigned long page) | ||
54 | { | ||
55 | unsigned int tmpreg0, tmpreg1, tmpreg2; | ||
56 | |||
57 | __asm__ __volatile__ ( | ||
58 | "seth %0, #high(%4) \n\t" | ||
59 | "st %3, @(%5, %0) \n\t" | ||
60 | "ldi %1, #1 \n\t" | ||
61 | "st %1, @(%6, %0) \n\t" | ||
62 | "add3 %1, %0, %7 \n\t" | ||
63 | ".fillinsn \n" | ||
64 | "1: \n\t" | ||
65 | "ld %2, @(%6, %0) \n\t" | ||
66 | "bnez %2, 1b \n\t" | ||
67 | "ld %0, @%1+ \n\t" | ||
68 | "ld %1, @%1 \n\t" | ||
69 | "st %2, @+%0 \n\t" | ||
70 | "st %2, @+%1 \n\t" | ||
71 | : "=&r" (tmpreg0), "=&r" (tmpreg1), "=&r" (tmpreg2) | ||
72 | : "r" (page), "i" (MMU_REG_BASE), "i" (MSVA_offset), | ||
73 | "i" (MTOP_offset), "i" (MIDXI_offset) | ||
74 | : "memory" | ||
75 | ); | ||
76 | } | ||
77 | |||
78 | static __inline__ void __flush_tlb_all(void) | ||
79 | { | ||
80 | unsigned int tmpreg0, tmpreg1; | ||
81 | |||
82 | __asm__ __volatile__ ( | ||
83 | "seth %0, #high(%2) \n\t" | ||
84 | "or3 %0, %0, #low(%2) \n\t" | ||
85 | "ldi %1, #0xc \n\t" | ||
86 | "st %1, @%0 \n\t" | ||
87 | ".fillinsn \n" | ||
88 | "1: \n\t" | ||
89 | "ld %1, @%0 \n\t" | ||
90 | "bnez %1, 1b \n\t" | ||
91 | : "=&r" (tmpreg0), "=&r" (tmpreg1) | ||
92 | : "i" (MTOP) : "memory" | ||
93 | ); | ||
94 | } | ||
95 | |||
96 | extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t *); | ||
97 | |||
98 | #endif /* _ASM_M32R_TLBFLUSH_H */ | ||
diff --git a/arch/m32r/include/asm/topology.h b/arch/m32r/include/asm/topology.h deleted file mode 100644 index ee79404e8878..000000000000 --- a/arch/m32r/include/asm/topology.h +++ /dev/null | |||
@@ -1,7 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifndef _ASM_M32R_TOPOLOGY_H | ||
3 | #define _ASM_M32R_TOPOLOGY_H | ||
4 | |||
5 | #include <asm-generic/topology.h> | ||
6 | |||
7 | #endif /* _ASM_M32R_TOPOLOGY_H */ | ||
diff --git a/arch/m32r/include/asm/types.h b/arch/m32r/include/asm/types.h deleted file mode 100644 index fce0bf60536c..000000000000 --- a/arch/m32r/include/asm/types.h +++ /dev/null | |||
@@ -1,13 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifndef _ASM_M32R_TYPES_H | ||
3 | #define _ASM_M32R_TYPES_H | ||
4 | |||
5 | #include <uapi/asm/types.h> | ||
6 | |||
7 | /* | ||
8 | * These aren't exported outside the kernel to avoid name space clashes | ||
9 | */ | ||
10 | |||
11 | #define BITS_PER_LONG 32 | ||
12 | |||
13 | #endif /* _ASM_M32R_TYPES_H */ | ||
diff --git a/arch/m32r/include/asm/uaccess.h b/arch/m32r/include/asm/uaccess.h deleted file mode 100644 index 9d89bc3d8181..000000000000 --- a/arch/m32r/include/asm/uaccess.h +++ /dev/null | |||
@@ -1,515 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifndef _ASM_M32R_UACCESS_H | ||
3 | #define _ASM_M32R_UACCESS_H | ||
4 | |||
5 | /* | ||
6 | * linux/include/asm-m32r/uaccess.h | ||
7 | * | ||
8 | * M32R version. | ||
9 | * Copyright (C) 2004, 2006 Hirokazu Takata <takata at linux-m32r.org> | ||
10 | */ | ||
11 | |||
12 | /* | ||
13 | * User space memory access functions | ||
14 | */ | ||
15 | #include <asm/page.h> | ||
16 | #include <asm/setup.h> | ||
17 | #include <linux/prefetch.h> | ||
18 | |||
19 | /* | ||
20 | * The fs value determines whether argument validity checking should be | ||
21 | * performed or not. If get_fs() == USER_DS, checking is performed, with | ||
22 | * get_fs() == KERNEL_DS, checking is bypassed. | ||
23 | * | ||
24 | * For historical reasons, these macros are grossly misnamed. | ||
25 | */ | ||
26 | |||
27 | #define MAKE_MM_SEG(s) ((mm_segment_t) { (s) }) | ||
28 | |||
29 | #ifdef CONFIG_MMU | ||
30 | |||
31 | #define KERNEL_DS MAKE_MM_SEG(0xFFFFFFFF) | ||
32 | #define USER_DS MAKE_MM_SEG(PAGE_OFFSET) | ||
33 | #define get_ds() (KERNEL_DS) | ||
34 | #define get_fs() (current_thread_info()->addr_limit) | ||
35 | #define set_fs(x) (current_thread_info()->addr_limit = (x)) | ||
36 | |||
37 | #else /* not CONFIG_MMU */ | ||
38 | |||
39 | #define KERNEL_DS MAKE_MM_SEG(0xFFFFFFFF) | ||
40 | #define USER_DS MAKE_MM_SEG(0xFFFFFFFF) | ||
41 | #define get_ds() (KERNEL_DS) | ||
42 | |||
43 | static inline mm_segment_t get_fs(void) | ||
44 | { | ||
45 | return USER_DS; | ||
46 | } | ||
47 | |||
48 | static inline void set_fs(mm_segment_t s) | ||
49 | { | ||
50 | } | ||
51 | |||
52 | #endif /* not CONFIG_MMU */ | ||
53 | |||
54 | #define segment_eq(a, b) ((a).seg == (b).seg) | ||
55 | |||
56 | #define __addr_ok(addr) \ | ||
57 | ((unsigned long)(addr) < (current_thread_info()->addr_limit.seg)) | ||
58 | |||
59 | /* | ||
60 | * Test whether a block of memory is a valid user space address. | ||
61 | * Returns 0 if the range is valid, nonzero otherwise. | ||
62 | * | ||
63 | * This is equivalent to the following test: | ||
64 | * (u33)addr + (u33)size >= (u33)current->addr_limit.seg | ||
65 | * | ||
66 | * This needs 33-bit arithmetic. We have a carry... | ||
67 | */ | ||
68 | #define __range_ok(addr, size) ({ \ | ||
69 | unsigned long flag, roksum; \ | ||
70 | __chk_user_ptr(addr); \ | ||
71 | asm ( \ | ||
72 | " cmpu %1, %1 ; clear cbit\n" \ | ||
73 | " addx %1, %3 ; set cbit if overflow\n" \ | ||
74 | " subx %0, %0\n" \ | ||
75 | " cmpu %4, %1\n" \ | ||
76 | " subx %0, %5\n" \ | ||
77 | : "=&r" (flag), "=r" (roksum) \ | ||
78 | : "1" (addr), "r" ((int)(size)), \ | ||
79 | "r" (current_thread_info()->addr_limit.seg), "r" (0) \ | ||
80 | : "cbit" ); \ | ||
81 | flag; }) | ||
82 | |||
83 | /** | ||
84 | * access_ok: - Checks if a user space pointer is valid | ||
85 | * @type: Type of access: %VERIFY_READ or %VERIFY_WRITE. Note that | ||
86 | * %VERIFY_WRITE is a superset of %VERIFY_READ - if it is safe | ||
87 | * to write to a block, it is always safe to read from it. | ||
88 | * @addr: User space pointer to start of block to check | ||
89 | * @size: Size of block to check | ||
90 | * | ||
91 | * Context: User context only. This function may sleep if pagefaults are | ||
92 | * enabled. | ||
93 | * | ||
94 | * Checks if a pointer to a block of memory in user space is valid. | ||
95 | * | ||
96 | * Returns true (nonzero) if the memory block may be valid, false (zero) | ||
97 | * if it is definitely invalid. | ||
98 | * | ||
99 | * Note that, depending on architecture, this function probably just | ||
100 | * checks that the pointer is in the user space range - after calling | ||
101 | * this function, memory access functions may still return -EFAULT. | ||
102 | */ | ||
103 | #ifdef CONFIG_MMU | ||
104 | #define access_ok(type, addr, size) (likely(__range_ok(addr, size) == 0)) | ||
105 | #else | ||
106 | static inline int access_ok(int type, const void *addr, unsigned long size) | ||
107 | { | ||
108 | unsigned long val = (unsigned long)addr; | ||
109 | |||
110 | return ((val >= memory_start) && ((val + size) < memory_end)); | ||
111 | } | ||
112 | #endif /* CONFIG_MMU */ | ||
113 | |||
114 | #include <asm/extable.h> | ||
115 | |||
116 | /* | ||
117 | * These are the main single-value transfer routines. They automatically | ||
118 | * use the right size if we just have the right pointer type. | ||
119 | * | ||
120 | * This gets kind of ugly. We want to return _two_ values in "get_user()" | ||
121 | * and yet we don't want to do any pointers, because that is too much | ||
122 | * of a performance impact. Thus we have a few rather ugly macros here, | ||
123 | * and hide all the uglyness from the user. | ||
124 | * | ||
125 | * The "__xxx" versions of the user access functions are versions that | ||
126 | * do not verify the address space, that must have been done previously | ||
127 | * with a separate "access_ok()" call (this is used when we do multiple | ||
128 | * accesses to the same area of user memory). | ||
129 | */ | ||
130 | |||
131 | /* Careful: we have to cast the result to the type of the pointer for sign | ||
132 | reasons */ | ||
133 | /** | ||
134 | * get_user: - Get a simple variable from user space. | ||
135 | * @x: Variable to store result. | ||
136 | * @ptr: Source address, in user space. | ||
137 | * | ||
138 | * Context: User context only. This function may sleep if pagefaults are | ||
139 | * enabled. | ||
140 | * | ||
141 | * This macro copies a single simple variable from user space to kernel | ||
142 | * space. It supports simple types like char and int, but not larger | ||
143 | * data types like structures or arrays. | ||
144 | * | ||
145 | * @ptr must have pointer-to-simple-variable type, and the result of | ||
146 | * dereferencing @ptr must be assignable to @x without a cast. | ||
147 | * | ||
148 | * Returns zero on success, or -EFAULT on error. | ||
149 | * On error, the variable @x is set to zero. | ||
150 | */ | ||
151 | #define get_user(x, ptr) \ | ||
152 | __get_user_check((x), (ptr), sizeof(*(ptr))) | ||
153 | |||
154 | /** | ||
155 | * put_user: - Write a simple value into user space. | ||
156 | * @x: Value to copy to user space. | ||
157 | * @ptr: Destination address, in user space. | ||
158 | * | ||
159 | * Context: User context only. This function may sleep if pagefaults are | ||
160 | * enabled. | ||
161 | * | ||
162 | * This macro copies a single simple value from kernel space to user | ||
163 | * space. It supports simple types like char and int, but not larger | ||
164 | * data types like structures or arrays. | ||
165 | * | ||
166 | * @ptr must have pointer-to-simple-variable type, and @x must be assignable | ||
167 | * to the result of dereferencing @ptr. | ||
168 | * | ||
169 | * Returns zero on success, or -EFAULT on error. | ||
170 | */ | ||
171 | #define put_user(x, ptr) \ | ||
172 | __put_user_check((__typeof__(*(ptr)))(x), (ptr), sizeof(*(ptr))) | ||
173 | |||
174 | /** | ||
175 | * __get_user: - Get a simple variable from user space, with less checking. | ||
176 | * @x: Variable to store result. | ||
177 | * @ptr: Source address, in user space. | ||
178 | * | ||
179 | * Context: User context only. This function may sleep if pagefaults are | ||
180 | * enabled. | ||
181 | * | ||
182 | * This macro copies a single simple variable from user space to kernel | ||
183 | * space. It supports simple types like char and int, but not larger | ||
184 | * data types like structures or arrays. | ||
185 | * | ||
186 | * @ptr must have pointer-to-simple-variable type, and the result of | ||
187 | * dereferencing @ptr must be assignable to @x without a cast. | ||
188 | * | ||
189 | * Caller must check the pointer with access_ok() before calling this | ||
190 | * function. | ||
191 | * | ||
192 | * Returns zero on success, or -EFAULT on error. | ||
193 | * On error, the variable @x is set to zero. | ||
194 | */ | ||
195 | #define __get_user(x, ptr) \ | ||
196 | __get_user_nocheck((x), (ptr), sizeof(*(ptr))) | ||
197 | |||
198 | #define __get_user_nocheck(x, ptr, size) \ | ||
199 | ({ \ | ||
200 | long __gu_err = 0; \ | ||
201 | unsigned long __gu_val = 0; \ | ||
202 | might_fault(); \ | ||
203 | __get_user_size(__gu_val, (ptr), (size), __gu_err); \ | ||
204 | (x) = (__force __typeof__(*(ptr)))__gu_val; \ | ||
205 | __gu_err; \ | ||
206 | }) | ||
207 | |||
208 | #define __get_user_check(x, ptr, size) \ | ||
209 | ({ \ | ||
210 | long __gu_err = -EFAULT; \ | ||
211 | unsigned long __gu_val = 0; \ | ||
212 | const __typeof__(*(ptr)) __user *__gu_addr = (ptr); \ | ||
213 | might_fault(); \ | ||
214 | if (access_ok(VERIFY_READ, __gu_addr, size)) \ | ||
215 | __get_user_size(__gu_val, __gu_addr, (size), __gu_err); \ | ||
216 | (x) = (__force __typeof__(*(ptr)))__gu_val; \ | ||
217 | __gu_err; \ | ||
218 | }) | ||
219 | |||
220 | extern long __get_user_bad(void); | ||
221 | |||
222 | #define __get_user_size(x, ptr, size, retval) \ | ||
223 | do { \ | ||
224 | retval = 0; \ | ||
225 | __chk_user_ptr(ptr); \ | ||
226 | switch (size) { \ | ||
227 | case 1: __get_user_asm(x, ptr, retval, "ub"); break; \ | ||
228 | case 2: __get_user_asm(x, ptr, retval, "uh"); break; \ | ||
229 | case 4: __get_user_asm(x, ptr, retval, ""); break; \ | ||
230 | default: (x) = __get_user_bad(); \ | ||
231 | } \ | ||
232 | } while (0) | ||
233 | |||
234 | #define __get_user_asm(x, addr, err, itype) \ | ||
235 | __asm__ __volatile__( \ | ||
236 | " .fillinsn\n" \ | ||
237 | "1: ld"itype" %1,@%2\n" \ | ||
238 | " .fillinsn\n" \ | ||
239 | "2:\n" \ | ||
240 | ".section .fixup,\"ax\"\n" \ | ||
241 | " .balign 4\n" \ | ||
242 | "3: ldi %0,%3\n" \ | ||
243 | " seth r14,#high(2b)\n" \ | ||
244 | " or3 r14,r14,#low(2b)\n" \ | ||
245 | " jmp r14\n" \ | ||
246 | ".previous\n" \ | ||
247 | ".section __ex_table,\"a\"\n" \ | ||
248 | " .balign 4\n" \ | ||
249 | " .long 1b,3b\n" \ | ||
250 | ".previous" \ | ||
251 | : "=&r" (err), "=&r" (x) \ | ||
252 | : "r" (addr), "i" (-EFAULT), "0" (err) \ | ||
253 | : "r14", "memory") | ||
254 | |||
255 | /** | ||
256 | * __put_user: - Write a simple value into user space, with less checking. | ||
257 | * @x: Value to copy to user space. | ||
258 | * @ptr: Destination address, in user space. | ||
259 | * | ||
260 | * Context: User context only. This function may sleep if pagefaults are | ||
261 | * enabled. | ||
262 | * | ||
263 | * This macro copies a single simple value from kernel space to user | ||
264 | * space. It supports simple types like char and int, but not larger | ||
265 | * data types like structures or arrays. | ||
266 | * | ||
267 | * @ptr must have pointer-to-simple-variable type, and @x must be assignable | ||
268 | * to the result of dereferencing @ptr. | ||
269 | * | ||
270 | * Caller must check the pointer with access_ok() before calling this | ||
271 | * function. | ||
272 | * | ||
273 | * Returns zero on success, or -EFAULT on error. | ||
274 | */ | ||
275 | #define __put_user(x, ptr) \ | ||
276 | __put_user_nocheck((__typeof__(*(ptr)))(x), (ptr), sizeof(*(ptr))) | ||
277 | |||
278 | |||
279 | #define __put_user_nocheck(x, ptr, size) \ | ||
280 | ({ \ | ||
281 | long __pu_err; \ | ||
282 | might_fault(); \ | ||
283 | __put_user_size((x), (ptr), (size), __pu_err); \ | ||
284 | __pu_err; \ | ||
285 | }) | ||
286 | |||
287 | |||
288 | #define __put_user_check(x, ptr, size) \ | ||
289 | ({ \ | ||
290 | long __pu_err = -EFAULT; \ | ||
291 | __typeof__(*(ptr)) __user *__pu_addr = (ptr); \ | ||
292 | might_fault(); \ | ||
293 | if (access_ok(VERIFY_WRITE, __pu_addr, size)) \ | ||
294 | __put_user_size((x), __pu_addr, (size), __pu_err); \ | ||
295 | __pu_err; \ | ||
296 | }) | ||
297 | |||
298 | #if defined(__LITTLE_ENDIAN__) | ||
299 | #define __put_user_u64(x, addr, err) \ | ||
300 | __asm__ __volatile__( \ | ||
301 | " .fillinsn\n" \ | ||
302 | "1: st %L1,@%2\n" \ | ||
303 | " .fillinsn\n" \ | ||
304 | "2: st %H1,@(4,%2)\n" \ | ||
305 | " .fillinsn\n" \ | ||
306 | "3:\n" \ | ||
307 | ".section .fixup,\"ax\"\n" \ | ||
308 | " .balign 4\n" \ | ||
309 | "4: ldi %0,%3\n" \ | ||
310 | " seth r14,#high(3b)\n" \ | ||
311 | " or3 r14,r14,#low(3b)\n" \ | ||
312 | " jmp r14\n" \ | ||
313 | ".previous\n" \ | ||
314 | ".section __ex_table,\"a\"\n" \ | ||
315 | " .balign 4\n" \ | ||
316 | " .long 1b,4b\n" \ | ||
317 | " .long 2b,4b\n" \ | ||
318 | ".previous" \ | ||
319 | : "=&r" (err) \ | ||
320 | : "r" (x), "r" (addr), "i" (-EFAULT), "0" (err) \ | ||
321 | : "r14", "memory") | ||
322 | |||
323 | #elif defined(__BIG_ENDIAN__) | ||
324 | #define __put_user_u64(x, addr, err) \ | ||
325 | __asm__ __volatile__( \ | ||
326 | " .fillinsn\n" \ | ||
327 | "1: st %H1,@%2\n" \ | ||
328 | " .fillinsn\n" \ | ||
329 | "2: st %L1,@(4,%2)\n" \ | ||
330 | " .fillinsn\n" \ | ||
331 | "3:\n" \ | ||
332 | ".section .fixup,\"ax\"\n" \ | ||
333 | " .balign 4\n" \ | ||
334 | "4: ldi %0,%3\n" \ | ||
335 | " seth r14,#high(3b)\n" \ | ||
336 | " or3 r14,r14,#low(3b)\n" \ | ||
337 | " jmp r14\n" \ | ||
338 | ".previous\n" \ | ||
339 | ".section __ex_table,\"a\"\n" \ | ||
340 | " .balign 4\n" \ | ||
341 | " .long 1b,4b\n" \ | ||
342 | " .long 2b,4b\n" \ | ||
343 | ".previous" \ | ||
344 | : "=&r" (err) \ | ||
345 | : "r" (x), "r" (addr), "i" (-EFAULT), "0" (err) \ | ||
346 | : "r14", "memory") | ||
347 | #else | ||
348 | #error no endian defined | ||
349 | #endif | ||
350 | |||
351 | extern void __put_user_bad(void); | ||
352 | |||
353 | #define __put_user_size(x, ptr, size, retval) \ | ||
354 | do { \ | ||
355 | retval = 0; \ | ||
356 | __chk_user_ptr(ptr); \ | ||
357 | switch (size) { \ | ||
358 | case 1: __put_user_asm(x, ptr, retval, "b"); break; \ | ||
359 | case 2: __put_user_asm(x, ptr, retval, "h"); break; \ | ||
360 | case 4: __put_user_asm(x, ptr, retval, ""); break; \ | ||
361 | case 8: __put_user_u64((__typeof__(*ptr))(x), ptr, retval); break;\ | ||
362 | default: __put_user_bad(); \ | ||
363 | } \ | ||
364 | } while (0) | ||
365 | |||
366 | struct __large_struct { unsigned long buf[100]; }; | ||
367 | #define __m(x) (*(struct __large_struct *)(x)) | ||
368 | |||
369 | /* | ||
370 | * Tell gcc we read from memory instead of writing: this is because | ||
371 | * we do not write to any memory gcc knows about, so there are no | ||
372 | * aliasing issues. | ||
373 | */ | ||
374 | #define __put_user_asm(x, addr, err, itype) \ | ||
375 | __asm__ __volatile__( \ | ||
376 | " .fillinsn\n" \ | ||
377 | "1: st"itype" %1,@%2\n" \ | ||
378 | " .fillinsn\n" \ | ||
379 | "2:\n" \ | ||
380 | ".section .fixup,\"ax\"\n" \ | ||
381 | " .balign 4\n" \ | ||
382 | "3: ldi %0,%3\n" \ | ||
383 | " seth r14,#high(2b)\n" \ | ||
384 | " or3 r14,r14,#low(2b)\n" \ | ||
385 | " jmp r14\n" \ | ||
386 | ".previous\n" \ | ||
387 | ".section __ex_table,\"a\"\n" \ | ||
388 | " .balign 4\n" \ | ||
389 | " .long 1b,3b\n" \ | ||
390 | ".previous" \ | ||
391 | : "=&r" (err) \ | ||
392 | : "r" (x), "r" (addr), "i" (-EFAULT), "0" (err) \ | ||
393 | : "r14", "memory") | ||
394 | |||
395 | /* | ||
396 | * Here we special-case 1, 2 and 4-byte copy_*_user invocations. On a fault | ||
397 | * we return the initial request size (1, 2 or 4), as copy_*_user should do. | ||
398 | * If a store crosses a page boundary and gets a fault, the m32r will not write | ||
399 | * anything, so this is accurate. | ||
400 | */ | ||
401 | |||
402 | /* | ||
403 | * Copy To/From Userspace | ||
404 | */ | ||
405 | |||
406 | /* Generic arbitrary sized copy. */ | ||
407 | /* Return the number of bytes NOT copied. */ | ||
408 | #define __copy_user(to, from, size) \ | ||
409 | do { \ | ||
410 | unsigned long __dst, __src, __c; \ | ||
411 | __asm__ __volatile__ ( \ | ||
412 | " mv r14, %0\n" \ | ||
413 | " or r14, %1\n" \ | ||
414 | " beq %0, %1, 9f\n" \ | ||
415 | " beqz %2, 9f\n" \ | ||
416 | " and3 r14, r14, #3\n" \ | ||
417 | " bnez r14, 2f\n" \ | ||
418 | " and3 %2, %2, #3\n" \ | ||
419 | " beqz %3, 2f\n" \ | ||
420 | " addi %0, #-4 ; word_copy \n" \ | ||
421 | " .fillinsn\n" \ | ||
422 | "0: ld r14, @%1+\n" \ | ||
423 | " addi %3, #-1\n" \ | ||
424 | " .fillinsn\n" \ | ||
425 | "1: st r14, @+%0\n" \ | ||
426 | " bnez %3, 0b\n" \ | ||
427 | " beqz %2, 9f\n" \ | ||
428 | " addi %0, #4\n" \ | ||
429 | " .fillinsn\n" \ | ||
430 | "2: ldb r14, @%1 ; byte_copy \n" \ | ||
431 | " .fillinsn\n" \ | ||
432 | "3: stb r14, @%0\n" \ | ||
433 | " addi %1, #1\n" \ | ||
434 | " addi %2, #-1\n" \ | ||
435 | " addi %0, #1\n" \ | ||
436 | " bnez %2, 2b\n" \ | ||
437 | " .fillinsn\n" \ | ||
438 | "9:\n" \ | ||
439 | ".section .fixup,\"ax\"\n" \ | ||
440 | " .balign 4\n" \ | ||
441 | "5: addi %3, #1\n" \ | ||
442 | " addi %1, #-4\n" \ | ||
443 | " .fillinsn\n" \ | ||
444 | "6: slli %3, #2\n" \ | ||
445 | " add %2, %3\n" \ | ||
446 | " addi %0, #4\n" \ | ||
447 | " .fillinsn\n" \ | ||
448 | "7: seth r14, #high(9b)\n" \ | ||
449 | " or3 r14, r14, #low(9b)\n" \ | ||
450 | " jmp r14\n" \ | ||
451 | ".previous\n" \ | ||
452 | ".section __ex_table,\"a\"\n" \ | ||
453 | " .balign 4\n" \ | ||
454 | " .long 0b,6b\n" \ | ||
455 | " .long 1b,5b\n" \ | ||
456 | " .long 2b,9b\n" \ | ||
457 | " .long 3b,9b\n" \ | ||
458 | ".previous\n" \ | ||
459 | : "=&r" (__dst), "=&r" (__src), "=&r" (size), \ | ||
460 | "=&r" (__c) \ | ||
461 | : "0" (to), "1" (from), "2" (size), "3" (size / 4) \ | ||
462 | : "r14", "memory"); \ | ||
463 | } while (0) | ||
464 | |||
465 | /* We let the __ versions of copy_from/to_user inline, because they're often | ||
466 | * used in fast paths and have only a small space overhead. | ||
467 | */ | ||
468 | static inline unsigned long | ||
469 | raw_copy_from_user(void *to, const void __user *from, unsigned long n) | ||
470 | { | ||
471 | prefetchw(to); | ||
472 | __copy_user(to, from, n); | ||
473 | return n; | ||
474 | } | ||
475 | |||
476 | static inline unsigned long | ||
477 | raw_copy_to_user(void __user *to, const void *from, unsigned long n) | ||
478 | { | ||
479 | prefetch(from); | ||
480 | __copy_user(to, from, n); | ||
481 | return n; | ||
482 | } | ||
483 | |||
484 | long __must_check strncpy_from_user(char *dst, const char __user *src, | ||
485 | long count); | ||
486 | |||
487 | /** | ||
488 | * __clear_user: - Zero a block of memory in user space, with less checking. | ||
489 | * @to: Destination address, in user space. | ||
490 | * @n: Number of bytes to zero. | ||
491 | * | ||
492 | * Zero a block of memory in user space. Caller must check | ||
493 | * the specified block with access_ok() before calling this function. | ||
494 | * | ||
495 | * Returns number of bytes that could not be cleared. | ||
496 | * On success, this will be zero. | ||
497 | */ | ||
498 | unsigned long __clear_user(void __user *mem, unsigned long len); | ||
499 | |||
500 | /** | ||
501 | * clear_user: - Zero a block of memory in user space. | ||
502 | * @to: Destination address, in user space. | ||
503 | * @n: Number of bytes to zero. | ||
504 | * | ||
505 | * Zero a block of memory in user space. Caller must check | ||
506 | * the specified block with access_ok() before calling this function. | ||
507 | * | ||
508 | * Returns number of bytes that could not be cleared. | ||
509 | * On success, this will be zero. | ||
510 | */ | ||
511 | unsigned long clear_user(void __user *mem, unsigned long len); | ||
512 | |||
513 | long strnlen_user(const char __user *str, long n); | ||
514 | |||
515 | #endif /* _ASM_M32R_UACCESS_H */ | ||
diff --git a/arch/m32r/include/asm/ucontext.h b/arch/m32r/include/asm/ucontext.h deleted file mode 100644 index 5f9de3736624..000000000000 --- a/arch/m32r/include/asm/ucontext.h +++ /dev/null | |||
@@ -1,13 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifndef _ASM_M32R_UCONTEXT_H | ||
3 | #define _ASM_M32R_UCONTEXT_H | ||
4 | |||
5 | struct ucontext { | ||
6 | unsigned long uc_flags; | ||
7 | struct ucontext *uc_link; | ||
8 | stack_t uc_stack; | ||
9 | struct sigcontext uc_mcontext; | ||
10 | sigset_t uc_sigmask; /* mask last for extensibility */ | ||
11 | }; | ||
12 | |||
13 | #endif /* _ASM_M32R_UCONTEXT_H */ | ||
diff --git a/arch/m32r/include/asm/unaligned.h b/arch/m32r/include/asm/unaligned.h deleted file mode 100644 index 5981361672f9..000000000000 --- a/arch/m32r/include/asm/unaligned.h +++ /dev/null | |||
@@ -1,19 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifndef _ASM_M32R_UNALIGNED_H | ||
3 | #define _ASM_M32R_UNALIGNED_H | ||
4 | |||
5 | #if defined(__LITTLE_ENDIAN__) | ||
6 | # include <linux/unaligned/le_memmove.h> | ||
7 | # include <linux/unaligned/be_byteshift.h> | ||
8 | # include <linux/unaligned/generic.h> | ||
9 | # define get_unaligned __get_unaligned_le | ||
10 | # define put_unaligned __put_unaligned_le | ||
11 | #else | ||
12 | # include <linux/unaligned/be_memmove.h> | ||
13 | # include <linux/unaligned/le_byteshift.h> | ||
14 | # include <linux/unaligned/generic.h> | ||
15 | # define get_unaligned __get_unaligned_be | ||
16 | # define put_unaligned __put_unaligned_be | ||
17 | #endif | ||
18 | |||
19 | #endif /* _ASM_M32R_UNALIGNED_H */ | ||
diff --git a/arch/m32r/include/asm/unistd.h b/arch/m32r/include/asm/unistd.h deleted file mode 100644 index dee4c196972e..000000000000 --- a/arch/m32r/include/asm/unistd.h +++ /dev/null | |||
@@ -1,51 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifndef _ASM_M32R_UNISTD_H | ||
3 | #define _ASM_M32R_UNISTD_H | ||
4 | |||
5 | #include <uapi/asm/unistd.h> | ||
6 | |||
7 | |||
8 | #define NR_syscalls 326 | ||
9 | |||
10 | #define __ARCH_WANT_STAT64 | ||
11 | #define __ARCH_WANT_SYS_ALARM | ||
12 | #define __ARCH_WANT_SYS_GETHOSTNAME | ||
13 | #define __ARCH_WANT_SYS_IPC | ||
14 | #define __ARCH_WANT_SYS_PAUSE | ||
15 | #define __ARCH_WANT_SYS_TIME | ||
16 | #define __ARCH_WANT_SYS_UTIME | ||
17 | #define __ARCH_WANT_SYS_WAITPID | ||
18 | #define __ARCH_WANT_SYS_SOCKETCALL | ||
19 | #define __ARCH_WANT_SYS_FADVISE64 | ||
20 | #define __ARCH_WANT_SYS_GETPGRP | ||
21 | #define __ARCH_WANT_SYS_LLSEEK | ||
22 | #define __ARCH_WANT_SYS_OLDUMOUNT | ||
23 | #define __ARCH_WANT_SYS_CLONE | ||
24 | #define __ARCH_WANT_SYS_FORK | ||
25 | #define __ARCH_WANT_SYS_VFORK | ||
26 | |||
27 | #define __IGNORE_lchown | ||
28 | #define __IGNORE_setuid | ||
29 | #define __IGNORE_getuid | ||
30 | #define __IGNORE_setgid | ||
31 | #define __IGNORE_getgid | ||
32 | #define __IGNORE_geteuid | ||
33 | #define __IGNORE_getegid | ||
34 | #define __IGNORE_fcntl | ||
35 | #define __IGNORE_setreuid | ||
36 | #define __IGNORE_setregid | ||
37 | #define __IGNORE_getrlimit | ||
38 | #define __IGNORE_getgroups | ||
39 | #define __IGNORE_setgroups | ||
40 | #define __IGNORE_select | ||
41 | #define __IGNORE_mmap | ||
42 | #define __IGNORE_fchown | ||
43 | #define __IGNORE_setfsuid | ||
44 | #define __IGNORE_setfsgid | ||
45 | #define __IGNORE_setresuid | ||
46 | #define __IGNORE_getresuid | ||
47 | #define __IGNORE_setresgid | ||
48 | #define __IGNORE_getresgid | ||
49 | #define __IGNORE_chown | ||
50 | |||
51 | #endif /* _ASM_M32R_UNISTD_H */ | ||
diff --git a/arch/m32r/include/asm/user.h b/arch/m32r/include/asm/user.h deleted file mode 100644 index 489b60d4aec2..000000000000 --- a/arch/m32r/include/asm/user.h +++ /dev/null | |||
@@ -1,53 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifndef _ASM_M32R_USER_H | ||
3 | #define _ASM_M32R_USER_H | ||
4 | |||
5 | #include <linux/types.h> | ||
6 | #include <asm/ptrace.h> | ||
7 | #include <asm/page.h> | ||
8 | |||
9 | /* | ||
10 | * Core file format: The core file is written in such a way that gdb | ||
11 | * can understand it and provide useful information to the user (under | ||
12 | * linux we use the `trad-core' bfd). | ||
13 | * | ||
14 | * The actual file contents are as follows: | ||
15 | * UPAGE: 1 page consisting of a user struct that tells gdb | ||
16 | * what is present in the file. Directly after this is a | ||
17 | * copy of the task_struct, which is currently not used by gdb, | ||
18 | * but it may come in handy at some point. All of the registers | ||
19 | * are stored as part of the upage. The upage should always be | ||
20 | * only one page. | ||
21 | * DATA: The data area is stored. We use current->end_text to | ||
22 | * current->brk to pick up all of the user variables, plus any memory | ||
23 | * that may have been sbrk'ed. No attempt is made to determine if a | ||
24 | * page is demand-zero or if a page is totally unused, we just cover | ||
25 | * the entire range. All of the addresses are rounded in such a way | ||
26 | * that an integral number of pages is written. | ||
27 | * STACK: We need the stack information in order to get a meaningful | ||
28 | * backtrace. We need to write the data from usp to | ||
29 | * current->start_stack, so we round each of these off in order to be | ||
30 | * able to write an integer number of pages. | ||
31 | */ | ||
32 | |||
33 | struct user { | ||
34 | struct pt_regs regs; /* entire machine state */ | ||
35 | size_t u_tsize; /* text size (pages) */ | ||
36 | size_t u_dsize; /* data size (pages) */ | ||
37 | size_t u_ssize; /* stack size (pages) */ | ||
38 | unsigned long start_code; /* text starting address */ | ||
39 | unsigned long start_data; /* data starting address */ | ||
40 | unsigned long start_stack; /* stack starting address */ | ||
41 | long int signal; /* signal causing core dump */ | ||
42 | unsigned long u_ar0; /* help gdb find registers */ | ||
43 | unsigned long magic; /* identifies a core file */ | ||
44 | char u_comm[32]; /* user command name */ | ||
45 | }; | ||
46 | |||
47 | #define NBPG PAGE_SIZE | ||
48 | #define UPAGES 1 | ||
49 | #define HOST_TEXT_START_ADDR (u.start_code) | ||
50 | #define HOST_DATA_START_ADDR (u.start_data) | ||
51 | #define HOST_STACK_END_ADDR (u.start_stack + u.u_ssize * NBPG) | ||
52 | |||
53 | #endif /* _ASM_M32R_USER_H */ | ||
diff --git a/arch/m32r/include/asm/vga.h b/arch/m32r/include/asm/vga.h deleted file mode 100644 index 783d5bf779c2..000000000000 --- a/arch/m32r/include/asm/vga.h +++ /dev/null | |||
@@ -1,21 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifndef _ASM_M32R_VGA_H | ||
3 | #define _ASM_M32R_VGA_H | ||
4 | |||
5 | /* | ||
6 | * Access to VGA videoram | ||
7 | * | ||
8 | * (c) 1998 Martin Mares <mj@ucw.cz> | ||
9 | */ | ||
10 | |||
11 | /* | ||
12 | * On the PC, we can just recalculate addresses and then | ||
13 | * access the videoram directly without any black magic. | ||
14 | */ | ||
15 | |||
16 | #define VGA_MAP_MEM(x,s) (unsigned long)phys_to_virt(x) | ||
17 | |||
18 | #define vga_readb(x) (*(x)) | ||
19 | #define vga_writeb(x,y) (*(y) = (x)) | ||
20 | |||
21 | #endif /* _ASM_M32R_VGA_H */ | ||
diff --git a/arch/m32r/include/asm/xor.h b/arch/m32r/include/asm/xor.h deleted file mode 100644 index a4d546752c77..000000000000 --- a/arch/m32r/include/asm/xor.h +++ /dev/null | |||
@@ -1,7 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifndef _ASM_M32R_XOR_H | ||
3 | #define _ASM_M32R_XOR_H | ||
4 | |||
5 | #include <asm-generic/xor.h> | ||
6 | |||
7 | #endif /* _ASM_M32R_XOR_H */ | ||
diff --git a/arch/m32r/include/uapi/asm/Kbuild b/arch/m32r/include/uapi/asm/Kbuild deleted file mode 100644 index c3df55aeefe7..000000000000 --- a/arch/m32r/include/uapi/asm/Kbuild +++ /dev/null | |||
@@ -1,7 +0,0 @@ | |||
1 | # UAPI Header export list | ||
2 | include include/uapi/asm-generic/Kbuild.asm | ||
3 | |||
4 | generic-y += bpf_perf_event.h | ||
5 | generic-y += kvm_para.h | ||
6 | generic-y += poll.h | ||
7 | generic-y += siginfo.h | ||
diff --git a/arch/m32r/include/uapi/asm/auxvec.h b/arch/m32r/include/uapi/asm/auxvec.h deleted file mode 100644 index f76dcc860fae..000000000000 --- a/arch/m32r/include/uapi/asm/auxvec.h +++ /dev/null | |||
@@ -1,4 +0,0 @@ | |||
1 | #ifndef _ASM_M32R__AUXVEC_H | ||
2 | #define _ASM_M32R__AUXVEC_H | ||
3 | |||
4 | #endif /* _ASM_M32R__AUXVEC_H */ | ||
diff --git a/arch/m32r/include/uapi/asm/bitsperlong.h b/arch/m32r/include/uapi/asm/bitsperlong.h deleted file mode 100644 index 76da34b10f59..000000000000 --- a/arch/m32r/include/uapi/asm/bitsperlong.h +++ /dev/null | |||
@@ -1,2 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | ||
2 | #include <asm-generic/bitsperlong.h> | ||
diff --git a/arch/m32r/include/uapi/asm/byteorder.h b/arch/m32r/include/uapi/asm/byteorder.h deleted file mode 100644 index 9b4a8ba483cd..000000000000 --- a/arch/m32r/include/uapi/asm/byteorder.h +++ /dev/null | |||
@@ -1,11 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | ||
2 | #ifndef _ASM_M32R_BYTEORDER_H | ||
3 | #define _ASM_M32R_BYTEORDER_H | ||
4 | |||
5 | #if defined(__LITTLE_ENDIAN__) | ||
6 | # include <linux/byteorder/little_endian.h> | ||
7 | #else | ||
8 | # include <linux/byteorder/big_endian.h> | ||
9 | #endif | ||
10 | |||
11 | #endif /* _ASM_M32R_BYTEORDER_H */ | ||
diff --git a/arch/m32r/include/uapi/asm/errno.h b/arch/m32r/include/uapi/asm/errno.h deleted file mode 100644 index ab38ef607882..000000000000 --- a/arch/m32r/include/uapi/asm/errno.h +++ /dev/null | |||
@@ -1,7 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | ||
2 | #ifndef _ASM_M32R_ERRNO_H | ||
3 | #define _ASM_M32R_ERRNO_H | ||
4 | |||
5 | #include <asm-generic/errno.h> | ||
6 | |||
7 | #endif /* _ASM_M32R_ERRNO_H */ | ||
diff --git a/arch/m32r/include/uapi/asm/fcntl.h b/arch/m32r/include/uapi/asm/fcntl.h deleted file mode 100644 index a77648c505d1..000000000000 --- a/arch/m32r/include/uapi/asm/fcntl.h +++ /dev/null | |||
@@ -1,2 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | ||
2 | #include <asm-generic/fcntl.h> | ||
diff --git a/arch/m32r/include/uapi/asm/ioctl.h b/arch/m32r/include/uapi/asm/ioctl.h deleted file mode 100644 index b809c4566e5f..000000000000 --- a/arch/m32r/include/uapi/asm/ioctl.h +++ /dev/null | |||
@@ -1,2 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | ||
2 | #include <asm-generic/ioctl.h> | ||
diff --git a/arch/m32r/include/uapi/asm/ioctls.h b/arch/m32r/include/uapi/asm/ioctls.h deleted file mode 100644 index 31da4c3bab94..000000000000 --- a/arch/m32r/include/uapi/asm/ioctls.h +++ /dev/null | |||
@@ -1,7 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | ||
2 | #ifndef __ARCH_M32R_IOCTLS_H__ | ||
3 | #define __ARCH_M32R_IOCTLS_H__ | ||
4 | |||
5 | #include <asm-generic/ioctls.h> | ||
6 | |||
7 | #endif /* __ARCH_M32R_IOCTLS_H__ */ | ||
diff --git a/arch/m32r/include/uapi/asm/ipcbuf.h b/arch/m32r/include/uapi/asm/ipcbuf.h deleted file mode 100644 index 90d6445a14df..000000000000 --- a/arch/m32r/include/uapi/asm/ipcbuf.h +++ /dev/null | |||
@@ -1,2 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | ||
2 | #include <asm-generic/ipcbuf.h> | ||
diff --git a/arch/m32r/include/uapi/asm/mman.h b/arch/m32r/include/uapi/asm/mman.h deleted file mode 100644 index 8eebf89f5ab1..000000000000 --- a/arch/m32r/include/uapi/asm/mman.h +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | #include <asm-generic/mman.h> | ||
diff --git a/arch/m32r/include/uapi/asm/msgbuf.h b/arch/m32r/include/uapi/asm/msgbuf.h deleted file mode 100644 index 4386ff2735ba..000000000000 --- a/arch/m32r/include/uapi/asm/msgbuf.h +++ /dev/null | |||
@@ -1,32 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | ||
2 | #ifndef _ASM_M32R_MSGBUF_H | ||
3 | #define _ASM_M32R_MSGBUF_H | ||
4 | |||
5 | /* | ||
6 | * The msqid64_ds structure for m32r architecture. | ||
7 | * Note extra padding because this structure is passed back and forth | ||
8 | * between kernel and user space. | ||
9 | * | ||
10 | * Pad space is left for: | ||
11 | * - 64-bit time_t to solve y2038 problem | ||
12 | * - 2 miscellaneous 32-bit values | ||
13 | */ | ||
14 | |||
15 | struct msqid64_ds { | ||
16 | struct ipc64_perm msg_perm; | ||
17 | __kernel_time_t msg_stime; /* last msgsnd time */ | ||
18 | unsigned long __unused1; | ||
19 | __kernel_time_t msg_rtime; /* last msgrcv time */ | ||
20 | unsigned long __unused2; | ||
21 | __kernel_time_t msg_ctime; /* last change time */ | ||
22 | unsigned long __unused3; | ||
23 | unsigned long msg_cbytes; /* current number of bytes on queue */ | ||
24 | unsigned long msg_qnum; /* number of messages in queue */ | ||
25 | unsigned long msg_qbytes; /* max number of bytes on queue */ | ||
26 | __kernel_pid_t msg_lspid; /* pid of last msgsnd */ | ||
27 | __kernel_pid_t msg_lrpid; /* last receive pid */ | ||
28 | unsigned long __unused4; | ||
29 | unsigned long __unused5; | ||
30 | }; | ||
31 | |||
32 | #endif /* _ASM_M32R_MSGBUF_H */ | ||
diff --git a/arch/m32r/include/uapi/asm/param.h b/arch/m32r/include/uapi/asm/param.h deleted file mode 100644 index 0bff6d6133f5..000000000000 --- a/arch/m32r/include/uapi/asm/param.h +++ /dev/null | |||
@@ -1,8 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | ||
2 | #ifndef _ASM_M32R_PARAM_H | ||
3 | #define _ASM_M32R_PARAM_H | ||
4 | |||
5 | #include <asm-generic/param.h> | ||
6 | |||
7 | #endif /* _ASM_M32R_PARAM_H */ | ||
8 | |||
diff --git a/arch/m32r/include/uapi/asm/posix_types.h b/arch/m32r/include/uapi/asm/posix_types.h deleted file mode 100644 index 63316fcb1b57..000000000000 --- a/arch/m32r/include/uapi/asm/posix_types.h +++ /dev/null | |||
@@ -1,26 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | ||
2 | #ifndef _ASM_M32R_POSIX_TYPES_H | ||
3 | #define _ASM_M32R_POSIX_TYPES_H | ||
4 | |||
5 | /* | ||
6 | * This file is generally used by user-level software, so you need to | ||
7 | * be a little careful about namespace pollution etc. Also, we cannot | ||
8 | * assume GCC is being used. | ||
9 | */ | ||
10 | |||
11 | typedef unsigned short __kernel_mode_t; | ||
12 | #define __kernel_mode_t __kernel_mode_t | ||
13 | |||
14 | typedef unsigned short __kernel_ipc_pid_t; | ||
15 | #define __kernel_ipc_pid_t __kernel_ipc_pid_t | ||
16 | |||
17 | typedef unsigned short __kernel_uid_t; | ||
18 | typedef unsigned short __kernel_gid_t; | ||
19 | #define __kernel_uid_t __kernel_uid_t | ||
20 | |||
21 | typedef unsigned short __kernel_old_dev_t; | ||
22 | #define __kernel_old_dev_t __kernel_old_dev_t | ||
23 | |||
24 | #include <asm-generic/posix_types.h> | ||
25 | |||
26 | #endif /* _ASM_M32R_POSIX_TYPES_H */ | ||
diff --git a/arch/m32r/include/uapi/asm/ptrace.h b/arch/m32r/include/uapi/asm/ptrace.h deleted file mode 100644 index 99aec86cf5c0..000000000000 --- a/arch/m32r/include/uapi/asm/ptrace.h +++ /dev/null | |||
@@ -1,118 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | ||
2 | /* | ||
3 | * linux/include/asm-m32r/ptrace.h | ||
4 | * | ||
5 | * This file is subject to the terms and conditions of the GNU General Public | ||
6 | * License. See the file "COPYING" in the main directory of this archive | ||
7 | * for more details. | ||
8 | * | ||
9 | * M32R version: | ||
10 | * Copyright (C) 2001-2002, 2004 Hirokazu Takata <takata at linux-m32r.org> | ||
11 | */ | ||
12 | #ifndef _UAPI_ASM_M32R_PTRACE_H | ||
13 | #define _UAPI_ASM_M32R_PTRACE_H | ||
14 | |||
15 | |||
16 | /* 0 - 13 are integer registers (general purpose registers). */ | ||
17 | #define PT_R4 0 | ||
18 | #define PT_R5 1 | ||
19 | #define PT_R6 2 | ||
20 | #define PT_REGS 3 | ||
21 | #define PT_R0 4 | ||
22 | #define PT_R1 5 | ||
23 | #define PT_R2 6 | ||
24 | #define PT_R3 7 | ||
25 | #define PT_R7 8 | ||
26 | #define PT_R8 9 | ||
27 | #define PT_R9 10 | ||
28 | #define PT_R10 11 | ||
29 | #define PT_R11 12 | ||
30 | #define PT_R12 13 | ||
31 | #define PT_SYSCNR 14 | ||
32 | #define PT_R13 PT_FP | ||
33 | #define PT_R14 PT_LR | ||
34 | #define PT_R15 PT_SP | ||
35 | |||
36 | /* processor status and miscellaneous context registers. */ | ||
37 | #define PT_ACC0H 15 | ||
38 | #define PT_ACC0L 16 | ||
39 | #define PT_ACC1H 17 /* ISA_DSP_LEVEL2 only */ | ||
40 | #define PT_ACC1L 18 /* ISA_DSP_LEVEL2 only */ | ||
41 | #define PT_PSW 19 | ||
42 | #define PT_BPC 20 | ||
43 | #define PT_BBPSW 21 | ||
44 | #define PT_BBPC 22 | ||
45 | #define PT_SPU 23 | ||
46 | #define PT_FP 24 | ||
47 | #define PT_LR 25 | ||
48 | #define PT_SPI 26 | ||
49 | #define PT_ORIGR0 27 | ||
50 | |||
51 | /* virtual pt_reg entry for gdb */ | ||
52 | #define PT_PC 30 | ||
53 | #define PT_CBR 31 | ||
54 | #define PT_EVB 32 | ||
55 | |||
56 | |||
57 | /* Control registers. */ | ||
58 | #define SPR_CR0 PT_PSW | ||
59 | #define SPR_CR1 PT_CBR /* read only */ | ||
60 | #define SPR_CR2 PT_SPI | ||
61 | #define SPR_CR3 PT_SPU | ||
62 | #define SPR_CR4 | ||
63 | #define SPR_CR5 PT_EVB /* part of M32R/E, M32R/I core only */ | ||
64 | #define SPR_CR6 PT_BPC | ||
65 | #define SPR_CR7 | ||
66 | #define SPR_CR8 PT_BBPSW | ||
67 | #define SPR_CR9 | ||
68 | #define SPR_CR10 | ||
69 | #define SPR_CR11 | ||
70 | #define SPR_CR12 | ||
71 | #define SPR_CR13 PT_WR | ||
72 | #define SPR_CR14 PT_BBPC | ||
73 | #define SPR_CR15 | ||
74 | |||
75 | /* this struct defines the way the registers are stored on the | ||
76 | stack during a system call. */ | ||
77 | struct pt_regs { | ||
78 | /* Saved main processor registers. */ | ||
79 | unsigned long r4; | ||
80 | unsigned long r5; | ||
81 | unsigned long r6; | ||
82 | struct pt_regs *pt_regs; | ||
83 | unsigned long r0; | ||
84 | unsigned long r1; | ||
85 | unsigned long r2; | ||
86 | unsigned long r3; | ||
87 | unsigned long r7; | ||
88 | unsigned long r8; | ||
89 | unsigned long r9; | ||
90 | unsigned long r10; | ||
91 | unsigned long r11; | ||
92 | unsigned long r12; | ||
93 | long syscall_nr; | ||
94 | |||
95 | /* Saved main processor status and miscellaneous context registers. */ | ||
96 | unsigned long acc0h; | ||
97 | unsigned long acc0l; | ||
98 | unsigned long acc1h; /* ISA_DSP_LEVEL2 only */ | ||
99 | unsigned long acc1l; /* ISA_DSP_LEVEL2 only */ | ||
100 | unsigned long psw; | ||
101 | unsigned long bpc; /* saved PC for TRAP syscalls */ | ||
102 | unsigned long bbpsw; | ||
103 | unsigned long bbpc; | ||
104 | unsigned long spu; /* saved user stack */ | ||
105 | unsigned long fp; | ||
106 | unsigned long lr; /* saved PC for JL syscalls */ | ||
107 | unsigned long spi; /* saved kernel stack */ | ||
108 | unsigned long orig_r0; | ||
109 | }; | ||
110 | |||
111 | /* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */ | ||
112 | #define PTRACE_GETREGS 12 | ||
113 | #define PTRACE_SETREGS 13 | ||
114 | |||
115 | #define PTRACE_OLDSETOPTIONS 21 | ||
116 | |||
117 | |||
118 | #endif /* _UAPI_ASM_M32R_PTRACE_H */ | ||
diff --git a/arch/m32r/include/uapi/asm/resource.h b/arch/m32r/include/uapi/asm/resource.h deleted file mode 100644 index 3282f3c4a5ca..000000000000 --- a/arch/m32r/include/uapi/asm/resource.h +++ /dev/null | |||
@@ -1,7 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | ||
2 | #ifndef _ASM_M32R_RESOURCE_H | ||
3 | #define _ASM_M32R_RESOURCE_H | ||
4 | |||
5 | #include <asm-generic/resource.h> | ||
6 | |||
7 | #endif /* _ASM_M32R_RESOURCE_H */ | ||
diff --git a/arch/m32r/include/uapi/asm/sembuf.h b/arch/m32r/include/uapi/asm/sembuf.h deleted file mode 100644 index de34664d8cd7..000000000000 --- a/arch/m32r/include/uapi/asm/sembuf.h +++ /dev/null | |||
@@ -1,26 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | ||
2 | #ifndef _ASM_M32R_SEMBUF_H | ||
3 | #define _ASM_M32R_SEMBUF_H | ||
4 | |||
5 | /* | ||
6 | * The semid64_ds structure for m32r architecture. | ||
7 | * Note extra padding because this structure is passed back and forth | ||
8 | * between kernel and user space. | ||
9 | * | ||
10 | * Pad space is left for: | ||
11 | * - 64-bit time_t to solve y2038 problem | ||
12 | * - 2 miscellaneous 32-bit values | ||
13 | */ | ||
14 | |||
15 | struct semid64_ds { | ||
16 | struct ipc64_perm sem_perm; /* permissions .. see ipc.h */ | ||
17 | __kernel_time_t sem_otime; /* last semop time */ | ||
18 | unsigned long __unused1; | ||
19 | __kernel_time_t sem_ctime; /* last change time */ | ||
20 | unsigned long __unused2; | ||
21 | unsigned long sem_nsems; /* no. of semaphores in array */ | ||
22 | unsigned long __unused3; | ||
23 | unsigned long __unused4; | ||
24 | }; | ||
25 | |||
26 | #endif /* _ASM_M32R_SEMBUF_H */ | ||
diff --git a/arch/m32r/include/uapi/asm/setup.h b/arch/m32r/include/uapi/asm/setup.h deleted file mode 100644 index d936a64bbafd..000000000000 --- a/arch/m32r/include/uapi/asm/setup.h +++ /dev/null | |||
@@ -1,12 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | ||
2 | #ifndef _UAPI_ASM_M32R_SETUP_H | ||
3 | #define _UAPI_ASM_M32R_SETUP_H | ||
4 | |||
5 | /* | ||
6 | * This is set up by the setup-routine at boot-time | ||
7 | */ | ||
8 | |||
9 | #define COMMAND_LINE_SIZE 512 | ||
10 | |||
11 | |||
12 | #endif /* _UAPI_ASM_M32R_SETUP_H */ | ||
diff --git a/arch/m32r/include/uapi/asm/shmbuf.h b/arch/m32r/include/uapi/asm/shmbuf.h deleted file mode 100644 index 44c2ea924829..000000000000 --- a/arch/m32r/include/uapi/asm/shmbuf.h +++ /dev/null | |||
@@ -1,43 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | ||
2 | #ifndef _ASM_M32R_SHMBUF_H | ||
3 | #define _ASM_M32R_SHMBUF_H | ||
4 | |||
5 | /* | ||
6 | * The shmid64_ds structure for M32R architecture. | ||
7 | * Note extra padding because this structure is passed back and forth | ||
8 | * between kernel and user space. | ||
9 | * | ||
10 | * Pad space is left for: | ||
11 | * - 64-bit time_t to solve y2038 problem | ||
12 | * - 2 miscellaneous 32-bit values | ||
13 | */ | ||
14 | |||
15 | struct shmid64_ds { | ||
16 | struct ipc64_perm shm_perm; /* operation perms */ | ||
17 | size_t shm_segsz; /* size of segment (bytes) */ | ||
18 | __kernel_time_t shm_atime; /* last attach time */ | ||
19 | unsigned long __unused1; | ||
20 | __kernel_time_t shm_dtime; /* last detach time */ | ||
21 | unsigned long __unused2; | ||
22 | __kernel_time_t shm_ctime; /* last change time */ | ||
23 | unsigned long __unused3; | ||
24 | __kernel_pid_t shm_cpid; /* pid of creator */ | ||
25 | __kernel_pid_t shm_lpid; /* pid of last operator */ | ||
26 | unsigned long shm_nattch; /* no. of current attaches */ | ||
27 | unsigned long __unused4; | ||
28 | unsigned long __unused5; | ||
29 | }; | ||
30 | |||
31 | struct shminfo64 { | ||
32 | unsigned long shmmax; | ||
33 | unsigned long shmmin; | ||
34 | unsigned long shmmni; | ||
35 | unsigned long shmseg; | ||
36 | unsigned long shmall; | ||
37 | unsigned long __unused1; | ||
38 | unsigned long __unused2; | ||
39 | unsigned long __unused3; | ||
40 | unsigned long __unused4; | ||
41 | }; | ||
42 | |||
43 | #endif /* _ASM_M32R_SHMBUF_H */ | ||
diff --git a/arch/m32r/include/uapi/asm/sigcontext.h b/arch/m32r/include/uapi/asm/sigcontext.h deleted file mode 100644 index cc9ee73525ff..000000000000 --- a/arch/m32r/include/uapi/asm/sigcontext.h +++ /dev/null | |||
@@ -1,40 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | ||
2 | #ifndef _ASM_M32R_SIGCONTEXT_H | ||
3 | #define _ASM_M32R_SIGCONTEXT_H | ||
4 | |||
5 | struct sigcontext { | ||
6 | /* CPU registers */ | ||
7 | /* Saved main processor registers. */ | ||
8 | unsigned long sc_r4; | ||
9 | unsigned long sc_r5; | ||
10 | unsigned long sc_r6; | ||
11 | struct pt_regs *sc_pt_regs; | ||
12 | unsigned long sc_r0; | ||
13 | unsigned long sc_r1; | ||
14 | unsigned long sc_r2; | ||
15 | unsigned long sc_r3; | ||
16 | unsigned long sc_r7; | ||
17 | unsigned long sc_r8; | ||
18 | unsigned long sc_r9; | ||
19 | unsigned long sc_r10; | ||
20 | unsigned long sc_r11; | ||
21 | unsigned long sc_r12; | ||
22 | |||
23 | /* Saved main processor status and miscellaneous context registers. */ | ||
24 | unsigned long sc_acc0h; | ||
25 | unsigned long sc_acc0l; | ||
26 | unsigned long sc_acc1h; /* ISA_DSP_LEVEL2 only */ | ||
27 | unsigned long sc_acc1l; /* ISA_DSP_LEVEL2 only */ | ||
28 | unsigned long sc_psw; | ||
29 | unsigned long sc_bpc; /* saved PC for TRAP syscalls */ | ||
30 | unsigned long sc_bbpsw; | ||
31 | unsigned long sc_bbpc; | ||
32 | unsigned long sc_spu; /* saved user stack */ | ||
33 | unsigned long sc_fp; | ||
34 | unsigned long sc_lr; /* saved PC for JL syscalls */ | ||
35 | unsigned long sc_spi; /* saved kernel stack */ | ||
36 | |||
37 | unsigned long oldmask; | ||
38 | }; | ||
39 | |||
40 | #endif /* _ASM_M32R_SIGCONTEXT_H */ | ||
diff --git a/arch/m32r/include/uapi/asm/signal.h b/arch/m32r/include/uapi/asm/signal.h deleted file mode 100644 index c2ac3417fb98..000000000000 --- a/arch/m32r/include/uapi/asm/signal.h +++ /dev/null | |||
@@ -1,118 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | ||
2 | #ifndef _UAPI_ASM_M32R_SIGNAL_H | ||
3 | #define _UAPI_ASM_M32R_SIGNAL_H | ||
4 | |||
5 | #include <linux/types.h> | ||
6 | #include <linux/time.h> | ||
7 | #include <linux/compiler.h> | ||
8 | |||
9 | /* Avoid too many header ordering problems. */ | ||
10 | struct siginfo; | ||
11 | |||
12 | #ifndef __KERNEL__ | ||
13 | /* Here we must cater to libcs that poke about in kernel headers. */ | ||
14 | |||
15 | #define NSIG 32 | ||
16 | typedef unsigned long sigset_t; | ||
17 | |||
18 | #endif /* __KERNEL__ */ | ||
19 | |||
20 | #define SIGHUP 1 | ||
21 | #define SIGINT 2 | ||
22 | #define SIGQUIT 3 | ||
23 | #define SIGILL 4 | ||
24 | #define SIGTRAP 5 | ||
25 | #define SIGABRT 6 | ||
26 | #define SIGIOT 6 | ||
27 | #define SIGBUS 7 | ||
28 | #define SIGFPE 8 | ||
29 | #define SIGKILL 9 | ||
30 | #define SIGUSR1 10 | ||
31 | #define SIGSEGV 11 | ||
32 | #define SIGUSR2 12 | ||
33 | #define SIGPIPE 13 | ||
34 | #define SIGALRM 14 | ||
35 | #define SIGTERM 15 | ||
36 | #define SIGSTKFLT 16 | ||
37 | #define SIGCHLD 17 | ||
38 | #define SIGCONT 18 | ||
39 | #define SIGSTOP 19 | ||
40 | #define SIGTSTP 20 | ||
41 | #define SIGTTIN 21 | ||
42 | #define SIGTTOU 22 | ||
43 | #define SIGURG 23 | ||
44 | #define SIGXCPU 24 | ||
45 | #define SIGXFSZ 25 | ||
46 | #define SIGVTALRM 26 | ||
47 | #define SIGPROF 27 | ||
48 | #define SIGWINCH 28 | ||
49 | #define SIGIO 29 | ||
50 | #define SIGPOLL SIGIO | ||
51 | /* | ||
52 | #define SIGLOST 29 | ||
53 | */ | ||
54 | #define SIGPWR 30 | ||
55 | #define SIGSYS 31 | ||
56 | #define SIGUNUSED 31 | ||
57 | |||
58 | /* These should not be considered constants from userland. */ | ||
59 | #define SIGRTMIN 32 | ||
60 | #define SIGRTMAX _NSIG | ||
61 | |||
62 | /* | ||
63 | * SA_FLAGS values: | ||
64 | * | ||
65 | * SA_ONSTACK indicates that a registered stack_t will be used. | ||
66 | * SA_RESTART flag to get restarting signals (which were the default long ago) | ||
67 | * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop. | ||
68 | * SA_RESETHAND clears the handler when the signal is delivered. | ||
69 | * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies. | ||
70 | * SA_NODEFER prevents the current signal from being masked in the handler. | ||
71 | * | ||
72 | * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single | ||
73 | * Unix names RESETHAND and NODEFER respectively. | ||
74 | */ | ||
75 | #define SA_NOCLDSTOP 0x00000001u | ||
76 | #define SA_NOCLDWAIT 0x00000002u | ||
77 | #define SA_SIGINFO 0x00000004u | ||
78 | #define SA_ONSTACK 0x08000000u | ||
79 | #define SA_RESTART 0x10000000u | ||
80 | #define SA_NODEFER 0x40000000u | ||
81 | #define SA_RESETHAND 0x80000000u | ||
82 | |||
83 | #define SA_NOMASK SA_NODEFER | ||
84 | #define SA_ONESHOT SA_RESETHAND | ||
85 | |||
86 | #define SA_RESTORER 0x04000000 | ||
87 | |||
88 | #define MINSIGSTKSZ 2048 | ||
89 | #define SIGSTKSZ 8192 | ||
90 | |||
91 | #include <asm-generic/signal-defs.h> | ||
92 | |||
93 | #ifndef __KERNEL__ | ||
94 | /* Here we must cater to libcs that poke about in kernel headers. */ | ||
95 | |||
96 | struct sigaction { | ||
97 | union { | ||
98 | __sighandler_t _sa_handler; | ||
99 | void (*_sa_sigaction)(int, struct siginfo *, void *); | ||
100 | } _u; | ||
101 | sigset_t sa_mask; | ||
102 | unsigned long sa_flags; | ||
103 | void (*sa_restorer)(void); | ||
104 | }; | ||
105 | |||
106 | #define sa_handler _u._sa_handler | ||
107 | #define sa_sigaction _u._sa_sigaction | ||
108 | |||
109 | #endif /* __KERNEL__ */ | ||
110 | |||
111 | typedef struct sigaltstack { | ||
112 | void __user *ss_sp; | ||
113 | int ss_flags; | ||
114 | size_t ss_size; | ||
115 | } stack_t; | ||
116 | |||
117 | |||
118 | #endif /* _UAPI_ASM_M32R_SIGNAL_H */ | ||
diff --git a/arch/m32r/include/uapi/asm/socket.h b/arch/m32r/include/uapi/asm/socket.h deleted file mode 100644 index cf5018e82c3d..000000000000 --- a/arch/m32r/include/uapi/asm/socket.h +++ /dev/null | |||
@@ -1,108 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | ||
2 | #ifndef _ASM_M32R_SOCKET_H | ||
3 | #define _ASM_M32R_SOCKET_H | ||
4 | |||
5 | #include <asm/sockios.h> | ||
6 | |||
7 | /* For setsockoptions(2) */ | ||
8 | #define SOL_SOCKET 1 | ||
9 | |||
10 | #define SO_DEBUG 1 | ||
11 | #define SO_REUSEADDR 2 | ||
12 | #define SO_TYPE 3 | ||
13 | #define SO_ERROR 4 | ||
14 | #define SO_DONTROUTE 5 | ||
15 | #define SO_BROADCAST 6 | ||
16 | #define SO_SNDBUF 7 | ||
17 | #define SO_RCVBUF 8 | ||
18 | #define SO_SNDBUFFORCE 32 | ||
19 | #define SO_RCVBUFFORCE 33 | ||
20 | #define SO_KEEPALIVE 9 | ||
21 | #define SO_OOBINLINE 10 | ||
22 | #define SO_NO_CHECK 11 | ||
23 | #define SO_PRIORITY 12 | ||
24 | #define SO_LINGER 13 | ||
25 | #define SO_BSDCOMPAT 14 | ||
26 | #define SO_REUSEPORT 15 | ||
27 | #define SO_PASSCRED 16 | ||
28 | #define SO_PEERCRED 17 | ||
29 | #define SO_RCVLOWAT 18 | ||
30 | #define SO_SNDLOWAT 19 | ||
31 | #define SO_RCVTIMEO 20 | ||
32 | #define SO_SNDTIMEO 21 | ||
33 | |||
34 | /* Security levels - as per NRL IPv6 - don't actually do anything */ | ||
35 | #define SO_SECURITY_AUTHENTICATION 22 | ||
36 | #define SO_SECURITY_ENCRYPTION_TRANSPORT 23 | ||
37 | #define SO_SECURITY_ENCRYPTION_NETWORK 24 | ||
38 | |||
39 | #define SO_BINDTODEVICE 25 | ||
40 | |||
41 | /* Socket filtering */ | ||
42 | #define SO_ATTACH_FILTER 26 | ||
43 | #define SO_DETACH_FILTER 27 | ||
44 | #define SO_GET_FILTER SO_ATTACH_FILTER | ||
45 | |||
46 | #define SO_PEERNAME 28 | ||
47 | #define SO_TIMESTAMP 29 | ||
48 | #define SCM_TIMESTAMP SO_TIMESTAMP | ||
49 | |||
50 | #define SO_ACCEPTCONN 30 | ||
51 | |||
52 | #define SO_PEERSEC 31 | ||
53 | #define SO_PASSSEC 34 | ||
54 | #define SO_TIMESTAMPNS 35 | ||
55 | #define SCM_TIMESTAMPNS SO_TIMESTAMPNS | ||
56 | |||
57 | #define SO_MARK 36 | ||
58 | |||
59 | #define SO_TIMESTAMPING 37 | ||
60 | #define SCM_TIMESTAMPING SO_TIMESTAMPING | ||
61 | |||
62 | #define SO_PROTOCOL 38 | ||
63 | #define SO_DOMAIN 39 | ||
64 | |||
65 | #define SO_RXQ_OVFL 40 | ||
66 | |||
67 | #define SO_WIFI_STATUS 41 | ||
68 | #define SCM_WIFI_STATUS SO_WIFI_STATUS | ||
69 | #define SO_PEEK_OFF 42 | ||
70 | |||
71 | /* Instruct lower device to use last 4-bytes of skb data as FCS */ | ||
72 | #define SO_NOFCS 43 | ||
73 | |||
74 | #define SO_LOCK_FILTER 44 | ||
75 | |||
76 | #define SO_SELECT_ERR_QUEUE 45 | ||
77 | |||
78 | #define SO_BUSY_POLL 46 | ||
79 | |||
80 | #define SO_MAX_PACING_RATE 47 | ||
81 | |||
82 | #define SO_BPF_EXTENSIONS 48 | ||
83 | |||
84 | #define SO_INCOMING_CPU 49 | ||
85 | |||
86 | #define SO_ATTACH_BPF 50 | ||
87 | #define SO_DETACH_BPF SO_DETACH_FILTER | ||
88 | |||
89 | #define SO_ATTACH_REUSEPORT_CBPF 51 | ||
90 | #define SO_ATTACH_REUSEPORT_EBPF 52 | ||
91 | |||
92 | #define SO_CNX_ADVICE 53 | ||
93 | |||
94 | #define SCM_TIMESTAMPING_OPT_STATS 54 | ||
95 | |||
96 | #define SO_MEMINFO 55 | ||
97 | |||
98 | #define SO_INCOMING_NAPI_ID 56 | ||
99 | |||
100 | #define SO_COOKIE 57 | ||
101 | |||
102 | #define SCM_TIMESTAMPING_PKTINFO 58 | ||
103 | |||
104 | #define SO_PEERGROUPS 59 | ||
105 | |||
106 | #define SO_ZEROCOPY 60 | ||
107 | |||
108 | #endif /* _ASM_M32R_SOCKET_H */ | ||
diff --git a/arch/m32r/include/uapi/asm/sockios.h b/arch/m32r/include/uapi/asm/sockios.h deleted file mode 100644 index 948229e474c5..000000000000 --- a/arch/m32r/include/uapi/asm/sockios.h +++ /dev/null | |||
@@ -1,14 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | ||
2 | #ifndef _ASM_M32R_SOCKIOS_H | ||
3 | #define _ASM_M32R_SOCKIOS_H | ||
4 | |||
5 | /* Socket-level I/O control calls. */ | ||
6 | #define FIOSETOWN 0x8901 | ||
7 | #define SIOCSPGRP 0x8902 | ||
8 | #define FIOGETOWN 0x8903 | ||
9 | #define SIOCGPGRP 0x8904 | ||
10 | #define SIOCATMARK 0x8905 | ||
11 | #define SIOCGSTAMP 0x8906 /* Get stamp (timeval) */ | ||
12 | #define SIOCGSTAMPNS 0x8907 /* Get stamp (timespec) */ | ||
13 | |||
14 | #endif /* _ASM_M32R_SOCKIOS_H */ | ||
diff --git a/arch/m32r/include/uapi/asm/stat.h b/arch/m32r/include/uapi/asm/stat.h deleted file mode 100644 index 0fe9f96ce8f0..000000000000 --- a/arch/m32r/include/uapi/asm/stat.h +++ /dev/null | |||
@@ -1,88 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | ||
2 | #ifndef _ASM_M32R_STAT_H | ||
3 | #define _ASM_M32R_STAT_H | ||
4 | |||
5 | #include <asm/byteorder.h> | ||
6 | |||
7 | struct __old_kernel_stat { | ||
8 | unsigned short st_dev; | ||
9 | unsigned short st_ino; | ||
10 | unsigned short st_mode; | ||
11 | unsigned short st_nlink; | ||
12 | unsigned short st_uid; | ||
13 | unsigned short st_gid; | ||
14 | unsigned short st_rdev; | ||
15 | unsigned long st_size; | ||
16 | unsigned long st_atime; | ||
17 | unsigned long st_mtime; | ||
18 | unsigned long st_ctime; | ||
19 | }; | ||
20 | |||
21 | #define STAT_HAVE_NSEC 1 | ||
22 | |||
23 | struct stat { | ||
24 | unsigned short st_dev; | ||
25 | unsigned short __pad1; | ||
26 | unsigned long st_ino; | ||
27 | unsigned short st_mode; | ||
28 | unsigned short st_nlink; | ||
29 | unsigned short st_uid; | ||
30 | unsigned short st_gid; | ||
31 | unsigned short st_rdev; | ||
32 | unsigned short __pad2; | ||
33 | unsigned long st_size; | ||
34 | unsigned long st_blksize; | ||
35 | unsigned long st_blocks; | ||
36 | unsigned long st_atime; | ||
37 | unsigned long st_atime_nsec; | ||
38 | unsigned long st_mtime; | ||
39 | unsigned long st_mtime_nsec; | ||
40 | unsigned long st_ctime; | ||
41 | unsigned long st_ctime_nsec; | ||
42 | unsigned long __unused4; | ||
43 | unsigned long __unused5; | ||
44 | }; | ||
45 | |||
46 | /* This matches struct stat64 in glibc2.1, hence the absolutely | ||
47 | * insane amounts of padding around dev_t's. | ||
48 | */ | ||
49 | struct stat64 { | ||
50 | unsigned long long st_dev; | ||
51 | unsigned char __pad0[4]; | ||
52 | #define STAT64_HAS_BROKEN_ST_INO | ||
53 | unsigned long __st_ino; | ||
54 | |||
55 | unsigned int st_mode; | ||
56 | unsigned int st_nlink; | ||
57 | |||
58 | unsigned long st_uid; | ||
59 | unsigned long st_gid; | ||
60 | |||
61 | unsigned long long st_rdev; | ||
62 | unsigned char __pad3[4]; | ||
63 | |||
64 | long long st_size; | ||
65 | unsigned long st_blksize; | ||
66 | |||
67 | #if defined(__BYTE_ORDER) ? __BYTE_ORDER == __BIG_ENDIAN : defined(__BIG_ENDIAN) | ||
68 | unsigned long __pad4; /* future possible st_blocks high bits */ | ||
69 | unsigned long st_blocks; /* Number 512-byte blocks allocated. */ | ||
70 | #elif defined(__BYTE_ORDER) ? __BYTE_ORDER == __LITTLE_ENDIAN : defined(__LITTLE_ENDIAN) | ||
71 | unsigned long st_blocks; /* Number 512-byte blocks allocated. */ | ||
72 | unsigned long __pad4; /* future possible st_blocks high bits */ | ||
73 | #else | ||
74 | #error no endian defined | ||
75 | #endif | ||
76 | unsigned long st_atime; | ||
77 | unsigned long st_atime_nsec; | ||
78 | |||
79 | unsigned long st_mtime; | ||
80 | unsigned long st_mtime_nsec; | ||
81 | |||
82 | unsigned long st_ctime; | ||
83 | unsigned long st_ctime_nsec; | ||
84 | |||
85 | unsigned long long st_ino; | ||
86 | }; | ||
87 | |||
88 | #endif /* _ASM_M32R_STAT_H */ | ||
diff --git a/arch/m32r/include/uapi/asm/statfs.h b/arch/m32r/include/uapi/asm/statfs.h deleted file mode 100644 index d42ae20dbb2b..000000000000 --- a/arch/m32r/include/uapi/asm/statfs.h +++ /dev/null | |||
@@ -1,7 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | ||
2 | #ifndef _ASM_M32R_STATFS_H | ||
3 | #define _ASM_M32R_STATFS_H | ||
4 | |||
5 | #include <asm-generic/statfs.h> | ||
6 | |||
7 | #endif /* _ASM_M32R_STATFS_H */ | ||
diff --git a/arch/m32r/include/uapi/asm/swab.h b/arch/m32r/include/uapi/asm/swab.h deleted file mode 100644 index 18dce47d2841..000000000000 --- a/arch/m32r/include/uapi/asm/swab.h +++ /dev/null | |||
@@ -1,11 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | ||
2 | #ifndef _ASM_M32R_SWAB_H | ||
3 | #define _ASM_M32R_SWAB_H | ||
4 | |||
5 | #include <linux/types.h> | ||
6 | |||
7 | #if !defined(__STRICT_ANSI__) || defined(__KERNEL__) | ||
8 | # define __SWAB_64_THRU_32__ | ||
9 | #endif | ||
10 | |||
11 | #endif /* _ASM_M32R_SWAB_H */ | ||
diff --git a/arch/m32r/include/uapi/asm/termbits.h b/arch/m32r/include/uapi/asm/termbits.h deleted file mode 100644 index 6cbbae9695b4..000000000000 --- a/arch/m32r/include/uapi/asm/termbits.h +++ /dev/null | |||
@@ -1,201 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | ||
2 | #ifndef _ASM_M32R_TERMBITS_H | ||
3 | #define _ASM_M32R_TERMBITS_H | ||
4 | |||
5 | #include <linux/posix_types.h> | ||
6 | |||
7 | typedef unsigned char cc_t; | ||
8 | typedef unsigned int speed_t; | ||
9 | typedef unsigned int tcflag_t; | ||
10 | |||
11 | #define NCCS 19 | ||
12 | struct termios { | ||
13 | tcflag_t c_iflag; /* input mode flags */ | ||
14 | tcflag_t c_oflag; /* output mode flags */ | ||
15 | tcflag_t c_cflag; /* control mode flags */ | ||
16 | tcflag_t c_lflag; /* local mode flags */ | ||
17 | cc_t c_line; /* line discipline */ | ||
18 | cc_t c_cc[NCCS]; /* control characters */ | ||
19 | }; | ||
20 | |||
21 | struct termios2 { | ||
22 | tcflag_t c_iflag; /* input mode flags */ | ||
23 | tcflag_t c_oflag; /* output mode flags */ | ||
24 | tcflag_t c_cflag; /* control mode flags */ | ||
25 | tcflag_t c_lflag; /* local mode flags */ | ||
26 | cc_t c_line; /* line discipline */ | ||
27 | cc_t c_cc[NCCS]; /* control characters */ | ||
28 | speed_t c_ispeed; /* input speed */ | ||
29 | speed_t c_ospeed; /* output speed */ | ||
30 | }; | ||
31 | |||
32 | struct ktermios { | ||
33 | tcflag_t c_iflag; /* input mode flags */ | ||
34 | tcflag_t c_oflag; /* output mode flags */ | ||
35 | tcflag_t c_cflag; /* control mode flags */ | ||
36 | tcflag_t c_lflag; /* local mode flags */ | ||
37 | cc_t c_line; /* line discipline */ | ||
38 | cc_t c_cc[NCCS]; /* control characters */ | ||
39 | speed_t c_ispeed; /* input speed */ | ||
40 | speed_t c_ospeed; /* output speed */ | ||
41 | }; | ||
42 | |||
43 | /* c_cc characters */ | ||
44 | #define VINTR 0 | ||
45 | #define VQUIT 1 | ||
46 | #define VERASE 2 | ||
47 | #define VKILL 3 | ||
48 | #define VEOF 4 | ||
49 | #define VTIME 5 | ||
50 | #define VMIN 6 | ||
51 | #define VSWTC 7 | ||
52 | #define VSTART 8 | ||
53 | #define VSTOP 9 | ||
54 | #define VSUSP 10 | ||
55 | #define VEOL 11 | ||
56 | #define VREPRINT 12 | ||
57 | #define VDISCARD 13 | ||
58 | #define VWERASE 14 | ||
59 | #define VLNEXT 15 | ||
60 | #define VEOL2 16 | ||
61 | |||
62 | /* c_iflag bits */ | ||
63 | #define IGNBRK 0000001 | ||
64 | #define BRKINT 0000002 | ||
65 | #define IGNPAR 0000004 | ||
66 | #define PARMRK 0000010 | ||
67 | #define INPCK 0000020 | ||
68 | #define ISTRIP 0000040 | ||
69 | #define INLCR 0000100 | ||
70 | #define IGNCR 0000200 | ||
71 | #define ICRNL 0000400 | ||
72 | #define IUCLC 0001000 | ||
73 | #define IXON 0002000 | ||
74 | #define IXANY 0004000 | ||
75 | #define IXOFF 0010000 | ||
76 | #define IMAXBEL 0020000 | ||
77 | #define IUTF8 0040000 | ||
78 | |||
79 | /* c_oflag bits */ | ||
80 | #define OPOST 0000001 | ||
81 | #define OLCUC 0000002 | ||
82 | #define ONLCR 0000004 | ||
83 | #define OCRNL 0000010 | ||
84 | #define ONOCR 0000020 | ||
85 | #define ONLRET 0000040 | ||
86 | #define OFILL 0000100 | ||
87 | #define OFDEL 0000200 | ||
88 | #define NLDLY 0000400 | ||
89 | #define NL0 0000000 | ||
90 | #define NL1 0000400 | ||
91 | #define CRDLY 0003000 | ||
92 | #define CR0 0000000 | ||
93 | #define CR1 0001000 | ||
94 | #define CR2 0002000 | ||
95 | #define CR3 0003000 | ||
96 | #define TABDLY 0014000 | ||
97 | #define TAB0 0000000 | ||
98 | #define TAB1 0004000 | ||
99 | #define TAB2 0010000 | ||
100 | #define TAB3 0014000 | ||
101 | #define XTABS 0014000 | ||
102 | #define BSDLY 0020000 | ||
103 | #define BS0 0000000 | ||
104 | #define BS1 0020000 | ||
105 | #define VTDLY 0040000 | ||
106 | #define VT0 0000000 | ||
107 | #define VT1 0040000 | ||
108 | #define FFDLY 0100000 | ||
109 | #define FF0 0000000 | ||
110 | #define FF1 0100000 | ||
111 | |||
112 | /* c_cflag bit meaning */ | ||
113 | #define CBAUD 0010017 | ||
114 | #define B0 0000000 /* hang up */ | ||
115 | #define B50 0000001 | ||
116 | #define B75 0000002 | ||
117 | #define B110 0000003 | ||
118 | #define B134 0000004 | ||
119 | #define B150 0000005 | ||
120 | #define B200 0000006 | ||
121 | #define B300 0000007 | ||
122 | #define B600 0000010 | ||
123 | #define B1200 0000011 | ||
124 | #define B1800 0000012 | ||
125 | #define B2400 0000013 | ||
126 | #define B4800 0000014 | ||
127 | #define B9600 0000015 | ||
128 | #define B19200 0000016 | ||
129 | #define B38400 0000017 | ||
130 | #define EXTA B19200 | ||
131 | #define EXTB B38400 | ||
132 | #define CSIZE 0000060 | ||
133 | #define CS5 0000000 | ||
134 | #define CS6 0000020 | ||
135 | #define CS7 0000040 | ||
136 | #define CS8 0000060 | ||
137 | #define CSTOPB 0000100 | ||
138 | #define CREAD 0000200 | ||
139 | #define PARENB 0000400 | ||
140 | #define PARODD 0001000 | ||
141 | #define HUPCL 0002000 | ||
142 | #define CLOCAL 0004000 | ||
143 | #define CBAUDEX 0010000 | ||
144 | #define BOTHER 0010000 | ||
145 | #define B57600 0010001 | ||
146 | #define B115200 0010002 | ||
147 | #define B230400 0010003 | ||
148 | #define B460800 0010004 | ||
149 | #define B500000 0010005 | ||
150 | #define B576000 0010006 | ||
151 | #define B921600 0010007 | ||
152 | #define B1000000 0010010 | ||
153 | #define B1152000 0010011 | ||
154 | #define B1500000 0010012 | ||
155 | #define B2000000 0010013 | ||
156 | #define B2500000 0010014 | ||
157 | #define B3000000 0010015 | ||
158 | #define B3500000 0010016 | ||
159 | #define B4000000 0010017 | ||
160 | #define CIBAUD 002003600000 /** input baud rate */ | ||
161 | #define CTVB 004000000000 /* VisioBraille Terminal flow control */ | ||
162 | #define CMSPAR 010000000000 /* mark or space (stick) parity */ | ||
163 | #define CRTSCTS 020000000000 /* flow control */ | ||
164 | |||
165 | #define IBSHIFT 16 /* Shift from CBAUD to CIBAUD */ | ||
166 | |||
167 | /* c_lflag bits */ | ||
168 | #define ISIG 0000001 | ||
169 | #define ICANON 0000002 | ||
170 | #define XCASE 0000004 | ||
171 | #define ECHO 0000010 | ||
172 | #define ECHOE 0000020 | ||
173 | #define ECHOK 0000040 | ||
174 | #define ECHONL 0000100 | ||
175 | #define NOFLSH 0000200 | ||
176 | #define TOSTOP 0000400 | ||
177 | #define ECHOCTL 0001000 | ||
178 | #define ECHOPRT 0002000 | ||
179 | #define ECHOKE 0004000 | ||
180 | #define FLUSHO 0010000 | ||
181 | #define PENDIN 0040000 | ||
182 | #define IEXTEN 0100000 | ||
183 | #define EXTPROC 0200000 | ||
184 | |||
185 | /* tcflow() and TCXONC use these */ | ||
186 | #define TCOOFF 0 | ||
187 | #define TCOON 1 | ||
188 | #define TCIOFF 2 | ||
189 | #define TCION 3 | ||
190 | |||
191 | /* tcflush() and TCFLSH use these */ | ||
192 | #define TCIFLUSH 0 | ||
193 | #define TCOFLUSH 1 | ||
194 | #define TCIOFLUSH 2 | ||
195 | |||
196 | /* tcsetattr uses these */ | ||
197 | #define TCSANOW 0 | ||
198 | #define TCSADRAIN 1 | ||
199 | #define TCSAFLUSH 2 | ||
200 | |||
201 | #endif /* _ASM_M32R_TERMBITS_H */ | ||
diff --git a/arch/m32r/include/uapi/asm/termios.h b/arch/m32r/include/uapi/asm/termios.h deleted file mode 100644 index 9b80a85e83ac..000000000000 --- a/arch/m32r/include/uapi/asm/termios.h +++ /dev/null | |||
@@ -1,44 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | ||
2 | #ifndef _UAPI_M32R_TERMIOS_H | ||
3 | #define _UAPI_M32R_TERMIOS_H | ||
4 | |||
5 | #include <asm/termbits.h> | ||
6 | #include <asm/ioctls.h> | ||
7 | |||
8 | struct winsize { | ||
9 | unsigned short ws_row; | ||
10 | unsigned short ws_col; | ||
11 | unsigned short ws_xpixel; | ||
12 | unsigned short ws_ypixel; | ||
13 | }; | ||
14 | |||
15 | #define NCC 8 | ||
16 | struct termio { | ||
17 | unsigned short c_iflag; /* input mode flags */ | ||
18 | unsigned short c_oflag; /* output mode flags */ | ||
19 | unsigned short c_cflag; /* control mode flags */ | ||
20 | unsigned short c_lflag; /* local mode flags */ | ||
21 | unsigned char c_line; /* line discipline */ | ||
22 | unsigned char c_cc[NCC]; /* control characters */ | ||
23 | }; | ||
24 | |||
25 | /* modem lines */ | ||
26 | #define TIOCM_LE 0x001 | ||
27 | #define TIOCM_DTR 0x002 | ||
28 | #define TIOCM_RTS 0x004 | ||
29 | #define TIOCM_ST 0x008 | ||
30 | #define TIOCM_SR 0x010 | ||
31 | #define TIOCM_CTS 0x020 | ||
32 | #define TIOCM_CAR 0x040 | ||
33 | #define TIOCM_RNG 0x080 | ||
34 | #define TIOCM_DSR 0x100 | ||
35 | #define TIOCM_CD TIOCM_CAR | ||
36 | #define TIOCM_RI TIOCM_RNG | ||
37 | #define TIOCM_OUT1 0x2000 | ||
38 | #define TIOCM_OUT2 0x4000 | ||
39 | #define TIOCM_LOOP 0x8000 | ||
40 | |||
41 | /* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */ | ||
42 | |||
43 | |||
44 | #endif /* _UAPI_M32R_TERMIOS_H */ | ||
diff --git a/arch/m32r/include/uapi/asm/types.h b/arch/m32r/include/uapi/asm/types.h deleted file mode 100644 index 9ec9d4c5ac4d..000000000000 --- a/arch/m32r/include/uapi/asm/types.h +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | #include <asm-generic/int-ll64.h> | ||
diff --git a/arch/m32r/include/uapi/asm/unistd.h b/arch/m32r/include/uapi/asm/unistd.h deleted file mode 100644 index adf8666a68ef..000000000000 --- a/arch/m32r/include/uapi/asm/unistd.h +++ /dev/null | |||
@@ -1,336 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | ||
2 | #ifndef _UAPI_ASM_M32R_UNISTD_H | ||
3 | #define _UAPI_ASM_M32R_UNISTD_H | ||
4 | |||
5 | /* | ||
6 | * This file contains the system call numbers. | ||
7 | */ | ||
8 | |||
9 | #define __NR_restart_syscall 0 | ||
10 | #define __NR_exit 1 | ||
11 | #define __NR_fork 2 | ||
12 | #define __NR_read 3 | ||
13 | #define __NR_write 4 | ||
14 | #define __NR_open 5 | ||
15 | #define __NR_close 6 | ||
16 | #define __NR_waitpid 7 | ||
17 | #define __NR_creat 8 | ||
18 | #define __NR_link 9 | ||
19 | #define __NR_unlink 10 | ||
20 | #define __NR_execve 11 | ||
21 | #define __NR_chdir 12 | ||
22 | #define __NR_time 13 | ||
23 | #define __NR_mknod 14 | ||
24 | #define __NR_chmod 15 | ||
25 | /* 16 is unused */ | ||
26 | /* 17 is unused */ | ||
27 | /* 18 is unused */ | ||
28 | #define __NR_lseek 19 | ||
29 | #define __NR_getpid 20 | ||
30 | #define __NR_mount 21 | ||
31 | #define __NR_umount 22 | ||
32 | /* 23 is unused */ | ||
33 | /* 24 is unused */ | ||
34 | #define __NR_stime 25 | ||
35 | #define __NR_ptrace 26 | ||
36 | #define __NR_alarm 27 | ||
37 | /* 28 is unused */ | ||
38 | #define __NR_pause 29 | ||
39 | #define __NR_utime 30 | ||
40 | /* 31 is unused */ | ||
41 | #define __NR_cachectl 32 /* old #define __NR_gtty 32*/ | ||
42 | #define __NR_access 33 | ||
43 | /* 34 is unused */ | ||
44 | /* 35 is unused */ | ||
45 | #define __NR_sync 36 | ||
46 | #define __NR_kill 37 | ||
47 | #define __NR_rename 38 | ||
48 | #define __NR_mkdir 39 | ||
49 | #define __NR_rmdir 40 | ||
50 | #define __NR_dup 41 | ||
51 | #define __NR_pipe 42 | ||
52 | #define __NR_times 43 | ||
53 | /* 44 is unused */ | ||
54 | #define __NR_brk 45 | ||
55 | /* 46 is unused */ | ||
56 | /* 47 is unused (getgid16) */ | ||
57 | /* 48 is unused */ | ||
58 | /* 49 is unused */ | ||
59 | /* 50 is unused */ | ||
60 | #define __NR_acct 51 | ||
61 | #define __NR_umount2 52 | ||
62 | /* 53 is unused */ | ||
63 | #define __NR_ioctl 54 | ||
64 | /* 55 is unused (fcntl) */ | ||
65 | /* 56 is unused */ | ||
66 | #define __NR_setpgid 57 | ||
67 | /* 58 is unused */ | ||
68 | /* 59 is unused */ | ||
69 | #define __NR_umask 60 | ||
70 | #define __NR_chroot 61 | ||
71 | #define __NR_ustat 62 | ||
72 | #define __NR_dup2 63 | ||
73 | #define __NR_getppid 64 | ||
74 | #define __NR_getpgrp 65 | ||
75 | #define __NR_setsid 66 | ||
76 | /* 67 is unused */ | ||
77 | /* 68 is unused*/ | ||
78 | /* 69 is unused*/ | ||
79 | /* 70 is unused */ | ||
80 | /* 71 is unused */ | ||
81 | /* 72 is unused */ | ||
82 | /* 73 is unused */ | ||
83 | #define __NR_sethostname 74 | ||
84 | #define __NR_setrlimit 75 | ||
85 | /* 76 is unused (old getrlimit) */ | ||
86 | #define __NR_getrusage 77 | ||
87 | #define __NR_gettimeofday 78 | ||
88 | #define __NR_settimeofday 79 | ||
89 | /* 80 is unused */ | ||
90 | /* 81 is unused */ | ||
91 | /* 82 is unused */ | ||
92 | #define __NR_symlink 83 | ||
93 | /* 84 is unused */ | ||
94 | #define __NR_readlink 85 | ||
95 | #define __NR_uselib 86 | ||
96 | #define __NR_swapon 87 | ||
97 | #define __NR_reboot 88 | ||
98 | /* 89 is unused */ | ||
99 | /* 90 is unused */ | ||
100 | #define __NR_munmap 91 | ||
101 | #define __NR_truncate 92 | ||
102 | #define __NR_ftruncate 93 | ||
103 | #define __NR_fchmod 94 | ||
104 | /* 95 is unused */ | ||
105 | #define __NR_getpriority 96 | ||
106 | #define __NR_setpriority 97 | ||
107 | /* 98 is unused */ | ||
108 | #define __NR_statfs 99 | ||
109 | #define __NR_fstatfs 100 | ||
110 | /* 101 is unused */ | ||
111 | #define __NR_socketcall 102 | ||
112 | #define __NR_syslog 103 | ||
113 | #define __NR_setitimer 104 | ||
114 | #define __NR_getitimer 105 | ||
115 | #define __NR_stat 106 | ||
116 | #define __NR_lstat 107 | ||
117 | #define __NR_fstat 108 | ||
118 | /* 109 is unused */ | ||
119 | /* 110 is unused */ | ||
120 | #define __NR_vhangup 111 | ||
121 | /* 112 is unused */ | ||
122 | /* 113 is unused */ | ||
123 | #define __NR_wait4 114 | ||
124 | #define __NR_swapoff 115 | ||
125 | #define __NR_sysinfo 116 | ||
126 | #define __NR_ipc 117 | ||
127 | #define __NR_fsync 118 | ||
128 | /* 119 is unused */ | ||
129 | #define __NR_clone 120 | ||
130 | #define __NR_setdomainname 121 | ||
131 | #define __NR_uname 122 | ||
132 | /* 123 is unused */ | ||
133 | #define __NR_adjtimex 124 | ||
134 | #define __NR_mprotect 125 | ||
135 | /* 126 is unused */ | ||
136 | /* 127 is unused */ | ||
137 | #define __NR_init_module 128 | ||
138 | #define __NR_delete_module 129 | ||
139 | /* 130 is unused */ | ||
140 | #define __NR_quotactl 131 | ||
141 | #define __NR_getpgid 132 | ||
142 | #define __NR_fchdir 133 | ||
143 | #define __NR_bdflush 134 | ||
144 | #define __NR_sysfs 135 | ||
145 | #define __NR_personality 136 | ||
146 | /* 137 is unused */ | ||
147 | /* 138 is unused */ | ||
148 | /* 139 is unused */ | ||
149 | #define __NR__llseek 140 | ||
150 | #define __NR_getdents 141 | ||
151 | #define __NR__newselect 142 | ||
152 | #define __NR_flock 143 | ||
153 | #define __NR_msync 144 | ||
154 | #define __NR_readv 145 | ||
155 | #define __NR_writev 146 | ||
156 | #define __NR_getsid 147 | ||
157 | #define __NR_fdatasync 148 | ||
158 | #define __NR__sysctl 149 | ||
159 | #define __NR_mlock 150 | ||
160 | #define __NR_munlock 151 | ||
161 | #define __NR_mlockall 152 | ||
162 | #define __NR_munlockall 153 | ||
163 | #define __NR_sched_setparam 154 | ||
164 | #define __NR_sched_getparam 155 | ||
165 | #define __NR_sched_setscheduler 156 | ||
166 | #define __NR_sched_getscheduler 157 | ||
167 | #define __NR_sched_yield 158 | ||
168 | #define __NR_sched_get_priority_max 159 | ||
169 | #define __NR_sched_get_priority_min 160 | ||
170 | #define __NR_sched_rr_get_interval 161 | ||
171 | #define __NR_nanosleep 162 | ||
172 | #define __NR_mremap 163 | ||
173 | /* 164 is unused */ | ||
174 | /* 165 is unused */ | ||
175 | #define __NR_tas 166 | ||
176 | /* 167 is unused */ | ||
177 | #define __NR_poll 168 | ||
178 | #define __NR_nfsservctl 169 | ||
179 | /* 170 is unused */ | ||
180 | /* 171 is unused */ | ||
181 | #define __NR_prctl 172 | ||
182 | #define __NR_rt_sigreturn 173 | ||
183 | #define __NR_rt_sigaction 174 | ||
184 | #define __NR_rt_sigprocmask 175 | ||
185 | #define __NR_rt_sigpending 176 | ||
186 | #define __NR_rt_sigtimedwait 177 | ||
187 | #define __NR_rt_sigqueueinfo 178 | ||
188 | #define __NR_rt_sigsuspend 179 | ||
189 | #define __NR_pread64 180 | ||
190 | #define __NR_pwrite64 181 | ||
191 | /* 182 is unused */ | ||
192 | #define __NR_getcwd 183 | ||
193 | #define __NR_capget 184 | ||
194 | #define __NR_capset 185 | ||
195 | #define __NR_sigaltstack 186 | ||
196 | #define __NR_sendfile 187 | ||
197 | /* 188 is unused */ | ||
198 | /* 189 is unused */ | ||
199 | #define __NR_vfork 190 | ||
200 | #define __NR_ugetrlimit 191 /* SuS compliant getrlimit */ | ||
201 | #define __NR_mmap2 192 | ||
202 | #define __NR_truncate64 193 | ||
203 | #define __NR_ftruncate64 194 | ||
204 | #define __NR_stat64 195 | ||
205 | #define __NR_lstat64 196 | ||
206 | #define __NR_fstat64 197 | ||
207 | #define __NR_lchown32 198 | ||
208 | #define __NR_getuid32 199 | ||
209 | #define __NR_getgid32 200 | ||
210 | #define __NR_geteuid32 201 | ||
211 | #define __NR_getegid32 202 | ||
212 | #define __NR_setreuid32 203 | ||
213 | #define __NR_setregid32 204 | ||
214 | #define __NR_getgroups32 205 | ||
215 | #define __NR_setgroups32 206 | ||
216 | #define __NR_fchown32 207 | ||
217 | #define __NR_setresuid32 208 | ||
218 | #define __NR_getresuid32 209 | ||
219 | #define __NR_setresgid32 210 | ||
220 | #define __NR_getresgid32 211 | ||
221 | #define __NR_chown32 212 | ||
222 | #define __NR_setuid32 213 | ||
223 | #define __NR_setgid32 214 | ||
224 | #define __NR_setfsuid32 215 | ||
225 | #define __NR_setfsgid32 216 | ||
226 | #define __NR_pivot_root 217 | ||
227 | #define __NR_mincore 218 | ||
228 | #define __NR_madvise 219 | ||
229 | #define __NR_getdents64 220 | ||
230 | #define __NR_fcntl64 221 | ||
231 | /* 222 is unused */ | ||
232 | /* 223 is unused */ | ||
233 | #define __NR_gettid 224 | ||
234 | #define __NR_readahead 225 | ||
235 | #define __NR_setxattr 226 | ||
236 | #define __NR_lsetxattr 227 | ||
237 | #define __NR_fsetxattr 228 | ||
238 | #define __NR_getxattr 229 | ||
239 | #define __NR_lgetxattr 230 | ||
240 | #define __NR_fgetxattr 231 | ||
241 | #define __NR_listxattr 232 | ||
242 | #define __NR_llistxattr 233 | ||
243 | #define __NR_flistxattr 234 | ||
244 | #define __NR_removexattr 235 | ||
245 | #define __NR_lremovexattr 236 | ||
246 | #define __NR_fremovexattr 237 | ||
247 | #define __NR_tkill 238 | ||
248 | #define __NR_sendfile64 239 | ||
249 | #define __NR_futex 240 | ||
250 | #define __NR_sched_setaffinity 241 | ||
251 | #define __NR_sched_getaffinity 242 | ||
252 | #define __NR_set_thread_area 243 | ||
253 | #define __NR_get_thread_area 244 | ||
254 | #define __NR_io_setup 245 | ||
255 | #define __NR_io_destroy 246 | ||
256 | #define __NR_io_getevents 247 | ||
257 | #define __NR_io_submit 248 | ||
258 | #define __NR_io_cancel 249 | ||
259 | #define __NR_fadvise64 250 | ||
260 | /* 251 is unused */ | ||
261 | #define __NR_exit_group 252 | ||
262 | #define __NR_lookup_dcookie 253 | ||
263 | #define __NR_epoll_create 254 | ||
264 | #define __NR_epoll_ctl 255 | ||
265 | #define __NR_epoll_wait 256 | ||
266 | #define __NR_remap_file_pages 257 | ||
267 | #define __NR_set_tid_address 258 | ||
268 | #define __NR_timer_create 259 | ||
269 | #define __NR_timer_settime (__NR_timer_create+1) | ||
270 | #define __NR_timer_gettime (__NR_timer_create+2) | ||
271 | #define __NR_timer_getoverrun (__NR_timer_create+3) | ||
272 | #define __NR_timer_delete (__NR_timer_create+4) | ||
273 | #define __NR_clock_settime (__NR_timer_create+5) | ||
274 | #define __NR_clock_gettime (__NR_timer_create+6) | ||
275 | #define __NR_clock_getres (__NR_timer_create+7) | ||
276 | #define __NR_clock_nanosleep (__NR_timer_create+8) | ||
277 | #define __NR_statfs64 268 | ||
278 | #define __NR_fstatfs64 269 | ||
279 | #define __NR_tgkill 270 | ||
280 | #define __NR_utimes 271 | ||
281 | #define __NR_fadvise64_64 272 | ||
282 | #define __NR_vserver 273 | ||
283 | #define __NR_mbind 274 | ||
284 | #define __NR_get_mempolicy 275 | ||
285 | #define __NR_set_mempolicy 276 | ||
286 | #define __NR_mq_open 277 | ||
287 | #define __NR_mq_unlink (__NR_mq_open+1) | ||
288 | #define __NR_mq_timedsend (__NR_mq_open+2) | ||
289 | #define __NR_mq_timedreceive (__NR_mq_open+3) | ||
290 | #define __NR_mq_notify (__NR_mq_open+4) | ||
291 | #define __NR_mq_getsetattr (__NR_mq_open+5) | ||
292 | #define __NR_kexec_load 283 | ||
293 | #define __NR_waitid 284 | ||
294 | /* 285 is unused */ | ||
295 | #define __NR_add_key 286 | ||
296 | #define __NR_request_key 287 | ||
297 | #define __NR_keyctl 288 | ||
298 | #define __NR_ioprio_set 289 | ||
299 | #define __NR_ioprio_get 290 | ||
300 | #define __NR_inotify_init 291 | ||
301 | #define __NR_inotify_add_watch 292 | ||
302 | #define __NR_inotify_rm_watch 293 | ||
303 | #define __NR_migrate_pages 294 | ||
304 | #define __NR_openat 295 | ||
305 | #define __NR_mkdirat 296 | ||
306 | #define __NR_mknodat 297 | ||
307 | #define __NR_fchownat 298 | ||
308 | #define __NR_futimesat 299 | ||
309 | #define __NR_fstatat64 300 | ||
310 | #define __NR_unlinkat 301 | ||
311 | #define __NR_renameat 302 | ||
312 | #define __NR_linkat 303 | ||
313 | #define __NR_symlinkat 304 | ||
314 | #define __NR_readlinkat 305 | ||
315 | #define __NR_fchmodat 306 | ||
316 | #define __NR_faccessat 307 | ||
317 | #define __NR_pselect6 308 | ||
318 | #define __NR_ppoll 309 | ||
319 | #define __NR_unshare 310 | ||
320 | #define __NR_set_robust_list 311 | ||
321 | #define __NR_get_robust_list 312 | ||
322 | #define __NR_splice 313 | ||
323 | #define __NR_sync_file_range 314 | ||
324 | #define __NR_tee 315 | ||
325 | #define __NR_vmsplice 316 | ||
326 | #define __NR_move_pages 317 | ||
327 | #define __NR_getcpu 318 | ||
328 | #define __NR_epoll_pwait 319 | ||
329 | #define __NR_utimensat 320 | ||
330 | #define __NR_signalfd 321 | ||
331 | /* #define __NR_timerfd 322 removed */ | ||
332 | #define __NR_eventfd 323 | ||
333 | #define __NR_fallocate 324 | ||
334 | #define __NR_setns 325 | ||
335 | |||
336 | #endif /* _UAPI_ASM_M32R_UNISTD_H */ | ||
diff --git a/arch/m32r/kernel/.gitignore b/arch/m32r/kernel/.gitignore deleted file mode 100644 index c5f676c3c224..000000000000 --- a/arch/m32r/kernel/.gitignore +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | vmlinux.lds | ||
diff --git a/arch/m32r/kernel/Makefile b/arch/m32r/kernel/Makefile deleted file mode 100644 index bd94dca51596..000000000000 --- a/arch/m32r/kernel/Makefile +++ /dev/null | |||
@@ -1,12 +0,0 @@ | |||
1 | # SPDX-License-Identifier: GPL-2.0 | ||
2 | # | ||
3 | # Makefile for the Linux/M32R kernel. | ||
4 | # | ||
5 | |||
6 | extra-y := head.o vmlinux.lds | ||
7 | |||
8 | obj-y := process.o entry.o traps.o align.o irq.o setup.o time.o \ | ||
9 | m32r_ksyms.o sys_m32r.o signal.o ptrace.o | ||
10 | |||
11 | obj-$(CONFIG_SMP) += smp.o smpboot.o | ||
12 | obj-$(CONFIG_MODULES) += module.o | ||
diff --git a/arch/m32r/kernel/align.c b/arch/m32r/kernel/align.c deleted file mode 100644 index 2919a6647aff..000000000000 --- a/arch/m32r/kernel/align.c +++ /dev/null | |||
@@ -1,585 +0,0 @@ | |||
1 | // SPDX-License-Identifier: GPL-2.0 | ||
2 | /* | ||
3 | * align.c - address exception handler for M32R | ||
4 | * | ||
5 | * Copyright (c) 2003 Hitoshi Yamamoto | ||
6 | */ | ||
7 | |||
8 | #include <asm/ptrace.h> | ||
9 | #include <linux/uaccess.h> | ||
10 | |||
11 | static int get_reg(struct pt_regs *regs, int nr) | ||
12 | { | ||
13 | int val; | ||
14 | |||
15 | if (nr < 4) | ||
16 | val = *(unsigned long *)(®s->r0 + nr); | ||
17 | else if (nr < 7) | ||
18 | val = *(unsigned long *)(®s->r4 + (nr - 4)); | ||
19 | else if (nr < 13) | ||
20 | val = *(unsigned long *)(®s->r7 + (nr - 7)); | ||
21 | else | ||
22 | val = *(unsigned long *)(®s->fp + (nr - 13)); | ||
23 | |||
24 | return val; | ||
25 | } | ||
26 | |||
27 | static void set_reg(struct pt_regs *regs, int nr, int val) | ||
28 | { | ||
29 | if (nr < 4) | ||
30 | *(unsigned long *)(®s->r0 + nr) = val; | ||
31 | else if (nr < 7) | ||
32 | *(unsigned long *)(®s->r4 + (nr - 4)) = val; | ||
33 | else if (nr < 13) | ||
34 | *(unsigned long *)(®s->r7 + (nr - 7)) = val; | ||
35 | else | ||
36 | *(unsigned long *)(®s->fp + (nr - 13)) = val; | ||
37 | } | ||
38 | |||
39 | #define REG1(insn) (((insn) & 0x0f00) >> 8) | ||
40 | #define REG2(insn) ((insn) & 0x000f) | ||
41 | #define PSW_BC 0x100 | ||
42 | |||
43 | /* O- instruction */ | ||
44 | #define ISA_LD1 0x20c0 /* ld Rdest, @Rsrc */ | ||
45 | #define ISA_LD2 0x20e0 /* ld Rdest, @Rsrc+ */ | ||
46 | #define ISA_LDH 0x20a0 /* ldh Rdest, @Rsrc */ | ||
47 | #define ISA_LDUH 0x20b0 /* lduh Rdest, @Rsrc */ | ||
48 | #define ISA_ST1 0x2040 /* st Rsrc1, @Rsrc2 */ | ||
49 | #define ISA_ST2 0x2060 /* st Rsrc1, @+Rsrc2 */ | ||
50 | #define ISA_ST3 0x2070 /* st Rsrc1, @-Rsrc2 */ | ||
51 | #define ISA_STH1 0x2020 /* sth Rsrc1, @Rsrc2 */ | ||
52 | #define ISA_STH2 0x2030 /* sth Rsrc1, @Rsrc2+ */ | ||
53 | |||
54 | #ifdef CONFIG_ISA_DUAL_ISSUE | ||
55 | |||
56 | /* OS instruction */ | ||
57 | #define ISA_ADD 0x00a0 /* add Rdest, Rsrc */ | ||
58 | #define ISA_ADDI 0x4000 /* addi Rdest, #imm8 */ | ||
59 | #define ISA_ADDX 0x0090 /* addx Rdest, Rsrc */ | ||
60 | #define ISA_AND 0x00c0 /* and Rdest, Rsrc */ | ||
61 | #define ISA_CMP 0x0040 /* cmp Rsrc1, Rsrc2 */ | ||
62 | #define ISA_CMPEQ 0x0060 /* cmpeq Rsrc1, Rsrc2 */ | ||
63 | #define ISA_CMPU 0x0050 /* cmpu Rsrc1, Rsrc2 */ | ||
64 | #define ISA_CMPZ 0x0070 /* cmpz Rsrc */ | ||
65 | #define ISA_LDI 0x6000 /* ldi Rdest, #imm8 */ | ||
66 | #define ISA_MV 0x1080 /* mv Rdest, Rsrc */ | ||
67 | #define ISA_NEG 0x0030 /* neg Rdest, Rsrc */ | ||
68 | #define ISA_NOP 0x7000 /* nop */ | ||
69 | #define ISA_NOT 0x00b0 /* not Rdest, Rsrc */ | ||
70 | #define ISA_OR 0x00e0 /* or Rdest, Rsrc */ | ||
71 | #define ISA_SUB 0x0020 /* sub Rdest, Rsrc */ | ||
72 | #define ISA_SUBX 0x0010 /* subx Rdest, Rsrc */ | ||
73 | #define ISA_XOR 0x00d0 /* xor Rdest, Rsrc */ | ||
74 | |||
75 | /* -S instruction */ | ||
76 | #define ISA_MUL 0x1060 /* mul Rdest, Rsrc */ | ||
77 | #define ISA_MULLO_A0 0x3010 /* mullo Rsrc1, Rsrc2, A0 */ | ||
78 | #define ISA_MULLO_A1 0x3090 /* mullo Rsrc1, Rsrc2, A1 */ | ||
79 | #define ISA_MVFACMI_A0 0x50f2 /* mvfacmi Rdest, A0 */ | ||
80 | #define ISA_MVFACMI_A1 0x50f6 /* mvfacmi Rdest, A1 */ | ||
81 | |||
82 | static int emu_addi(unsigned short insn, struct pt_regs *regs) | ||
83 | { | ||
84 | char imm = (char)(insn & 0xff); | ||
85 | int dest = REG1(insn); | ||
86 | int val; | ||
87 | |||
88 | val = get_reg(regs, dest); | ||
89 | val += imm; | ||
90 | set_reg(regs, dest, val); | ||
91 | |||
92 | return 0; | ||
93 | } | ||
94 | |||
95 | static int emu_ldi(unsigned short insn, struct pt_regs *regs) | ||
96 | { | ||
97 | char imm = (char)(insn & 0xff); | ||
98 | |||
99 | set_reg(regs, REG1(insn), (int)imm); | ||
100 | |||
101 | return 0; | ||
102 | } | ||
103 | |||
104 | static int emu_add(unsigned short insn, struct pt_regs *regs) | ||
105 | { | ||
106 | int dest = REG1(insn); | ||
107 | int src = REG2(insn); | ||
108 | int val; | ||
109 | |||
110 | val = get_reg(regs, dest); | ||
111 | val += get_reg(regs, src); | ||
112 | set_reg(regs, dest, val); | ||
113 | |||
114 | return 0; | ||
115 | } | ||
116 | |||
117 | static int emu_addx(unsigned short insn, struct pt_regs *regs) | ||
118 | { | ||
119 | int dest = REG1(insn); | ||
120 | unsigned int val, tmp; | ||
121 | |||
122 | val = regs->psw & PSW_BC ? 1 : 0; | ||
123 | tmp = get_reg(regs, dest); | ||
124 | val += tmp; | ||
125 | val += (unsigned int)get_reg(regs, REG2(insn)); | ||
126 | set_reg(regs, dest, val); | ||
127 | |||
128 | /* C bit set */ | ||
129 | if (val < tmp) | ||
130 | regs->psw |= PSW_BC; | ||
131 | else | ||
132 | regs->psw &= ~(PSW_BC); | ||
133 | |||
134 | return 0; | ||
135 | } | ||
136 | |||
137 | static int emu_and(unsigned short insn, struct pt_regs *regs) | ||
138 | { | ||
139 | int dest = REG1(insn); | ||
140 | int val; | ||
141 | |||
142 | val = get_reg(regs, dest); | ||
143 | val &= get_reg(regs, REG2(insn)); | ||
144 | set_reg(regs, dest, val); | ||
145 | |||
146 | return 0; | ||
147 | } | ||
148 | |||
149 | static int emu_cmp(unsigned short insn, struct pt_regs *regs) | ||
150 | { | ||
151 | if (get_reg(regs, REG1(insn)) < get_reg(regs, REG2(insn))) | ||
152 | regs->psw |= PSW_BC; | ||
153 | else | ||
154 | regs->psw &= ~(PSW_BC); | ||
155 | |||
156 | return 0; | ||
157 | } | ||
158 | |||
159 | static int emu_cmpeq(unsigned short insn, struct pt_regs *regs) | ||
160 | { | ||
161 | if (get_reg(regs, REG1(insn)) == get_reg(regs, REG2(insn))) | ||
162 | regs->psw |= PSW_BC; | ||
163 | else | ||
164 | regs->psw &= ~(PSW_BC); | ||
165 | |||
166 | return 0; | ||
167 | } | ||
168 | |||
169 | static int emu_cmpu(unsigned short insn, struct pt_regs *regs) | ||
170 | { | ||
171 | if ((unsigned int)get_reg(regs, REG1(insn)) | ||
172 | < (unsigned int)get_reg(regs, REG2(insn))) | ||
173 | regs->psw |= PSW_BC; | ||
174 | else | ||
175 | regs->psw &= ~(PSW_BC); | ||
176 | |||
177 | return 0; | ||
178 | } | ||
179 | |||
180 | static int emu_cmpz(unsigned short insn, struct pt_regs *regs) | ||
181 | { | ||
182 | if (!get_reg(regs, REG2(insn))) | ||
183 | regs->psw |= PSW_BC; | ||
184 | else | ||
185 | regs->psw &= ~(PSW_BC); | ||
186 | |||
187 | return 0; | ||
188 | } | ||
189 | |||
190 | static int emu_mv(unsigned short insn, struct pt_regs *regs) | ||
191 | { | ||
192 | int val; | ||
193 | |||
194 | val = get_reg(regs, REG2(insn)); | ||
195 | set_reg(regs, REG1(insn), val); | ||
196 | |||
197 | return 0; | ||
198 | } | ||
199 | |||
200 | static int emu_neg(unsigned short insn, struct pt_regs *regs) | ||
201 | { | ||
202 | int val; | ||
203 | |||
204 | val = get_reg(regs, REG2(insn)); | ||
205 | set_reg(regs, REG1(insn), 0 - val); | ||
206 | |||
207 | return 0; | ||
208 | } | ||
209 | |||
210 | static int emu_not(unsigned short insn, struct pt_regs *regs) | ||
211 | { | ||
212 | int val; | ||
213 | |||
214 | val = get_reg(regs, REG2(insn)); | ||
215 | set_reg(regs, REG1(insn), ~val); | ||
216 | |||
217 | return 0; | ||
218 | } | ||
219 | |||
220 | static int emu_or(unsigned short insn, struct pt_regs *regs) | ||
221 | { | ||
222 | int dest = REG1(insn); | ||
223 | int val; | ||
224 | |||
225 | val = get_reg(regs, dest); | ||
226 | val |= get_reg(regs, REG2(insn)); | ||
227 | set_reg(regs, dest, val); | ||
228 | |||
229 | return 0; | ||
230 | } | ||
231 | |||
232 | static int emu_sub(unsigned short insn, struct pt_regs *regs) | ||
233 | { | ||
234 | int dest = REG1(insn); | ||
235 | int val; | ||
236 | |||
237 | val = get_reg(regs, dest); | ||
238 | val -= get_reg(regs, REG2(insn)); | ||
239 | set_reg(regs, dest, val); | ||
240 | |||
241 | return 0; | ||
242 | } | ||
243 | |||
244 | static int emu_subx(unsigned short insn, struct pt_regs *regs) | ||
245 | { | ||
246 | int dest = REG1(insn); | ||
247 | unsigned int val, tmp; | ||
248 | |||
249 | val = tmp = get_reg(regs, dest); | ||
250 | val -= (unsigned int)get_reg(regs, REG2(insn)); | ||
251 | val -= regs->psw & PSW_BC ? 1 : 0; | ||
252 | set_reg(regs, dest, val); | ||
253 | |||
254 | /* C bit set */ | ||
255 | if (val > tmp) | ||
256 | regs->psw |= PSW_BC; | ||
257 | else | ||
258 | regs->psw &= ~(PSW_BC); | ||
259 | |||
260 | return 0; | ||
261 | } | ||
262 | |||
263 | static int emu_xor(unsigned short insn, struct pt_regs *regs) | ||
264 | { | ||
265 | int dest = REG1(insn); | ||
266 | unsigned int val; | ||
267 | |||
268 | val = (unsigned int)get_reg(regs, dest); | ||
269 | val ^= (unsigned int)get_reg(regs, REG2(insn)); | ||
270 | set_reg(regs, dest, val); | ||
271 | |||
272 | return 0; | ||
273 | } | ||
274 | |||
275 | static int emu_mul(unsigned short insn, struct pt_regs *regs) | ||
276 | { | ||
277 | int dest = REG1(insn); | ||
278 | int reg1, reg2; | ||
279 | |||
280 | reg1 = get_reg(regs, dest); | ||
281 | reg2 = get_reg(regs, REG2(insn)); | ||
282 | |||
283 | __asm__ __volatile__ ( | ||
284 | "mul %0, %1; \n\t" | ||
285 | : "+r" (reg1) : "r" (reg2) | ||
286 | ); | ||
287 | |||
288 | set_reg(regs, dest, reg1); | ||
289 | |||
290 | return 0; | ||
291 | } | ||
292 | |||
293 | static int emu_mullo_a0(unsigned short insn, struct pt_regs *regs) | ||
294 | { | ||
295 | int reg1, reg2; | ||
296 | |||
297 | reg1 = get_reg(regs, REG1(insn)); | ||
298 | reg2 = get_reg(regs, REG2(insn)); | ||
299 | |||
300 | __asm__ __volatile__ ( | ||
301 | "mullo %0, %1, a0; \n\t" | ||
302 | "mvfachi %0, a0; \n\t" | ||
303 | "mvfaclo %1, a0; \n\t" | ||
304 | : "+r" (reg1), "+r" (reg2) | ||
305 | ); | ||
306 | |||
307 | regs->acc0h = reg1; | ||
308 | regs->acc0l = reg2; | ||
309 | |||
310 | return 0; | ||
311 | } | ||
312 | |||
313 | static int emu_mullo_a1(unsigned short insn, struct pt_regs *regs) | ||
314 | { | ||
315 | int reg1, reg2; | ||
316 | |||
317 | reg1 = get_reg(regs, REG1(insn)); | ||
318 | reg2 = get_reg(regs, REG2(insn)); | ||
319 | |||
320 | __asm__ __volatile__ ( | ||
321 | "mullo %0, %1, a0; \n\t" | ||
322 | "mvfachi %0, a0; \n\t" | ||
323 | "mvfaclo %1, a0; \n\t" | ||
324 | : "+r" (reg1), "+r" (reg2) | ||
325 | ); | ||
326 | |||
327 | regs->acc1h = reg1; | ||
328 | regs->acc1l = reg2; | ||
329 | |||
330 | return 0; | ||
331 | } | ||
332 | |||
333 | static int emu_mvfacmi_a0(unsigned short insn, struct pt_regs *regs) | ||
334 | { | ||
335 | unsigned long val; | ||
336 | |||
337 | val = (regs->acc0h << 16) | (regs->acc0l >> 16); | ||
338 | set_reg(regs, REG1(insn), (int)val); | ||
339 | |||
340 | return 0; | ||
341 | } | ||
342 | |||
343 | static int emu_mvfacmi_a1(unsigned short insn, struct pt_regs *regs) | ||
344 | { | ||
345 | unsigned long val; | ||
346 | |||
347 | val = (regs->acc1h << 16) | (regs->acc1l >> 16); | ||
348 | set_reg(regs, REG1(insn), (int)val); | ||
349 | |||
350 | return 0; | ||
351 | } | ||
352 | |||
353 | static int emu_m32r2(unsigned short insn, struct pt_regs *regs) | ||
354 | { | ||
355 | int res = -1; | ||
356 | |||
357 | if ((insn & 0x7fff) == ISA_NOP) /* nop */ | ||
358 | return 0; | ||
359 | |||
360 | switch(insn & 0x7000) { | ||
361 | case ISA_ADDI: /* addi Rdest, #imm8 */ | ||
362 | res = emu_addi(insn, regs); | ||
363 | break; | ||
364 | case ISA_LDI: /* ldi Rdest, #imm8 */ | ||
365 | res = emu_ldi(insn, regs); | ||
366 | break; | ||
367 | default: | ||
368 | break; | ||
369 | } | ||
370 | |||
371 | if (!res) | ||
372 | return 0; | ||
373 | |||
374 | switch(insn & 0x70f0) { | ||
375 | case ISA_ADD: /* add Rdest, Rsrc */ | ||
376 | res = emu_add(insn, regs); | ||
377 | break; | ||
378 | case ISA_ADDX: /* addx Rdest, Rsrc */ | ||
379 | res = emu_addx(insn, regs); | ||
380 | break; | ||
381 | case ISA_AND: /* and Rdest, Rsrc */ | ||
382 | res = emu_and(insn, regs); | ||
383 | break; | ||
384 | case ISA_CMP: /* cmp Rsrc1, Rsrc2 */ | ||
385 | res = emu_cmp(insn, regs); | ||
386 | break; | ||
387 | case ISA_CMPEQ: /* cmpeq Rsrc1, Rsrc2 */ | ||
388 | res = emu_cmpeq(insn, regs); | ||
389 | break; | ||
390 | case ISA_CMPU: /* cmpu Rsrc1, Rsrc2 */ | ||
391 | res = emu_cmpu(insn, regs); | ||
392 | break; | ||
393 | case ISA_CMPZ: /* cmpz Rsrc */ | ||
394 | res = emu_cmpz(insn, regs); | ||
395 | break; | ||
396 | case ISA_MV: /* mv Rdest, Rsrc */ | ||
397 | res = emu_mv(insn, regs); | ||
398 | break; | ||
399 | case ISA_NEG: /* neg Rdest, Rsrc */ | ||
400 | res = emu_neg(insn, regs); | ||
401 | break; | ||
402 | case ISA_NOT: /* not Rdest, Rsrc */ | ||
403 | res = emu_not(insn, regs); | ||
404 | break; | ||
405 | case ISA_OR: /* or Rdest, Rsrc */ | ||
406 | res = emu_or(insn, regs); | ||
407 | break; | ||
408 | case ISA_SUB: /* sub Rdest, Rsrc */ | ||
409 | res = emu_sub(insn, regs); | ||
410 | break; | ||
411 | case ISA_SUBX: /* subx Rdest, Rsrc */ | ||
412 | res = emu_subx(insn, regs); | ||
413 | break; | ||
414 | case ISA_XOR: /* xor Rdest, Rsrc */ | ||
415 | res = emu_xor(insn, regs); | ||
416 | break; | ||
417 | case ISA_MUL: /* mul Rdest, Rsrc */ | ||
418 | res = emu_mul(insn, regs); | ||
419 | break; | ||
420 | case ISA_MULLO_A0: /* mullo Rsrc1, Rsrc2 */ | ||
421 | res = emu_mullo_a0(insn, regs); | ||
422 | break; | ||
423 | case ISA_MULLO_A1: /* mullo Rsrc1, Rsrc2 */ | ||
424 | res = emu_mullo_a1(insn, regs); | ||
425 | break; | ||
426 | default: | ||
427 | break; | ||
428 | } | ||
429 | |||
430 | if (!res) | ||
431 | return 0; | ||
432 | |||
433 | switch(insn & 0x70ff) { | ||
434 | case ISA_MVFACMI_A0: /* mvfacmi Rdest */ | ||
435 | res = emu_mvfacmi_a0(insn, regs); | ||
436 | break; | ||
437 | case ISA_MVFACMI_A1: /* mvfacmi Rdest */ | ||
438 | res = emu_mvfacmi_a1(insn, regs); | ||
439 | break; | ||
440 | default: | ||
441 | break; | ||
442 | } | ||
443 | |||
444 | return res; | ||
445 | } | ||
446 | |||
447 | #endif /* CONFIG_ISA_DUAL_ISSUE */ | ||
448 | |||
449 | /* | ||
450 | * ld : ?010 dest 1100 src | ||
451 | * 0010 dest 1110 src : ld Rdest, @Rsrc+ | ||
452 | * ldh : ?010 dest 1010 src | ||
453 | * lduh : ?010 dest 1011 src | ||
454 | * st : ?010 src1 0100 src2 | ||
455 | * 0010 src1 0110 src2 : st Rsrc1, @+Rsrc2 | ||
456 | * 0010 src1 0111 src2 : st Rsrc1, @-Rsrc2 | ||
457 | * sth : ?010 src1 0010 src2 | ||
458 | */ | ||
459 | |||
460 | static int insn_check(unsigned long insn, struct pt_regs *regs, | ||
461 | unsigned char **ucp) | ||
462 | { | ||
463 | int res = 0; | ||
464 | |||
465 | /* | ||
466 | * 32bit insn | ||
467 | * ld Rdest, @(disp16, Rsrc) | ||
468 | * st Rdest, @(disp16, Rsrc) | ||
469 | */ | ||
470 | if (insn & 0x80000000) { /* 32bit insn */ | ||
471 | *ucp += (short)(insn & 0x0000ffff); | ||
472 | regs->bpc += 4; | ||
473 | } else { /* 16bit insn */ | ||
474 | #ifdef CONFIG_ISA_DUAL_ISSUE | ||
475 | /* parallel exec check */ | ||
476 | if (!(regs->bpc & 0x2) && insn & 0x8000) { | ||
477 | res = emu_m32r2((unsigned short)insn, regs); | ||
478 | regs->bpc += 4; | ||
479 | } else | ||
480 | #endif /* CONFIG_ISA_DUAL_ISSUE */ | ||
481 | regs->bpc += 2; | ||
482 | } | ||
483 | |||
484 | return res; | ||
485 | } | ||
486 | |||
487 | static int emu_ld(unsigned long insn32, struct pt_regs *regs) | ||
488 | { | ||
489 | unsigned char *ucp; | ||
490 | unsigned long val; | ||
491 | unsigned short insn16; | ||
492 | int size, src; | ||
493 | |||
494 | insn16 = insn32 >> 16; | ||
495 | src = REG2(insn16); | ||
496 | ucp = (unsigned char *)get_reg(regs, src); | ||
497 | |||
498 | if (insn_check(insn32, regs, &ucp)) | ||
499 | return -1; | ||
500 | |||
501 | size = insn16 & 0x0040 ? 4 : 2; | ||
502 | if (copy_from_user(&val, ucp, size)) | ||
503 | return -1; | ||
504 | |||
505 | if (size == 2) | ||
506 | val >>= 16; | ||
507 | |||
508 | /* ldh sign check */ | ||
509 | if ((insn16 & 0x00f0) == 0x00a0 && (val & 0x8000)) | ||
510 | val |= 0xffff0000; | ||
511 | |||
512 | set_reg(regs, REG1(insn16), val); | ||
513 | |||
514 | /* ld increment check */ | ||
515 | if ((insn16 & 0xf0f0) == ISA_LD2) /* ld Rdest, @Rsrc+ */ | ||
516 | set_reg(regs, src, (unsigned long)(ucp + 4)); | ||
517 | |||
518 | return 0; | ||
519 | } | ||
520 | |||
521 | static int emu_st(unsigned long insn32, struct pt_regs *regs) | ||
522 | { | ||
523 | unsigned char *ucp; | ||
524 | unsigned long val; | ||
525 | unsigned short insn16; | ||
526 | int size, src2; | ||
527 | |||
528 | insn16 = insn32 >> 16; | ||
529 | src2 = REG2(insn16); | ||
530 | |||
531 | ucp = (unsigned char *)get_reg(regs, src2); | ||
532 | |||
533 | if (insn_check(insn32, regs, &ucp)) | ||
534 | return -1; | ||
535 | |||
536 | size = insn16 & 0x0040 ? 4 : 2; | ||
537 | val = get_reg(regs, REG1(insn16)); | ||
538 | if (size == 2) | ||
539 | val <<= 16; | ||
540 | |||
541 | /* st inc/dec check */ | ||
542 | if ((insn16 & 0xf0e0) == 0x2060) { | ||
543 | if (insn16 & 0x0010) | ||
544 | ucp -= 4; | ||
545 | else | ||
546 | ucp += 4; | ||
547 | |||
548 | set_reg(regs, src2, (unsigned long)ucp); | ||
549 | } | ||
550 | |||
551 | if (copy_to_user(ucp, &val, size)) | ||
552 | return -1; | ||
553 | |||
554 | /* sth inc check */ | ||
555 | if ((insn16 & 0xf0f0) == ISA_STH2) { | ||
556 | ucp += 2; | ||
557 | set_reg(regs, src2, (unsigned long)ucp); | ||
558 | } | ||
559 | |||
560 | return 0; | ||
561 | } | ||
562 | |||
563 | int handle_unaligned_access(unsigned long insn32, struct pt_regs *regs) | ||
564 | { | ||
565 | unsigned short insn16; | ||
566 | int res; | ||
567 | |||
568 | insn16 = insn32 >> 16; | ||
569 | |||
570 | /* ld or st check */ | ||
571 | if ((insn16 & 0x7000) != 0x2000) | ||
572 | return -1; | ||
573 | |||
574 | /* insn alignment check */ | ||
575 | if ((insn16 & 0x8000) && (regs->bpc & 3)) | ||
576 | return -1; | ||
577 | |||
578 | if (insn16 & 0x0080) /* ld */ | ||
579 | res = emu_ld(insn32, regs); | ||
580 | else /* st */ | ||
581 | res = emu_st(insn32, regs); | ||
582 | |||
583 | return res; | ||
584 | } | ||
585 | |||
diff --git a/arch/m32r/kernel/asm-offsets.c b/arch/m32r/kernel/asm-offsets.c deleted file mode 100644 index 7cb90b459e07..000000000000 --- a/arch/m32r/kernel/asm-offsets.c +++ /dev/null | |||
@@ -1,15 +0,0 @@ | |||
1 | // SPDX-License-Identifier: GPL-2.0 | ||
2 | #include <linux/thread_info.h> | ||
3 | #include <linux/kbuild.h> | ||
4 | |||
5 | int foo(void) | ||
6 | { | ||
7 | OFFSET(TI_TASK, thread_info, task); | ||
8 | OFFSET(TI_FLAGS, thread_info, flags); | ||
9 | OFFSET(TI_STATUS, thread_info, status); | ||
10 | OFFSET(TI_CPU, thread_info, cpu); | ||
11 | OFFSET(TI_PRE_COUNT, thread_info, preempt_count); | ||
12 | OFFSET(TI_ADDR_LIMIT, thread_info, addr_limit); | ||
13 | |||
14 | return 0; | ||
15 | } | ||
diff --git a/arch/m32r/kernel/entry.S b/arch/m32r/kernel/entry.S deleted file mode 100644 index bbf48f2aa2a7..000000000000 --- a/arch/m32r/kernel/entry.S +++ /dev/null | |||
@@ -1,553 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | /* | ||
3 | * linux/arch/m32r/kernel/entry.S | ||
4 | * | ||
5 | * Copyright (c) 2001, 2002 Hirokazu Takata, Hitoshi Yamamoto, H. Kondo | ||
6 | * Copyright (c) 2003 Hitoshi Yamamoto | ||
7 | * Copyright (c) 2004 Hirokazu Takata <takata at linux-m32r.org> | ||
8 | * | ||
9 | * Taken from i386 version. | ||
10 | * Copyright (C) 1991, 1992 Linus Torvalds | ||
11 | */ | ||
12 | |||
13 | /* | ||
14 | * entry.S contains the system-call and fault low-level handling routines. | ||
15 | * This also contains the timer-interrupt handler, as well as all interrupts | ||
16 | * and faults that can result in a task-switch. | ||
17 | * | ||
18 | * NOTE: This code handles signal-recognition, which happens every time | ||
19 | * after a timer-interrupt and after each system call. | ||
20 | * | ||
21 | * Stack layout in 'ret_from_system_call': | ||
22 | * ptrace needs to have all regs on the stack. | ||
23 | * if the order here is changed, it needs to be | ||
24 | * updated in fork.c:copy_thread, signal.c:do_signal, | ||
25 | * ptrace.c and ptrace.h | ||
26 | * | ||
27 | * M32R/M32Rx/M32R2 | ||
28 | * @(sp) - r4 | ||
29 | * @(0x04,sp) - r5 | ||
30 | * @(0x08,sp) - r6 | ||
31 | * @(0x0c,sp) - *pt_regs | ||
32 | * @(0x10,sp) - r0 | ||
33 | * @(0x14,sp) - r1 | ||
34 | * @(0x18,sp) - r2 | ||
35 | * @(0x1c,sp) - r3 | ||
36 | * @(0x20,sp) - r7 | ||
37 | * @(0x24,sp) - r8 | ||
38 | * @(0x28,sp) - r9 | ||
39 | * @(0x2c,sp) - r10 | ||
40 | * @(0x30,sp) - r11 | ||
41 | * @(0x34,sp) - r12 | ||
42 | * @(0x38,sp) - syscall_nr | ||
43 | * @(0x3c,sp) - acc0h | ||
44 | * @(0x40,sp) - acc0l | ||
45 | * @(0x44,sp) - acc1h ; ISA_DSP_LEVEL2 only | ||
46 | * @(0x48,sp) - acc1l ; ISA_DSP_LEVEL2 only | ||
47 | * @(0x4c,sp) - psw | ||
48 | * @(0x50,sp) - bpc | ||
49 | * @(0x54,sp) - bbpsw | ||
50 | * @(0x58,sp) - bbpc | ||
51 | * @(0x5c,sp) - spu (cr3) | ||
52 | * @(0x60,sp) - fp (r13) | ||
53 | * @(0x64,sp) - lr (r14) | ||
54 | * @(0x68,sp) - spi (cr2) | ||
55 | * @(0x6c,sp) - orig_r0 | ||
56 | */ | ||
57 | |||
58 | #include <linux/linkage.h> | ||
59 | #include <asm/irq.h> | ||
60 | #include <asm/unistd.h> | ||
61 | #include <asm/assembler.h> | ||
62 | #include <asm/thread_info.h> | ||
63 | #include <asm/errno.h> | ||
64 | #include <asm/segment.h> | ||
65 | #include <asm/smp.h> | ||
66 | #include <asm/page.h> | ||
67 | #include <asm/m32r.h> | ||
68 | #include <asm/mmu_context.h> | ||
69 | #include <asm/asm-offsets.h> | ||
70 | |||
71 | #if !defined(CONFIG_MMU) | ||
72 | #define sys_madvise sys_ni_syscall | ||
73 | #define sys_readahead sys_ni_syscall | ||
74 | #define sys_mprotect sys_ni_syscall | ||
75 | #define sys_msync sys_ni_syscall | ||
76 | #define sys_mlock sys_ni_syscall | ||
77 | #define sys_munlock sys_ni_syscall | ||
78 | #define sys_mlockall sys_ni_syscall | ||
79 | #define sys_munlockall sys_ni_syscall | ||
80 | #define sys_mremap sys_ni_syscall | ||
81 | #define sys_mincore sys_ni_syscall | ||
82 | #define sys_remap_file_pages sys_ni_syscall | ||
83 | #endif /* CONFIG_MMU */ | ||
84 | |||
85 | #define R4(reg) @reg | ||
86 | #define R5(reg) @(0x04,reg) | ||
87 | #define R6(reg) @(0x08,reg) | ||
88 | #define PTREGS(reg) @(0x0C,reg) | ||
89 | #define R0(reg) @(0x10,reg) | ||
90 | #define R1(reg) @(0x14,reg) | ||
91 | #define R2(reg) @(0x18,reg) | ||
92 | #define R3(reg) @(0x1C,reg) | ||
93 | #define R7(reg) @(0x20,reg) | ||
94 | #define R8(reg) @(0x24,reg) | ||
95 | #define R9(reg) @(0x28,reg) | ||
96 | #define R10(reg) @(0x2C,reg) | ||
97 | #define R11(reg) @(0x30,reg) | ||
98 | #define R12(reg) @(0x34,reg) | ||
99 | #define SYSCALL_NR(reg) @(0x38,reg) | ||
100 | #define ACC0H(reg) @(0x3C,reg) | ||
101 | #define ACC0L(reg) @(0x40,reg) | ||
102 | #define ACC1H(reg) @(0x44,reg) | ||
103 | #define ACC1L(reg) @(0x48,reg) | ||
104 | #define PSW(reg) @(0x4C,reg) | ||
105 | #define BPC(reg) @(0x50,reg) | ||
106 | #define BBPSW(reg) @(0x54,reg) | ||
107 | #define BBPC(reg) @(0x58,reg) | ||
108 | #define SPU(reg) @(0x5C,reg) | ||
109 | #define FP(reg) @(0x60,reg) /* FP = R13 */ | ||
110 | #define LR(reg) @(0x64,reg) | ||
111 | #define SP(reg) @(0x68,reg) | ||
112 | #define ORIG_R0(reg) @(0x6C,reg) | ||
113 | |||
114 | #define nr_syscalls ((syscall_table_size)/4) | ||
115 | |||
116 | #ifdef CONFIG_PREEMPT | ||
117 | #define preempt_stop(x) DISABLE_INTERRUPTS(x) | ||
118 | #else | ||
119 | #define preempt_stop(x) | ||
120 | #define resume_kernel restore_all | ||
121 | #endif | ||
122 | |||
123 | /* how to get the thread information struct from ASM */ | ||
124 | #define GET_THREAD_INFO(reg) GET_THREAD_INFO reg | ||
125 | .macro GET_THREAD_INFO reg | ||
126 | ldi \reg, #-THREAD_SIZE | ||
127 | and \reg, sp | ||
128 | .endm | ||
129 | |||
130 | ENTRY(ret_from_kernel_thread) | ||
131 | pop r0 | ||
132 | bl schedule_tail | ||
133 | GET_THREAD_INFO(r8) | ||
134 | ld r0, R0(r8) | ||
135 | ld r1, R1(r8) | ||
136 | jl r1 | ||
137 | bra syscall_exit | ||
138 | |||
139 | ENTRY(ret_from_fork) | ||
140 | pop r0 | ||
141 | bl schedule_tail | ||
142 | GET_THREAD_INFO(r8) | ||
143 | bra syscall_exit | ||
144 | |||
145 | /* | ||
146 | * Return to user mode is not as complex as all this looks, | ||
147 | * but we want the default path for a system call return to | ||
148 | * go as quickly as possible which is why some of this is | ||
149 | * less clear than it otherwise should be. | ||
150 | */ | ||
151 | |||
152 | ; userspace resumption stub bypassing syscall exit tracing | ||
153 | ALIGN | ||
154 | ret_from_exception: | ||
155 | preempt_stop(r4) | ||
156 | ret_from_intr: | ||
157 | ld r4, PSW(sp) | ||
158 | #ifdef CONFIG_ISA_M32R2 | ||
159 | and3 r4, r4, #0x8800 ; check BSM and BPM bits | ||
160 | #else | ||
161 | and3 r4, r4, #0x8000 ; check BSM bit | ||
162 | #endif | ||
163 | beqz r4, resume_kernel | ||
164 | resume_userspace: | ||
165 | DISABLE_INTERRUPTS(r4) ; make sure we don't miss an interrupt | ||
166 | ; setting need_resched or sigpending | ||
167 | ; between sampling and the iret | ||
168 | GET_THREAD_INFO(r8) | ||
169 | ld r9, @(TI_FLAGS, r8) | ||
170 | and3 r4, r9, #_TIF_WORK_MASK ; is there any work to be done on | ||
171 | ; int/exception return? | ||
172 | bnez r4, work_pending | ||
173 | bra restore_all | ||
174 | |||
175 | #ifdef CONFIG_PREEMPT | ||
176 | ENTRY(resume_kernel) | ||
177 | GET_THREAD_INFO(r8) | ||
178 | ld r9, @(TI_PRE_COUNT, r8) ; non-zero preempt_count ? | ||
179 | bnez r9, restore_all | ||
180 | need_resched: | ||
181 | ld r9, @(TI_FLAGS, r8) ; need_resched set ? | ||
182 | and3 r4, r9, #_TIF_NEED_RESCHED | ||
183 | beqz r4, restore_all | ||
184 | ld r4, PSW(sp) ; interrupts off (exception path) ? | ||
185 | and3 r4, r4, #0x4000 | ||
186 | beqz r4, restore_all | ||
187 | bl preempt_schedule_irq | ||
188 | bra need_resched | ||
189 | #endif | ||
190 | |||
191 | ; system call handler stub | ||
192 | ENTRY(system_call) | ||
193 | SWITCH_TO_KERNEL_STACK | ||
194 | SAVE_ALL | ||
195 | ENABLE_INTERRUPTS(r4) ; Enable interrupt | ||
196 | st sp, PTREGS(sp) ; implicit pt_regs parameter | ||
197 | cmpui r7, #NR_syscalls | ||
198 | bnc syscall_badsys | ||
199 | st r7, SYSCALL_NR(sp) ; syscall_nr | ||
200 | ; system call tracing in operation | ||
201 | GET_THREAD_INFO(r8) | ||
202 | ld r9, @(TI_FLAGS, r8) | ||
203 | and3 r4, r9, #_TIF_SYSCALL_TRACE | ||
204 | bnez r4, syscall_trace_entry | ||
205 | syscall_call: | ||
206 | slli r7, #2 ; table jump for the system call | ||
207 | LDIMM (r4, sys_call_table) | ||
208 | add r7, r4 | ||
209 | ld r7, @r7 | ||
210 | jl r7 ; execute system call | ||
211 | st r0, R0(sp) ; save the return value | ||
212 | syscall_exit: | ||
213 | DISABLE_INTERRUPTS(r4) ; make sure we don't miss an interrupt | ||
214 | ; setting need_resched or sigpending | ||
215 | ; between sampling and the iret | ||
216 | ld r9, @(TI_FLAGS, r8) | ||
217 | and3 r4, r9, #_TIF_ALLWORK_MASK ; current->work | ||
218 | bnez r4, syscall_exit_work | ||
219 | restore_all: | ||
220 | RESTORE_ALL | ||
221 | |||
222 | # perform work that needs to be done immediately before resumption | ||
223 | # r9 : flags | ||
224 | ALIGN | ||
225 | work_pending: | ||
226 | and3 r4, r9, #_TIF_NEED_RESCHED | ||
227 | beqz r4, work_notifysig | ||
228 | work_resched: | ||
229 | bl schedule | ||
230 | DISABLE_INTERRUPTS(r4) ; make sure we don't miss an interrupt | ||
231 | ; setting need_resched or sigpending | ||
232 | ; between sampling and the iret | ||
233 | ld r9, @(TI_FLAGS, r8) | ||
234 | and3 r4, r9, #_TIF_WORK_MASK ; is there any work to be done other | ||
235 | ; than syscall tracing? | ||
236 | beqz r4, restore_all | ||
237 | and3 r4, r4, #_TIF_NEED_RESCHED | ||
238 | bnez r4, work_resched | ||
239 | |||
240 | work_notifysig: ; deal with pending signals and | ||
241 | ; notify-resume requests | ||
242 | mv r0, sp ; arg1 : struct pt_regs *regs | ||
243 | mv r1, r9 ; arg2 : __u32 thread_info_flags | ||
244 | bl do_notify_resume | ||
245 | bra resume_userspace | ||
246 | |||
247 | ; perform syscall exit tracing | ||
248 | ALIGN | ||
249 | syscall_trace_entry: | ||
250 | ldi r4, #-ENOSYS | ||
251 | st r4, R0(sp) | ||
252 | bl do_syscall_trace | ||
253 | ld r0, ORIG_R0(sp) | ||
254 | ld r1, R1(sp) | ||
255 | ld r2, R2(sp) | ||
256 | ld r3, R3(sp) | ||
257 | ld r4, R4(sp) | ||
258 | ld r5, R5(sp) | ||
259 | ld r6, R6(sp) | ||
260 | ld r7, SYSCALL_NR(sp) | ||
261 | cmpui r7, #NR_syscalls | ||
262 | bc syscall_call | ||
263 | bra syscall_exit | ||
264 | |||
265 | ; perform syscall exit tracing | ||
266 | ALIGN | ||
267 | syscall_exit_work: | ||
268 | ld r9, @(TI_FLAGS, r8) | ||
269 | and3 r4, r9, #_TIF_SYSCALL_TRACE | ||
270 | beqz r4, work_pending | ||
271 | ENABLE_INTERRUPTS(r4) ; could let do_syscall_trace() call | ||
272 | ; schedule() instead | ||
273 | bl do_syscall_trace | ||
274 | bra resume_userspace | ||
275 | |||
276 | ALIGN | ||
277 | syscall_fault: | ||
278 | SAVE_ALL | ||
279 | GET_THREAD_INFO(r8) | ||
280 | ldi r4, #-EFAULT | ||
281 | st r4, R0(sp) | ||
282 | bra resume_userspace | ||
283 | |||
284 | ALIGN | ||
285 | syscall_badsys: | ||
286 | ldi r4, #-ENOSYS | ||
287 | st r4, R0(sp) | ||
288 | bra resume_userspace | ||
289 | |||
290 | .global eit_vector | ||
291 | |||
292 | .equ ei_vec_table, eit_vector + 0x0200 | ||
293 | |||
294 | /* | ||
295 | * EI handler routine | ||
296 | */ | ||
297 | ENTRY(ei_handler) | ||
298 | #if defined(CONFIG_CHIP_M32700) | ||
299 | ; WORKAROUND: force to clear SM bit and use the kernel stack (SPI). | ||
300 | SWITCH_TO_KERNEL_STACK | ||
301 | #endif | ||
302 | SAVE_ALL | ||
303 | mv r1, sp ; arg1(regs) | ||
304 | ; get ICU status | ||
305 | seth r0, #shigh(M32R_ICU_ISTS_ADDR) | ||
306 | ld r0, @(low(M32R_ICU_ISTS_ADDR),r0) | ||
307 | push r0 | ||
308 | #if defined(CONFIG_SMP) | ||
309 | /* | ||
310 | * If IRQ == 0 --> Nothing to do, Not write IMASK | ||
311 | * If IRQ == IPI --> Do IPI handler, Not write IMASK | ||
312 | * If IRQ != 0, IPI --> Do do_IRQ(), Write IMASK | ||
313 | */ | ||
314 | slli r0, #4 | ||
315 | srli r0, #24 ; r0(irq_num<<2) | ||
316 | ;; IRQ exist check | ||
317 | #if defined(CONFIG_CHIP_M32700) | ||
318 | /* WORKAROUND: IMASK bug M32700-TS1, TS2 chip. */ | ||
319 | bnez r0, 0f | ||
320 | ld24 r14, #0x00070000 | ||
321 | seth r0, #shigh(M32R_ICU_IMASK_ADDR) | ||
322 | st r14, @(low(M32R_ICU_IMASK_ADDR),r0) | ||
323 | bra 1f | ||
324 | .fillinsn | ||
325 | 0: | ||
326 | #endif /* CONFIG_CHIP_M32700 */ | ||
327 | beqz r0, 1f ; if (!irq_num) goto exit | ||
328 | ;; IPI check | ||
329 | cmpi r0, #(M32R_IRQ_IPI0<<2) ; ISN < IPI0 check | ||
330 | bc 2f | ||
331 | cmpi r0, #((M32R_IRQ_IPI7+1)<<2) ; ISN > IPI7 check | ||
332 | bnc 2f | ||
333 | LDIMM (r2, ei_vec_table) | ||
334 | add r2, r0 | ||
335 | ld r2, @r2 | ||
336 | beqz r2, 1f ; if (no IPI handler) goto exit | ||
337 | mv r0, r1 ; arg0(regs) | ||
338 | jl r2 | ||
339 | .fillinsn | ||
340 | 1: | ||
341 | addi sp, #4 | ||
342 | bra restore_all | ||
343 | .fillinsn | ||
344 | 2: | ||
345 | srli r0, #2 | ||
346 | #else /* not CONFIG_SMP */ | ||
347 | srli r0, #22 ; r0(irq) | ||
348 | #endif /* not CONFIG_SMP */ | ||
349 | |||
350 | #if defined(CONFIG_PLAT_HAS_INT1ICU) | ||
351 | add3 r2, r0, #-(M32R_IRQ_INT1) ; INT1# interrupt | ||
352 | bnez r2, 3f | ||
353 | seth r0, #shigh(M32R_INT1ICU_ISTS) | ||
354 | lduh r0, @(low(M32R_INT1ICU_ISTS),r0) ; bit10-6 : ISN | ||
355 | slli r0, #21 | ||
356 | srli r0, #27 ; ISN | ||
357 | addi r0, #(M32R_INT1ICU_IRQ_BASE) | ||
358 | bra check_end | ||
359 | .fillinsn | ||
360 | 3: | ||
361 | #endif /* CONFIG_PLAT_HAS_INT1ICU */ | ||
362 | #if defined(CONFIG_PLAT_HAS_INT0ICU) | ||
363 | add3 r2, r0, #-(M32R_IRQ_INT0) ; INT0# interrupt | ||
364 | bnez r2, 4f | ||
365 | seth r0, #shigh(M32R_INT0ICU_ISTS) | ||
366 | lduh r0, @(low(M32R_INT0ICU_ISTS),r0) ; bit10-6 : ISN | ||
367 | slli r0, #21 | ||
368 | srli r0, #27 ; ISN | ||
369 | add3 r0, r0, #(M32R_INT0ICU_IRQ_BASE) | ||
370 | bra check_end | ||
371 | .fillinsn | ||
372 | 4: | ||
373 | #endif /* CONFIG_PLAT_HAS_INT0ICU */ | ||
374 | #if defined(CONFIG_PLAT_HAS_INT2ICU) | ||
375 | add3 r2, r0, #-(M32R_IRQ_INT2) ; INT2# interrupt | ||
376 | bnez r2, 5f | ||
377 | seth r0, #shigh(M32R_INT2ICU_ISTS) | ||
378 | lduh r0, @(low(M32R_INT2ICU_ISTS),r0) ; bit10-6 : ISN | ||
379 | slli r0, #21 | ||
380 | srli r0, #27 ; ISN | ||
381 | add3 r0, r0, #(M32R_INT2ICU_IRQ_BASE) | ||
382 | ; bra check_end | ||
383 | .fillinsn | ||
384 | 5: | ||
385 | #endif /* CONFIG_PLAT_HAS_INT2ICU */ | ||
386 | |||
387 | check_end: | ||
388 | bl do_IRQ | ||
389 | pop r14 | ||
390 | seth r0, #shigh(M32R_ICU_IMASK_ADDR) | ||
391 | st r14, @(low(M32R_ICU_IMASK_ADDR),r0) | ||
392 | bra ret_from_intr | ||
393 | |||
394 | /* | ||
395 | * Default EIT handler | ||
396 | */ | ||
397 | ALIGN | ||
398 | int_msg: | ||
399 | .asciz "Unknown interrupt\n" | ||
400 | .byte 0 | ||
401 | |||
402 | ENTRY(default_eit_handler) | ||
403 | push r0 | ||
404 | mvfc r0, psw | ||
405 | push r1 | ||
406 | push r2 | ||
407 | push r3 | ||
408 | push r0 | ||
409 | LDIMM (r0, __KERNEL_DS) | ||
410 | mv r0, r1 | ||
411 | mv r0, r2 | ||
412 | LDIMM (r0, int_msg) | ||
413 | bl printk | ||
414 | pop r0 | ||
415 | pop r3 | ||
416 | pop r2 | ||
417 | pop r1 | ||
418 | mvtc r0, psw | ||
419 | pop r0 | ||
420 | infinit: | ||
421 | bra infinit | ||
422 | |||
423 | #ifdef CONFIG_MMU | ||
424 | /* | ||
425 | * Access Exception handler | ||
426 | */ | ||
427 | ENTRY(ace_handler) | ||
428 | SWITCH_TO_KERNEL_STACK | ||
429 | SAVE_ALL | ||
430 | |||
431 | seth r2, #shigh(MMU_REG_BASE) /* Check status register */ | ||
432 | ld r4, @(low(MESTS_offset),r2) | ||
433 | st r4, @(low(MESTS_offset),r2) | ||
434 | srl3 r1, r4, #4 | ||
435 | #ifdef CONFIG_CHIP_M32700 | ||
436 | and3 r1, r1, #0x0000ffff | ||
437 | ; WORKAROUND: ignore TME bit for the M32700(TS1). | ||
438 | #endif /* CONFIG_CHIP_M32700 */ | ||
439 | beqz r1, inst | ||
440 | oprand: | ||
441 | ld r2, @(low(MDEVA_offset),r2) ; set address | ||
442 | srli r1, #1 | ||
443 | bra 1f | ||
444 | inst: | ||
445 | and3 r1, r4, #2 | ||
446 | srli r1, #1 | ||
447 | or3 r1, r1, #8 | ||
448 | mvfc r2, bpc ; set address | ||
449 | .fillinsn | ||
450 | 1: | ||
451 | mvfc r3, psw | ||
452 | mv r0, sp | ||
453 | and3 r3, r3, 0x800 | ||
454 | srli r3, #9 | ||
455 | or r1, r3 | ||
456 | /* | ||
457 | * do_page_fault(): | ||
458 | * r0 : struct pt_regs *regs | ||
459 | * r1 : unsigned long error-code | ||
460 | * r2 : unsigned long address | ||
461 | * error-code: | ||
462 | * +------+------+------+------+ | ||
463 | * | bit3 | bit2 | bit1 | bit0 | | ||
464 | * +------+------+------+------+ | ||
465 | * bit 3 == 0:means data, 1:means instruction | ||
466 | * bit 2 == 0:means kernel, 1:means user-mode | ||
467 | * bit 1 == 0:means read, 1:means write | ||
468 | * bit 0 == 0:means no page found 1:means protection fault | ||
469 | * | ||
470 | */ | ||
471 | bl do_page_fault | ||
472 | bra ret_from_intr | ||
473 | #endif /* CONFIG_MMU */ | ||
474 | |||
475 | |||
476 | ENTRY(alignment_check) | ||
477 | /* void alignment_check(int error_code) */ | ||
478 | SWITCH_TO_KERNEL_STACK | ||
479 | SAVE_ALL | ||
480 | ldi r1, #0x30 ; error_code | ||
481 | mv r0, sp ; pt_regs | ||
482 | bl do_alignment_check | ||
483 | error_code: | ||
484 | bra ret_from_exception | ||
485 | |||
486 | ENTRY(rie_handler) | ||
487 | /* void rie_handler(int error_code) */ | ||
488 | SWITCH_TO_KERNEL_STACK | ||
489 | SAVE_ALL | ||
490 | ldi r1, #0x20 ; error_code | ||
491 | mv r0, sp ; pt_regs | ||
492 | bl do_rie_handler | ||
493 | bra error_code | ||
494 | |||
495 | ENTRY(pie_handler) | ||
496 | /* void pie_handler(int error_code) */ | ||
497 | SWITCH_TO_KERNEL_STACK | ||
498 | SAVE_ALL | ||
499 | ldi r1, #0 ; error_code ; FIXME | ||
500 | mv r0, sp ; pt_regs | ||
501 | bl do_pie_handler | ||
502 | bra error_code | ||
503 | |||
504 | ENTRY(debug_trap) | ||
505 | /* void debug_trap(void) */ | ||
506 | .global withdraw_debug_trap | ||
507 | SWITCH_TO_KERNEL_STACK | ||
508 | SAVE_ALL | ||
509 | mv r0, sp ; pt_regs | ||
510 | bl withdraw_debug_trap | ||
511 | ldi r1, #0 ; error_code | ||
512 | mv r0, sp ; pt_regs | ||
513 | bl do_debug_trap | ||
514 | bra error_code | ||
515 | |||
516 | ENTRY(ill_trap) | ||
517 | /* void ill_trap(void) */ | ||
518 | SWITCH_TO_KERNEL_STACK | ||
519 | SAVE_ALL | ||
520 | ldi r1, #0 ; error_code ; FIXME | ||
521 | mv r0, sp ; pt_regs | ||
522 | bl do_ill_trap | ||
523 | bra error_code | ||
524 | |||
525 | ENTRY(cache_flushing_handler) | ||
526 | /* void _flush_cache_all(void); */ | ||
527 | .global _flush_cache_all | ||
528 | SWITCH_TO_KERNEL_STACK | ||
529 | push r0 | ||
530 | push r1 | ||
531 | push r2 | ||
532 | push r3 | ||
533 | push r4 | ||
534 | push r5 | ||
535 | push r6 | ||
536 | push r7 | ||
537 | push lr | ||
538 | bl _flush_cache_all | ||
539 | pop lr | ||
540 | pop r7 | ||
541 | pop r6 | ||
542 | pop r5 | ||
543 | pop r4 | ||
544 | pop r3 | ||
545 | pop r2 | ||
546 | pop r1 | ||
547 | pop r0 | ||
548 | rte | ||
549 | |||
550 | .section .rodata,"a" | ||
551 | #include "syscall_table.S" | ||
552 | |||
553 | syscall_table_size=(.-sys_call_table) | ||
diff --git a/arch/m32r/kernel/head.S b/arch/m32r/kernel/head.S deleted file mode 100644 index 1f040973df1c..000000000000 --- a/arch/m32r/kernel/head.S +++ /dev/null | |||
@@ -1,284 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | /* | ||
3 | * linux/arch/m32r/kernel/head.S | ||
4 | * | ||
5 | * M32R startup code. | ||
6 | * | ||
7 | * Copyright (c) 2001, 2002 Hiroyuki Kondo, Hirokazu Takata, | ||
8 | * Hitoshi Yamamoto | ||
9 | */ | ||
10 | |||
11 | #include <linux/init.h> | ||
12 | __INIT | ||
13 | __INITDATA | ||
14 | |||
15 | .text | ||
16 | #include <linux/linkage.h> | ||
17 | #include <asm/segment.h> | ||
18 | #include <asm/page.h> | ||
19 | #include <asm/pgtable.h> | ||
20 | #include <asm/assembler.h> | ||
21 | #include <asm/m32r.h> | ||
22 | #include <asm/mmu_context.h> | ||
23 | |||
24 | /* | ||
25 | * References to members of the boot_cpu_data structure. | ||
26 | */ | ||
27 | __HEAD | ||
28 | .global start_kernel | ||
29 | .global __bss_start | ||
30 | .global _end | ||
31 | ENTRY(stext) | ||
32 | ENTRY(_stext) | ||
33 | /* Setup up the stack pointer */ | ||
34 | LDIMM (r0, spi_stack_top) | ||
35 | LDIMM (r1, spu_stack_top) | ||
36 | mvtc r0, spi | ||
37 | mvtc r1, spu | ||
38 | |||
39 | /* Initilalize PSW */ | ||
40 | ldi r0, #0x0000 /* use SPI, disable EI */ | ||
41 | mvtc r0, psw | ||
42 | |||
43 | /* Set up the stack pointer */ | ||
44 | LDIMM (r0, stack_start) | ||
45 | ld r0, @r0 | ||
46 | mvtc r0, spi | ||
47 | |||
48 | /* | ||
49 | * Clear BSS first so that there are no surprises... | ||
50 | */ | ||
51 | #ifdef CONFIG_ISA_DUAL_ISSUE | ||
52 | |||
53 | LDIMM (r2, __bss_start) | ||
54 | LDIMM (r3, _end) | ||
55 | sub r3, r2 ; BSS size in bytes | ||
56 | ; R4 = BSS size in longwords (rounded down) | ||
57 | mv r4, r3 || ldi r1, #0 | ||
58 | srli r4, #4 || addi r2, #-4 | ||
59 | beqz r4, .Lendloop1 | ||
60 | .Lloop1: | ||
61 | #ifndef CONFIG_CHIP_M32310 | ||
62 | ; Touch memory for the no-write-allocating cache. | ||
63 | ld r0, @(4,r2) | ||
64 | #endif | ||
65 | st r1, @+r2 || addi r4, #-1 | ||
66 | st r1, @+r2 | ||
67 | st r1, @+r2 | ||
68 | st r1, @+r2 || cmpeq r1, r4 ; R4 = 0? | ||
69 | bnc .Lloop1 | ||
70 | .Lendloop1: | ||
71 | and3 r4, r3, #15 | ||
72 | addi r2, #4 | ||
73 | beqz r4, .Lendloop2 | ||
74 | .Lloop2: | ||
75 | stb r1, @r2 || addi r4, #-1 | ||
76 | addi r2, #1 | ||
77 | bnez r4, .Lloop2 | ||
78 | .Lendloop2: | ||
79 | |||
80 | #else /* not CONFIG_ISA_DUAL_ISSUE */ | ||
81 | |||
82 | LDIMM (r2, __bss_start) | ||
83 | LDIMM (r3, _end) | ||
84 | sub r3, r2 ; BSS size in bytes | ||
85 | mv r4, r3 | ||
86 | srli r4, #2 ; R4 = BSS size in longwords (rounded down) | ||
87 | ldi r1, #0 ; clear R1 for longwords store | ||
88 | addi r2, #-4 ; account for pre-inc store | ||
89 | beqz r4, .Lendloop1 ; any more to go? | ||
90 | .Lloop1: | ||
91 | st r1, @+r2 ; yep, zero out another longword | ||
92 | addi r4, #-1 ; decrement count | ||
93 | bnez r4, .Lloop1 ; go do some more | ||
94 | .Lendloop1: | ||
95 | and3 r4, r3, #3 ; get no. of remaining BSS bytes to clear | ||
96 | addi r2, #4 ; account for pre-inc store | ||
97 | beqz r4, .Lendloop2 ; any more to go? | ||
98 | .Lloop2: | ||
99 | stb r1, @r2 ; yep, zero out another byte | ||
100 | addi r2, #1 ; bump address | ||
101 | addi r4, #-1 ; decrement count | ||
102 | bnez r4, .Lloop2 ; go do some more | ||
103 | .Lendloop2: | ||
104 | |||
105 | #endif /* not CONFIG_ISA_DUAL_ISSUE */ | ||
106 | |||
107 | #if 0 /* M32R_FIXME */ | ||
108 | /* | ||
109 | * Copy data segment from ROM to RAM. | ||
110 | */ | ||
111 | .global ROM_D, TOP_DATA, END_DATA | ||
112 | |||
113 | LDIMM (r1, ROM_D) | ||
114 | LDIMM (r2, TOP_DATA) | ||
115 | LDIMM (r3, END_DATA) | ||
116 | addi r2, #-4 | ||
117 | addi r3, #-4 | ||
118 | loop1: | ||
119 | ld r0, @r1+ | ||
120 | st r0, @+r2 | ||
121 | cmp r2, r3 | ||
122 | bc loop1 | ||
123 | #endif /* 0 */ | ||
124 | |||
125 | /* Jump to kernel */ | ||
126 | LDIMM (r2, start_kernel) | ||
127 | jl r2 | ||
128 | .fillinsn | ||
129 | 1: | ||
130 | bra 1b ; main should never return here, but | ||
131 | ; just in case, we know what happens. | ||
132 | |||
133 | #ifdef CONFIG_SMP | ||
134 | /* | ||
135 | * AP startup routine | ||
136 | */ | ||
137 | .global eit_vector | ||
138 | ENTRY(startup_AP) | ||
139 | ;; setup EVB | ||
140 | LDIMM (r4, eit_vector) | ||
141 | mvtc r4, cr5 | ||
142 | |||
143 | ;; enable MMU | ||
144 | LDIMM (r2, init_tlb) | ||
145 | jl r2 | ||
146 | seth r4, #high(MATM) | ||
147 | or3 r4, r4, #low(MATM) | ||
148 | ldi r5, #0x01 | ||
149 | st r5, @r4 ; Set MATM Reg(T bit ON) | ||
150 | ld r6, @r4 ; MATM Check | ||
151 | LDIMM (r5, 1f) | ||
152 | jmp r5 ; enable MMU | ||
153 | nop | ||
154 | .fillinsn | ||
155 | 1: | ||
156 | ;; ISN check | ||
157 | ld r6, @r4 ; MATM Check | ||
158 | seth r4, #high(M32R_ICU_ISTS_ADDR) | ||
159 | or3 r4, r4, #low(M32R_ICU_ISTS_ADDR) | ||
160 | ld r5, @r4 ; Read ISTSi reg. | ||
161 | mv r6, r5 | ||
162 | slli r5, #13 ; PIML check | ||
163 | srli r5, #13 ; | ||
164 | seth r4, #high(M32R_ICU_IMASK_ADDR) | ||
165 | or3 r4, r4, #low(M32R_ICU_IMASK_ADDR) | ||
166 | st r5, @r4 ; Write IMASKi reg. | ||
167 | slli r6, #4 ; ISN check | ||
168 | srli r6, #26 ; | ||
169 | seth r4, #high(M32R_IRQ_IPI5) | ||
170 | or3 r4, r4, #low(M32R_IRQ_IPI5) | ||
171 | bne r4, r6, 2f ; if (ISN != CPU_BOOT_IPI) goto sleep; | ||
172 | |||
173 | ;; check cpu_bootout_map and set cpu_bootin_map | ||
174 | LDIMM (r4, cpu_bootout_map) | ||
175 | ld r4, @r4 | ||
176 | seth r5, #high(M32R_CPUID_PORTL) | ||
177 | or3 r5, r5, #low(M32R_CPUID_PORTL) | ||
178 | ld r5, @r5 | ||
179 | ldi r6, #1 | ||
180 | sll r6, r5 | ||
181 | and r4, r6 | ||
182 | beqz r4, 2f | ||
183 | LDIMM (r4, cpu_bootin_map) | ||
184 | ld r5, @r4 | ||
185 | or r5, r6 | ||
186 | st r6, @r4 | ||
187 | |||
188 | ;; clear PSW | ||
189 | ldi r4, #0 | ||
190 | mvtc r4, psw | ||
191 | |||
192 | ;; setup SPI | ||
193 | LDIMM (r4, stack_start) | ||
194 | ld r4, @r4 | ||
195 | mvtc r4, spi | ||
196 | |||
197 | ;; setup BPC (start_secondary) | ||
198 | LDIMM (r4, start_secondary) | ||
199 | mvtc r4, bpc | ||
200 | |||
201 | rte ; goto startup_secondary | ||
202 | nop | ||
203 | nop | ||
204 | |||
205 | .fillinsn | ||
206 | 2: | ||
207 | ;; disable MMU | ||
208 | seth r4, #high(MATM) | ||
209 | or3 r4, r4, #low(MATM) | ||
210 | ldi r5, #0 | ||
211 | st r5, @r4 ; Set MATM Reg(T bit OFF) | ||
212 | ld r6, @r4 ; MATM Check | ||
213 | LDIMM (r4, 3f) | ||
214 | seth r5, #high(__PAGE_OFFSET) | ||
215 | or3 r5, r5, #low(__PAGE_OFFSET) | ||
216 | not r5, r5 | ||
217 | and r4, r5 | ||
218 | jmp r4 ; disable MMU | ||
219 | nop | ||
220 | .fillinsn | ||
221 | 3: | ||
222 | ;; SLEEP and wait IPI | ||
223 | LDIMM (r4, AP_loop) | ||
224 | seth r5, #high(__PAGE_OFFSET) | ||
225 | or3 r5, r5, #low(__PAGE_OFFSET) | ||
226 | not r5, r5 | ||
227 | and r4, r5 | ||
228 | jmp r4 | ||
229 | nop | ||
230 | nop | ||
231 | #endif /* CONFIG_SMP */ | ||
232 | |||
233 | .text | ||
234 | ENTRY(stack_start) | ||
235 | .long init_thread_union+8192 | ||
236 | .long __KERNEL_DS | ||
237 | |||
238 | /* | ||
239 | * This is initialized to create a identity-mapping at 0-4M (for bootup | ||
240 | * purposes) and another mapping of the 0-4M area at virtual address | ||
241 | * PAGE_OFFSET. | ||
242 | */ | ||
243 | .text | ||
244 | |||
245 | #define MOUNT_ROOT_RDONLY 1 | ||
246 | #define RAMDISK_FLAGS 0 ; 1024KB | ||
247 | #define ORIG_ROOT_DEV 0x0100 ; /dev/ram0 (major:01, minor:00) | ||
248 | #define LOADER_TYPE 1 ; (??? - non-zero value seems | ||
249 | ; to be needed to boot from initrd) | ||
250 | |||
251 | #define COMMAND_LINE "" | ||
252 | |||
253 | .section .empty_zero_page, "aw" | ||
254 | ENTRY(empty_zero_page) | ||
255 | .long MOUNT_ROOT_RDONLY /* offset: +0x00 */ | ||
256 | .long RAMDISK_FLAGS | ||
257 | .long ORIG_ROOT_DEV | ||
258 | .long LOADER_TYPE | ||
259 | .long 0 /* INITRD_START */ /* +0x10 */ | ||
260 | .long 0 /* INITRD_SIZE */ | ||
261 | .long 0 /* CPU_CLOCK */ | ||
262 | .long 0 /* BUS_CLOCK */ | ||
263 | .long 0 /* TIMER_DIVIDE */ /* +0x20 */ | ||
264 | .balign 256,0 | ||
265 | .asciz COMMAND_LINE | ||
266 | .byte 0 | ||
267 | .balign 4096,0,4096 | ||
268 | |||
269 | /*------------------------------------------------------------------------ | ||
270 | * Stack area | ||
271 | */ | ||
272 | .section .init.data, "aw" | ||
273 | ALIGN | ||
274 | .global spi_stack_top | ||
275 | .zero 1024 | ||
276 | spi_stack_top: | ||
277 | |||
278 | .section .init.data, "aw" | ||
279 | ALIGN | ||
280 | .global spu_stack_top | ||
281 | .zero 1024 | ||
282 | spu_stack_top: | ||
283 | |||
284 | .end | ||
diff --git a/arch/m32r/kernel/irq.c b/arch/m32r/kernel/irq.c deleted file mode 100644 index 83b5032f176c..000000000000 --- a/arch/m32r/kernel/irq.c +++ /dev/null | |||
@@ -1,44 +0,0 @@ | |||
1 | // SPDX-License-Identifier: GPL-2.0 | ||
2 | /* | ||
3 | * linux/arch/m32r/kernel/irq.c | ||
4 | * | ||
5 | * Copyright (c) 2003, 2004 Hitoshi Yamamoto | ||
6 | * Copyright (c) 2004 Hirokazu Takata <takata at linux-m32r.org> | ||
7 | */ | ||
8 | |||
9 | /* | ||
10 | * linux/arch/i386/kernel/irq.c | ||
11 | * | ||
12 | * Copyright (C) 1992, 1998 Linus Torvalds, Ingo Molnar | ||
13 | * | ||
14 | * This file contains the lowest level m32r-specific interrupt | ||
15 | * entry and irq statistics code. All the remaining irq logic is | ||
16 | * done by the generic kernel/irq/ code and in the | ||
17 | * m32r-specific irq controller code. | ||
18 | */ | ||
19 | |||
20 | #include <linux/kernel_stat.h> | ||
21 | #include <linux/interrupt.h> | ||
22 | #include <linux/module.h> | ||
23 | #include <linux/uaccess.h> | ||
24 | |||
25 | /* | ||
26 | * do_IRQ handles all normal device IRQs (the special | ||
27 | * SMP cross-CPU interrupts have their own specific | ||
28 | * handlers). | ||
29 | */ | ||
30 | asmlinkage unsigned int do_IRQ(int irq, struct pt_regs *regs) | ||
31 | { | ||
32 | struct pt_regs *old_regs; | ||
33 | old_regs = set_irq_regs(regs); | ||
34 | irq_enter(); | ||
35 | |||
36 | #ifdef CONFIG_DEBUG_STACKOVERFLOW | ||
37 | /* FIXME M32R */ | ||
38 | #endif | ||
39 | generic_handle_irq(irq); | ||
40 | irq_exit(); | ||
41 | set_irq_regs(old_regs); | ||
42 | |||
43 | return 1; | ||
44 | } | ||
diff --git a/arch/m32r/kernel/m32r_ksyms.c b/arch/m32r/kernel/m32r_ksyms.c deleted file mode 100644 index 46ebe071e4d6..000000000000 --- a/arch/m32r/kernel/m32r_ksyms.c +++ /dev/null | |||
@@ -1,89 +0,0 @@ | |||
1 | // SPDX-License-Identifier: GPL-2.0 | ||
2 | #include <linux/module.h> | ||
3 | #include <linux/smp.h> | ||
4 | #include <linux/user.h> | ||
5 | #include <linux/elfcore.h> | ||
6 | #include <linux/sched.h> | ||
7 | #include <linux/in6.h> | ||
8 | #include <linux/interrupt.h> | ||
9 | #include <linux/string.h> | ||
10 | |||
11 | #include <asm/processor.h> | ||
12 | #include <linux/uaccess.h> | ||
13 | #include <asm/checksum.h> | ||
14 | #include <asm/io.h> | ||
15 | #include <asm/delay.h> | ||
16 | #include <asm/irq.h> | ||
17 | #include <asm/tlbflush.h> | ||
18 | #include <asm/pgtable.h> | ||
19 | |||
20 | /* platform dependent support */ | ||
21 | EXPORT_SYMBOL(boot_cpu_data); | ||
22 | EXPORT_SYMBOL(dump_fpu); | ||
23 | EXPORT_SYMBOL(__ioremap); | ||
24 | EXPORT_SYMBOL(iounmap); | ||
25 | |||
26 | EXPORT_SYMBOL(strncpy_from_user); | ||
27 | EXPORT_SYMBOL(clear_user); | ||
28 | EXPORT_SYMBOL(__clear_user); | ||
29 | EXPORT_SYMBOL(strnlen_user); | ||
30 | |||
31 | #ifdef CONFIG_SMP | ||
32 | #ifdef CONFIG_CHIP_M32700_TS1 | ||
33 | extern void *dcache_dummy; | ||
34 | EXPORT_SYMBOL(dcache_dummy); | ||
35 | #endif | ||
36 | EXPORT_SYMBOL(cpu_data); | ||
37 | |||
38 | /* TLB flushing */ | ||
39 | EXPORT_SYMBOL(smp_flush_tlb_page); | ||
40 | #endif | ||
41 | |||
42 | extern int __ucmpdi2(unsigned long long a, unsigned long long b); | ||
43 | EXPORT_SYMBOL(__ucmpdi2); | ||
44 | |||
45 | /* compiler generated symbol */ | ||
46 | extern void __ashldi3(void); | ||
47 | extern void __ashrdi3(void); | ||
48 | extern void __lshldi3(void); | ||
49 | extern void __lshrdi3(void); | ||
50 | extern void __muldi3(void); | ||
51 | EXPORT_SYMBOL(__ashldi3); | ||
52 | EXPORT_SYMBOL(__ashrdi3); | ||
53 | EXPORT_SYMBOL(__lshldi3); | ||
54 | EXPORT_SYMBOL(__lshrdi3); | ||
55 | EXPORT_SYMBOL(__muldi3); | ||
56 | |||
57 | /* memory and string operations */ | ||
58 | EXPORT_SYMBOL(memcpy); | ||
59 | EXPORT_SYMBOL(memset); | ||
60 | EXPORT_SYMBOL(copy_page); | ||
61 | EXPORT_SYMBOL(clear_page); | ||
62 | EXPORT_SYMBOL(strlen); | ||
63 | EXPORT_SYMBOL(empty_zero_page); | ||
64 | |||
65 | EXPORT_SYMBOL(_inb); | ||
66 | EXPORT_SYMBOL(_inw); | ||
67 | EXPORT_SYMBOL(_inl); | ||
68 | EXPORT_SYMBOL(_outb); | ||
69 | EXPORT_SYMBOL(_outw); | ||
70 | EXPORT_SYMBOL(_outl); | ||
71 | EXPORT_SYMBOL(_inb_p); | ||
72 | EXPORT_SYMBOL(_inw_p); | ||
73 | EXPORT_SYMBOL(_inl_p); | ||
74 | EXPORT_SYMBOL(_outb_p); | ||
75 | EXPORT_SYMBOL(_outw_p); | ||
76 | EXPORT_SYMBOL(_outl_p); | ||
77 | EXPORT_SYMBOL(_insb); | ||
78 | EXPORT_SYMBOL(_insw); | ||
79 | EXPORT_SYMBOL(_insl); | ||
80 | EXPORT_SYMBOL(_outsb); | ||
81 | EXPORT_SYMBOL(_outsw); | ||
82 | EXPORT_SYMBOL(_outsl); | ||
83 | EXPORT_SYMBOL(_readb); | ||
84 | EXPORT_SYMBOL(_readw); | ||
85 | EXPORT_SYMBOL(_readl); | ||
86 | EXPORT_SYMBOL(_writeb); | ||
87 | EXPORT_SYMBOL(_writew); | ||
88 | EXPORT_SYMBOL(_writel); | ||
89 | |||
diff --git a/arch/m32r/kernel/module.c b/arch/m32r/kernel/module.c deleted file mode 100644 index 38233b6596b6..000000000000 --- a/arch/m32r/kernel/module.c +++ /dev/null | |||
@@ -1,203 +0,0 @@ | |||
1 | /* Kernel module help for M32R. | ||
2 | |||
3 | This program is free software; you can redistribute it and/or modify | ||
4 | it under the terms of the GNU General Public License as published by | ||
5 | the Free Software Foundation; either version 2 of the License, or | ||
6 | (at your option) any later version. | ||
7 | |||
8 | This program is distributed in the hope that it will be useful, | ||
9 | but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
10 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
11 | GNU General Public License for more details. | ||
12 | |||
13 | You should have received a copy of the GNU General Public License | ||
14 | along with this program; if not, write to the Free Software | ||
15 | Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
16 | */ | ||
17 | |||
18 | #include <linux/moduleloader.h> | ||
19 | #include <linux/elf.h> | ||
20 | #include <linux/vmalloc.h> | ||
21 | #include <linux/fs.h> | ||
22 | #include <linux/string.h> | ||
23 | #include <linux/kernel.h> | ||
24 | |||
25 | #if 0 | ||
26 | #define DEBUGP printk | ||
27 | #else | ||
28 | #define DEBUGP(fmt...) | ||
29 | #endif | ||
30 | |||
31 | #define COPY_UNALIGNED_WORD(sw, tw, align) \ | ||
32 | { \ | ||
33 | void *__s = &(sw), *__t = &(tw); \ | ||
34 | unsigned short *__s2 = __s, *__t2 =__t; \ | ||
35 | unsigned char *__s1 = __s, *__t1 =__t; \ | ||
36 | switch ((align)) \ | ||
37 | { \ | ||
38 | case 0: \ | ||
39 | *(unsigned long *) __t = *(unsigned long *) __s; \ | ||
40 | break; \ | ||
41 | case 2: \ | ||
42 | *__t2++ = *__s2++; \ | ||
43 | *__t2 = *__s2; \ | ||
44 | break; \ | ||
45 | default: \ | ||
46 | *__t1++ = *__s1++; \ | ||
47 | *__t1++ = *__s1++; \ | ||
48 | *__t1++ = *__s1++; \ | ||
49 | *__t1 = *__s1; \ | ||
50 | break; \ | ||
51 | } \ | ||
52 | } | ||
53 | |||
54 | #define COPY_UNALIGNED_HWORD(sw, tw, align) \ | ||
55 | { \ | ||
56 | void *__s = &(sw), *__t = &(tw); \ | ||
57 | unsigned short *__s2 = __s, *__t2 =__t; \ | ||
58 | unsigned char *__s1 = __s, *__t1 =__t; \ | ||
59 | switch ((align)) \ | ||
60 | { \ | ||
61 | case 0: \ | ||
62 | *__t2 = *__s2; \ | ||
63 | break; \ | ||
64 | default: \ | ||
65 | *__t1++ = *__s1++; \ | ||
66 | *__t1 = *__s1; \ | ||
67 | break; \ | ||
68 | } \ | ||
69 | } | ||
70 | |||
71 | int apply_relocate_add(Elf32_Shdr *sechdrs, | ||
72 | const char *strtab, | ||
73 | unsigned int symindex, | ||
74 | unsigned int relsec, | ||
75 | struct module *me) | ||
76 | { | ||
77 | unsigned int i; | ||
78 | Elf32_Rela *rel = (void *)sechdrs[relsec].sh_addr; | ||
79 | Elf32_Sym *sym; | ||
80 | Elf32_Addr relocation; | ||
81 | uint32_t *location; | ||
82 | uint32_t value; | ||
83 | unsigned short *hlocation; | ||
84 | unsigned short hvalue; | ||
85 | int svalue; | ||
86 | int align; | ||
87 | |||
88 | DEBUGP("Applying relocate section %u to %u\n", relsec, | ||
89 | sechdrs[relsec].sh_info); | ||
90 | for (i = 0; i < sechdrs[relsec].sh_size / sizeof(*rel); i++) { | ||
91 | /* This is where to make the change */ | ||
92 | location = (void *)sechdrs[sechdrs[relsec].sh_info].sh_addr | ||
93 | + rel[i].r_offset; | ||
94 | /* This is the symbol it is referring to. Note that all | ||
95 | undefined symbols have been resolved. */ | ||
96 | sym = (Elf32_Sym *)sechdrs[symindex].sh_addr | ||
97 | + ELF32_R_SYM(rel[i].r_info); | ||
98 | relocation = sym->st_value + rel[i].r_addend; | ||
99 | align = (int)location & 3; | ||
100 | |||
101 | switch (ELF32_R_TYPE(rel[i].r_info)) { | ||
102 | case R_M32R_32_RELA: | ||
103 | COPY_UNALIGNED_WORD (*location, value, align); | ||
104 | value += relocation; | ||
105 | COPY_UNALIGNED_WORD (value, *location, align); | ||
106 | break; | ||
107 | case R_M32R_HI16_ULO_RELA: | ||
108 | COPY_UNALIGNED_WORD (*location, value, align); | ||
109 | relocation = (relocation >>16) & 0xffff; | ||
110 | /* RELA must has 0 at relocation field. */ | ||
111 | value += relocation; | ||
112 | COPY_UNALIGNED_WORD (value, *location, align); | ||
113 | break; | ||
114 | case R_M32R_HI16_SLO_RELA: | ||
115 | COPY_UNALIGNED_WORD (*location, value, align); | ||
116 | if (relocation & 0x8000) relocation += 0x10000; | ||
117 | relocation = (relocation >>16) & 0xffff; | ||
118 | /* RELA must has 0 at relocation field. */ | ||
119 | value += relocation; | ||
120 | COPY_UNALIGNED_WORD (value, *location, align); | ||
121 | break; | ||
122 | case R_M32R_16_RELA: | ||
123 | hlocation = (unsigned short *)location; | ||
124 | relocation = relocation & 0xffff; | ||
125 | /* RELA must has 0 at relocation field. */ | ||
126 | hvalue = relocation; | ||
127 | COPY_UNALIGNED_WORD (hvalue, *hlocation, align); | ||
128 | break; | ||
129 | case R_M32R_SDA16_RELA: | ||
130 | case R_M32R_LO16_RELA: | ||
131 | COPY_UNALIGNED_WORD (*location, value, align); | ||
132 | relocation = relocation & 0xffff; | ||
133 | /* RELA must has 0 at relocation field. */ | ||
134 | value += relocation; | ||
135 | COPY_UNALIGNED_WORD (value, *location, align); | ||
136 | break; | ||
137 | case R_M32R_24_RELA: | ||
138 | COPY_UNALIGNED_WORD (*location, value, align); | ||
139 | relocation = relocation & 0xffffff; | ||
140 | /* RELA must has 0 at relocation field. */ | ||
141 | value += relocation; | ||
142 | COPY_UNALIGNED_WORD (value, *location, align); | ||
143 | break; | ||
144 | case R_M32R_18_PCREL_RELA: | ||
145 | relocation = (relocation - (Elf32_Addr) location); | ||
146 | if (relocation < -0x20000 || 0x1fffc < relocation) | ||
147 | { | ||
148 | printk(KERN_ERR "module %s: relocation overflow: %u\n", | ||
149 | me->name, relocation); | ||
150 | return -ENOEXEC; | ||
151 | } | ||
152 | COPY_UNALIGNED_WORD (*location, value, align); | ||
153 | if (value & 0xffff) | ||
154 | { | ||
155 | /* RELA must has 0 at relocation field. */ | ||
156 | printk(KERN_ERR "module %s: illegal relocation field: %u\n", | ||
157 | me->name, value); | ||
158 | return -ENOEXEC; | ||
159 | } | ||
160 | relocation = (relocation >> 2) & 0xffff; | ||
161 | value += relocation; | ||
162 | COPY_UNALIGNED_WORD (value, *location, align); | ||
163 | break; | ||
164 | case R_M32R_10_PCREL_RELA: | ||
165 | hlocation = (unsigned short *)location; | ||
166 | relocation = (relocation - (Elf32_Addr) location); | ||
167 | COPY_UNALIGNED_HWORD (*hlocation, hvalue, align); | ||
168 | svalue = (int)hvalue; | ||
169 | svalue = (signed char)svalue << 2; | ||
170 | relocation += svalue; | ||
171 | relocation = (relocation >> 2) & 0xff; | ||
172 | hvalue = hvalue & 0xff00; | ||
173 | hvalue += relocation; | ||
174 | COPY_UNALIGNED_HWORD (hvalue, *hlocation, align); | ||
175 | break; | ||
176 | case R_M32R_26_PCREL_RELA: | ||
177 | relocation = (relocation - (Elf32_Addr) location); | ||
178 | if (relocation < -0x2000000 || 0x1fffffc < relocation) | ||
179 | { | ||
180 | printk(KERN_ERR "module %s: relocation overflow: %u\n", | ||
181 | me->name, relocation); | ||
182 | return -ENOEXEC; | ||
183 | } | ||
184 | COPY_UNALIGNED_WORD (*location, value, align); | ||
185 | if (value & 0xffffff) | ||
186 | { | ||
187 | /* RELA must has 0 at relocation field. */ | ||
188 | printk(KERN_ERR "module %s: illegal relocation field: %u\n", | ||
189 | me->name, value); | ||
190 | return -ENOEXEC; | ||
191 | } | ||
192 | relocation = (relocation >> 2) & 0xffffff; | ||
193 | value += relocation; | ||
194 | COPY_UNALIGNED_WORD (value, *location, align); | ||
195 | break; | ||
196 | default: | ||
197 | printk(KERN_ERR "module %s: Unknown relocation: %u\n", | ||
198 | me->name, ELF32_R_TYPE(rel[i].r_info)); | ||
199 | return -ENOEXEC; | ||
200 | } | ||
201 | } | ||
202 | return 0; | ||
203 | } | ||
diff --git a/arch/m32r/kernel/process.c b/arch/m32r/kernel/process.c deleted file mode 100644 index a1a4cb136e99..000000000000 --- a/arch/m32r/kernel/process.c +++ /dev/null | |||
@@ -1,154 +0,0 @@ | |||
1 | // SPDX-License-Identifier: GPL-2.0 | ||
2 | /* | ||
3 | * linux/arch/m32r/kernel/process.c | ||
4 | * | ||
5 | * Copyright (c) 2001, 2002 Hiroyuki Kondo, Hirokazu Takata, | ||
6 | * Hitoshi Yamamoto | ||
7 | * Taken from sh version. | ||
8 | * Copyright (C) 1995 Linus Torvalds | ||
9 | * SuperH version: Copyright (C) 1999, 2000 Niibe Yutaka & Kaz Kojima | ||
10 | */ | ||
11 | |||
12 | #undef DEBUG_PROCESS | ||
13 | #ifdef DEBUG_PROCESS | ||
14 | #define DPRINTK(fmt, args...) printk("%s:%d:%s: " fmt, __FILE__, __LINE__, \ | ||
15 | __func__, ##args) | ||
16 | #else | ||
17 | #define DPRINTK(fmt, args...) | ||
18 | #endif | ||
19 | |||
20 | /* | ||
21 | * This file handles the architecture-dependent parts of process handling.. | ||
22 | */ | ||
23 | |||
24 | #include <linux/fs.h> | ||
25 | #include <linux/slab.h> | ||
26 | #include <linux/sched/debug.h> | ||
27 | #include <linux/sched/task.h> | ||
28 | #include <linux/sched/task_stack.h> | ||
29 | #include <linux/module.h> | ||
30 | #include <linux/ptrace.h> | ||
31 | #include <linux/unistd.h> | ||
32 | #include <linux/hardirq.h> | ||
33 | #include <linux/rcupdate.h> | ||
34 | |||
35 | #include <asm/io.h> | ||
36 | #include <linux/uaccess.h> | ||
37 | #include <asm/mmu_context.h> | ||
38 | #include <asm/elf.h> | ||
39 | #include <asm/m32r.h> | ||
40 | |||
41 | #include <linux/err.h> | ||
42 | |||
43 | void (*pm_power_off)(void) = NULL; | ||
44 | EXPORT_SYMBOL(pm_power_off); | ||
45 | |||
46 | void machine_restart(char *__unused) | ||
47 | { | ||
48 | #if defined(CONFIG_PLAT_MAPPI3) | ||
49 | outw(1, (unsigned long)PLD_REBOOT); | ||
50 | #endif | ||
51 | |||
52 | printk("Please push reset button!\n"); | ||
53 | while (1) | ||
54 | cpu_relax(); | ||
55 | } | ||
56 | |||
57 | void machine_halt(void) | ||
58 | { | ||
59 | printk("Please push reset button!\n"); | ||
60 | while (1) | ||
61 | cpu_relax(); | ||
62 | } | ||
63 | |||
64 | void machine_power_off(void) | ||
65 | { | ||
66 | /* M32R_FIXME */ | ||
67 | } | ||
68 | |||
69 | void show_regs(struct pt_regs * regs) | ||
70 | { | ||
71 | printk("\n"); | ||
72 | show_regs_print_info(KERN_DEFAULT); | ||
73 | |||
74 | printk("BPC[%08lx]:PSW[%08lx]:LR [%08lx]:FP [%08lx]\n", \ | ||
75 | regs->bpc, regs->psw, regs->lr, regs->fp); | ||
76 | printk("BBPC[%08lx]:BBPSW[%08lx]:SPU[%08lx]:SPI[%08lx]\n", \ | ||
77 | regs->bbpc, regs->bbpsw, regs->spu, regs->spi); | ||
78 | printk("R0 [%08lx]:R1 [%08lx]:R2 [%08lx]:R3 [%08lx]\n", \ | ||
79 | regs->r0, regs->r1, regs->r2, regs->r3); | ||
80 | printk("R4 [%08lx]:R5 [%08lx]:R6 [%08lx]:R7 [%08lx]\n", \ | ||
81 | regs->r4, regs->r5, regs->r6, regs->r7); | ||
82 | printk("R8 [%08lx]:R9 [%08lx]:R10[%08lx]:R11[%08lx]\n", \ | ||
83 | regs->r8, regs->r9, regs->r10, regs->r11); | ||
84 | printk("R12[%08lx]\n", \ | ||
85 | regs->r12); | ||
86 | |||
87 | #if defined(CONFIG_ISA_M32R2) && defined(CONFIG_ISA_DSP_LEVEL2) | ||
88 | printk("ACC0H[%08lx]:ACC0L[%08lx]\n", \ | ||
89 | regs->acc0h, regs->acc0l); | ||
90 | printk("ACC1H[%08lx]:ACC1L[%08lx]\n", \ | ||
91 | regs->acc1h, regs->acc1l); | ||
92 | #elif defined(CONFIG_ISA_M32R2) || defined(CONFIG_ISA_M32R) | ||
93 | printk("ACCH[%08lx]:ACCL[%08lx]\n", \ | ||
94 | regs->acc0h, regs->acc0l); | ||
95 | #else | ||
96 | #error unknown isa configuration | ||
97 | #endif | ||
98 | } | ||
99 | |||
100 | void flush_thread(void) | ||
101 | { | ||
102 | DPRINTK("pid = %d\n", current->pid); | ||
103 | memset(¤t->thread.debug_trap, 0, sizeof(struct debug_trap)); | ||
104 | } | ||
105 | |||
106 | void release_thread(struct task_struct *dead_task) | ||
107 | { | ||
108 | /* do nothing */ | ||
109 | DPRINTK("pid = %d\n", dead_task->pid); | ||
110 | } | ||
111 | |||
112 | /* Fill in the fpu structure for a core dump.. */ | ||
113 | int dump_fpu(struct pt_regs *regs, elf_fpregset_t *fpu) | ||
114 | { | ||
115 | return 0; /* Task didn't use the fpu at all. */ | ||
116 | } | ||
117 | |||
118 | int copy_thread(unsigned long clone_flags, unsigned long spu, | ||
119 | unsigned long arg, struct task_struct *tsk) | ||
120 | { | ||
121 | struct pt_regs *childregs = task_pt_regs(tsk); | ||
122 | extern void ret_from_fork(void); | ||
123 | extern void ret_from_kernel_thread(void); | ||
124 | |||
125 | if (unlikely(tsk->flags & PF_KTHREAD)) { | ||
126 | memset(childregs, 0, sizeof(struct pt_regs)); | ||
127 | childregs->psw = M32R_PSW_BIE; | ||
128 | childregs->r1 = spu; /* fn */ | ||
129 | childregs->r0 = arg; | ||
130 | tsk->thread.lr = (unsigned long)ret_from_kernel_thread; | ||
131 | } else { | ||
132 | /* Copy registers */ | ||
133 | *childregs = *current_pt_regs(); | ||
134 | if (spu) | ||
135 | childregs->spu = spu; | ||
136 | childregs->r0 = 0; /* Child gets zero as return value */ | ||
137 | tsk->thread.lr = (unsigned long)ret_from_fork; | ||
138 | } | ||
139 | tsk->thread.sp = (unsigned long)childregs; | ||
140 | |||
141 | return 0; | ||
142 | } | ||
143 | |||
144 | /* | ||
145 | * These bracket the sleeping functions.. | ||
146 | */ | ||
147 | #define first_sched ((unsigned long) scheduling_functions_start_here) | ||
148 | #define last_sched ((unsigned long) scheduling_functions_end_here) | ||
149 | |||
150 | unsigned long get_wchan(struct task_struct *p) | ||
151 | { | ||
152 | /* M32R_FIXME */ | ||
153 | return (0); | ||
154 | } | ||
diff --git a/arch/m32r/kernel/ptrace.c b/arch/m32r/kernel/ptrace.c deleted file mode 100644 index d702a5ca0f92..000000000000 --- a/arch/m32r/kernel/ptrace.c +++ /dev/null | |||
@@ -1,708 +0,0 @@ | |||
1 | // SPDX-License-Identifier: GPL-2.0 | ||
2 | /* | ||
3 | * linux/arch/m32r/kernel/ptrace.c | ||
4 | * | ||
5 | * Copyright (C) 2002 Hirokazu Takata, Takeo Takahashi | ||
6 | * Copyright (C) 2004 Hirokazu Takata, Kei Sakamoto | ||
7 | * | ||
8 | * Original x86 implementation: | ||
9 | * By Ross Biro 1/23/92 | ||
10 | * edited by Linus Torvalds | ||
11 | * | ||
12 | * Some code taken from sh version: | ||
13 | * Copyright (C) 1999, 2000 Kaz Kojima & Niibe Yutaka | ||
14 | * Some code taken from arm version: | ||
15 | * Copyright (C) 2000 Russell King | ||
16 | */ | ||
17 | |||
18 | #include <linux/kernel.h> | ||
19 | #include <linux/sched.h> | ||
20 | #include <linux/sched/task_stack.h> | ||
21 | #include <linux/mm.h> | ||
22 | #include <linux/err.h> | ||
23 | #include <linux/smp.h> | ||
24 | #include <linux/errno.h> | ||
25 | #include <linux/ptrace.h> | ||
26 | #include <linux/user.h> | ||
27 | #include <linux/string.h> | ||
28 | #include <linux/signal.h> | ||
29 | |||
30 | #include <asm/cacheflush.h> | ||
31 | #include <asm/io.h> | ||
32 | #include <linux/uaccess.h> | ||
33 | #include <asm/pgtable.h> | ||
34 | #include <asm/processor.h> | ||
35 | #include <asm/mmu_context.h> | ||
36 | |||
37 | /* | ||
38 | * This routine will get a word off of the process kernel stack. | ||
39 | */ | ||
40 | static inline unsigned long int | ||
41 | get_stack_long(struct task_struct *task, int offset) | ||
42 | { | ||
43 | unsigned long *stack; | ||
44 | |||
45 | stack = (unsigned long *)task_pt_regs(task); | ||
46 | |||
47 | return stack[offset]; | ||
48 | } | ||
49 | |||
50 | /* | ||
51 | * This routine will put a word on the process kernel stack. | ||
52 | */ | ||
53 | static inline int | ||
54 | put_stack_long(struct task_struct *task, int offset, unsigned long data) | ||
55 | { | ||
56 | unsigned long *stack; | ||
57 | |||
58 | stack = (unsigned long *)task_pt_regs(task); | ||
59 | stack[offset] = data; | ||
60 | |||
61 | return 0; | ||
62 | } | ||
63 | |||
64 | static int reg_offset[] = { | ||
65 | PT_R0, PT_R1, PT_R2, PT_R3, PT_R4, PT_R5, PT_R6, PT_R7, | ||
66 | PT_R8, PT_R9, PT_R10, PT_R11, PT_R12, PT_FP, PT_LR, PT_SPU, | ||
67 | }; | ||
68 | |||
69 | /* | ||
70 | * Read the word at offset "off" into the "struct user". We | ||
71 | * actually access the pt_regs stored on the kernel stack. | ||
72 | */ | ||
73 | static int ptrace_read_user(struct task_struct *tsk, unsigned long off, | ||
74 | unsigned long __user *data) | ||
75 | { | ||
76 | unsigned long tmp; | ||
77 | #ifndef NO_FPU | ||
78 | struct user * dummy = NULL; | ||
79 | #endif | ||
80 | |||
81 | if ((off & 3) || off > sizeof(struct user) - 3) | ||
82 | return -EIO; | ||
83 | |||
84 | off >>= 2; | ||
85 | switch (off) { | ||
86 | case PT_EVB: | ||
87 | __asm__ __volatile__ ( | ||
88 | "mvfc %0, cr5 \n\t" | ||
89 | : "=r" (tmp) | ||
90 | ); | ||
91 | break; | ||
92 | case PT_CBR: { | ||
93 | unsigned long psw; | ||
94 | psw = get_stack_long(tsk, PT_PSW); | ||
95 | tmp = ((psw >> 8) & 1); | ||
96 | } | ||
97 | break; | ||
98 | case PT_PSW: { | ||
99 | unsigned long psw, bbpsw; | ||
100 | psw = get_stack_long(tsk, PT_PSW); | ||
101 | bbpsw = get_stack_long(tsk, PT_BBPSW); | ||
102 | tmp = ((psw >> 8) & 0xff) | ((bbpsw & 0xff) << 8); | ||
103 | } | ||
104 | break; | ||
105 | case PT_PC: | ||
106 | tmp = get_stack_long(tsk, PT_BPC); | ||
107 | break; | ||
108 | case PT_BPC: | ||
109 | off = PT_BBPC; | ||
110 | /* fall through */ | ||
111 | default: | ||
112 | if (off < (sizeof(struct pt_regs) >> 2)) | ||
113 | tmp = get_stack_long(tsk, off); | ||
114 | #ifndef NO_FPU | ||
115 | else if (off >= (long)(&dummy->fpu >> 2) && | ||
116 | off < (long)(&dummy->u_fpvalid >> 2)) { | ||
117 | if (!tsk_used_math(tsk)) { | ||
118 | if (off == (long)(&dummy->fpu.fpscr >> 2)) | ||
119 | tmp = FPSCR_INIT; | ||
120 | else | ||
121 | tmp = 0; | ||
122 | } else | ||
123 | tmp = ((long *)(&tsk->thread.fpu >> 2)) | ||
124 | [off - (long)&dummy->fpu]; | ||
125 | } else if (off == (long)(&dummy->u_fpvalid >> 2)) | ||
126 | tmp = !!tsk_used_math(tsk); | ||
127 | #endif /* not NO_FPU */ | ||
128 | else | ||
129 | tmp = 0; | ||
130 | } | ||
131 | |||
132 | return put_user(tmp, data); | ||
133 | } | ||
134 | |||
135 | static int ptrace_write_user(struct task_struct *tsk, unsigned long off, | ||
136 | unsigned long data) | ||
137 | { | ||
138 | int ret = -EIO; | ||
139 | #ifndef NO_FPU | ||
140 | struct user * dummy = NULL; | ||
141 | #endif | ||
142 | |||
143 | if ((off & 3) || off > sizeof(struct user) - 3) | ||
144 | return -EIO; | ||
145 | |||
146 | off >>= 2; | ||
147 | switch (off) { | ||
148 | case PT_EVB: | ||
149 | case PT_BPC: | ||
150 | case PT_SPI: | ||
151 | /* We don't allow to modify evb. */ | ||
152 | ret = 0; | ||
153 | break; | ||
154 | case PT_PSW: | ||
155 | case PT_CBR: { | ||
156 | /* We allow to modify only cbr in psw */ | ||
157 | unsigned long psw; | ||
158 | psw = get_stack_long(tsk, PT_PSW); | ||
159 | psw = (psw & ~0x100) | ((data & 1) << 8); | ||
160 | ret = put_stack_long(tsk, PT_PSW, psw); | ||
161 | } | ||
162 | break; | ||
163 | case PT_PC: | ||
164 | off = PT_BPC; | ||
165 | data &= ~1; | ||
166 | /* fall through */ | ||
167 | default: | ||
168 | if (off < (sizeof(struct pt_regs) >> 2)) | ||
169 | ret = put_stack_long(tsk, off, data); | ||
170 | #ifndef NO_FPU | ||
171 | else if (off >= (long)(&dummy->fpu >> 2) && | ||
172 | off < (long)(&dummy->u_fpvalid >> 2)) { | ||
173 | set_stopped_child_used_math(tsk); | ||
174 | ((long *)&tsk->thread.fpu) | ||
175 | [off - (long)&dummy->fpu] = data; | ||
176 | ret = 0; | ||
177 | } else if (off == (long)(&dummy->u_fpvalid >> 2)) { | ||
178 | conditional_stopped_child_used_math(data, tsk); | ||
179 | ret = 0; | ||
180 | } | ||
181 | #endif /* not NO_FPU */ | ||
182 | break; | ||
183 | } | ||
184 | |||
185 | return ret; | ||
186 | } | ||
187 | |||
188 | /* | ||
189 | * Get all user integer registers. | ||
190 | */ | ||
191 | static int ptrace_getregs(struct task_struct *tsk, void __user *uregs) | ||
192 | { | ||
193 | struct pt_regs *regs = task_pt_regs(tsk); | ||
194 | |||
195 | return copy_to_user(uregs, regs, sizeof(struct pt_regs)) ? -EFAULT : 0; | ||
196 | } | ||
197 | |||
198 | /* | ||
199 | * Set all user integer registers. | ||
200 | */ | ||
201 | static int ptrace_setregs(struct task_struct *tsk, void __user *uregs) | ||
202 | { | ||
203 | struct pt_regs newregs; | ||
204 | int ret; | ||
205 | |||
206 | ret = -EFAULT; | ||
207 | if (copy_from_user(&newregs, uregs, sizeof(struct pt_regs)) == 0) { | ||
208 | struct pt_regs *regs = task_pt_regs(tsk); | ||
209 | *regs = newregs; | ||
210 | ret = 0; | ||
211 | } | ||
212 | |||
213 | return ret; | ||
214 | } | ||
215 | |||
216 | |||
217 | static inline int | ||
218 | check_condition_bit(struct task_struct *child) | ||
219 | { | ||
220 | return (int)((get_stack_long(child, PT_PSW) >> 8) & 1); | ||
221 | } | ||
222 | |||
223 | static int | ||
224 | check_condition_src(unsigned long op, unsigned long regno1, | ||
225 | unsigned long regno2, struct task_struct *child) | ||
226 | { | ||
227 | unsigned long reg1, reg2; | ||
228 | |||
229 | reg2 = get_stack_long(child, reg_offset[regno2]); | ||
230 | |||
231 | switch (op) { | ||
232 | case 0x0: /* BEQ */ | ||
233 | reg1 = get_stack_long(child, reg_offset[regno1]); | ||
234 | return reg1 == reg2; | ||
235 | case 0x1: /* BNE */ | ||
236 | reg1 = get_stack_long(child, reg_offset[regno1]); | ||
237 | return reg1 != reg2; | ||
238 | case 0x8: /* BEQZ */ | ||
239 | return reg2 == 0; | ||
240 | case 0x9: /* BNEZ */ | ||
241 | return reg2 != 0; | ||
242 | case 0xa: /* BLTZ */ | ||
243 | return (int)reg2 < 0; | ||
244 | case 0xb: /* BGEZ */ | ||
245 | return (int)reg2 >= 0; | ||
246 | case 0xc: /* BLEZ */ | ||
247 | return (int)reg2 <= 0; | ||
248 | case 0xd: /* BGTZ */ | ||
249 | return (int)reg2 > 0; | ||
250 | default: | ||
251 | /* never reached */ | ||
252 | return 0; | ||
253 | } | ||
254 | } | ||
255 | |||
256 | static void | ||
257 | compute_next_pc_for_16bit_insn(unsigned long insn, unsigned long pc, | ||
258 | unsigned long *next_pc, | ||
259 | struct task_struct *child) | ||
260 | { | ||
261 | unsigned long op, op2, op3; | ||
262 | unsigned long disp; | ||
263 | unsigned long regno; | ||
264 | int parallel = 0; | ||
265 | |||
266 | if (insn & 0x00008000) | ||
267 | parallel = 1; | ||
268 | if (pc & 3) | ||
269 | insn &= 0x7fff; /* right slot */ | ||
270 | else | ||
271 | insn >>= 16; /* left slot */ | ||
272 | |||
273 | op = (insn >> 12) & 0xf; | ||
274 | op2 = (insn >> 8) & 0xf; | ||
275 | op3 = (insn >> 4) & 0xf; | ||
276 | |||
277 | if (op == 0x7) { | ||
278 | switch (op2) { | ||
279 | case 0xd: /* BNC */ | ||
280 | case 0x9: /* BNCL */ | ||
281 | if (!check_condition_bit(child)) { | ||
282 | disp = (long)(insn << 24) >> 22; | ||
283 | *next_pc = (pc & ~0x3) + disp; | ||
284 | return; | ||
285 | } | ||
286 | break; | ||
287 | case 0x8: /* BCL */ | ||
288 | case 0xc: /* BC */ | ||
289 | if (check_condition_bit(child)) { | ||
290 | disp = (long)(insn << 24) >> 22; | ||
291 | *next_pc = (pc & ~0x3) + disp; | ||
292 | return; | ||
293 | } | ||
294 | break; | ||
295 | case 0xe: /* BL */ | ||
296 | case 0xf: /* BRA */ | ||
297 | disp = (long)(insn << 24) >> 22; | ||
298 | *next_pc = (pc & ~0x3) + disp; | ||
299 | return; | ||
300 | break; | ||
301 | } | ||
302 | } else if (op == 0x1) { | ||
303 | switch (op2) { | ||
304 | case 0x0: | ||
305 | if (op3 == 0xf) { /* TRAP */ | ||
306 | #if 1 | ||
307 | /* pass through */ | ||
308 | #else | ||
309 | /* kernel space is not allowed as next_pc */ | ||
310 | unsigned long evb; | ||
311 | unsigned long trapno; | ||
312 | trapno = insn & 0xf; | ||
313 | __asm__ __volatile__ ( | ||
314 | "mvfc %0, cr5\n" | ||
315 | :"=r"(evb) | ||
316 | : | ||
317 | ); | ||
318 | *next_pc = evb + (trapno << 2); | ||
319 | return; | ||
320 | #endif | ||
321 | } else if (op3 == 0xd) { /* RTE */ | ||
322 | *next_pc = get_stack_long(child, PT_BPC); | ||
323 | return; | ||
324 | } | ||
325 | break; | ||
326 | case 0xc: /* JC */ | ||
327 | if (op3 == 0xc && check_condition_bit(child)) { | ||
328 | regno = insn & 0xf; | ||
329 | *next_pc = get_stack_long(child, | ||
330 | reg_offset[regno]); | ||
331 | return; | ||
332 | } | ||
333 | break; | ||
334 | case 0xd: /* JNC */ | ||
335 | if (op3 == 0xc && !check_condition_bit(child)) { | ||
336 | regno = insn & 0xf; | ||
337 | *next_pc = get_stack_long(child, | ||
338 | reg_offset[regno]); | ||
339 | return; | ||
340 | } | ||
341 | break; | ||
342 | case 0xe: /* JL */ | ||
343 | case 0xf: /* JMP */ | ||
344 | if (op3 == 0xc) { /* JMP */ | ||
345 | regno = insn & 0xf; | ||
346 | *next_pc = get_stack_long(child, | ||
347 | reg_offset[regno]); | ||
348 | return; | ||
349 | } | ||
350 | break; | ||
351 | } | ||
352 | } | ||
353 | if (parallel) | ||
354 | *next_pc = pc + 4; | ||
355 | else | ||
356 | *next_pc = pc + 2; | ||
357 | } | ||
358 | |||
359 | static void | ||
360 | compute_next_pc_for_32bit_insn(unsigned long insn, unsigned long pc, | ||
361 | unsigned long *next_pc, | ||
362 | struct task_struct *child) | ||
363 | { | ||
364 | unsigned long op; | ||
365 | unsigned long op2; | ||
366 | unsigned long disp; | ||
367 | unsigned long regno1, regno2; | ||
368 | |||
369 | op = (insn >> 28) & 0xf; | ||
370 | if (op == 0xf) { /* branch 24-bit relative */ | ||
371 | op2 = (insn >> 24) & 0xf; | ||
372 | switch (op2) { | ||
373 | case 0xd: /* BNC */ | ||
374 | case 0x9: /* BNCL */ | ||
375 | if (!check_condition_bit(child)) { | ||
376 | disp = (long)(insn << 8) >> 6; | ||
377 | *next_pc = (pc & ~0x3) + disp; | ||
378 | return; | ||
379 | } | ||
380 | break; | ||
381 | case 0x8: /* BCL */ | ||
382 | case 0xc: /* BC */ | ||
383 | if (check_condition_bit(child)) { | ||
384 | disp = (long)(insn << 8) >> 6; | ||
385 | *next_pc = (pc & ~0x3) + disp; | ||
386 | return; | ||
387 | } | ||
388 | break; | ||
389 | case 0xe: /* BL */ | ||
390 | case 0xf: /* BRA */ | ||
391 | disp = (long)(insn << 8) >> 6; | ||
392 | *next_pc = (pc & ~0x3) + disp; | ||
393 | return; | ||
394 | } | ||
395 | } else if (op == 0xb) { /* branch 16-bit relative */ | ||
396 | op2 = (insn >> 20) & 0xf; | ||
397 | switch (op2) { | ||
398 | case 0x0: /* BEQ */ | ||
399 | case 0x1: /* BNE */ | ||
400 | case 0x8: /* BEQZ */ | ||
401 | case 0x9: /* BNEZ */ | ||
402 | case 0xa: /* BLTZ */ | ||
403 | case 0xb: /* BGEZ */ | ||
404 | case 0xc: /* BLEZ */ | ||
405 | case 0xd: /* BGTZ */ | ||
406 | regno1 = ((insn >> 24) & 0xf); | ||
407 | regno2 = ((insn >> 16) & 0xf); | ||
408 | if (check_condition_src(op2, regno1, regno2, child)) { | ||
409 | disp = (long)(insn << 16) >> 14; | ||
410 | *next_pc = (pc & ~0x3) + disp; | ||
411 | return; | ||
412 | } | ||
413 | break; | ||
414 | } | ||
415 | } | ||
416 | *next_pc = pc + 4; | ||
417 | } | ||
418 | |||
419 | static inline void | ||
420 | compute_next_pc(unsigned long insn, unsigned long pc, | ||
421 | unsigned long *next_pc, struct task_struct *child) | ||
422 | { | ||
423 | if (insn & 0x80000000) | ||
424 | compute_next_pc_for_32bit_insn(insn, pc, next_pc, child); | ||
425 | else | ||
426 | compute_next_pc_for_16bit_insn(insn, pc, next_pc, child); | ||
427 | } | ||
428 | |||
429 | static int | ||
430 | register_debug_trap(struct task_struct *child, unsigned long next_pc, | ||
431 | unsigned long next_insn, unsigned long *code) | ||
432 | { | ||
433 | struct debug_trap *p = &child->thread.debug_trap; | ||
434 | unsigned long addr = next_pc & ~3; | ||
435 | |||
436 | if (p->nr_trap == MAX_TRAPS) { | ||
437 | printk("kernel BUG at %s %d: p->nr_trap = %d\n", | ||
438 | __FILE__, __LINE__, p->nr_trap); | ||
439 | return -1; | ||
440 | } | ||
441 | p->addr[p->nr_trap] = addr; | ||
442 | p->insn[p->nr_trap] = next_insn; | ||
443 | p->nr_trap++; | ||
444 | if (next_pc & 3) { | ||
445 | *code = (next_insn & 0xffff0000) | 0x10f1; | ||
446 | /* xxx --> TRAP1 */ | ||
447 | } else { | ||
448 | if ((next_insn & 0x80000000) || (next_insn & 0x8000)) { | ||
449 | *code = 0x10f17000; | ||
450 | /* TRAP1 --> NOP */ | ||
451 | } else { | ||
452 | *code = (next_insn & 0xffff) | 0x10f10000; | ||
453 | /* TRAP1 --> xxx */ | ||
454 | } | ||
455 | } | ||
456 | return 0; | ||
457 | } | ||
458 | |||
459 | static int | ||
460 | unregister_debug_trap(struct task_struct *child, unsigned long addr, | ||
461 | unsigned long *code) | ||
462 | { | ||
463 | struct debug_trap *p = &child->thread.debug_trap; | ||
464 | int i; | ||
465 | |||
466 | /* Search debug trap entry. */ | ||
467 | for (i = 0; i < p->nr_trap; i++) { | ||
468 | if (p->addr[i] == addr) | ||
469 | break; | ||
470 | } | ||
471 | if (i >= p->nr_trap) { | ||
472 | /* The trap may be requested from debugger. | ||
473 | * ptrace should do nothing in this case. | ||
474 | */ | ||
475 | return 0; | ||
476 | } | ||
477 | |||
478 | /* Recover original instruction code. */ | ||
479 | *code = p->insn[i]; | ||
480 | |||
481 | /* Shift debug trap entries. */ | ||
482 | while (i < p->nr_trap - 1) { | ||
483 | p->insn[i] = p->insn[i + 1]; | ||
484 | p->addr[i] = p->addr[i + 1]; | ||
485 | i++; | ||
486 | } | ||
487 | p->nr_trap--; | ||
488 | return 1; | ||
489 | } | ||
490 | |||
491 | static void | ||
492 | unregister_all_debug_traps(struct task_struct *child) | ||
493 | { | ||
494 | struct debug_trap *p = &child->thread.debug_trap; | ||
495 | int i; | ||
496 | |||
497 | for (i = 0; i < p->nr_trap; i++) | ||
498 | access_process_vm(child, p->addr[i], &p->insn[i], sizeof(p->insn[i]), | ||
499 | FOLL_FORCE | FOLL_WRITE); | ||
500 | p->nr_trap = 0; | ||
501 | } | ||
502 | |||
503 | static inline void | ||
504 | invalidate_cache(void) | ||
505 | { | ||
506 | #if defined(CONFIG_CHIP_M32700) || defined(CONFIG_CHIP_OPSP) | ||
507 | |||
508 | _flush_cache_copyback_all(); | ||
509 | |||
510 | #else /* ! CONFIG_CHIP_M32700 */ | ||
511 | |||
512 | /* Invalidate cache */ | ||
513 | __asm__ __volatile__ ( | ||
514 | "ldi r0, #-1 \n\t" | ||
515 | "ldi r1, #0 \n\t" | ||
516 | "stb r1, @r0 ; cache off \n\t" | ||
517 | "; \n\t" | ||
518 | "ldi r0, #-2 \n\t" | ||
519 | "ldi r1, #1 \n\t" | ||
520 | "stb r1, @r0 ; cache invalidate \n\t" | ||
521 | ".fillinsn \n" | ||
522 | "0: \n\t" | ||
523 | "ldb r1, @r0 ; invalidate check \n\t" | ||
524 | "bnez r1, 0b \n\t" | ||
525 | "; \n\t" | ||
526 | "ldi r0, #-1 \n\t" | ||
527 | "ldi r1, #1 \n\t" | ||
528 | "stb r1, @r0 ; cache on \n\t" | ||
529 | : : : "r0", "r1", "memory" | ||
530 | ); | ||
531 | /* FIXME: copying-back d-cache and invalidating i-cache are needed. | ||
532 | */ | ||
533 | #endif /* CONFIG_CHIP_M32700 */ | ||
534 | } | ||
535 | |||
536 | /* Embed a debug trap (TRAP1) code */ | ||
537 | static int | ||
538 | embed_debug_trap(struct task_struct *child, unsigned long next_pc) | ||
539 | { | ||
540 | unsigned long next_insn, code; | ||
541 | unsigned long addr = next_pc & ~3; | ||
542 | |||
543 | if (access_process_vm(child, addr, &next_insn, sizeof(next_insn), | ||
544 | FOLL_FORCE) | ||
545 | != sizeof(next_insn)) { | ||
546 | return -1; /* error */ | ||
547 | } | ||
548 | |||
549 | /* Set a trap code. */ | ||
550 | if (register_debug_trap(child, next_pc, next_insn, &code)) { | ||
551 | return -1; /* error */ | ||
552 | } | ||
553 | if (access_process_vm(child, addr, &code, sizeof(code), | ||
554 | FOLL_FORCE | FOLL_WRITE) | ||
555 | != sizeof(code)) { | ||
556 | return -1; /* error */ | ||
557 | } | ||
558 | return 0; /* success */ | ||
559 | } | ||
560 | |||
561 | void | ||
562 | withdraw_debug_trap(struct pt_regs *regs) | ||
563 | { | ||
564 | unsigned long addr; | ||
565 | unsigned long code; | ||
566 | |||
567 | addr = (regs->bpc - 2) & ~3; | ||
568 | regs->bpc -= 2; | ||
569 | if (unregister_debug_trap(current, addr, &code)) { | ||
570 | access_process_vm(current, addr, &code, sizeof(code), | ||
571 | FOLL_FORCE | FOLL_WRITE); | ||
572 | invalidate_cache(); | ||
573 | } | ||
574 | } | ||
575 | |||
576 | void | ||
577 | init_debug_traps(struct task_struct *child) | ||
578 | { | ||
579 | struct debug_trap *p = &child->thread.debug_trap; | ||
580 | int i; | ||
581 | p->nr_trap = 0; | ||
582 | for (i = 0; i < MAX_TRAPS; i++) { | ||
583 | p->addr[i] = 0; | ||
584 | p->insn[i] = 0; | ||
585 | } | ||
586 | } | ||
587 | |||
588 | void user_enable_single_step(struct task_struct *child) | ||
589 | { | ||
590 | unsigned long next_pc; | ||
591 | unsigned long pc, insn; | ||
592 | |||
593 | clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE); | ||
594 | |||
595 | /* Compute next pc. */ | ||
596 | pc = get_stack_long(child, PT_BPC); | ||
597 | |||
598 | if (access_process_vm(child, pc&~3, &insn, sizeof(insn), | ||
599 | FOLL_FORCE) | ||
600 | != sizeof(insn)) | ||
601 | return; | ||
602 | |||
603 | compute_next_pc(insn, pc, &next_pc, child); | ||
604 | if (next_pc & 0x80000000) | ||
605 | return; | ||
606 | |||
607 | if (embed_debug_trap(child, next_pc)) | ||
608 | return; | ||
609 | |||
610 | invalidate_cache(); | ||
611 | } | ||
612 | |||
613 | void user_disable_single_step(struct task_struct *child) | ||
614 | { | ||
615 | unregister_all_debug_traps(child); | ||
616 | invalidate_cache(); | ||
617 | } | ||
618 | |||
619 | /* | ||
620 | * Called by kernel/ptrace.c when detaching.. | ||
621 | * | ||
622 | * Make sure single step bits etc are not set. | ||
623 | */ | ||
624 | void ptrace_disable(struct task_struct *child) | ||
625 | { | ||
626 | /* nothing to do.. */ | ||
627 | } | ||
628 | |||
629 | long | ||
630 | arch_ptrace(struct task_struct *child, long request, | ||
631 | unsigned long addr, unsigned long data) | ||
632 | { | ||
633 | int ret; | ||
634 | unsigned long __user *datap = (unsigned long __user *) data; | ||
635 | |||
636 | switch (request) { | ||
637 | /* | ||
638 | * read word at location "addr" in the child process. | ||
639 | */ | ||
640 | case PTRACE_PEEKTEXT: | ||
641 | case PTRACE_PEEKDATA: | ||
642 | ret = generic_ptrace_peekdata(child, addr, data); | ||
643 | break; | ||
644 | |||
645 | /* | ||
646 | * read the word at location addr in the USER area. | ||
647 | */ | ||
648 | case PTRACE_PEEKUSR: | ||
649 | ret = ptrace_read_user(child, addr, datap); | ||
650 | break; | ||
651 | |||
652 | /* | ||
653 | * write the word at location addr. | ||
654 | */ | ||
655 | case PTRACE_POKETEXT: | ||
656 | case PTRACE_POKEDATA: | ||
657 | ret = generic_ptrace_pokedata(child, addr, data); | ||
658 | if (ret == 0 && request == PTRACE_POKETEXT) | ||
659 | invalidate_cache(); | ||
660 | break; | ||
661 | |||
662 | /* | ||
663 | * write the word at location addr in the USER area. | ||
664 | */ | ||
665 | case PTRACE_POKEUSR: | ||
666 | ret = ptrace_write_user(child, addr, data); | ||
667 | break; | ||
668 | |||
669 | case PTRACE_GETREGS: | ||
670 | ret = ptrace_getregs(child, datap); | ||
671 | break; | ||
672 | |||
673 | case PTRACE_SETREGS: | ||
674 | ret = ptrace_setregs(child, datap); | ||
675 | break; | ||
676 | |||
677 | default: | ||
678 | ret = ptrace_request(child, request, addr, data); | ||
679 | break; | ||
680 | } | ||
681 | |||
682 | return ret; | ||
683 | } | ||
684 | |||
685 | /* notification of system call entry/exit | ||
686 | * - triggered by current->work.syscall_trace | ||
687 | */ | ||
688 | void do_syscall_trace(void) | ||
689 | { | ||
690 | if (!test_thread_flag(TIF_SYSCALL_TRACE)) | ||
691 | return; | ||
692 | if (!(current->ptrace & PT_PTRACED)) | ||
693 | return; | ||
694 | /* the 0x80 provides a way for the tracing parent to distinguish | ||
695 | between a syscall stop and SIGTRAP delivery */ | ||
696 | ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD) | ||
697 | ? 0x80 : 0)); | ||
698 | |||
699 | /* | ||
700 | * this isn't the same as continuing with a signal, but it will do | ||
701 | * for normal use. strace only continues with a signal if the | ||
702 | * stopping signal is not SIGTRAP. -brl | ||
703 | */ | ||
704 | if (current->exit_code) { | ||
705 | send_sig(current->exit_code, current, 1); | ||
706 | current->exit_code = 0; | ||
707 | } | ||
708 | } | ||
diff --git a/arch/m32r/kernel/setup.c b/arch/m32r/kernel/setup.c deleted file mode 100644 index b72d5db39f00..000000000000 --- a/arch/m32r/kernel/setup.c +++ /dev/null | |||
@@ -1,424 +0,0 @@ | |||
1 | // SPDX-License-Identifier: GPL-2.0 | ||
2 | /* | ||
3 | * linux/arch/m32r/kernel/setup.c | ||
4 | * | ||
5 | * Setup routines for Renesas M32R | ||
6 | * | ||
7 | * Copyright (c) 2001, 2002 Hiroyuki Kondo, Hirokazu Takata, | ||
8 | * Hitoshi Yamamoto | ||
9 | */ | ||
10 | |||
11 | #include <linux/init.h> | ||
12 | #include <linux/kernel.h> | ||
13 | #include <linux/stddef.h> | ||
14 | #include <linux/fs.h> | ||
15 | #include <linux/sched/mm.h> | ||
16 | #include <linux/ioport.h> | ||
17 | #include <linux/mm.h> | ||
18 | #include <linux/bootmem.h> | ||
19 | #include <linux/console.h> | ||
20 | #include <linux/initrd.h> | ||
21 | #include <linux/major.h> | ||
22 | #include <linux/root_dev.h> | ||
23 | #include <linux/seq_file.h> | ||
24 | #include <linux/timex.h> | ||
25 | #include <linux/screen_info.h> | ||
26 | #include <linux/cpu.h> | ||
27 | #include <linux/nodemask.h> | ||
28 | #include <linux/pfn.h> | ||
29 | |||
30 | #include <asm/processor.h> | ||
31 | #include <asm/pgtable.h> | ||
32 | #include <asm/io.h> | ||
33 | #include <asm/mmu_context.h> | ||
34 | #include <asm/m32r.h> | ||
35 | #include <asm/setup.h> | ||
36 | #include <asm/sections.h> | ||
37 | |||
38 | #ifdef CONFIG_MMU | ||
39 | extern void init_mmu(void); | ||
40 | #endif | ||
41 | |||
42 | extern char _end[]; | ||
43 | |||
44 | /* | ||
45 | * Machine setup.. | ||
46 | */ | ||
47 | struct cpuinfo_m32r boot_cpu_data; | ||
48 | |||
49 | #ifdef CONFIG_BLK_DEV_RAM | ||
50 | extern int rd_doload; /* 1 = load ramdisk, 0 = don't load */ | ||
51 | extern int rd_prompt; /* 1 = prompt for ramdisk, 0 = don't prompt */ | ||
52 | extern int rd_image_start; /* starting block # of image */ | ||
53 | #endif | ||
54 | |||
55 | #if defined(CONFIG_VGA_CONSOLE) | ||
56 | struct screen_info screen_info = { | ||
57 | .orig_video_lines = 25, | ||
58 | .orig_video_cols = 80, | ||
59 | .orig_video_mode = 0, | ||
60 | .orig_video_ega_bx = 0, | ||
61 | .orig_video_isVGA = 1, | ||
62 | .orig_video_points = 8 | ||
63 | }; | ||
64 | #endif | ||
65 | |||
66 | extern int root_mountflags; | ||
67 | |||
68 | static char __initdata command_line[COMMAND_LINE_SIZE]; | ||
69 | |||
70 | static struct resource data_resource = { | ||
71 | .name = "Kernel data", | ||
72 | .start = 0, | ||
73 | .end = 0, | ||
74 | .flags = IORESOURCE_BUSY | IORESOURCE_SYSTEM_RAM | ||
75 | }; | ||
76 | |||
77 | static struct resource code_resource = { | ||
78 | .name = "Kernel code", | ||
79 | .start = 0, | ||
80 | .end = 0, | ||
81 | .flags = IORESOURCE_BUSY | IORESOURCE_SYSTEM_RAM | ||
82 | }; | ||
83 | |||
84 | unsigned long memory_start; | ||
85 | EXPORT_SYMBOL(memory_start); | ||
86 | |||
87 | unsigned long memory_end; | ||
88 | EXPORT_SYMBOL(memory_end); | ||
89 | |||
90 | void __init setup_arch(char **); | ||
91 | int get_cpuinfo(char *); | ||
92 | |||
93 | static __inline__ void parse_mem_cmdline(char ** cmdline_p) | ||
94 | { | ||
95 | char c = ' '; | ||
96 | char *to = command_line; | ||
97 | char *from = COMMAND_LINE; | ||
98 | int len = 0; | ||
99 | int usermem = 0; | ||
100 | |||
101 | /* Save unparsed command line copy for /proc/cmdline */ | ||
102 | memcpy(boot_command_line, COMMAND_LINE, COMMAND_LINE_SIZE); | ||
103 | boot_command_line[COMMAND_LINE_SIZE-1] = '\0'; | ||
104 | |||
105 | memory_start = (unsigned long)CONFIG_MEMORY_START+PAGE_OFFSET; | ||
106 | memory_end = memory_start+(unsigned long)CONFIG_MEMORY_SIZE; | ||
107 | |||
108 | for ( ; ; ) { | ||
109 | if (c == ' ' && !memcmp(from, "mem=", 4)) { | ||
110 | if (to != command_line) | ||
111 | to--; | ||
112 | |||
113 | { | ||
114 | unsigned long mem_size; | ||
115 | |||
116 | usermem = 1; | ||
117 | mem_size = memparse(from+4, &from); | ||
118 | memory_end = memory_start + mem_size; | ||
119 | } | ||
120 | } | ||
121 | c = *(from++); | ||
122 | if (!c) | ||
123 | break; | ||
124 | |||
125 | if (COMMAND_LINE_SIZE <= ++len) | ||
126 | break; | ||
127 | |||
128 | *(to++) = c; | ||
129 | } | ||
130 | *to = '\0'; | ||
131 | *cmdline_p = command_line; | ||
132 | if (usermem) | ||
133 | printk(KERN_INFO "user-defined physical RAM map:\n"); | ||
134 | } | ||
135 | |||
136 | #ifndef CONFIG_DISCONTIGMEM | ||
137 | static unsigned long __init setup_memory(void) | ||
138 | { | ||
139 | unsigned long start_pfn, max_low_pfn, bootmap_size; | ||
140 | |||
141 | start_pfn = PFN_UP( __pa(_end) ); | ||
142 | max_low_pfn = PFN_DOWN( __pa(memory_end) ); | ||
143 | |||
144 | /* | ||
145 | * Initialize the boot-time allocator (with low memory only): | ||
146 | */ | ||
147 | bootmap_size = init_bootmem_node(NODE_DATA(0), start_pfn, | ||
148 | CONFIG_MEMORY_START>>PAGE_SHIFT, max_low_pfn); | ||
149 | |||
150 | /* | ||
151 | * Register fully available low RAM pages with the bootmem allocator. | ||
152 | */ | ||
153 | { | ||
154 | unsigned long curr_pfn; | ||
155 | unsigned long last_pfn; | ||
156 | unsigned long pages; | ||
157 | |||
158 | /* | ||
159 | * We are rounding up the start address of usable memory: | ||
160 | */ | ||
161 | curr_pfn = PFN_UP(__pa(memory_start)); | ||
162 | |||
163 | /* | ||
164 | * ... and at the end of the usable range downwards: | ||
165 | */ | ||
166 | last_pfn = PFN_DOWN(__pa(memory_end)); | ||
167 | |||
168 | if (last_pfn > max_low_pfn) | ||
169 | last_pfn = max_low_pfn; | ||
170 | |||
171 | pages = last_pfn - curr_pfn; | ||
172 | free_bootmem(PFN_PHYS(curr_pfn), PFN_PHYS(pages)); | ||
173 | } | ||
174 | |||
175 | /* | ||
176 | * Reserve the kernel text and | ||
177 | * Reserve the bootmem bitmap. We do this in two steps (first step | ||
178 | * was init_bootmem()), because this catches the (definitely buggy) | ||
179 | * case of us accidentally initializing the bootmem allocator with | ||
180 | * an invalid RAM area. | ||
181 | */ | ||
182 | reserve_bootmem(CONFIG_MEMORY_START + PAGE_SIZE, | ||
183 | (PFN_PHYS(start_pfn) + bootmap_size + PAGE_SIZE - 1) | ||
184 | - CONFIG_MEMORY_START, | ||
185 | BOOTMEM_DEFAULT); | ||
186 | |||
187 | /* | ||
188 | * reserve physical page 0 - it's a special BIOS page on many boxes, | ||
189 | * enabling clean reboots, SMP operation, laptop functions. | ||
190 | */ | ||
191 | reserve_bootmem(CONFIG_MEMORY_START, PAGE_SIZE, BOOTMEM_DEFAULT); | ||
192 | |||
193 | /* | ||
194 | * reserve memory hole | ||
195 | */ | ||
196 | #ifdef CONFIG_MEMHOLE | ||
197 | reserve_bootmem(CONFIG_MEMHOLE_START, CONFIG_MEMHOLE_SIZE, | ||
198 | BOOTMEM_DEFAULT); | ||
199 | #endif | ||
200 | |||
201 | #ifdef CONFIG_BLK_DEV_INITRD | ||
202 | if (LOADER_TYPE && INITRD_START) { | ||
203 | if (INITRD_START + INITRD_SIZE <= (max_low_pfn << PAGE_SHIFT)) { | ||
204 | reserve_bootmem(INITRD_START, INITRD_SIZE, | ||
205 | BOOTMEM_DEFAULT); | ||
206 | initrd_start = INITRD_START + PAGE_OFFSET; | ||
207 | initrd_end = initrd_start + INITRD_SIZE; | ||
208 | printk("initrd:start[%08lx],size[%08lx]\n", | ||
209 | initrd_start, INITRD_SIZE); | ||
210 | } else { | ||
211 | printk("initrd extends beyond end of memory " | ||
212 | "(0x%08lx > 0x%08lx)\ndisabling initrd\n", | ||
213 | INITRD_START + INITRD_SIZE, | ||
214 | max_low_pfn << PAGE_SHIFT); | ||
215 | |||
216 | initrd_start = 0; | ||
217 | } | ||
218 | } | ||
219 | #endif | ||
220 | |||
221 | return max_low_pfn; | ||
222 | } | ||
223 | #else /* CONFIG_DISCONTIGMEM */ | ||
224 | extern unsigned long setup_memory(void); | ||
225 | #endif /* CONFIG_DISCONTIGMEM */ | ||
226 | |||
227 | void __init setup_arch(char **cmdline_p) | ||
228 | { | ||
229 | ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV); | ||
230 | |||
231 | boot_cpu_data.cpu_clock = M32R_CPUCLK; | ||
232 | boot_cpu_data.bus_clock = M32R_BUSCLK; | ||
233 | boot_cpu_data.timer_divide = M32R_TIMER_DIVIDE; | ||
234 | |||
235 | #ifdef CONFIG_BLK_DEV_RAM | ||
236 | rd_image_start = RAMDISK_FLAGS & RAMDISK_IMAGE_START_MASK; | ||
237 | rd_prompt = ((RAMDISK_FLAGS & RAMDISK_PROMPT_FLAG) != 0); | ||
238 | rd_doload = ((RAMDISK_FLAGS & RAMDISK_LOAD_FLAG) != 0); | ||
239 | #endif | ||
240 | |||
241 | if (!MOUNT_ROOT_RDONLY) | ||
242 | root_mountflags &= ~MS_RDONLY; | ||
243 | |||
244 | #ifdef CONFIG_VT | ||
245 | #if defined(CONFIG_VGA_CONSOLE) | ||
246 | conswitchp = &vga_con; | ||
247 | #elif defined(CONFIG_DUMMY_CONSOLE) | ||
248 | conswitchp = &dummy_con; | ||
249 | #endif | ||
250 | #endif | ||
251 | |||
252 | #ifdef CONFIG_DISCONTIGMEM | ||
253 | nodes_clear(node_online_map); | ||
254 | node_set_online(0); | ||
255 | node_set_online(1); | ||
256 | #endif /* CONFIG_DISCONTIGMEM */ | ||
257 | |||
258 | init_mm.start_code = (unsigned long) _text; | ||
259 | init_mm.end_code = (unsigned long) _etext; | ||
260 | init_mm.end_data = (unsigned long) _edata; | ||
261 | init_mm.brk = (unsigned long) _end; | ||
262 | |||
263 | code_resource.start = virt_to_phys(_text); | ||
264 | code_resource.end = virt_to_phys(_etext)-1; | ||
265 | data_resource.start = virt_to_phys(_etext); | ||
266 | data_resource.end = virt_to_phys(_edata)-1; | ||
267 | |||
268 | parse_mem_cmdline(cmdline_p); | ||
269 | |||
270 | setup_memory(); | ||
271 | |||
272 | paging_init(); | ||
273 | } | ||
274 | |||
275 | static struct cpu cpu_devices[NR_CPUS]; | ||
276 | |||
277 | static int __init topology_init(void) | ||
278 | { | ||
279 | int i; | ||
280 | |||
281 | for_each_present_cpu(i) | ||
282 | register_cpu(&cpu_devices[i], i); | ||
283 | |||
284 | return 0; | ||
285 | } | ||
286 | |||
287 | subsys_initcall(topology_init); | ||
288 | |||
289 | #ifdef CONFIG_PROC_FS | ||
290 | /* | ||
291 | * Get CPU information for use by the procfs. | ||
292 | */ | ||
293 | static int show_cpuinfo(struct seq_file *m, void *v) | ||
294 | { | ||
295 | struct cpuinfo_m32r *c = v; | ||
296 | unsigned long cpu = c - cpu_data; | ||
297 | |||
298 | #ifdef CONFIG_SMP | ||
299 | if (!cpu_online(cpu)) | ||
300 | return 0; | ||
301 | #endif /* CONFIG_SMP */ | ||
302 | |||
303 | seq_printf(m, "processor\t: %ld\n", cpu); | ||
304 | |||
305 | #if defined(CONFIG_CHIP_VDEC2) | ||
306 | seq_printf(m, "cpu family\t: VDEC2\n" | ||
307 | "cache size\t: Unknown\n"); | ||
308 | #elif defined(CONFIG_CHIP_M32700) | ||
309 | seq_printf(m,"cpu family\t: M32700\n" | ||
310 | "cache size\t: I-8KB/D-8KB\n"); | ||
311 | #elif defined(CONFIG_CHIP_M32102) | ||
312 | seq_printf(m,"cpu family\t: M32102\n" | ||
313 | "cache size\t: I-8KB\n"); | ||
314 | #elif defined(CONFIG_CHIP_OPSP) | ||
315 | seq_printf(m,"cpu family\t: OPSP\n" | ||
316 | "cache size\t: I-8KB/D-8KB\n"); | ||
317 | #elif defined(CONFIG_CHIP_MP) | ||
318 | seq_printf(m, "cpu family\t: M32R-MP\n" | ||
319 | "cache size\t: I-xxKB/D-xxKB\n"); | ||
320 | #elif defined(CONFIG_CHIP_M32104) | ||
321 | seq_printf(m,"cpu family\t: M32104\n" | ||
322 | "cache size\t: I-8KB/D-8KB\n"); | ||
323 | #else | ||
324 | seq_printf(m, "cpu family\t: Unknown\n"); | ||
325 | #endif | ||
326 | seq_printf(m, "bogomips\t: %lu.%02lu\n", | ||
327 | c->loops_per_jiffy/(500000/HZ), | ||
328 | (c->loops_per_jiffy/(5000/HZ)) % 100); | ||
329 | #if defined(CONFIG_PLAT_MAPPI) | ||
330 | seq_printf(m, "Machine\t\t: Mappi Evaluation board\n"); | ||
331 | #elif defined(CONFIG_PLAT_MAPPI2) | ||
332 | seq_printf(m, "Machine\t\t: Mappi-II Evaluation board\n"); | ||
333 | #elif defined(CONFIG_PLAT_MAPPI3) | ||
334 | seq_printf(m, "Machine\t\t: Mappi-III Evaluation board\n"); | ||
335 | #elif defined(CONFIG_PLAT_M32700UT) | ||
336 | seq_printf(m, "Machine\t\t: M32700UT Evaluation board\n"); | ||
337 | #elif defined(CONFIG_PLAT_OPSPUT) | ||
338 | seq_printf(m, "Machine\t\t: OPSPUT Evaluation board\n"); | ||
339 | #elif defined(CONFIG_PLAT_USRV) | ||
340 | seq_printf(m, "Machine\t\t: uServer\n"); | ||
341 | #elif defined(CONFIG_PLAT_OAKS32R) | ||
342 | seq_printf(m, "Machine\t\t: OAKS32R\n"); | ||
343 | #elif defined(CONFIG_PLAT_M32104UT) | ||
344 | seq_printf(m, "Machine\t\t: M3T-M32104UT uT Engine board\n"); | ||
345 | #else | ||
346 | seq_printf(m, "Machine\t\t: Unknown\n"); | ||
347 | #endif | ||
348 | |||
349 | #define PRINT_CLOCK(name, value) \ | ||
350 | seq_printf(m, name " clock\t: %d.%02dMHz\n", \ | ||
351 | ((value) / 1000000), ((value) % 1000000)/10000) | ||
352 | |||
353 | PRINT_CLOCK("CPU", (int)c->cpu_clock); | ||
354 | PRINT_CLOCK("Bus", (int)c->bus_clock); | ||
355 | |||
356 | seq_printf(m, "\n"); | ||
357 | |||
358 | return 0; | ||
359 | } | ||
360 | |||
361 | static void *c_start(struct seq_file *m, loff_t *pos) | ||
362 | { | ||
363 | return *pos < NR_CPUS ? cpu_data + *pos : NULL; | ||
364 | } | ||
365 | |||
366 | static void *c_next(struct seq_file *m, void *v, loff_t *pos) | ||
367 | { | ||
368 | ++*pos; | ||
369 | return c_start(m, pos); | ||
370 | } | ||
371 | |||
372 | static void c_stop(struct seq_file *m, void *v) | ||
373 | { | ||
374 | } | ||
375 | |||
376 | const struct seq_operations cpuinfo_op = { | ||
377 | .start = c_start, | ||
378 | .next = c_next, | ||
379 | .stop = c_stop, | ||
380 | .show = show_cpuinfo, | ||
381 | }; | ||
382 | #endif /* CONFIG_PROC_FS */ | ||
383 | |||
384 | unsigned long cpu_initialized __initdata = 0; | ||
385 | |||
386 | /* | ||
387 | * cpu_init() initializes state that is per-CPU. Some data is already | ||
388 | * initialized (naturally) in the bootstrap process. | ||
389 | * We reload them nevertheless, this function acts as a | ||
390 | * 'CPU state barrier', nothing should get across. | ||
391 | */ | ||
392 | #if defined(CONFIG_CHIP_VDEC2) || defined(CONFIG_CHIP_XNUX2) \ | ||
393 | || defined(CONFIG_CHIP_M32700) || defined(CONFIG_CHIP_M32102) \ | ||
394 | || defined(CONFIG_CHIP_OPSP) || defined(CONFIG_CHIP_M32104) | ||
395 | void __init cpu_init (void) | ||
396 | { | ||
397 | int cpu_id = smp_processor_id(); | ||
398 | |||
399 | if (test_and_set_bit(cpu_id, &cpu_initialized)) { | ||
400 | printk(KERN_WARNING "CPU#%d already initialized!\n", cpu_id); | ||
401 | for ( ; ; ) | ||
402 | local_irq_enable(); | ||
403 | } | ||
404 | printk(KERN_INFO "Initializing CPU#%d\n", cpu_id); | ||
405 | |||
406 | /* Set up and load the per-CPU TSS and LDT */ | ||
407 | mmgrab(&init_mm); | ||
408 | current->active_mm = &init_mm; | ||
409 | if (current->mm) | ||
410 | BUG(); | ||
411 | |||
412 | /* Force FPU initialization */ | ||
413 | current_thread_info()->status = 0; | ||
414 | clear_used_math(); | ||
415 | |||
416 | #ifdef CONFIG_MMU | ||
417 | /* Set up MMU */ | ||
418 | init_mmu(); | ||
419 | #endif | ||
420 | |||
421 | /* Set up ICUIMASK */ | ||
422 | outl(0x00070000, M32R_ICU_IMASK_PORTL); /* imask=111 */ | ||
423 | } | ||
424 | #endif /* defined(CONFIG_CHIP_VDEC2) ... */ | ||
diff --git a/arch/m32r/kernel/signal.c b/arch/m32r/kernel/signal.c deleted file mode 100644 index ba4d8d6330f1..000000000000 --- a/arch/m32r/kernel/signal.c +++ /dev/null | |||
@@ -1,336 +0,0 @@ | |||
1 | // SPDX-License-Identifier: GPL-2.0 | ||
2 | /* | ||
3 | * linux/arch/m32r/kernel/signal.c | ||
4 | * | ||
5 | * Copyright (c) 2003 Hitoshi Yamamoto | ||
6 | * | ||
7 | * Taken from i386 version. | ||
8 | * Copyright (C) 1991, 1992 Linus Torvalds | ||
9 | * | ||
10 | * 1997-11-28 Modified for POSIX.1b signals by Richard Henderson | ||
11 | * 2000-06-20 Pentium III FXSR, SSE support by Gareth Hughes | ||
12 | */ | ||
13 | |||
14 | #include <linux/sched.h> | ||
15 | #include <linux/mm.h> | ||
16 | #include <linux/smp.h> | ||
17 | #include <linux/kernel.h> | ||
18 | #include <linux/signal.h> | ||
19 | #include <linux/errno.h> | ||
20 | #include <linux/wait.h> | ||
21 | #include <linux/unistd.h> | ||
22 | #include <linux/stddef.h> | ||
23 | #include <linux/personality.h> | ||
24 | #include <linux/tracehook.h> | ||
25 | #include <asm/cacheflush.h> | ||
26 | #include <asm/ucontext.h> | ||
27 | #include <linux/uaccess.h> | ||
28 | |||
29 | #define DEBUG_SIG 0 | ||
30 | |||
31 | /* | ||
32 | * Do a signal return; undo the signal stack. | ||
33 | */ | ||
34 | |||
35 | struct rt_sigframe | ||
36 | { | ||
37 | int sig; | ||
38 | struct siginfo __user *pinfo; | ||
39 | void __user *puc; | ||
40 | struct siginfo info; | ||
41 | struct ucontext uc; | ||
42 | // struct _fpstate fpstate; | ||
43 | }; | ||
44 | |||
45 | static int | ||
46 | restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc, | ||
47 | int *r0_p) | ||
48 | { | ||
49 | unsigned int err = 0; | ||
50 | |||
51 | /* Always make any pending restarted system calls return -EINTR */ | ||
52 | current->restart_block.fn = do_no_restart_syscall; | ||
53 | |||
54 | #define COPY(x) err |= __get_user(regs->x, &sc->sc_##x) | ||
55 | COPY(r4); | ||
56 | COPY(r5); | ||
57 | COPY(r6); | ||
58 | COPY(pt_regs); | ||
59 | /* COPY(r0); Skip r0 */ | ||
60 | COPY(r1); | ||
61 | COPY(r2); | ||
62 | COPY(r3); | ||
63 | COPY(r7); | ||
64 | COPY(r8); | ||
65 | COPY(r9); | ||
66 | COPY(r10); | ||
67 | COPY(r11); | ||
68 | COPY(r12); | ||
69 | COPY(acc0h); | ||
70 | COPY(acc0l); | ||
71 | COPY(acc1h); /* ISA_DSP_LEVEL2 only */ | ||
72 | COPY(acc1l); /* ISA_DSP_LEVEL2 only */ | ||
73 | COPY(psw); | ||
74 | COPY(bpc); | ||
75 | COPY(bbpsw); | ||
76 | COPY(bbpc); | ||
77 | COPY(spu); | ||
78 | COPY(fp); | ||
79 | COPY(lr); | ||
80 | COPY(spi); | ||
81 | #undef COPY | ||
82 | |||
83 | regs->syscall_nr = -1; /* disable syscall checks */ | ||
84 | err |= __get_user(*r0_p, &sc->sc_r0); | ||
85 | |||
86 | return err; | ||
87 | } | ||
88 | |||
89 | asmlinkage int | ||
90 | sys_rt_sigreturn(unsigned long r0, unsigned long r1, | ||
91 | unsigned long r2, unsigned long r3, unsigned long r4, | ||
92 | unsigned long r5, unsigned long r6, struct pt_regs *regs) | ||
93 | { | ||
94 | struct rt_sigframe __user *frame = (struct rt_sigframe __user *)regs->spu; | ||
95 | sigset_t set; | ||
96 | int result; | ||
97 | |||
98 | if (!access_ok(VERIFY_READ, frame, sizeof(*frame))) | ||
99 | goto badframe; | ||
100 | if (__copy_from_user(&set, &frame->uc.uc_sigmask, sizeof(set))) | ||
101 | goto badframe; | ||
102 | |||
103 | set_current_blocked(&set); | ||
104 | |||
105 | if (restore_sigcontext(regs, &frame->uc.uc_mcontext, &result)) | ||
106 | goto badframe; | ||
107 | |||
108 | if (restore_altstack(&frame->uc.uc_stack)) | ||
109 | goto badframe; | ||
110 | |||
111 | return result; | ||
112 | |||
113 | badframe: | ||
114 | force_sig(SIGSEGV, current); | ||
115 | return 0; | ||
116 | } | ||
117 | |||
118 | /* | ||
119 | * Set up a signal frame. | ||
120 | */ | ||
121 | |||
122 | static int | ||
123 | setup_sigcontext(struct sigcontext __user *sc, struct pt_regs *regs, | ||
124 | unsigned long mask) | ||
125 | { | ||
126 | int err = 0; | ||
127 | |||
128 | #define COPY(x) err |= __put_user(regs->x, &sc->sc_##x) | ||
129 | COPY(r4); | ||
130 | COPY(r5); | ||
131 | COPY(r6); | ||
132 | COPY(pt_regs); | ||
133 | COPY(r0); | ||
134 | COPY(r1); | ||
135 | COPY(r2); | ||
136 | COPY(r3); | ||
137 | COPY(r7); | ||
138 | COPY(r8); | ||
139 | COPY(r9); | ||
140 | COPY(r10); | ||
141 | COPY(r11); | ||
142 | COPY(r12); | ||
143 | COPY(acc0h); | ||
144 | COPY(acc0l); | ||
145 | COPY(acc1h); /* ISA_DSP_LEVEL2 only */ | ||
146 | COPY(acc1l); /* ISA_DSP_LEVEL2 only */ | ||
147 | COPY(psw); | ||
148 | COPY(bpc); | ||
149 | COPY(bbpsw); | ||
150 | COPY(bbpc); | ||
151 | COPY(spu); | ||
152 | COPY(fp); | ||
153 | COPY(lr); | ||
154 | COPY(spi); | ||
155 | #undef COPY | ||
156 | |||
157 | err |= __put_user(mask, &sc->oldmask); | ||
158 | |||
159 | return err; | ||
160 | } | ||
161 | |||
162 | /* | ||
163 | * Determine which stack to use.. | ||
164 | */ | ||
165 | static inline void __user * | ||
166 | get_sigframe(struct ksignal *ksig, unsigned long sp, size_t frame_size) | ||
167 | { | ||
168 | return (void __user *)((sigsp(sp, ksig) - frame_size) & -8ul); | ||
169 | } | ||
170 | |||
171 | static int setup_rt_frame(struct ksignal *ksig, sigset_t *set, | ||
172 | struct pt_regs *regs) | ||
173 | { | ||
174 | struct rt_sigframe __user *frame; | ||
175 | int err = 0; | ||
176 | int sig = ksig->sig; | ||
177 | |||
178 | frame = get_sigframe(ksig, regs->spu, sizeof(*frame)); | ||
179 | |||
180 | if (!access_ok(VERIFY_WRITE, frame, sizeof(*frame))) | ||
181 | return -EFAULT; | ||
182 | |||
183 | err |= __put_user(sig, &frame->sig); | ||
184 | if (err) | ||
185 | return -EFAULT; | ||
186 | |||
187 | err |= __put_user(&frame->info, &frame->pinfo); | ||
188 | err |= __put_user(&frame->uc, &frame->puc); | ||
189 | err |= copy_siginfo_to_user(&frame->info, &ksig->info); | ||
190 | if (err) | ||
191 | return -EFAULT; | ||
192 | |||
193 | /* Create the ucontext. */ | ||
194 | err |= __put_user(0, &frame->uc.uc_flags); | ||
195 | err |= __put_user(0, &frame->uc.uc_link); | ||
196 | err |= __save_altstack(&frame->uc.uc_stack, regs->spu); | ||
197 | err |= setup_sigcontext(&frame->uc.uc_mcontext, regs, set->sig[0]); | ||
198 | err |= __copy_to_user(&frame->uc.uc_sigmask, set, sizeof(*set)); | ||
199 | if (err) | ||
200 | return -EFAULT; | ||
201 | |||
202 | /* Set up to return from userspace. */ | ||
203 | regs->lr = (unsigned long)ksig->ka.sa.sa_restorer; | ||
204 | |||
205 | /* Set up registers for signal handler */ | ||
206 | regs->spu = (unsigned long)frame; | ||
207 | regs->r0 = sig; /* Arg for signal handler */ | ||
208 | regs->r1 = (unsigned long)&frame->info; | ||
209 | regs->r2 = (unsigned long)&frame->uc; | ||
210 | regs->bpc = (unsigned long)ksig->ka.sa.sa_handler; | ||
211 | |||
212 | #if DEBUG_SIG | ||
213 | printk("SIG deliver (%s:%d): sp=%p pc=%p\n", | ||
214 | current->comm, current->pid, frame, regs->pc); | ||
215 | #endif | ||
216 | |||
217 | return 0; | ||
218 | } | ||
219 | |||
220 | static int prev_insn(struct pt_regs *regs) | ||
221 | { | ||
222 | u16 inst; | ||
223 | if (get_user(inst, (u16 __user *)(regs->bpc - 2))) | ||
224 | return -EFAULT; | ||
225 | if ((inst & 0xfff0) == 0x10f0) /* trap ? */ | ||
226 | regs->bpc -= 2; | ||
227 | else | ||
228 | regs->bpc -= 4; | ||
229 | regs->syscall_nr = -1; | ||
230 | return 0; | ||
231 | } | ||
232 | |||
233 | /* | ||
234 | * OK, we're invoking a handler | ||
235 | */ | ||
236 | |||
237 | static void | ||
238 | handle_signal(struct ksignal *ksig, struct pt_regs *regs) | ||
239 | { | ||
240 | int ret; | ||
241 | |||
242 | /* Are we from a system call? */ | ||
243 | if (regs->syscall_nr >= 0) { | ||
244 | /* If so, check system call restarting.. */ | ||
245 | switch (regs->r0) { | ||
246 | case -ERESTART_RESTARTBLOCK: | ||
247 | case -ERESTARTNOHAND: | ||
248 | regs->r0 = -EINTR; | ||
249 | break; | ||
250 | |||
251 | case -ERESTARTSYS: | ||
252 | if (!(ksig->ka.sa.sa_flags & SA_RESTART)) { | ||
253 | regs->r0 = -EINTR; | ||
254 | break; | ||
255 | } | ||
256 | /* fallthrough */ | ||
257 | case -ERESTARTNOINTR: | ||
258 | regs->r0 = regs->orig_r0; | ||
259 | if (prev_insn(regs) < 0) | ||
260 | return; | ||
261 | } | ||
262 | } | ||
263 | |||
264 | /* Set up the stack frame */ | ||
265 | ret = setup_rt_frame(ksig, sigmask_to_save(), regs); | ||
266 | |||
267 | signal_setup_done(ret, ksig, 0); | ||
268 | } | ||
269 | |||
270 | /* | ||
271 | * Note that 'init' is a special process: it doesn't get signals it doesn't | ||
272 | * want to handle. Thus you cannot kill init even with a SIGKILL even by | ||
273 | * mistake. | ||
274 | */ | ||
275 | static void do_signal(struct pt_regs *regs) | ||
276 | { | ||
277 | struct ksignal ksig; | ||
278 | |||
279 | /* | ||
280 | * We want the common case to go fast, which | ||
281 | * is why we may in certain cases get here from | ||
282 | * kernel mode. Just return without doing anything | ||
283 | * if so. | ||
284 | */ | ||
285 | if (!user_mode(regs)) | ||
286 | return; | ||
287 | |||
288 | if (get_signal(&ksig)) { | ||
289 | /* Re-enable any watchpoints before delivering the | ||
290 | * signal to user space. The processor register will | ||
291 | * have been cleared if the watchpoint triggered | ||
292 | * inside the kernel. | ||
293 | */ | ||
294 | |||
295 | /* Whee! Actually deliver the signal. */ | ||
296 | handle_signal(&ksig, regs); | ||
297 | |||
298 | return; | ||
299 | } | ||
300 | |||
301 | /* Did we come from a system call? */ | ||
302 | if (regs->syscall_nr >= 0) { | ||
303 | /* Restart the system call - no handlers present */ | ||
304 | if (regs->r0 == -ERESTARTNOHAND || | ||
305 | regs->r0 == -ERESTARTSYS || | ||
306 | regs->r0 == -ERESTARTNOINTR) { | ||
307 | regs->r0 = regs->orig_r0; | ||
308 | prev_insn(regs); | ||
309 | } else if (regs->r0 == -ERESTART_RESTARTBLOCK){ | ||
310 | regs->r0 = regs->orig_r0; | ||
311 | regs->r7 = __NR_restart_syscall; | ||
312 | prev_insn(regs); | ||
313 | } | ||
314 | } | ||
315 | restore_saved_sigmask(); | ||
316 | } | ||
317 | |||
318 | /* | ||
319 | * notification of userspace execution resumption | ||
320 | * - triggered by current->work.notify_resume | ||
321 | */ | ||
322 | void do_notify_resume(struct pt_regs *regs, __u32 thread_info_flags) | ||
323 | { | ||
324 | /* Pending single-step? */ | ||
325 | if (thread_info_flags & _TIF_SINGLESTEP) | ||
326 | clear_thread_flag(TIF_SINGLESTEP); | ||
327 | |||
328 | /* deal with pending signal delivery */ | ||
329 | if (thread_info_flags & _TIF_SIGPENDING) | ||
330 | do_signal(regs); | ||
331 | |||
332 | if (thread_info_flags & _TIF_NOTIFY_RESUME) { | ||
333 | clear_thread_flag(TIF_NOTIFY_RESUME); | ||
334 | tracehook_notify_resume(regs); | ||
335 | } | ||
336 | } | ||
diff --git a/arch/m32r/kernel/smp.c b/arch/m32r/kernel/smp.c deleted file mode 100644 index 564052e3d3a0..000000000000 --- a/arch/m32r/kernel/smp.c +++ /dev/null | |||
@@ -1,836 +0,0 @@ | |||
1 | /* | ||
2 | * linux/arch/m32r/kernel/smp.c | ||
3 | * | ||
4 | * M32R SMP support routines. | ||
5 | * | ||
6 | * Copyright (c) 2001, 2002 Hitoshi Yamamoto | ||
7 | * | ||
8 | * Taken from i386 version. | ||
9 | * (c) 1995 Alan Cox, Building #3 <alan@redhat.com> | ||
10 | * (c) 1998-99, 2000 Ingo Molnar <mingo@redhat.com> | ||
11 | * | ||
12 | * This code is released under the GNU General Public License version 2 or | ||
13 | * later. | ||
14 | */ | ||
15 | |||
16 | #undef DEBUG_SMP | ||
17 | |||
18 | #include <linux/irq.h> | ||
19 | #include <linux/interrupt.h> | ||
20 | #include <linux/sched.h> | ||
21 | #include <linux/spinlock.h> | ||
22 | #include <linux/mm.h> | ||
23 | #include <linux/smp.h> | ||
24 | #include <linux/profile.h> | ||
25 | #include <linux/cpu.h> | ||
26 | |||
27 | #include <asm/cacheflush.h> | ||
28 | #include <asm/pgalloc.h> | ||
29 | #include <linux/atomic.h> | ||
30 | #include <asm/io.h> | ||
31 | #include <asm/mmu_context.h> | ||
32 | #include <asm/m32r.h> | ||
33 | #include <asm/tlbflush.h> | ||
34 | |||
35 | /*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/ | ||
36 | /* Data structures and variables */ | ||
37 | /*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/ | ||
38 | |||
39 | /* | ||
40 | * For flush_cache_all() | ||
41 | */ | ||
42 | static DEFINE_SPINLOCK(flushcache_lock); | ||
43 | static volatile unsigned long flushcache_cpumask = 0; | ||
44 | |||
45 | /* | ||
46 | * For flush_tlb_others() | ||
47 | */ | ||
48 | static cpumask_t flush_cpumask; | ||
49 | static struct mm_struct *flush_mm; | ||
50 | static struct vm_area_struct *flush_vma; | ||
51 | static volatile unsigned long flush_va; | ||
52 | static DEFINE_SPINLOCK(tlbstate_lock); | ||
53 | #define FLUSH_ALL 0xffffffff | ||
54 | |||
55 | DECLARE_PER_CPU(int, prof_multiplier); | ||
56 | DECLARE_PER_CPU(int, prof_old_multiplier); | ||
57 | DECLARE_PER_CPU(int, prof_counter); | ||
58 | |||
59 | extern spinlock_t ipi_lock[]; | ||
60 | |||
61 | /*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/ | ||
62 | /* Function Prototypes */ | ||
63 | /*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/ | ||
64 | |||
65 | void smp_reschedule_interrupt(void); | ||
66 | void smp_flush_cache_all_interrupt(void); | ||
67 | |||
68 | static void flush_tlb_all_ipi(void *); | ||
69 | static void flush_tlb_others(cpumask_t, struct mm_struct *, | ||
70 | struct vm_area_struct *, unsigned long); | ||
71 | |||
72 | void smp_invalidate_interrupt(void); | ||
73 | |||
74 | static void stop_this_cpu(void *); | ||
75 | |||
76 | void smp_ipi_timer_interrupt(struct pt_regs *); | ||
77 | void smp_local_timer_interrupt(void); | ||
78 | |||
79 | static void send_IPI_allbutself(int, int); | ||
80 | static void send_IPI_mask(const struct cpumask *, int, int); | ||
81 | |||
82 | /*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/ | ||
83 | /* Rescheduling request Routines */ | ||
84 | /*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/ | ||
85 | |||
86 | /*==========================================================================* | ||
87 | * Name: smp_send_reschedule | ||
88 | * | ||
89 | * Description: This routine requests other CPU to execute rescheduling. | ||
90 | * 1.Send 'RESCHEDULE_IPI' to other CPU. | ||
91 | * Request other CPU to execute 'smp_reschedule_interrupt()'. | ||
92 | * | ||
93 | * Born on Date: 2002.02.05 | ||
94 | * | ||
95 | * Arguments: cpu_id - Target CPU ID | ||
96 | * | ||
97 | * Returns: void (cannot fail) | ||
98 | * | ||
99 | * Modification log: | ||
100 | * Date Who Description | ||
101 | * ---------- --- -------------------------------------------------------- | ||
102 | * | ||
103 | *==========================================================================*/ | ||
104 | void smp_send_reschedule(int cpu_id) | ||
105 | { | ||
106 | WARN_ON(cpu_is_offline(cpu_id)); | ||
107 | send_IPI_mask(cpumask_of(cpu_id), RESCHEDULE_IPI, 1); | ||
108 | } | ||
109 | |||
110 | /*==========================================================================* | ||
111 | * Name: smp_reschedule_interrupt | ||
112 | * | ||
113 | * Description: This routine executes on CPU which received | ||
114 | * 'RESCHEDULE_IPI'. | ||
115 | * | ||
116 | * Born on Date: 2002.02.05 | ||
117 | * | ||
118 | * Arguments: NONE | ||
119 | * | ||
120 | * Returns: void (cannot fail) | ||
121 | * | ||
122 | * Modification log: | ||
123 | * Date Who Description | ||
124 | * ---------- --- -------------------------------------------------------- | ||
125 | * | ||
126 | *==========================================================================*/ | ||
127 | void smp_reschedule_interrupt(void) | ||
128 | { | ||
129 | scheduler_ipi(); | ||
130 | } | ||
131 | |||
132 | /*==========================================================================* | ||
133 | * Name: smp_flush_cache_all | ||
134 | * | ||
135 | * Description: This routine sends a 'INVALIDATE_CACHE_IPI' to all other | ||
136 | * CPUs in the system. | ||
137 | * | ||
138 | * Born on Date: 2003-05-28 | ||
139 | * | ||
140 | * Arguments: NONE | ||
141 | * | ||
142 | * Returns: void (cannot fail) | ||
143 | * | ||
144 | * Modification log: | ||
145 | * Date Who Description | ||
146 | * ---------- --- -------------------------------------------------------- | ||
147 | * | ||
148 | *==========================================================================*/ | ||
149 | void smp_flush_cache_all(void) | ||
150 | { | ||
151 | cpumask_t cpumask; | ||
152 | unsigned long *mask; | ||
153 | |||
154 | preempt_disable(); | ||
155 | cpumask_copy(&cpumask, cpu_online_mask); | ||
156 | cpumask_clear_cpu(smp_processor_id(), &cpumask); | ||
157 | spin_lock(&flushcache_lock); | ||
158 | mask=cpumask_bits(&cpumask); | ||
159 | atomic_or(*mask, (atomic_t *)&flushcache_cpumask); | ||
160 | send_IPI_mask(&cpumask, INVALIDATE_CACHE_IPI, 0); | ||
161 | _flush_cache_copyback_all(); | ||
162 | while (flushcache_cpumask) | ||
163 | mb(); | ||
164 | spin_unlock(&flushcache_lock); | ||
165 | preempt_enable(); | ||
166 | } | ||
167 | EXPORT_SYMBOL(smp_flush_cache_all); | ||
168 | |||
169 | void smp_flush_cache_all_interrupt(void) | ||
170 | { | ||
171 | _flush_cache_copyback_all(); | ||
172 | clear_bit(smp_processor_id(), &flushcache_cpumask); | ||
173 | } | ||
174 | |||
175 | /*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/ | ||
176 | /* TLB flush request Routines */ | ||
177 | /*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/ | ||
178 | |||
179 | /*==========================================================================* | ||
180 | * Name: smp_flush_tlb_all | ||
181 | * | ||
182 | * Description: This routine flushes all processes TLBs. | ||
183 | * 1.Request other CPU to execute 'flush_tlb_all_ipi()'. | ||
184 | * 2.Execute 'do_flush_tlb_all_local()'. | ||
185 | * | ||
186 | * Born on Date: 2002.02.05 | ||
187 | * | ||
188 | * Arguments: NONE | ||
189 | * | ||
190 | * Returns: void (cannot fail) | ||
191 | * | ||
192 | * Modification log: | ||
193 | * Date Who Description | ||
194 | * ---------- --- -------------------------------------------------------- | ||
195 | * | ||
196 | *==========================================================================*/ | ||
197 | void smp_flush_tlb_all(void) | ||
198 | { | ||
199 | unsigned long flags; | ||
200 | |||
201 | preempt_disable(); | ||
202 | local_irq_save(flags); | ||
203 | __flush_tlb_all(); | ||
204 | local_irq_restore(flags); | ||
205 | smp_call_function(flush_tlb_all_ipi, NULL, 1); | ||
206 | preempt_enable(); | ||
207 | } | ||
208 | |||
209 | /*==========================================================================* | ||
210 | * Name: flush_tlb_all_ipi | ||
211 | * | ||
212 | * Description: This routine flushes all local TLBs. | ||
213 | * 1.Execute 'do_flush_tlb_all_local()'. | ||
214 | * | ||
215 | * Born on Date: 2002.02.05 | ||
216 | * | ||
217 | * Arguments: *info - not used | ||
218 | * | ||
219 | * Returns: void (cannot fail) | ||
220 | * | ||
221 | * Modification log: | ||
222 | * Date Who Description | ||
223 | * ---------- --- -------------------------------------------------------- | ||
224 | * | ||
225 | *==========================================================================*/ | ||
226 | static void flush_tlb_all_ipi(void *info) | ||
227 | { | ||
228 | __flush_tlb_all(); | ||
229 | } | ||
230 | |||
231 | /*==========================================================================* | ||
232 | * Name: smp_flush_tlb_mm | ||
233 | * | ||
234 | * Description: This routine flushes the specified mm context TLB's. | ||
235 | * | ||
236 | * Born on Date: 2002.02.05 | ||
237 | * | ||
238 | * Arguments: *mm - a pointer to the mm struct for flush TLB | ||
239 | * | ||
240 | * Returns: void (cannot fail) | ||
241 | * | ||
242 | * Modification log: | ||
243 | * Date Who Description | ||
244 | * ---------- --- -------------------------------------------------------- | ||
245 | * | ||
246 | *==========================================================================*/ | ||
247 | void smp_flush_tlb_mm(struct mm_struct *mm) | ||
248 | { | ||
249 | int cpu_id; | ||
250 | cpumask_t cpu_mask; | ||
251 | unsigned long *mmc; | ||
252 | unsigned long flags; | ||
253 | |||
254 | preempt_disable(); | ||
255 | cpu_id = smp_processor_id(); | ||
256 | mmc = &mm->context[cpu_id]; | ||
257 | cpumask_copy(&cpu_mask, mm_cpumask(mm)); | ||
258 | cpumask_clear_cpu(cpu_id, &cpu_mask); | ||
259 | |||
260 | if (*mmc != NO_CONTEXT) { | ||
261 | local_irq_save(flags); | ||
262 | *mmc = NO_CONTEXT; | ||
263 | if (mm == current->mm) | ||
264 | activate_context(mm); | ||
265 | else | ||
266 | cpumask_clear_cpu(cpu_id, mm_cpumask(mm)); | ||
267 | local_irq_restore(flags); | ||
268 | } | ||
269 | if (!cpumask_empty(&cpu_mask)) | ||
270 | flush_tlb_others(cpu_mask, mm, NULL, FLUSH_ALL); | ||
271 | |||
272 | preempt_enable(); | ||
273 | } | ||
274 | |||
275 | /*==========================================================================* | ||
276 | * Name: smp_flush_tlb_range | ||
277 | * | ||
278 | * Description: This routine flushes a range of pages. | ||
279 | * | ||
280 | * Born on Date: 2002.02.05 | ||
281 | * | ||
282 | * Arguments: *mm - a pointer to the mm struct for flush TLB | ||
283 | * start - not used | ||
284 | * end - not used | ||
285 | * | ||
286 | * Returns: void (cannot fail) | ||
287 | * | ||
288 | * Modification log: | ||
289 | * Date Who Description | ||
290 | * ---------- --- -------------------------------------------------------- | ||
291 | * | ||
292 | *==========================================================================*/ | ||
293 | void smp_flush_tlb_range(struct vm_area_struct *vma, unsigned long start, | ||
294 | unsigned long end) | ||
295 | { | ||
296 | smp_flush_tlb_mm(vma->vm_mm); | ||
297 | } | ||
298 | |||
299 | /*==========================================================================* | ||
300 | * Name: smp_flush_tlb_page | ||
301 | * | ||
302 | * Description: This routine flushes one page. | ||
303 | * | ||
304 | * Born on Date: 2002.02.05 | ||
305 | * | ||
306 | * Arguments: *vma - a pointer to the vma struct include va | ||
307 | * va - virtual address for flush TLB | ||
308 | * | ||
309 | * Returns: void (cannot fail) | ||
310 | * | ||
311 | * Modification log: | ||
312 | * Date Who Description | ||
313 | * ---------- --- -------------------------------------------------------- | ||
314 | * | ||
315 | *==========================================================================*/ | ||
316 | void smp_flush_tlb_page(struct vm_area_struct *vma, unsigned long va) | ||
317 | { | ||
318 | struct mm_struct *mm = vma->vm_mm; | ||
319 | int cpu_id; | ||
320 | cpumask_t cpu_mask; | ||
321 | unsigned long *mmc; | ||
322 | unsigned long flags; | ||
323 | |||
324 | preempt_disable(); | ||
325 | cpu_id = smp_processor_id(); | ||
326 | mmc = &mm->context[cpu_id]; | ||
327 | cpumask_copy(&cpu_mask, mm_cpumask(mm)); | ||
328 | cpumask_clear_cpu(cpu_id, &cpu_mask); | ||
329 | |||
330 | #ifdef DEBUG_SMP | ||
331 | if (!mm) | ||
332 | BUG(); | ||
333 | #endif | ||
334 | |||
335 | if (*mmc != NO_CONTEXT) { | ||
336 | local_irq_save(flags); | ||
337 | va &= PAGE_MASK; | ||
338 | va |= (*mmc & MMU_CONTEXT_ASID_MASK); | ||
339 | __flush_tlb_page(va); | ||
340 | local_irq_restore(flags); | ||
341 | } | ||
342 | if (!cpumask_empty(&cpu_mask)) | ||
343 | flush_tlb_others(cpu_mask, mm, vma, va); | ||
344 | |||
345 | preempt_enable(); | ||
346 | } | ||
347 | |||
348 | /*==========================================================================* | ||
349 | * Name: flush_tlb_others | ||
350 | * | ||
351 | * Description: This routine requests other CPU to execute flush TLB. | ||
352 | * 1.Setup parameters. | ||
353 | * 2.Send 'INVALIDATE_TLB_IPI' to other CPU. | ||
354 | * Request other CPU to execute 'smp_invalidate_interrupt()'. | ||
355 | * 3.Wait for other CPUs operation finished. | ||
356 | * | ||
357 | * Born on Date: 2002.02.05 | ||
358 | * | ||
359 | * Arguments: cpumask - bitmap of target CPUs | ||
360 | * *mm - a pointer to the mm struct for flush TLB | ||
361 | * *vma - a pointer to the vma struct include va | ||
362 | * va - virtual address for flush TLB | ||
363 | * | ||
364 | * Returns: void (cannot fail) | ||
365 | * | ||
366 | * Modification log: | ||
367 | * Date Who Description | ||
368 | * ---------- --- -------------------------------------------------------- | ||
369 | * | ||
370 | *==========================================================================*/ | ||
371 | static void flush_tlb_others(cpumask_t cpumask, struct mm_struct *mm, | ||
372 | struct vm_area_struct *vma, unsigned long va) | ||
373 | { | ||
374 | unsigned long *mask; | ||
375 | #ifdef DEBUG_SMP | ||
376 | unsigned long flags; | ||
377 | __save_flags(flags); | ||
378 | if (!(flags & 0x0040)) /* Interrupt Disable NONONO */ | ||
379 | BUG(); | ||
380 | #endif /* DEBUG_SMP */ | ||
381 | |||
382 | /* | ||
383 | * A couple of (to be removed) sanity checks: | ||
384 | * | ||
385 | * - we do not send IPIs to not-yet booted CPUs. | ||
386 | * - current CPU must not be in mask | ||
387 | * - mask must exist :) | ||
388 | */ | ||
389 | BUG_ON(cpumask_empty(&cpumask)); | ||
390 | |||
391 | BUG_ON(cpumask_test_cpu(smp_processor_id(), &cpumask)); | ||
392 | BUG_ON(!mm); | ||
393 | |||
394 | /* If a CPU which we ran on has gone down, OK. */ | ||
395 | cpumask_and(&cpumask, &cpumask, cpu_online_mask); | ||
396 | if (cpumask_empty(&cpumask)) | ||
397 | return; | ||
398 | |||
399 | /* | ||
400 | * i'm not happy about this global shared spinlock in the | ||
401 | * MM hot path, but we'll see how contended it is. | ||
402 | * Temporarily this turns IRQs off, so that lockups are | ||
403 | * detected by the NMI watchdog. | ||
404 | */ | ||
405 | spin_lock(&tlbstate_lock); | ||
406 | |||
407 | flush_mm = mm; | ||
408 | flush_vma = vma; | ||
409 | flush_va = va; | ||
410 | mask=cpumask_bits(&cpumask); | ||
411 | atomic_or(*mask, (atomic_t *)&flush_cpumask); | ||
412 | |||
413 | /* | ||
414 | * We have to send the IPI only to | ||
415 | * CPUs affected. | ||
416 | */ | ||
417 | send_IPI_mask(&cpumask, INVALIDATE_TLB_IPI, 0); | ||
418 | |||
419 | while (!cpumask_empty(&flush_cpumask)) { | ||
420 | /* nothing. lockup detection does not belong here */ | ||
421 | mb(); | ||
422 | } | ||
423 | |||
424 | flush_mm = NULL; | ||
425 | flush_vma = NULL; | ||
426 | flush_va = 0; | ||
427 | spin_unlock(&tlbstate_lock); | ||
428 | } | ||
429 | |||
430 | /*==========================================================================* | ||
431 | * Name: smp_invalidate_interrupt | ||
432 | * | ||
433 | * Description: This routine executes on CPU which received | ||
434 | * 'INVALIDATE_TLB_IPI'. | ||
435 | * 1.Flush local TLB. | ||
436 | * 2.Report flush TLB process was finished. | ||
437 | * | ||
438 | * Born on Date: 2002.02.05 | ||
439 | * | ||
440 | * Arguments: NONE | ||
441 | * | ||
442 | * Returns: void (cannot fail) | ||
443 | * | ||
444 | * Modification log: | ||
445 | * Date Who Description | ||
446 | * ---------- --- -------------------------------------------------------- | ||
447 | * | ||
448 | *==========================================================================*/ | ||
449 | void smp_invalidate_interrupt(void) | ||
450 | { | ||
451 | int cpu_id = smp_processor_id(); | ||
452 | unsigned long *mmc = &flush_mm->context[cpu_id]; | ||
453 | |||
454 | if (!cpumask_test_cpu(cpu_id, &flush_cpumask)) | ||
455 | return; | ||
456 | |||
457 | if (flush_va == FLUSH_ALL) { | ||
458 | *mmc = NO_CONTEXT; | ||
459 | if (flush_mm == current->active_mm) | ||
460 | activate_context(flush_mm); | ||
461 | else | ||
462 | cpumask_clear_cpu(cpu_id, mm_cpumask(flush_mm)); | ||
463 | } else { | ||
464 | unsigned long va = flush_va; | ||
465 | |||
466 | if (*mmc != NO_CONTEXT) { | ||
467 | va &= PAGE_MASK; | ||
468 | va |= (*mmc & MMU_CONTEXT_ASID_MASK); | ||
469 | __flush_tlb_page(va); | ||
470 | } | ||
471 | } | ||
472 | cpumask_clear_cpu(cpu_id, &flush_cpumask); | ||
473 | } | ||
474 | |||
475 | /*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/ | ||
476 | /* Stop CPU request Routines */ | ||
477 | /*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/ | ||
478 | |||
479 | /*==========================================================================* | ||
480 | * Name: smp_send_stop | ||
481 | * | ||
482 | * Description: This routine requests stop all CPUs. | ||
483 | * 1.Request other CPU to execute 'stop_this_cpu()'. | ||
484 | * | ||
485 | * Born on Date: 2002.02.05 | ||
486 | * | ||
487 | * Arguments: NONE | ||
488 | * | ||
489 | * Returns: void (cannot fail) | ||
490 | * | ||
491 | * Modification log: | ||
492 | * Date Who Description | ||
493 | * ---------- --- -------------------------------------------------------- | ||
494 | * | ||
495 | *==========================================================================*/ | ||
496 | void smp_send_stop(void) | ||
497 | { | ||
498 | smp_call_function(stop_this_cpu, NULL, 0); | ||
499 | } | ||
500 | |||
501 | /*==========================================================================* | ||
502 | * Name: stop_this_cpu | ||
503 | * | ||
504 | * Description: This routine halt CPU. | ||
505 | * | ||
506 | * Born on Date: 2002.02.05 | ||
507 | * | ||
508 | * Arguments: NONE | ||
509 | * | ||
510 | * Returns: void (cannot fail) | ||
511 | * | ||
512 | * Modification log: | ||
513 | * Date Who Description | ||
514 | * ---------- --- -------------------------------------------------------- | ||
515 | * | ||
516 | *==========================================================================*/ | ||
517 | static void stop_this_cpu(void *dummy) | ||
518 | { | ||
519 | int cpu_id = smp_processor_id(); | ||
520 | |||
521 | /* | ||
522 | * Remove this CPU: | ||
523 | */ | ||
524 | set_cpu_online(cpu_id, false); | ||
525 | |||
526 | /* | ||
527 | * PSW IE = 1; | ||
528 | * IMASK = 0; | ||
529 | * goto SLEEP | ||
530 | */ | ||
531 | local_irq_disable(); | ||
532 | outl(0, M32R_ICU_IMASK_PORTL); | ||
533 | inl(M32R_ICU_IMASK_PORTL); /* dummy read */ | ||
534 | local_irq_enable(); | ||
535 | |||
536 | for ( ; ; ); | ||
537 | } | ||
538 | |||
539 | void arch_send_call_function_ipi_mask(const struct cpumask *mask) | ||
540 | { | ||
541 | send_IPI_mask(mask, CALL_FUNCTION_IPI, 0); | ||
542 | } | ||
543 | |||
544 | void arch_send_call_function_single_ipi(int cpu) | ||
545 | { | ||
546 | send_IPI_mask(cpumask_of(cpu), CALL_FUNC_SINGLE_IPI, 0); | ||
547 | } | ||
548 | |||
549 | /*==========================================================================* | ||
550 | * Name: smp_call_function_interrupt | ||
551 | * | ||
552 | * Description: This routine executes on CPU which received | ||
553 | * 'CALL_FUNCTION_IPI'. | ||
554 | * | ||
555 | * Born on Date: 2002.02.05 | ||
556 | * | ||
557 | * Arguments: NONE | ||
558 | * | ||
559 | * Returns: void (cannot fail) | ||
560 | * | ||
561 | * Modification log: | ||
562 | * Date Who Description | ||
563 | * ---------- --- -------------------------------------------------------- | ||
564 | * | ||
565 | *==========================================================================*/ | ||
566 | void smp_call_function_interrupt(void) | ||
567 | { | ||
568 | irq_enter(); | ||
569 | generic_smp_call_function_interrupt(); | ||
570 | irq_exit(); | ||
571 | } | ||
572 | |||
573 | void smp_call_function_single_interrupt(void) | ||
574 | { | ||
575 | irq_enter(); | ||
576 | generic_smp_call_function_single_interrupt(); | ||
577 | irq_exit(); | ||
578 | } | ||
579 | |||
580 | /*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/ | ||
581 | /* Timer Routines */ | ||
582 | /*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/ | ||
583 | |||
584 | /*==========================================================================* | ||
585 | * Name: smp_send_timer | ||
586 | * | ||
587 | * Description: This routine sends a 'LOCAL_TIMER_IPI' to all other CPUs | ||
588 | * in the system. | ||
589 | * | ||
590 | * Born on Date: 2002.02.05 | ||
591 | * | ||
592 | * Arguments: NONE | ||
593 | * | ||
594 | * Returns: void (cannot fail) | ||
595 | * | ||
596 | * Modification log: | ||
597 | * Date Who Description | ||
598 | * ---------- --- -------------------------------------------------------- | ||
599 | * | ||
600 | *==========================================================================*/ | ||
601 | void smp_send_timer(void) | ||
602 | { | ||
603 | send_IPI_allbutself(LOCAL_TIMER_IPI, 1); | ||
604 | } | ||
605 | |||
606 | /*==========================================================================* | ||
607 | * Name: smp_send_timer | ||
608 | * | ||
609 | * Description: This routine executes on CPU which received | ||
610 | * 'LOCAL_TIMER_IPI'. | ||
611 | * | ||
612 | * Born on Date: 2002.02.05 | ||
613 | * | ||
614 | * Arguments: *regs - a pointer to the saved regster info | ||
615 | * | ||
616 | * Returns: void (cannot fail) | ||
617 | * | ||
618 | * Modification log: | ||
619 | * Date Who Description | ||
620 | * ---------- --- -------------------------------------------------------- | ||
621 | * | ||
622 | *==========================================================================*/ | ||
623 | void smp_ipi_timer_interrupt(struct pt_regs *regs) | ||
624 | { | ||
625 | struct pt_regs *old_regs; | ||
626 | old_regs = set_irq_regs(regs); | ||
627 | irq_enter(); | ||
628 | smp_local_timer_interrupt(); | ||
629 | irq_exit(); | ||
630 | set_irq_regs(old_regs); | ||
631 | } | ||
632 | |||
633 | /*==========================================================================* | ||
634 | * Name: smp_local_timer_interrupt | ||
635 | * | ||
636 | * Description: Local timer interrupt handler. It does both profiling and | ||
637 | * process statistics/rescheduling. | ||
638 | * We do profiling in every local tick, statistics/rescheduling | ||
639 | * happen only every 'profiling multiplier' ticks. The default | ||
640 | * multiplier is 1 and it can be changed by writing the new | ||
641 | * multiplier value into /proc/profile. | ||
642 | * | ||
643 | * Born on Date: 2002.02.05 | ||
644 | * | ||
645 | * Arguments: *regs - a pointer to the saved regster info | ||
646 | * | ||
647 | * Returns: void (cannot fail) | ||
648 | * | ||
649 | * Original: arch/i386/kernel/apic.c | ||
650 | * | ||
651 | * Modification log: | ||
652 | * Date Who Description | ||
653 | * ---------- --- -------------------------------------------------------- | ||
654 | * 2003-06-24 hy use per_cpu structure. | ||
655 | *==========================================================================*/ | ||
656 | void smp_local_timer_interrupt(void) | ||
657 | { | ||
658 | int user = user_mode(get_irq_regs()); | ||
659 | int cpu_id = smp_processor_id(); | ||
660 | |||
661 | /* | ||
662 | * The profiling function is SMP safe. (nothing can mess | ||
663 | * around with "current", and the profiling counters are | ||
664 | * updated with atomic operations). This is especially | ||
665 | * useful with a profiling multiplier != 1 | ||
666 | */ | ||
667 | |||
668 | profile_tick(CPU_PROFILING); | ||
669 | |||
670 | if (--per_cpu(prof_counter, cpu_id) <= 0) { | ||
671 | /* | ||
672 | * The multiplier may have changed since the last time we got | ||
673 | * to this point as a result of the user writing to | ||
674 | * /proc/profile. In this case we need to adjust the APIC | ||
675 | * timer accordingly. | ||
676 | * | ||
677 | * Interrupts are already masked off at this point. | ||
678 | */ | ||
679 | per_cpu(prof_counter, cpu_id) | ||
680 | = per_cpu(prof_multiplier, cpu_id); | ||
681 | if (per_cpu(prof_counter, cpu_id) | ||
682 | != per_cpu(prof_old_multiplier, cpu_id)) | ||
683 | { | ||
684 | per_cpu(prof_old_multiplier, cpu_id) | ||
685 | = per_cpu(prof_counter, cpu_id); | ||
686 | } | ||
687 | |||
688 | update_process_times(user); | ||
689 | } | ||
690 | } | ||
691 | |||
692 | /*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/ | ||
693 | /* Send IPI Routines */ | ||
694 | /*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/ | ||
695 | |||
696 | /*==========================================================================* | ||
697 | * Name: send_IPI_allbutself | ||
698 | * | ||
699 | * Description: This routine sends a IPI to all other CPUs in the system. | ||
700 | * | ||
701 | * Born on Date: 2002.02.05 | ||
702 | * | ||
703 | * Arguments: ipi_num - Number of IPI | ||
704 | * try - 0 : Send IPI certainly. | ||
705 | * !0 : The following IPI is not sent when Target CPU | ||
706 | * has not received the before IPI. | ||
707 | * | ||
708 | * Returns: void (cannot fail) | ||
709 | * | ||
710 | * Modification log: | ||
711 | * Date Who Description | ||
712 | * ---------- --- -------------------------------------------------------- | ||
713 | * | ||
714 | *==========================================================================*/ | ||
715 | static void send_IPI_allbutself(int ipi_num, int try) | ||
716 | { | ||
717 | cpumask_t cpumask; | ||
718 | |||
719 | cpumask_copy(&cpumask, cpu_online_mask); | ||
720 | cpumask_clear_cpu(smp_processor_id(), &cpumask); | ||
721 | |||
722 | send_IPI_mask(&cpumask, ipi_num, try); | ||
723 | } | ||
724 | |||
725 | /*==========================================================================* | ||
726 | * Name: send_IPI_mask | ||
727 | * | ||
728 | * Description: This routine sends a IPI to CPUs in the system. | ||
729 | * | ||
730 | * Born on Date: 2002.02.05 | ||
731 | * | ||
732 | * Arguments: cpu_mask - Bitmap of target CPUs logical ID | ||
733 | * ipi_num - Number of IPI | ||
734 | * try - 0 : Send IPI certainly. | ||
735 | * !0 : The following IPI is not sent when Target CPU | ||
736 | * has not received the before IPI. | ||
737 | * | ||
738 | * Returns: void (cannot fail) | ||
739 | * | ||
740 | * Modification log: | ||
741 | * Date Who Description | ||
742 | * ---------- --- -------------------------------------------------------- | ||
743 | * | ||
744 | *==========================================================================*/ | ||
745 | static void send_IPI_mask(const struct cpumask *cpumask, int ipi_num, int try) | ||
746 | { | ||
747 | cpumask_t physid_mask, tmp; | ||
748 | int cpu_id, phys_id; | ||
749 | int num_cpus = num_online_cpus(); | ||
750 | |||
751 | if (num_cpus <= 1) /* NO MP */ | ||
752 | return; | ||
753 | |||
754 | cpumask_and(&tmp, cpumask, cpu_online_mask); | ||
755 | BUG_ON(!cpumask_equal(cpumask, &tmp)); | ||
756 | |||
757 | cpumask_clear(&physid_mask); | ||
758 | for_each_cpu(cpu_id, cpumask) { | ||
759 | if ((phys_id = cpu_to_physid(cpu_id)) != -1) | ||
760 | cpumask_set_cpu(phys_id, &physid_mask); | ||
761 | } | ||
762 | |||
763 | send_IPI_mask_phys(&physid_mask, ipi_num, try); | ||
764 | } | ||
765 | |||
766 | /*==========================================================================* | ||
767 | * Name: send_IPI_mask_phys | ||
768 | * | ||
769 | * Description: This routine sends a IPI to other CPUs in the system. | ||
770 | * | ||
771 | * Born on Date: 2002.02.05 | ||
772 | * | ||
773 | * Arguments: cpu_mask - Bitmap of target CPUs physical ID | ||
774 | * ipi_num - Number of IPI | ||
775 | * try - 0 : Send IPI certainly. | ||
776 | * !0 : The following IPI is not sent when Target CPU | ||
777 | * has not received the before IPI. | ||
778 | * | ||
779 | * Returns: IPICRi regster value. | ||
780 | * | ||
781 | * Modification log: | ||
782 | * Date Who Description | ||
783 | * ---------- --- -------------------------------------------------------- | ||
784 | * | ||
785 | *==========================================================================*/ | ||
786 | unsigned long send_IPI_mask_phys(const cpumask_t *physid_mask, int ipi_num, | ||
787 | int try) | ||
788 | { | ||
789 | spinlock_t *ipilock; | ||
790 | volatile unsigned long *ipicr_addr; | ||
791 | unsigned long ipicr_val; | ||
792 | unsigned long my_physid_mask; | ||
793 | unsigned long mask = cpumask_bits(physid_mask)[0]; | ||
794 | |||
795 | |||
796 | if (mask & ~physids_coerce(phys_cpu_present_map)) | ||
797 | BUG(); | ||
798 | if (ipi_num >= NR_IPIS || ipi_num < 0) | ||
799 | BUG(); | ||
800 | |||
801 | mask <<= IPI_SHIFT; | ||
802 | ipilock = &ipi_lock[ipi_num]; | ||
803 | ipicr_addr = (volatile unsigned long *)(M32R_ICU_IPICR_ADDR | ||
804 | + (ipi_num << 2)); | ||
805 | my_physid_mask = ~(1 << smp_processor_id()); | ||
806 | |||
807 | /* | ||
808 | * lock ipi_lock[i] | ||
809 | * check IPICRi == 0 | ||
810 | * write IPICRi (send IPIi) | ||
811 | * unlock ipi_lock[i] | ||
812 | */ | ||
813 | spin_lock(ipilock); | ||
814 | __asm__ __volatile__ ( | ||
815 | ";; CHECK IPICRi == 0 \n\t" | ||
816 | ".fillinsn \n" | ||
817 | "1: \n\t" | ||
818 | "ld %0, @%1 \n\t" | ||
819 | "and %0, %4 \n\t" | ||
820 | "beqz %0, 2f \n\t" | ||
821 | "bnez %3, 3f \n\t" | ||
822 | "bra 1b \n\t" | ||
823 | ";; WRITE IPICRi (send IPIi) \n\t" | ||
824 | ".fillinsn \n" | ||
825 | "2: \n\t" | ||
826 | "st %2, @%1 \n\t" | ||
827 | ".fillinsn \n" | ||
828 | "3: \n\t" | ||
829 | : "=&r"(ipicr_val) | ||
830 | : "r"(ipicr_addr), "r"(mask), "r"(try), "r"(my_physid_mask) | ||
831 | : "memory" | ||
832 | ); | ||
833 | spin_unlock(ipilock); | ||
834 | |||
835 | return ipicr_val; | ||
836 | } | ||
diff --git a/arch/m32r/kernel/smpboot.c b/arch/m32r/kernel/smpboot.c deleted file mode 100644 index a7d04684d2c7..000000000000 --- a/arch/m32r/kernel/smpboot.c +++ /dev/null | |||
@@ -1,627 +0,0 @@ | |||
1 | /* | ||
2 | * linux/arch/m32r/kernel/smpboot.c | ||
3 | * orig : i386 2.4.10 | ||
4 | * | ||
5 | * M32R SMP booting functions | ||
6 | * | ||
7 | * Copyright (c) 2001, 2002, 2003 Hitoshi Yamamoto | ||
8 | * | ||
9 | * Taken from i386 version. | ||
10 | * (c) 1995 Alan Cox, Building #3 <alan@redhat.com> | ||
11 | * (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com> | ||
12 | * | ||
13 | * Much of the core SMP work is based on previous work by Thomas Radke, to | ||
14 | * whom a great many thanks are extended. | ||
15 | * | ||
16 | * Thanks to Intel for making available several different Pentium, | ||
17 | * Pentium Pro and Pentium-II/Xeon MP machines. | ||
18 | * Original development of Linux SMP code supported by Caldera. | ||
19 | * | ||
20 | * This code is released under the GNU General Public License version 2 or | ||
21 | * later. | ||
22 | * | ||
23 | * Fixes | ||
24 | * Felix Koop : NR_CPUS used properly | ||
25 | * Jose Renau : Handle single CPU case. | ||
26 | * Alan Cox : By repeated request | ||
27 | * 8) - Total BogoMIP report. | ||
28 | * Greg Wright : Fix for kernel stacks panic. | ||
29 | * Erich Boleyn : MP v1.4 and additional changes. | ||
30 | * Matthias Sattler : Changes for 2.1 kernel map. | ||
31 | * Michel Lespinasse : Changes for 2.1 kernel map. | ||
32 | * Michael Chastain : Change trampoline.S to gnu as. | ||
33 | * Alan Cox : Dumb bug: 'B' step PPro's are fine | ||
34 | * Ingo Molnar : Added APIC timers, based on code | ||
35 | * from Jose Renau | ||
36 | * Ingo Molnar : various cleanups and rewrites | ||
37 | * Tigran Aivazian : fixed "0.00 in /proc/uptime on SMP" bug. | ||
38 | * Maciej W. Rozycki : Bits for genuine 82489DX APICs | ||
39 | * Martin J. Bligh : Added support for multi-quad systems | ||
40 | */ | ||
41 | |||
42 | #include <linux/module.h> | ||
43 | #include <linux/cpu.h> | ||
44 | #include <linux/init.h> | ||
45 | #include <linux/kernel.h> | ||
46 | #include <linux/mm.h> | ||
47 | #include <linux/sched.h> | ||
48 | #include <linux/sched/task.h> | ||
49 | #include <linux/err.h> | ||
50 | #include <linux/irq.h> | ||
51 | #include <linux/bootmem.h> | ||
52 | #include <linux/delay.h> | ||
53 | |||
54 | #include <asm/io.h> | ||
55 | #include <asm/pgalloc.h> | ||
56 | #include <asm/tlbflush.h> | ||
57 | |||
58 | #define DEBUG_SMP | ||
59 | #ifdef DEBUG_SMP | ||
60 | #define Dprintk(x...) printk(x) | ||
61 | #else | ||
62 | #define Dprintk(x...) | ||
63 | #endif | ||
64 | |||
65 | extern cpumask_t cpu_initialized; | ||
66 | |||
67 | /*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/ | ||
68 | /* Data structures and variables */ | ||
69 | /*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/ | ||
70 | |||
71 | /* Processor that is doing the boot up */ | ||
72 | static unsigned int bsp_phys_id = -1; | ||
73 | |||
74 | /* Bitmask of physically existing CPUs */ | ||
75 | physid_mask_t phys_cpu_present_map; | ||
76 | |||
77 | cpumask_t cpu_bootout_map; | ||
78 | cpumask_t cpu_bootin_map; | ||
79 | static cpumask_t cpu_callin_map; | ||
80 | cpumask_t cpu_callout_map; | ||
81 | EXPORT_SYMBOL(cpu_callout_map); | ||
82 | |||
83 | /* Per CPU bogomips and other parameters */ | ||
84 | struct cpuinfo_m32r cpu_data[NR_CPUS] __cacheline_aligned; | ||
85 | |||
86 | static int cpucount; | ||
87 | static cpumask_t smp_commenced_mask; | ||
88 | |||
89 | extern struct { | ||
90 | void * spi; | ||
91 | unsigned short ss; | ||
92 | } stack_start; | ||
93 | |||
94 | /* which physical physical ID maps to which logical CPU number */ | ||
95 | static volatile int physid_2_cpu[NR_CPUS]; | ||
96 | #define physid_to_cpu(physid) physid_2_cpu[physid] | ||
97 | |||
98 | /* which logical CPU number maps to which physical ID */ | ||
99 | volatile int cpu_2_physid[NR_CPUS]; | ||
100 | |||
101 | DEFINE_PER_CPU(int, prof_multiplier) = 1; | ||
102 | DEFINE_PER_CPU(int, prof_old_multiplier) = 1; | ||
103 | DEFINE_PER_CPU(int, prof_counter) = 1; | ||
104 | |||
105 | spinlock_t ipi_lock[NR_IPIS]; | ||
106 | |||
107 | static unsigned int calibration_result; | ||
108 | |||
109 | /*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/ | ||
110 | /* Function Prototypes */ | ||
111 | /*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/ | ||
112 | |||
113 | static void init_ipi_lock(void); | ||
114 | static void do_boot_cpu(int); | ||
115 | |||
116 | int start_secondary(void *); | ||
117 | static void smp_callin(void); | ||
118 | static void smp_online(void); | ||
119 | |||
120 | static void show_mp_info(int); | ||
121 | static void smp_store_cpu_info(int); | ||
122 | static void show_cpu_info(int); | ||
123 | int setup_profiling_timer(unsigned int); | ||
124 | static void init_cpu_to_physid(void); | ||
125 | static void map_cpu_to_physid(int, int); | ||
126 | static void unmap_cpu_to_physid(int, int); | ||
127 | |||
128 | /*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/ | ||
129 | /* Boot up APs Routines : BSP */ | ||
130 | /*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/ | ||
131 | void smp_prepare_boot_cpu(void) | ||
132 | { | ||
133 | bsp_phys_id = hard_smp_processor_id(); | ||
134 | physid_set(bsp_phys_id, phys_cpu_present_map); | ||
135 | set_cpu_online(0, true); /* BSP's cpu_id == 0 */ | ||
136 | cpumask_set_cpu(0, &cpu_callout_map); | ||
137 | cpumask_set_cpu(0, &cpu_callin_map); | ||
138 | |||
139 | /* | ||
140 | * Initialize the logical to physical CPU number mapping | ||
141 | */ | ||
142 | init_cpu_to_physid(); | ||
143 | map_cpu_to_physid(0, bsp_phys_id); | ||
144 | current_thread_info()->cpu = 0; | ||
145 | } | ||
146 | |||
147 | /*==========================================================================* | ||
148 | * Name: smp_prepare_cpus (old smp_boot_cpus) | ||
149 | * | ||
150 | * Description: This routine boot up APs. | ||
151 | * | ||
152 | * Born on Date: 2002.02.05 | ||
153 | * | ||
154 | * Arguments: NONE | ||
155 | * | ||
156 | * Returns: void (cannot fail) | ||
157 | * | ||
158 | * Modification log: | ||
159 | * Date Who Description | ||
160 | * ---------- --- -------------------------------------------------------- | ||
161 | * 2003-06-24 hy modify for linux-2.5.69 | ||
162 | * | ||
163 | *==========================================================================*/ | ||
164 | void __init smp_prepare_cpus(unsigned int max_cpus) | ||
165 | { | ||
166 | int phys_id; | ||
167 | unsigned long nr_cpu; | ||
168 | |||
169 | nr_cpu = inl(M32R_FPGA_NUM_OF_CPUS_PORTL); | ||
170 | if (nr_cpu > NR_CPUS) { | ||
171 | printk(KERN_INFO "NUM_OF_CPUS reg. value [%ld] > NR_CPU [%d]", | ||
172 | nr_cpu, NR_CPUS); | ||
173 | goto smp_done; | ||
174 | } | ||
175 | for (phys_id = 0 ; phys_id < nr_cpu ; phys_id++) | ||
176 | physid_set(phys_id, phys_cpu_present_map); | ||
177 | #ifndef CONFIG_HOTPLUG_CPU | ||
178 | init_cpu_present(cpu_possible_mask); | ||
179 | #endif | ||
180 | |||
181 | show_mp_info(nr_cpu); | ||
182 | |||
183 | init_ipi_lock(); | ||
184 | |||
185 | /* | ||
186 | * Setup boot CPU information | ||
187 | */ | ||
188 | smp_store_cpu_info(0); /* Final full version of the data */ | ||
189 | |||
190 | /* | ||
191 | * If SMP should be disabled, then really disable it! | ||
192 | */ | ||
193 | if (!max_cpus) { | ||
194 | printk(KERN_INFO "SMP mode deactivated by commandline.\n"); | ||
195 | goto smp_done; | ||
196 | } | ||
197 | |||
198 | /* | ||
199 | * Now scan the CPU present map and fire up the other CPUs. | ||
200 | */ | ||
201 | Dprintk("CPU present map : %lx\n", physids_coerce(phys_cpu_present_map)); | ||
202 | |||
203 | for (phys_id = 0 ; phys_id < NR_CPUS ; phys_id++) { | ||
204 | /* | ||
205 | * Don't even attempt to start the boot CPU! | ||
206 | */ | ||
207 | if (phys_id == bsp_phys_id) | ||
208 | continue; | ||
209 | |||
210 | if (!physid_isset(phys_id, phys_cpu_present_map)) | ||
211 | continue; | ||
212 | |||
213 | if (max_cpus <= cpucount + 1) | ||
214 | continue; | ||
215 | |||
216 | do_boot_cpu(phys_id); | ||
217 | |||
218 | /* | ||
219 | * Make sure we unmap all failed CPUs | ||
220 | */ | ||
221 | if (physid_to_cpu(phys_id) == -1) { | ||
222 | physid_clear(phys_id, phys_cpu_present_map); | ||
223 | printk("phys CPU#%d not responding - " \ | ||
224 | "cannot use it.\n", phys_id); | ||
225 | } | ||
226 | } | ||
227 | |||
228 | smp_done: | ||
229 | Dprintk("Boot done.\n"); | ||
230 | } | ||
231 | |||
232 | /* | ||
233 | * init_ipi_lock : Initialize IPI locks. | ||
234 | */ | ||
235 | static void __init init_ipi_lock(void) | ||
236 | { | ||
237 | int ipi; | ||
238 | |||
239 | for (ipi = 0 ; ipi < NR_IPIS ; ipi++) | ||
240 | spin_lock_init(&ipi_lock[ipi]); | ||
241 | } | ||
242 | |||
243 | /*==========================================================================* | ||
244 | * Name: do_boot_cpu | ||
245 | * | ||
246 | * Description: This routine boot up one AP. | ||
247 | * | ||
248 | * Born on Date: 2002.02.05 | ||
249 | * | ||
250 | * Arguments: phys_id - Target CPU physical ID | ||
251 | * | ||
252 | * Returns: void (cannot fail) | ||
253 | * | ||
254 | * Modification log: | ||
255 | * Date Who Description | ||
256 | * ---------- --- -------------------------------------------------------- | ||
257 | * 2003-06-24 hy modify for linux-2.5.69 | ||
258 | * | ||
259 | *==========================================================================*/ | ||
260 | static void __init do_boot_cpu(int phys_id) | ||
261 | { | ||
262 | struct task_struct *idle; | ||
263 | unsigned long send_status, boot_status; | ||
264 | int timeout, cpu_id; | ||
265 | |||
266 | cpu_id = ++cpucount; | ||
267 | |||
268 | /* | ||
269 | * We can't use kernel_thread since we must avoid to | ||
270 | * reschedule the child. | ||
271 | */ | ||
272 | idle = fork_idle(cpu_id); | ||
273 | if (IS_ERR(idle)) | ||
274 | panic("failed fork for CPU#%d.", cpu_id); | ||
275 | |||
276 | idle->thread.lr = (unsigned long)start_secondary; | ||
277 | |||
278 | map_cpu_to_physid(cpu_id, phys_id); | ||
279 | |||
280 | /* So we see what's up */ | ||
281 | printk("Booting processor %d/%d\n", phys_id, cpu_id); | ||
282 | stack_start.spi = (void *)idle->thread.sp; | ||
283 | task_thread_info(idle)->cpu = cpu_id; | ||
284 | |||
285 | /* | ||
286 | * Send Startup IPI | ||
287 | * 1.IPI received by CPU#(phys_id). | ||
288 | * 2.CPU#(phys_id) enter startup_AP (arch/m32r/kernel/head.S) | ||
289 | * 3.CPU#(phys_id) enter start_secondary() | ||
290 | */ | ||
291 | send_status = 0; | ||
292 | boot_status = 0; | ||
293 | |||
294 | cpumask_set_cpu(phys_id, &cpu_bootout_map); | ||
295 | |||
296 | /* Send Startup IPI */ | ||
297 | send_IPI_mask_phys(cpumask_of(phys_id), CPU_BOOT_IPI, 0); | ||
298 | |||
299 | Dprintk("Waiting for send to finish...\n"); | ||
300 | timeout = 0; | ||
301 | |||
302 | /* Wait 100[ms] */ | ||
303 | do { | ||
304 | Dprintk("+"); | ||
305 | udelay(1000); | ||
306 | send_status = !cpumask_test_cpu(phys_id, &cpu_bootin_map); | ||
307 | } while (send_status && (timeout++ < 100)); | ||
308 | |||
309 | Dprintk("After Startup.\n"); | ||
310 | |||
311 | if (!send_status) { | ||
312 | /* | ||
313 | * allow APs to start initializing. | ||
314 | */ | ||
315 | Dprintk("Before Callout %d.\n", cpu_id); | ||
316 | cpumask_set_cpu(cpu_id, &cpu_callout_map); | ||
317 | Dprintk("After Callout %d.\n", cpu_id); | ||
318 | |||
319 | /* | ||
320 | * Wait 5s total for a response | ||
321 | */ | ||
322 | for (timeout = 0; timeout < 5000; timeout++) { | ||
323 | if (cpumask_test_cpu(cpu_id, &cpu_callin_map)) | ||
324 | break; /* It has booted */ | ||
325 | udelay(1000); | ||
326 | } | ||
327 | |||
328 | if (cpumask_test_cpu(cpu_id, &cpu_callin_map)) { | ||
329 | /* number CPUs logically, starting from 1 (BSP is 0) */ | ||
330 | Dprintk("OK.\n"); | ||
331 | } else { | ||
332 | boot_status = 1; | ||
333 | printk("Not responding.\n"); | ||
334 | } | ||
335 | } else | ||
336 | printk("IPI never delivered???\n"); | ||
337 | |||
338 | if (send_status || boot_status) { | ||
339 | unmap_cpu_to_physid(cpu_id, phys_id); | ||
340 | cpumask_clear_cpu(cpu_id, &cpu_callout_map); | ||
341 | cpumask_clear_cpu(cpu_id, &cpu_callin_map); | ||
342 | cpumask_clear_cpu(cpu_id, &cpu_initialized); | ||
343 | cpucount--; | ||
344 | } | ||
345 | } | ||
346 | |||
347 | int __cpu_up(unsigned int cpu_id, struct task_struct *tidle) | ||
348 | { | ||
349 | int timeout; | ||
350 | |||
351 | cpumask_set_cpu(cpu_id, &smp_commenced_mask); | ||
352 | |||
353 | /* | ||
354 | * Wait 5s total for a response | ||
355 | */ | ||
356 | for (timeout = 0; timeout < 5000; timeout++) { | ||
357 | if (cpu_online(cpu_id)) | ||
358 | break; | ||
359 | udelay(1000); | ||
360 | } | ||
361 | if (!cpu_online(cpu_id)) | ||
362 | BUG(); | ||
363 | |||
364 | return 0; | ||
365 | } | ||
366 | |||
367 | void __init smp_cpus_done(unsigned int max_cpus) | ||
368 | { | ||
369 | int cpu_id, timeout; | ||
370 | unsigned long bogosum = 0; | ||
371 | |||
372 | for (timeout = 0; timeout < 5000; timeout++) { | ||
373 | if (cpumask_equal(&cpu_callin_map, cpu_online_mask)) | ||
374 | break; | ||
375 | udelay(1000); | ||
376 | } | ||
377 | if (!cpumask_equal(&cpu_callin_map, cpu_online_mask)) | ||
378 | BUG(); | ||
379 | |||
380 | for_each_online_cpu(cpu_id) | ||
381 | show_cpu_info(cpu_id); | ||
382 | |||
383 | /* | ||
384 | * Allow the user to impress friends. | ||
385 | */ | ||
386 | Dprintk("Before bogomips.\n"); | ||
387 | if (cpucount) { | ||
388 | for_each_cpu(cpu_id,cpu_online_mask) | ||
389 | bogosum += cpu_data[cpu_id].loops_per_jiffy; | ||
390 | |||
391 | printk(KERN_INFO "Total of %d processors activated " \ | ||
392 | "(%lu.%02lu BogoMIPS).\n", cpucount + 1, | ||
393 | bogosum / (500000 / HZ), | ||
394 | (bogosum / (5000 / HZ)) % 100); | ||
395 | Dprintk("Before bogocount - setting activated=1.\n"); | ||
396 | } | ||
397 | } | ||
398 | |||
399 | /*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/ | ||
400 | /* Activate a secondary processor Routines */ | ||
401 | /*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/ | ||
402 | |||
403 | /*==========================================================================* | ||
404 | * Name: start_secondary | ||
405 | * | ||
406 | * Description: This routine activate a secondary processor. | ||
407 | * | ||
408 | * Born on Date: 2002.02.05 | ||
409 | * | ||
410 | * Arguments: *unused - currently unused. | ||
411 | * | ||
412 | * Returns: void (cannot fail) | ||
413 | * | ||
414 | * Modification log: | ||
415 | * Date Who Description | ||
416 | * ---------- --- -------------------------------------------------------- | ||
417 | * 2003-06-24 hy modify for linux-2.5.69 | ||
418 | * | ||
419 | *==========================================================================*/ | ||
420 | int __init start_secondary(void *unused) | ||
421 | { | ||
422 | cpu_init(); | ||
423 | preempt_disable(); | ||
424 | smp_callin(); | ||
425 | while (!cpumask_test_cpu(smp_processor_id(), &smp_commenced_mask)) | ||
426 | cpu_relax(); | ||
427 | |||
428 | smp_online(); | ||
429 | |||
430 | /* | ||
431 | * low-memory mappings have been cleared, flush them from | ||
432 | * the local TLBs too. | ||
433 | */ | ||
434 | local_flush_tlb_all(); | ||
435 | |||
436 | cpu_startup_entry(CPUHP_AP_ONLINE_IDLE); | ||
437 | return 0; | ||
438 | } | ||
439 | |||
440 | /*==========================================================================* | ||
441 | * Name: smp_callin | ||
442 | * | ||
443 | * Description: This routine activate a secondary processor. | ||
444 | * | ||
445 | * Born on Date: 2002.02.05 | ||
446 | * | ||
447 | * Arguments: NONE | ||
448 | * | ||
449 | * Returns: void (cannot fail) | ||
450 | * | ||
451 | * Modification log: | ||
452 | * Date Who Description | ||
453 | * ---------- --- -------------------------------------------------------- | ||
454 | * 2003-06-24 hy modify for linux-2.5.69 | ||
455 | * | ||
456 | *==========================================================================*/ | ||
457 | static void __init smp_callin(void) | ||
458 | { | ||
459 | int phys_id = hard_smp_processor_id(); | ||
460 | int cpu_id = smp_processor_id(); | ||
461 | unsigned long timeout; | ||
462 | |||
463 | if (cpumask_test_cpu(cpu_id, &cpu_callin_map)) { | ||
464 | printk("huh, phys CPU#%d, CPU#%d already present??\n", | ||
465 | phys_id, cpu_id); | ||
466 | BUG(); | ||
467 | } | ||
468 | Dprintk("CPU#%d (phys ID: %d) waiting for CALLOUT\n", cpu_id, phys_id); | ||
469 | |||
470 | /* Waiting 2s total for startup (udelay is not yet working) */ | ||
471 | timeout = jiffies + (2 * HZ); | ||
472 | while (time_before(jiffies, timeout)) { | ||
473 | /* Has the boot CPU finished it's STARTUP sequence ? */ | ||
474 | if (cpumask_test_cpu(cpu_id, &cpu_callout_map)) | ||
475 | break; | ||
476 | cpu_relax(); | ||
477 | } | ||
478 | |||
479 | if (!time_before(jiffies, timeout)) { | ||
480 | printk("BUG: CPU#%d started up but did not get a callout!\n", | ||
481 | cpu_id); | ||
482 | BUG(); | ||
483 | } | ||
484 | |||
485 | /* Allow the master to continue. */ | ||
486 | cpumask_set_cpu(cpu_id, &cpu_callin_map); | ||
487 | } | ||
488 | |||
489 | static void __init smp_online(void) | ||
490 | { | ||
491 | int cpu_id = smp_processor_id(); | ||
492 | |||
493 | notify_cpu_starting(cpu_id); | ||
494 | |||
495 | local_irq_enable(); | ||
496 | |||
497 | /* Get our bogomips. */ | ||
498 | calibrate_delay(); | ||
499 | |||
500 | /* Save our processor parameters */ | ||
501 | smp_store_cpu_info(cpu_id); | ||
502 | |||
503 | set_cpu_online(cpu_id, true); | ||
504 | } | ||
505 | |||
506 | /*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/ | ||
507 | /* Boot up CPUs common Routines */ | ||
508 | /*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/ | ||
509 | static void __init show_mp_info(int nr_cpu) | ||
510 | { | ||
511 | int i; | ||
512 | char cpu_model0[17], cpu_model1[17], cpu_ver[9]; | ||
513 | |||
514 | strncpy(cpu_model0, (char *)M32R_FPGA_CPU_NAME_ADDR, 16); | ||
515 | strncpy(cpu_model1, (char *)M32R_FPGA_MODEL_ID_ADDR, 16); | ||
516 | strncpy(cpu_ver, (char *)M32R_FPGA_VERSION_ADDR, 8); | ||
517 | |||
518 | cpu_model0[16] = '\0'; | ||
519 | for (i = 15 ; i >= 0 ; i--) { | ||
520 | if (cpu_model0[i] != ' ') | ||
521 | break; | ||
522 | cpu_model0[i] = '\0'; | ||
523 | } | ||
524 | cpu_model1[16] = '\0'; | ||
525 | for (i = 15 ; i >= 0 ; i--) { | ||
526 | if (cpu_model1[i] != ' ') | ||
527 | break; | ||
528 | cpu_model1[i] = '\0'; | ||
529 | } | ||
530 | cpu_ver[8] = '\0'; | ||
531 | for (i = 7 ; i >= 0 ; i--) { | ||
532 | if (cpu_ver[i] != ' ') | ||
533 | break; | ||
534 | cpu_ver[i] = '\0'; | ||
535 | } | ||
536 | |||
537 | printk(KERN_INFO "M32R-mp information\n"); | ||
538 | printk(KERN_INFO " On-chip CPUs : %d\n", nr_cpu); | ||
539 | printk(KERN_INFO " CPU model : %s/%s(%s)\n", cpu_model0, | ||
540 | cpu_model1, cpu_ver); | ||
541 | } | ||
542 | |||
543 | /* | ||
544 | * The bootstrap kernel entry code has set these up. Save them for | ||
545 | * a given CPU | ||
546 | */ | ||
547 | static void __init smp_store_cpu_info(int cpu_id) | ||
548 | { | ||
549 | struct cpuinfo_m32r *ci = cpu_data + cpu_id; | ||
550 | |||
551 | *ci = boot_cpu_data; | ||
552 | ci->loops_per_jiffy = loops_per_jiffy; | ||
553 | } | ||
554 | |||
555 | static void __init show_cpu_info(int cpu_id) | ||
556 | { | ||
557 | struct cpuinfo_m32r *ci = &cpu_data[cpu_id]; | ||
558 | |||
559 | printk("CPU#%d : ", cpu_id); | ||
560 | |||
561 | #define PRINT_CLOCK(name, value) \ | ||
562 | printk(name " clock %d.%02dMHz", \ | ||
563 | ((value) / 1000000), ((value) % 1000000) / 10000) | ||
564 | |||
565 | PRINT_CLOCK("CPU", (int)ci->cpu_clock); | ||
566 | PRINT_CLOCK(", Bus", (int)ci->bus_clock); | ||
567 | printk(", loops_per_jiffy[%ld]\n", ci->loops_per_jiffy); | ||
568 | } | ||
569 | |||
570 | /* | ||
571 | * the frequency of the profiling timer can be changed | ||
572 | * by writing a multiplier value into /proc/profile. | ||
573 | */ | ||
574 | int setup_profiling_timer(unsigned int multiplier) | ||
575 | { | ||
576 | int i; | ||
577 | |||
578 | /* | ||
579 | * Sanity check. [at least 500 APIC cycles should be | ||
580 | * between APIC interrupts as a rule of thumb, to avoid | ||
581 | * irqs flooding us] | ||
582 | */ | ||
583 | if ( (!multiplier) || (calibration_result / multiplier < 500)) | ||
584 | return -EINVAL; | ||
585 | |||
586 | /* | ||
587 | * Set the new multiplier for each CPU. CPUs don't start using the | ||
588 | * new values until the next timer interrupt in which they do process | ||
589 | * accounting. At that time they also adjust their APIC timers | ||
590 | * accordingly. | ||
591 | */ | ||
592 | for_each_possible_cpu(i) | ||
593 | per_cpu(prof_multiplier, i) = multiplier; | ||
594 | |||
595 | return 0; | ||
596 | } | ||
597 | |||
598 | /* Initialize all maps between cpu number and apicids */ | ||
599 | static void __init init_cpu_to_physid(void) | ||
600 | { | ||
601 | int i; | ||
602 | |||
603 | for (i = 0 ; i < NR_CPUS ; i++) { | ||
604 | cpu_2_physid[i] = -1; | ||
605 | physid_2_cpu[i] = -1; | ||
606 | } | ||
607 | } | ||
608 | |||
609 | /* | ||
610 | * set up a mapping between cpu and apicid. Uses logical apicids for multiquad, | ||
611 | * else physical apic ids | ||
612 | */ | ||
613 | static void __init map_cpu_to_physid(int cpu_id, int phys_id) | ||
614 | { | ||
615 | physid_2_cpu[phys_id] = cpu_id; | ||
616 | cpu_2_physid[cpu_id] = phys_id; | ||
617 | } | ||
618 | |||
619 | /* | ||
620 | * undo a mapping between cpu and apicid. Uses logical apicids for multiquad, | ||
621 | * else physical apic ids | ||
622 | */ | ||
623 | static void __init unmap_cpu_to_physid(int cpu_id, int phys_id) | ||
624 | { | ||
625 | physid_2_cpu[phys_id] = -1; | ||
626 | cpu_2_physid[cpu_id] = -1; | ||
627 | } | ||
diff --git a/arch/m32r/kernel/sys_m32r.c b/arch/m32r/kernel/sys_m32r.c deleted file mode 100644 index 22a50fc49ab7..000000000000 --- a/arch/m32r/kernel/sys_m32r.c +++ /dev/null | |||
@@ -1,91 +0,0 @@ | |||
1 | // SPDX-License-Identifier: GPL-2.0 | ||
2 | /* | ||
3 | * linux/arch/m32r/kernel/sys_m32r.c | ||
4 | * | ||
5 | * This file contains various random system calls that | ||
6 | * have a non-standard calling sequence on the Linux/M32R platform. | ||
7 | * | ||
8 | * Taken from i386 version. | ||
9 | */ | ||
10 | |||
11 | #include <linux/errno.h> | ||
12 | #include <linux/sched.h> | ||
13 | #include <linux/mm.h> | ||
14 | #include <linux/fs.h> | ||
15 | #include <linux/smp.h> | ||
16 | #include <linux/sem.h> | ||
17 | #include <linux/msg.h> | ||
18 | #include <linux/shm.h> | ||
19 | #include <linux/stat.h> | ||
20 | #include <linux/syscalls.h> | ||
21 | #include <linux/mman.h> | ||
22 | #include <linux/file.h> | ||
23 | #include <linux/utsname.h> | ||
24 | #include <linux/ipc.h> | ||
25 | |||
26 | #include <linux/uaccess.h> | ||
27 | #include <asm/cachectl.h> | ||
28 | #include <asm/cacheflush.h> | ||
29 | #include <asm/syscall.h> | ||
30 | #include <asm/unistd.h> | ||
31 | |||
32 | /* | ||
33 | * sys_tas() - test-and-set | ||
34 | */ | ||
35 | asmlinkage int sys_tas(int __user *addr) | ||
36 | { | ||
37 | int oldval; | ||
38 | |||
39 | if (!access_ok(VERIFY_WRITE, addr, sizeof (int))) | ||
40 | return -EFAULT; | ||
41 | |||
42 | /* atomic operation: | ||
43 | * oldval = *addr; *addr = 1; | ||
44 | */ | ||
45 | __asm__ __volatile__ ( | ||
46 | DCACHE_CLEAR("%0", "r4", "%1") | ||
47 | " .fillinsn\n" | ||
48 | "1:\n" | ||
49 | " lock %0, @%1 -> unlock %2, @%1\n" | ||
50 | "2:\n" | ||
51 | /* NOTE: | ||
52 | * The m32r processor can accept interrupts only | ||
53 | * at the 32-bit instruction boundary. | ||
54 | * So, in the above code, the "unlock" instruction | ||
55 | * can be executed continuously after the "lock" | ||
56 | * instruction execution without any interruptions. | ||
57 | */ | ||
58 | ".section .fixup,\"ax\"\n" | ||
59 | " .balign 4\n" | ||
60 | "3: ldi %0, #%3\n" | ||
61 | " seth r14, #high(2b)\n" | ||
62 | " or3 r14, r14, #low(2b)\n" | ||
63 | " jmp r14\n" | ||
64 | ".previous\n" | ||
65 | ".section __ex_table,\"a\"\n" | ||
66 | " .balign 4\n" | ||
67 | " .long 1b,3b\n" | ||
68 | ".previous\n" | ||
69 | : "=&r" (oldval) | ||
70 | : "r" (addr), "r" (1), "i"(-EFAULT) | ||
71 | : "r14", "memory" | ||
72 | #ifdef CONFIG_CHIP_M32700_TS1 | ||
73 | , "r4" | ||
74 | #endif /* CONFIG_CHIP_M32700_TS1 */ | ||
75 | ); | ||
76 | |||
77 | return oldval; | ||
78 | } | ||
79 | |||
80 | asmlinkage int sys_cacheflush(void *addr, int bytes, int cache) | ||
81 | { | ||
82 | /* This should flush more selectively ... */ | ||
83 | _flush_cache_all(); | ||
84 | return 0; | ||
85 | } | ||
86 | |||
87 | asmlinkage int sys_cachectl(char *addr, int nbytes, int op) | ||
88 | { | ||
89 | /* Not implemented yet. */ | ||
90 | return -ENOSYS; | ||
91 | } | ||
diff --git a/arch/m32r/kernel/syscall_table.S b/arch/m32r/kernel/syscall_table.S deleted file mode 100644 index cf0bcf014b98..000000000000 --- a/arch/m32r/kernel/syscall_table.S +++ /dev/null | |||
@@ -1,328 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | ENTRY(sys_call_table) | ||
3 | .long sys_restart_syscall /* 0 - old "setup()" system call*/ | ||
4 | .long sys_exit | ||
5 | .long sys_fork | ||
6 | .long sys_read | ||
7 | .long sys_write | ||
8 | .long sys_open /* 5 */ | ||
9 | .long sys_close | ||
10 | .long sys_waitpid | ||
11 | .long sys_creat | ||
12 | .long sys_link | ||
13 | .long sys_unlink /* 10 */ | ||
14 | .long sys_execve | ||
15 | .long sys_chdir | ||
16 | .long sys_time | ||
17 | .long sys_mknod | ||
18 | .long sys_chmod /* 15 */ | ||
19 | .long sys_ni_syscall /* lchown16 syscall holder */ | ||
20 | .long sys_ni_syscall /* old break syscall holder */ | ||
21 | .long sys_ni_syscall /* old stat syscall holder */ | ||
22 | .long sys_lseek | ||
23 | .long sys_getpid /* 20 */ | ||
24 | .long sys_mount | ||
25 | .long sys_oldumount | ||
26 | .long sys_ni_syscall /* setuid16 syscall holder */ | ||
27 | .long sys_ni_syscall /* getuid16 syscall holder */ | ||
28 | .long sys_stime /* 25 */ | ||
29 | .long sys_ptrace | ||
30 | .long sys_alarm | ||
31 | .long sys_ni_syscall /* old fstat syscall holder */ | ||
32 | .long sys_pause | ||
33 | .long sys_utime /* 30 */ | ||
34 | .long sys_ni_syscall /* old stty syscall holder */ | ||
35 | .long sys_cachectl /* for M32R */ /* old gtty syscall holder */ | ||
36 | .long sys_access | ||
37 | .long sys_ni_syscall /* nice syscall holder */ | ||
38 | .long sys_ni_syscall /* 35 - old ftime syscall holder */ | ||
39 | .long sys_sync | ||
40 | .long sys_kill | ||
41 | .long sys_rename | ||
42 | .long sys_mkdir | ||
43 | .long sys_rmdir /* 40 */ | ||
44 | .long sys_dup | ||
45 | .long sys_pipe | ||
46 | .long sys_times | ||
47 | .long sys_ni_syscall /* old prof syscall holder */ | ||
48 | .long sys_brk /* 45 */ | ||
49 | .long sys_ni_syscall /* setgid16 syscall holder */ | ||
50 | .long sys_getgid /* will be unused */ | ||
51 | .long sys_ni_syscall /* signal syscall holder */ | ||
52 | .long sys_ni_syscall /* geteuid16 syscall holder */ | ||
53 | .long sys_ni_syscall /* 50 - getegid16 syscall holder */ | ||
54 | .long sys_acct | ||
55 | .long sys_umount /* recycled never used phys() */ | ||
56 | .long sys_ni_syscall /* old lock syscall holder */ | ||
57 | .long sys_ioctl | ||
58 | .long sys_fcntl /* 55 - will be unused */ | ||
59 | .long sys_ni_syscall /* mpx syscall holder */ | ||
60 | .long sys_setpgid | ||
61 | .long sys_ni_syscall /* old ulimit syscall holder */ | ||
62 | .long sys_ni_syscall /* sys_olduname */ | ||
63 | .long sys_umask /* 60 */ | ||
64 | .long sys_chroot | ||
65 | .long sys_ustat | ||
66 | .long sys_dup2 | ||
67 | .long sys_getppid | ||
68 | .long sys_getpgrp /* 65 */ | ||
69 | .long sys_setsid | ||
70 | .long sys_ni_syscall /* sigaction syscall holder */ | ||
71 | .long sys_ni_syscall /* sgetmask syscall holder */ | ||
72 | .long sys_ni_syscall /* ssetmask syscall holder */ | ||
73 | .long sys_ni_syscall /* 70 - setreuid16 syscall holder */ | ||
74 | .long sys_ni_syscall /* setregid16 syscall holder */ | ||
75 | .long sys_ni_syscall /* sigsuspend syscall holder */ | ||
76 | .long sys_ni_syscall /* sigpending syscall holder */ | ||
77 | .long sys_sethostname | ||
78 | .long sys_setrlimit /* 75 */ | ||
79 | .long sys_getrlimit/*will be unused*/ | ||
80 | .long sys_getrusage | ||
81 | .long sys_gettimeofday | ||
82 | .long sys_settimeofday | ||
83 | .long sys_ni_syscall /* 80 - getgroups16 syscall holder */ | ||
84 | .long sys_ni_syscall /* setgroups16 syscall holder */ | ||
85 | .long sys_ni_syscall /* sys_oldselect */ | ||
86 | .long sys_symlink | ||
87 | .long sys_ni_syscall /* old lstat syscall holder */ | ||
88 | .long sys_readlink /* 85 */ | ||
89 | .long sys_uselib | ||
90 | .long sys_swapon | ||
91 | .long sys_reboot | ||
92 | .long sys_ni_syscall /* readdir syscall holder */ | ||
93 | .long sys_ni_syscall /* 90 - old_mmap syscall holder */ | ||
94 | .long sys_munmap | ||
95 | .long sys_truncate | ||
96 | .long sys_ftruncate | ||
97 | .long sys_fchmod | ||
98 | .long sys_ni_syscall /* 95 - fchwon16 syscall holder */ | ||
99 | .long sys_getpriority | ||
100 | .long sys_setpriority | ||
101 | .long sys_ni_syscall /* old profil syscall holder */ | ||
102 | .long sys_statfs | ||
103 | .long sys_fstatfs /* 100 */ | ||
104 | .long sys_ni_syscall /* ioperm syscall holder */ | ||
105 | .long sys_socketcall | ||
106 | .long sys_syslog | ||
107 | .long sys_setitimer | ||
108 | .long sys_getitimer /* 105 */ | ||
109 | .long sys_newstat | ||
110 | .long sys_newlstat | ||
111 | .long sys_newfstat | ||
112 | .long sys_ni_syscall /* old uname syscall holder */ | ||
113 | .long sys_ni_syscall /* 110 - iopl syscall holder */ | ||
114 | .long sys_vhangup | ||
115 | .long sys_ni_syscall /* idle syscall holder */ | ||
116 | .long sys_ni_syscall /* vm86old syscall holder */ | ||
117 | .long sys_wait4 | ||
118 | .long sys_swapoff /* 115 */ | ||
119 | .long sys_sysinfo | ||
120 | .long sys_ipc | ||
121 | .long sys_fsync | ||
122 | .long sys_ni_syscall /* sigreturn syscall holder */ | ||
123 | .long sys_clone /* 120 */ | ||
124 | .long sys_setdomainname | ||
125 | .long sys_newuname | ||
126 | .long sys_ni_syscall /* modify_ldt syscall holder */ | ||
127 | .long sys_adjtimex | ||
128 | .long sys_mprotect /* 125 */ | ||
129 | .long sys_ni_syscall /* sigprocmask syscall holder */ | ||
130 | .long sys_ni_syscall /* create_module syscall holder */ | ||
131 | .long sys_init_module | ||
132 | .long sys_delete_module | ||
133 | .long sys_ni_syscall /* 130 - get_kernel_syms */ | ||
134 | .long sys_quotactl | ||
135 | .long sys_getpgid | ||
136 | .long sys_fchdir | ||
137 | .long sys_bdflush | ||
138 | .long sys_sysfs /* 135 */ | ||
139 | .long sys_personality | ||
140 | .long sys_ni_syscall /* afs_syscall syscall holder */ | ||
141 | .long sys_ni_syscall /* setfsuid16 syscall holder */ | ||
142 | .long sys_ni_syscall /* setfsgid16 syscall holder */ | ||
143 | .long sys_llseek /* 140 */ | ||
144 | .long sys_getdents | ||
145 | .long sys_select | ||
146 | .long sys_flock | ||
147 | .long sys_msync | ||
148 | .long sys_readv /* 145 */ | ||
149 | .long sys_writev | ||
150 | .long sys_getsid | ||
151 | .long sys_fdatasync | ||
152 | .long sys_sysctl | ||
153 | .long sys_mlock /* 150 */ | ||
154 | .long sys_munlock | ||
155 | .long sys_mlockall | ||
156 | .long sys_munlockall | ||
157 | .long sys_sched_setparam | ||
158 | .long sys_sched_getparam /* 155 */ | ||
159 | .long sys_sched_setscheduler | ||
160 | .long sys_sched_getscheduler | ||
161 | .long sys_sched_yield | ||
162 | .long sys_sched_get_priority_max | ||
163 | .long sys_sched_get_priority_min /* 160 */ | ||
164 | .long sys_sched_rr_get_interval | ||
165 | .long sys_nanosleep | ||
166 | .long sys_mremap | ||
167 | .long sys_ni_syscall /* setresuid16 syscall holder */ | ||
168 | .long sys_ni_syscall /* 165 - getresuid16 syscall holder */ | ||
169 | .long sys_tas /* vm86 syscall holder */ | ||
170 | .long sys_ni_syscall /* query_module syscall holder */ | ||
171 | .long sys_poll | ||
172 | .long sys_ni_syscall /* was nfsservctl */ | ||
173 | .long sys_setresgid /* 170 */ | ||
174 | .long sys_getresgid | ||
175 | .long sys_prctl | ||
176 | .long sys_rt_sigreturn | ||
177 | .long sys_rt_sigaction | ||
178 | .long sys_rt_sigprocmask /* 175 */ | ||
179 | .long sys_rt_sigpending | ||
180 | .long sys_rt_sigtimedwait | ||
181 | .long sys_rt_sigqueueinfo | ||
182 | .long sys_rt_sigsuspend | ||
183 | .long sys_pread64 /* 180 */ | ||
184 | .long sys_pwrite64 | ||
185 | .long sys_ni_syscall /* chown16 syscall holder */ | ||
186 | .long sys_getcwd | ||
187 | .long sys_capget | ||
188 | .long sys_capset /* 185 */ | ||
189 | .long sys_sigaltstack | ||
190 | .long sys_sendfile | ||
191 | .long sys_ni_syscall /* streams1 */ | ||
192 | .long sys_ni_syscall /* streams2 */ | ||
193 | .long sys_vfork /* 190 */ | ||
194 | .long sys_getrlimit | ||
195 | .long sys_mmap_pgoff | ||
196 | .long sys_truncate64 | ||
197 | .long sys_ftruncate64 | ||
198 | .long sys_stat64 /* 195 */ | ||
199 | .long sys_lstat64 | ||
200 | .long sys_fstat64 | ||
201 | .long sys_lchown | ||
202 | .long sys_getuid | ||
203 | .long sys_getgid /* 200 */ | ||
204 | .long sys_geteuid | ||
205 | .long sys_getegid | ||
206 | .long sys_setreuid | ||
207 | .long sys_setregid | ||
208 | .long sys_getgroups /* 205 */ | ||
209 | .long sys_setgroups | ||
210 | .long sys_fchown | ||
211 | .long sys_setresuid | ||
212 | .long sys_getresuid | ||
213 | .long sys_setresgid /* 210 */ | ||
214 | .long sys_getresgid | ||
215 | .long sys_chown | ||
216 | .long sys_setuid | ||
217 | .long sys_setgid | ||
218 | .long sys_setfsuid /* 215 */ | ||
219 | .long sys_setfsgid | ||
220 | .long sys_pivot_root | ||
221 | .long sys_mincore | ||
222 | .long sys_madvise | ||
223 | .long sys_getdents64 /* 220 */ | ||
224 | .long sys_fcntl64 | ||
225 | .long sys_ni_syscall /* reserved for TUX */ | ||
226 | .long sys_ni_syscall /* Reserved for Security */ | ||
227 | .long sys_gettid | ||
228 | .long sys_readahead /* 225 */ | ||
229 | .long sys_setxattr | ||
230 | .long sys_lsetxattr | ||
231 | .long sys_fsetxattr | ||
232 | .long sys_getxattr | ||
233 | .long sys_lgetxattr /* 230 */ | ||
234 | .long sys_fgetxattr | ||
235 | .long sys_listxattr | ||
236 | .long sys_llistxattr | ||
237 | .long sys_flistxattr | ||
238 | .long sys_removexattr /* 235 */ | ||
239 | .long sys_lremovexattr | ||
240 | .long sys_fremovexattr | ||
241 | .long sys_tkill | ||
242 | .long sys_sendfile64 | ||
243 | .long sys_futex /* 240 */ | ||
244 | .long sys_sched_setaffinity | ||
245 | .long sys_sched_getaffinity | ||
246 | .long sys_ni_syscall /* reserved for "set_thread_area" system call */ | ||
247 | .long sys_ni_syscall /* reserved for "get_thread_area" system call */ | ||
248 | .long sys_io_setup /* 245 */ | ||
249 | .long sys_io_destroy | ||
250 | .long sys_io_getevents | ||
251 | .long sys_io_submit | ||
252 | .long sys_io_cancel | ||
253 | .long sys_fadvise64 /* 250 */ | ||
254 | .long sys_ni_syscall | ||
255 | .long sys_exit_group | ||
256 | .long sys_lookup_dcookie | ||
257 | .long sys_epoll_create | ||
258 | .long sys_epoll_ctl /* 255 */ | ||
259 | .long sys_epoll_wait | ||
260 | .long sys_remap_file_pages | ||
261 | .long sys_set_tid_address | ||
262 | .long sys_timer_create | ||
263 | .long sys_timer_settime /* 260 */ | ||
264 | .long sys_timer_gettime | ||
265 | .long sys_timer_getoverrun | ||
266 | .long sys_timer_delete | ||
267 | .long sys_clock_settime | ||
268 | .long sys_clock_gettime /* 265 */ | ||
269 | .long sys_clock_getres | ||
270 | .long sys_clock_nanosleep | ||
271 | .long sys_statfs64 | ||
272 | .long sys_fstatfs64 | ||
273 | .long sys_tgkill /* 270 */ | ||
274 | .long sys_utimes | ||
275 | .long sys_fadvise64_64 | ||
276 | .long sys_ni_syscall /* Reserved for sys_vserver */ | ||
277 | .long sys_ni_syscall /* Reserved for sys_mbind */ | ||
278 | .long sys_ni_syscall /* Reserved for sys_get_mempolicy */ | ||
279 | .long sys_ni_syscall /* Reserved for sys_set_mempolicy */ | ||
280 | .long sys_mq_open | ||
281 | .long sys_mq_unlink | ||
282 | .long sys_mq_timedsend | ||
283 | .long sys_mq_timedreceive /* 280 */ | ||
284 | .long sys_mq_notify | ||
285 | .long sys_mq_getsetattr | ||
286 | .long sys_ni_syscall /* reserved for kexec */ | ||
287 | .long sys_waitid | ||
288 | .long sys_ni_syscall /* 285 */ /* available */ | ||
289 | .long sys_add_key | ||
290 | .long sys_request_key | ||
291 | .long sys_keyctl | ||
292 | .long sys_ioprio_set | ||
293 | .long sys_ioprio_get /* 290 */ | ||
294 | .long sys_inotify_init | ||
295 | .long sys_inotify_add_watch | ||
296 | .long sys_inotify_rm_watch | ||
297 | .long sys_migrate_pages | ||
298 | .long sys_openat /* 295 */ | ||
299 | .long sys_mkdirat | ||
300 | .long sys_mknodat | ||
301 | .long sys_fchownat | ||
302 | .long sys_futimesat | ||
303 | .long sys_fstatat64 /* 300 */ | ||
304 | .long sys_unlinkat | ||
305 | .long sys_renameat | ||
306 | .long sys_linkat | ||
307 | .long sys_symlinkat | ||
308 | .long sys_readlinkat /* 305 */ | ||
309 | .long sys_fchmodat | ||
310 | .long sys_faccessat | ||
311 | .long sys_pselect6 | ||
312 | .long sys_ppoll | ||
313 | .long sys_unshare /* 310 */ | ||
314 | .long sys_set_robust_list | ||
315 | .long sys_get_robust_list | ||
316 | .long sys_splice | ||
317 | .long sys_sync_file_range | ||
318 | .long sys_tee /* 315 */ | ||
319 | .long sys_vmsplice | ||
320 | .long sys_move_pages | ||
321 | .long sys_getcpu | ||
322 | .long sys_epoll_pwait | ||
323 | .long sys_utimensat /* 320 */ | ||
324 | .long sys_signalfd | ||
325 | .long sys_ni_syscall | ||
326 | .long sys_eventfd | ||
327 | .long sys_fallocate | ||
328 | .long sys_setns /* 325 */ | ||
diff --git a/arch/m32r/kernel/time.c b/arch/m32r/kernel/time.c deleted file mode 100644 index 521749fbbb56..000000000000 --- a/arch/m32r/kernel/time.c +++ /dev/null | |||
@@ -1,199 +0,0 @@ | |||
1 | // SPDX-License-Identifier: GPL-2.0 | ||
2 | /* | ||
3 | * linux/arch/m32r/kernel/time.c | ||
4 | * | ||
5 | * Copyright (c) 2001, 2002 Hiroyuki Kondo, Hirokazu Takata, | ||
6 | * Hitoshi Yamamoto | ||
7 | * Taken from i386 version. | ||
8 | * Copyright (C) 1991, 1992, 1995 Linus Torvalds | ||
9 | * Copyright (C) 1996, 1997, 1998 Ralf Baechle | ||
10 | * | ||
11 | * This file contains the time handling details for PC-style clocks as | ||
12 | * found in some MIPS systems. | ||
13 | * | ||
14 | * Some code taken from sh version. | ||
15 | * Copyright (C) 1999 Tetsuya Okada & Niibe Yutaka | ||
16 | * Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org> | ||
17 | */ | ||
18 | |||
19 | #undef DEBUG_TIMER | ||
20 | |||
21 | #include <linux/errno.h> | ||
22 | #include <linux/init.h> | ||
23 | #include <linux/module.h> | ||
24 | #include <linux/sched.h> | ||
25 | #include <linux/kernel.h> | ||
26 | #include <linux/param.h> | ||
27 | #include <linux/string.h> | ||
28 | #include <linux/mm.h> | ||
29 | #include <linux/interrupt.h> | ||
30 | #include <linux/profile.h> | ||
31 | |||
32 | #include <asm/io.h> | ||
33 | #include <asm/m32r.h> | ||
34 | |||
35 | #include <asm/hw_irq.h> | ||
36 | |||
37 | #if defined(CONFIG_RTC_DRV_CMOS) || defined(CONFIG_RTC_DRV_CMOS_MODULE) | ||
38 | /* this needs a better home */ | ||
39 | DEFINE_SPINLOCK(rtc_lock); | ||
40 | |||
41 | #ifdef CONFIG_RTC_DRV_CMOS_MODULE | ||
42 | EXPORT_SYMBOL(rtc_lock); | ||
43 | #endif | ||
44 | #endif /* pc-style 'CMOS' RTC support */ | ||
45 | |||
46 | #ifdef CONFIG_SMP | ||
47 | extern void smp_local_timer_interrupt(void); | ||
48 | #endif | ||
49 | |||
50 | #define TICK_SIZE (tick_nsec / 1000) | ||
51 | |||
52 | /* | ||
53 | * Change this if you have some constant time drift | ||
54 | */ | ||
55 | |||
56 | /* This is for machines which generate the exact clock. */ | ||
57 | #define USECS_PER_JIFFY (1000000/HZ) | ||
58 | |||
59 | static unsigned long latch; | ||
60 | |||
61 | static u32 m32r_gettimeoffset(void) | ||
62 | { | ||
63 | unsigned long elapsed_time = 0; /* [us] */ | ||
64 | |||
65 | #if defined(CONFIG_CHIP_M32102) || defined(CONFIG_CHIP_XNUX2) \ | ||
66 | || defined(CONFIG_CHIP_VDEC2) || defined(CONFIG_CHIP_M32700) \ | ||
67 | || defined(CONFIG_CHIP_OPSP) || defined(CONFIG_CHIP_M32104) | ||
68 | #ifndef CONFIG_SMP | ||
69 | |||
70 | unsigned long count; | ||
71 | |||
72 | /* timer count may underflow right here */ | ||
73 | count = inl(M32R_MFT2CUT_PORTL); | ||
74 | |||
75 | if (inl(M32R_ICU_CR18_PORTL) & 0x00000100) /* underflow check */ | ||
76 | count = 0; | ||
77 | |||
78 | count = (latch - count) * TICK_SIZE; | ||
79 | elapsed_time = DIV_ROUND_CLOSEST(count, latch); | ||
80 | /* NOTE: LATCH is equal to the "interval" value (= reload count). */ | ||
81 | |||
82 | #else /* CONFIG_SMP */ | ||
83 | unsigned long count; | ||
84 | static unsigned long p_jiffies = -1; | ||
85 | static unsigned long p_count = 0; | ||
86 | |||
87 | /* timer count may underflow right here */ | ||
88 | count = inl(M32R_MFT2CUT_PORTL); | ||
89 | |||
90 | if (jiffies == p_jiffies && count > p_count) | ||
91 | count = 0; | ||
92 | |||
93 | p_jiffies = jiffies; | ||
94 | p_count = count; | ||
95 | |||
96 | count = (latch - count) * TICK_SIZE; | ||
97 | elapsed_time = DIV_ROUND_CLOSEST(count, latch); | ||
98 | /* NOTE: LATCH is equal to the "interval" value (= reload count). */ | ||
99 | #endif /* CONFIG_SMP */ | ||
100 | #elif defined(CONFIG_CHIP_M32310) | ||
101 | #warning do_gettimeoffse not implemented | ||
102 | #else | ||
103 | #error no chip configuration | ||
104 | #endif | ||
105 | |||
106 | return elapsed_time * 1000; | ||
107 | } | ||
108 | |||
109 | /* | ||
110 | * timer_interrupt() needs to keep up the real-time clock, | ||
111 | * as well as call the "xtime_update()" routine every clocktick | ||
112 | */ | ||
113 | static irqreturn_t timer_interrupt(int irq, void *dev_id) | ||
114 | { | ||
115 | #ifndef CONFIG_SMP | ||
116 | profile_tick(CPU_PROFILING); | ||
117 | #endif | ||
118 | xtime_update(1); | ||
119 | |||
120 | #ifndef CONFIG_SMP | ||
121 | update_process_times(user_mode(get_irq_regs())); | ||
122 | #endif | ||
123 | /* As we return to user mode fire off the other CPU schedulers.. | ||
124 | this is basically because we don't yet share IRQ's around. | ||
125 | This message is rigged to be safe on the 386 - basically it's | ||
126 | a hack, so don't look closely for now.. */ | ||
127 | |||
128 | #ifdef CONFIG_SMP | ||
129 | smp_local_timer_interrupt(); | ||
130 | smp_send_timer(); | ||
131 | #endif | ||
132 | |||
133 | return IRQ_HANDLED; | ||
134 | } | ||
135 | |||
136 | static struct irqaction irq0 = { | ||
137 | .handler = timer_interrupt, | ||
138 | .name = "MFT2", | ||
139 | }; | ||
140 | |||
141 | void read_persistent_clock(struct timespec *ts) | ||
142 | { | ||
143 | unsigned int epoch, year, mon, day, hour, min, sec; | ||
144 | |||
145 | sec = min = hour = day = mon = year = 0; | ||
146 | epoch = 0; | ||
147 | |||
148 | year = 23; | ||
149 | mon = 4; | ||
150 | day = 17; | ||
151 | |||
152 | /* Attempt to guess the epoch. This is the same heuristic as in rtc.c | ||
153 | so no stupid things will happen to timekeeping. Who knows, maybe | ||
154 | Ultrix also uses 1952 as epoch ... */ | ||
155 | if (year > 10 && year < 44) | ||
156 | epoch = 1980; | ||
157 | else if (year < 96) | ||
158 | epoch = 1952; | ||
159 | year += epoch; | ||
160 | |||
161 | ts->tv_sec = mktime(year, mon, day, hour, min, sec); | ||
162 | ts->tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ); | ||
163 | } | ||
164 | |||
165 | |||
166 | void __init time_init(void) | ||
167 | { | ||
168 | arch_gettimeoffset = m32r_gettimeoffset; | ||
169 | |||
170 | #if defined(CONFIG_CHIP_M32102) || defined(CONFIG_CHIP_XNUX2) \ | ||
171 | || defined(CONFIG_CHIP_VDEC2) || defined(CONFIG_CHIP_M32700) \ | ||
172 | || defined(CONFIG_CHIP_OPSP) || defined(CONFIG_CHIP_M32104) | ||
173 | |||
174 | /* M32102 MFT setup */ | ||
175 | setup_irq(M32R_IRQ_MFT2, &irq0); | ||
176 | { | ||
177 | unsigned long bus_clock; | ||
178 | unsigned short divide; | ||
179 | |||
180 | bus_clock = boot_cpu_data.bus_clock; | ||
181 | divide = boot_cpu_data.timer_divide; | ||
182 | latch = DIV_ROUND_CLOSEST(bus_clock/divide, HZ); | ||
183 | |||
184 | printk("Timer start : latch = %ld\n", latch); | ||
185 | |||
186 | outl((M32R_MFTMOD_CC_MASK | M32R_MFTMOD_TCCR \ | ||
187 | |M32R_MFTMOD_CSSEL011), M32R_MFT2MOD_PORTL); | ||
188 | outl(latch, M32R_MFT2RLD_PORTL); | ||
189 | outl(latch, M32R_MFT2CUT_PORTL); | ||
190 | outl(0, M32R_MFT2CMPRLD_PORTL); | ||
191 | outl((M32R_MFTCR_MFT2MSK|M32R_MFTCR_MFT2EN), M32R_MFTCR_PORTL); | ||
192 | } | ||
193 | |||
194 | #elif defined(CONFIG_CHIP_M32310) | ||
195 | #warning time_init not implemented | ||
196 | #else | ||
197 | #error no chip configuration | ||
198 | #endif | ||
199 | } | ||
diff --git a/arch/m32r/kernel/traps.c b/arch/m32r/kernel/traps.c deleted file mode 100644 index a6f300a208bd..000000000000 --- a/arch/m32r/kernel/traps.c +++ /dev/null | |||
@@ -1,324 +0,0 @@ | |||
1 | // SPDX-License-Identifier: GPL-2.0 | ||
2 | /* | ||
3 | * linux/arch/m32r/kernel/traps.c | ||
4 | * | ||
5 | * Copyright (C) 2001, 2002 Hirokazu Takata, Hiroyuki Kondo, | ||
6 | * Hitoshi Yamamoto | ||
7 | */ | ||
8 | |||
9 | /* | ||
10 | * 'traps.c' handles hardware traps and faults after we have saved some | ||
11 | * state in 'entry.S'. | ||
12 | */ | ||
13 | #include <linux/init.h> | ||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/kallsyms.h> | ||
16 | #include <linux/stddef.h> | ||
17 | #include <linux/ptrace.h> | ||
18 | #include <linux/sched/debug.h> | ||
19 | #include <linux/sched/task_stack.h> | ||
20 | #include <linux/mm.h> | ||
21 | #include <linux/cpu.h> | ||
22 | |||
23 | #include <asm/page.h> | ||
24 | #include <asm/processor.h> | ||
25 | |||
26 | #include <linux/uaccess.h> | ||
27 | #include <asm/io.h> | ||
28 | #include <linux/atomic.h> | ||
29 | |||
30 | #include <asm/smp.h> | ||
31 | |||
32 | #include <linux/module.h> | ||
33 | |||
34 | asmlinkage void alignment_check(void); | ||
35 | asmlinkage void ei_handler(void); | ||
36 | asmlinkage void rie_handler(void); | ||
37 | asmlinkage void debug_trap(void); | ||
38 | asmlinkage void cache_flushing_handler(void); | ||
39 | asmlinkage void ill_trap(void); | ||
40 | |||
41 | #ifdef CONFIG_SMP | ||
42 | extern void smp_reschedule_interrupt(void); | ||
43 | extern void smp_invalidate_interrupt(void); | ||
44 | extern void smp_call_function_interrupt(void); | ||
45 | extern void smp_ipi_timer_interrupt(void); | ||
46 | extern void smp_flush_cache_all_interrupt(void); | ||
47 | extern void smp_call_function_single_interrupt(void); | ||
48 | |||
49 | /* | ||
50 | * for Boot AP function | ||
51 | */ | ||
52 | asm ( | ||
53 | " .section .eit_vector4,\"ax\" \n" | ||
54 | " .global _AP_RE \n" | ||
55 | " .global startup_AP \n" | ||
56 | "_AP_RE: \n" | ||
57 | " .fill 32, 4, 0 \n" | ||
58 | "_AP_EI: bra startup_AP \n" | ||
59 | " .previous \n" | ||
60 | ); | ||
61 | #endif /* CONFIG_SMP */ | ||
62 | |||
63 | extern unsigned long eit_vector[]; | ||
64 | #define BRA_INSN(func, entry) \ | ||
65 | ((unsigned long)func - (unsigned long)eit_vector - entry*4)/4 \ | ||
66 | + 0xff000000UL | ||
67 | |||
68 | static void set_eit_vector_entries(void) | ||
69 | { | ||
70 | extern void default_eit_handler(void); | ||
71 | extern void system_call(void); | ||
72 | extern void pie_handler(void); | ||
73 | extern void ace_handler(void); | ||
74 | extern void tme_handler(void); | ||
75 | extern void _flush_cache_copyback_all(void); | ||
76 | |||
77 | eit_vector[0] = 0xd0c00001; /* seth r0, 0x01 */ | ||
78 | eit_vector[1] = BRA_INSN(default_eit_handler, 1); | ||
79 | eit_vector[4] = 0xd0c00010; /* seth r0, 0x10 */ | ||
80 | eit_vector[5] = BRA_INSN(default_eit_handler, 5); | ||
81 | eit_vector[8] = BRA_INSN(rie_handler, 8); | ||
82 | eit_vector[12] = BRA_INSN(alignment_check, 12); | ||
83 | eit_vector[16] = BRA_INSN(ill_trap, 16); | ||
84 | eit_vector[17] = BRA_INSN(debug_trap, 17); | ||
85 | eit_vector[18] = BRA_INSN(system_call, 18); | ||
86 | eit_vector[19] = BRA_INSN(ill_trap, 19); | ||
87 | eit_vector[20] = BRA_INSN(ill_trap, 20); | ||
88 | eit_vector[21] = BRA_INSN(ill_trap, 21); | ||
89 | eit_vector[22] = BRA_INSN(ill_trap, 22); | ||
90 | eit_vector[23] = BRA_INSN(ill_trap, 23); | ||
91 | eit_vector[24] = BRA_INSN(ill_trap, 24); | ||
92 | eit_vector[25] = BRA_INSN(ill_trap, 25); | ||
93 | eit_vector[26] = BRA_INSN(ill_trap, 26); | ||
94 | eit_vector[27] = BRA_INSN(ill_trap, 27); | ||
95 | eit_vector[28] = BRA_INSN(cache_flushing_handler, 28); | ||
96 | eit_vector[29] = BRA_INSN(ill_trap, 29); | ||
97 | eit_vector[30] = BRA_INSN(ill_trap, 30); | ||
98 | eit_vector[31] = BRA_INSN(ill_trap, 31); | ||
99 | eit_vector[32] = BRA_INSN(ei_handler, 32); | ||
100 | eit_vector[64] = BRA_INSN(pie_handler, 64); | ||
101 | #ifdef CONFIG_MMU | ||
102 | eit_vector[68] = BRA_INSN(ace_handler, 68); | ||
103 | eit_vector[72] = BRA_INSN(tme_handler, 72); | ||
104 | #endif /* CONFIG_MMU */ | ||
105 | #ifdef CONFIG_SMP | ||
106 | eit_vector[184] = (unsigned long)smp_reschedule_interrupt; | ||
107 | eit_vector[185] = (unsigned long)smp_invalidate_interrupt; | ||
108 | eit_vector[186] = (unsigned long)smp_call_function_interrupt; | ||
109 | eit_vector[187] = (unsigned long)smp_ipi_timer_interrupt; | ||
110 | eit_vector[188] = (unsigned long)smp_flush_cache_all_interrupt; | ||
111 | eit_vector[189] = 0; /* CPU_BOOT_IPI */ | ||
112 | eit_vector[190] = (unsigned long)smp_call_function_single_interrupt; | ||
113 | eit_vector[191] = 0; | ||
114 | #endif | ||
115 | _flush_cache_copyback_all(); | ||
116 | } | ||
117 | |||
118 | void __init trap_init(void) | ||
119 | { | ||
120 | set_eit_vector_entries(); | ||
121 | |||
122 | /* | ||
123 | * Should be a barrier for any external CPU state. | ||
124 | */ | ||
125 | cpu_init(); | ||
126 | } | ||
127 | |||
128 | static int kstack_depth_to_print = 24; | ||
129 | |||
130 | static void show_trace(struct task_struct *task, unsigned long *stack) | ||
131 | { | ||
132 | unsigned long addr; | ||
133 | |||
134 | if (!stack) | ||
135 | stack = (unsigned long*)&stack; | ||
136 | |||
137 | printk("Call Trace: "); | ||
138 | while (!kstack_end(stack)) { | ||
139 | addr = *stack++; | ||
140 | if (__kernel_text_address(addr)) | ||
141 | printk("[<%08lx>] %pSR\n", addr, (void *)addr); | ||
142 | } | ||
143 | printk("\n"); | ||
144 | } | ||
145 | |||
146 | void show_stack(struct task_struct *task, unsigned long *sp) | ||
147 | { | ||
148 | unsigned long *stack; | ||
149 | int i; | ||
150 | |||
151 | /* | ||
152 | * debugging aid: "show_stack(NULL);" prints the | ||
153 | * back trace for this cpu. | ||
154 | */ | ||
155 | |||
156 | if(sp==NULL) { | ||
157 | if (task) | ||
158 | sp = (unsigned long *)task->thread.sp; | ||
159 | else | ||
160 | sp=(unsigned long*)&sp; | ||
161 | } | ||
162 | |||
163 | stack = sp; | ||
164 | for(i=0; i < kstack_depth_to_print; i++) { | ||
165 | if (kstack_end(stack)) | ||
166 | break; | ||
167 | if (i && ((i % 4) == 0)) | ||
168 | printk("\n "); | ||
169 | printk("%08lx ", *stack++); | ||
170 | } | ||
171 | printk("\n"); | ||
172 | show_trace(task, sp); | ||
173 | } | ||
174 | |||
175 | static void show_registers(struct pt_regs *regs) | ||
176 | { | ||
177 | int i = 0; | ||
178 | int in_kernel = 1; | ||
179 | unsigned long sp; | ||
180 | |||
181 | printk("CPU: %d\n", smp_processor_id()); | ||
182 | show_regs(regs); | ||
183 | |||
184 | sp = (unsigned long) (1+regs); | ||
185 | if (user_mode(regs)) { | ||
186 | in_kernel = 0; | ||
187 | sp = regs->spu; | ||
188 | printk("SPU: %08lx\n", sp); | ||
189 | } else { | ||
190 | printk("SPI: %08lx\n", sp); | ||
191 | } | ||
192 | printk("Process %s (pid: %d, process nr: %d, stackpage=%08lx)", | ||
193 | current->comm, task_pid_nr(current), 0xffff & i, 4096+(unsigned long)current); | ||
194 | |||
195 | /* | ||
196 | * When in-kernel, we also print out the stack and code at the | ||
197 | * time of the fault.. | ||
198 | */ | ||
199 | if (in_kernel) { | ||
200 | printk("\nStack: "); | ||
201 | show_stack(current, (unsigned long*) sp); | ||
202 | |||
203 | printk("\nCode: "); | ||
204 | if (regs->bpc < PAGE_OFFSET) | ||
205 | goto bad; | ||
206 | |||
207 | for(i=0;i<20;i++) { | ||
208 | unsigned char c; | ||
209 | if (__get_user(c, &((unsigned char*)regs->bpc)[i])) { | ||
210 | bad: | ||
211 | printk(" Bad PC value."); | ||
212 | break; | ||
213 | } | ||
214 | printk("%02x ", c); | ||
215 | } | ||
216 | } | ||
217 | printk("\n"); | ||
218 | } | ||
219 | |||
220 | static DEFINE_SPINLOCK(die_lock); | ||
221 | |||
222 | void die(const char * str, struct pt_regs * regs, long err) | ||
223 | { | ||
224 | console_verbose(); | ||
225 | spin_lock_irq(&die_lock); | ||
226 | bust_spinlocks(1); | ||
227 | printk("%s: %04lx\n", str, err & 0xffff); | ||
228 | show_registers(regs); | ||
229 | bust_spinlocks(0); | ||
230 | spin_unlock_irq(&die_lock); | ||
231 | do_exit(SIGSEGV); | ||
232 | } | ||
233 | |||
234 | static __inline__ void die_if_kernel(const char * str, | ||
235 | struct pt_regs * regs, long err) | ||
236 | { | ||
237 | if (!user_mode(regs)) | ||
238 | die(str, regs, err); | ||
239 | } | ||
240 | |||
241 | static __inline__ void do_trap(int trapnr, int signr, const char * str, | ||
242 | struct pt_regs * regs, long error_code, siginfo_t *info) | ||
243 | { | ||
244 | if (user_mode(regs)) { | ||
245 | /* trap_signal */ | ||
246 | struct task_struct *tsk = current; | ||
247 | tsk->thread.error_code = error_code; | ||
248 | tsk->thread.trap_no = trapnr; | ||
249 | if (info) | ||
250 | force_sig_info(signr, info, tsk); | ||
251 | else | ||
252 | force_sig(signr, tsk); | ||
253 | return; | ||
254 | } else { | ||
255 | /* kernel_trap */ | ||
256 | if (!fixup_exception(regs)) | ||
257 | die(str, regs, error_code); | ||
258 | return; | ||
259 | } | ||
260 | } | ||
261 | |||
262 | #define DO_ERROR(trapnr, signr, str, name) \ | ||
263 | asmlinkage void do_##name(struct pt_regs * regs, long error_code) \ | ||
264 | { \ | ||
265 | do_trap(trapnr, signr, NULL, regs, error_code, NULL); \ | ||
266 | } | ||
267 | |||
268 | #define DO_ERROR_INFO(trapnr, signr, str, name, sicode, siaddr) \ | ||
269 | asmlinkage void do_##name(struct pt_regs * regs, long error_code) \ | ||
270 | { \ | ||
271 | siginfo_t info; \ | ||
272 | info.si_signo = signr; \ | ||
273 | info.si_errno = 0; \ | ||
274 | info.si_code = sicode; \ | ||
275 | info.si_addr = (void __user *)siaddr; \ | ||
276 | do_trap(trapnr, signr, str, regs, error_code, &info); \ | ||
277 | } | ||
278 | |||
279 | DO_ERROR( 1, SIGTRAP, "debug trap", debug_trap) | ||
280 | DO_ERROR_INFO(0x20, SIGILL, "reserved instruction ", rie_handler, ILL_ILLOPC, regs->bpc) | ||
281 | DO_ERROR_INFO(0x100, SIGILL, "privileged instruction", pie_handler, ILL_PRVOPC, regs->bpc) | ||
282 | DO_ERROR_INFO(-1, SIGILL, "illegal trap", ill_trap, ILL_ILLTRP, regs->bpc) | ||
283 | |||
284 | extern int handle_unaligned_access(unsigned long, struct pt_regs *); | ||
285 | |||
286 | /* This code taken from arch/sh/kernel/traps.c */ | ||
287 | asmlinkage void do_alignment_check(struct pt_regs *regs, long error_code) | ||
288 | { | ||
289 | mm_segment_t oldfs; | ||
290 | unsigned long insn; | ||
291 | int tmp; | ||
292 | |||
293 | oldfs = get_fs(); | ||
294 | |||
295 | if (user_mode(regs)) { | ||
296 | local_irq_enable(); | ||
297 | current->thread.error_code = error_code; | ||
298 | current->thread.trap_no = 0x17; | ||
299 | |||
300 | set_fs(USER_DS); | ||
301 | if (copy_from_user(&insn, (void *)regs->bpc, 4)) { | ||
302 | set_fs(oldfs); | ||
303 | goto uspace_segv; | ||
304 | } | ||
305 | tmp = handle_unaligned_access(insn, regs); | ||
306 | set_fs(oldfs); | ||
307 | |||
308 | if (!tmp) | ||
309 | return; | ||
310 | |||
311 | uspace_segv: | ||
312 | printk(KERN_NOTICE "Killing process \"%s\" due to unaligned " | ||
313 | "access\n", current->comm); | ||
314 | force_sig(SIGSEGV, current); | ||
315 | } else { | ||
316 | set_fs(KERNEL_DS); | ||
317 | if (copy_from_user(&insn, (void *)regs->bpc, 4)) { | ||
318 | set_fs(oldfs); | ||
319 | die("insn faulting in do_address_error", regs, 0); | ||
320 | } | ||
321 | handle_unaligned_access(insn, regs); | ||
322 | set_fs(oldfs); | ||
323 | } | ||
324 | } | ||
diff --git a/arch/m32r/kernel/vmlinux.lds.S b/arch/m32r/kernel/vmlinux.lds.S deleted file mode 100644 index 7e4d957f7f7f..000000000000 --- a/arch/m32r/kernel/vmlinux.lds.S +++ /dev/null | |||
@@ -1,79 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | /* ld script to make M32R Linux kernel | ||
3 | */ | ||
4 | |||
5 | #include <asm-generic/vmlinux.lds.h> | ||
6 | #include <asm/addrspace.h> | ||
7 | #include <asm/page.h> | ||
8 | #include <asm/thread_info.h> | ||
9 | |||
10 | OUTPUT_ARCH(m32r) | ||
11 | #if defined(__LITTLE_ENDIAN__) | ||
12 | jiffies = jiffies_64; | ||
13 | #else | ||
14 | jiffies = jiffies_64 + 4; | ||
15 | #endif | ||
16 | |||
17 | kernel_entry = boot - 0x80000000; | ||
18 | ENTRY(kernel_entry) | ||
19 | |||
20 | SECTIONS | ||
21 | { | ||
22 | . = CONFIG_MEMORY_START + __PAGE_OFFSET; | ||
23 | eit_vector = .; | ||
24 | |||
25 | . = . + 0x1000; | ||
26 | .empty_zero_page : { *(.empty_zero_page) } = 0 | ||
27 | |||
28 | /* read-only */ | ||
29 | _text = .; /* Text and read-only data */ | ||
30 | .boot : { *(.boot) } = 0 | ||
31 | .text : { | ||
32 | HEAD_TEXT | ||
33 | TEXT_TEXT | ||
34 | SCHED_TEXT | ||
35 | CPUIDLE_TEXT | ||
36 | LOCK_TEXT | ||
37 | *(.fixup) | ||
38 | *(.gnu.warning) | ||
39 | } = 0x9090 | ||
40 | #ifdef CONFIG_SMP | ||
41 | . = ALIGN(65536); | ||
42 | .eit_vector4 : { *(.eit_vector4) } | ||
43 | #endif | ||
44 | _etext = .; /* End of text section */ | ||
45 | |||
46 | EXCEPTION_TABLE(16) | ||
47 | NOTES | ||
48 | |||
49 | _sdata = .; /* Start of data section */ | ||
50 | RODATA | ||
51 | RW_DATA_SECTION(32, PAGE_SIZE, THREAD_SIZE) | ||
52 | _edata = .; /* End of data section */ | ||
53 | |||
54 | /* will be freed after init */ | ||
55 | . = ALIGN(PAGE_SIZE); /* Init code and data */ | ||
56 | __init_begin = .; | ||
57 | INIT_TEXT_SECTION(PAGE_SIZE) | ||
58 | INIT_DATA_SECTION(16) | ||
59 | PERCPU_SECTION(32) | ||
60 | . = ALIGN(PAGE_SIZE); | ||
61 | __init_end = .; | ||
62 | /* freed after init ends here */ | ||
63 | |||
64 | BSS_SECTION(0, 0, 4) | ||
65 | |||
66 | _end = . ; | ||
67 | |||
68 | /* Stabs debugging sections. */ | ||
69 | .stab 0 : { *(.stab) } | ||
70 | .stabstr 0 : { *(.stabstr) } | ||
71 | .stab.excl 0 : { *(.stab.excl) } | ||
72 | .stab.exclstr 0 : { *(.stab.exclstr) } | ||
73 | .stab.index 0 : { *(.stab.index) } | ||
74 | .stab.indexstr 0 : { *(.stab.indexstr) } | ||
75 | .comment 0 : { *(.comment) } | ||
76 | |||
77 | /* Sections to be discarded */ | ||
78 | DISCARDS | ||
79 | } | ||
diff --git a/arch/m32r/lib/Makefile b/arch/m32r/lib/Makefile deleted file mode 100644 index 5889eb9610b5..000000000000 --- a/arch/m32r/lib/Makefile +++ /dev/null | |||
@@ -1,7 +0,0 @@ | |||
1 | # | ||
2 | # Makefile for M32R-specific library files.. | ||
3 | # | ||
4 | |||
5 | lib-y := checksum.o ashxdi3.o memset.o memcpy.o \ | ||
6 | delay.o strlen.o usercopy.o csum_partial_copy.o \ | ||
7 | ucmpdi2.o | ||
diff --git a/arch/m32r/lib/ashxdi3.S b/arch/m32r/lib/ashxdi3.S deleted file mode 100644 index cd1acca53911..000000000000 --- a/arch/m32r/lib/ashxdi3.S +++ /dev/null | |||
@@ -1,294 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | /* | ||
3 | * linux/arch/m32r/lib/ashxdi3.S | ||
4 | * | ||
5 | * Copyright (C) 2001,2002 Hiroyuki Kondo, and Hirokazu Takata | ||
6 | * | ||
7 | */ | ||
8 | |||
9 | ; | ||
10 | ; input (r0,r1) src | ||
11 | ; input r2 shift val | ||
12 | ; r3 scratch | ||
13 | ; output (r0,r1) | ||
14 | ; | ||
15 | |||
16 | #ifdef CONFIG_ISA_DUAL_ISSUE | ||
17 | |||
18 | #ifndef __LITTLE_ENDIAN__ | ||
19 | |||
20 | .text | ||
21 | .align 4 | ||
22 | .globl __ashrdi3 | ||
23 | __ashrdi3: | ||
24 | cmpz r2 || ldi r3, #32 | ||
25 | jc r14 || cmpu r2, r3 | ||
26 | bc 1f | ||
27 | ; case 32 =< shift | ||
28 | mv r1, r0 || srai r0, #31 | ||
29 | addi r2, #-32 | ||
30 | sra r1, r2 | ||
31 | jmp r14 | ||
32 | .fillinsn | ||
33 | 1: ; case shift <32 | ||
34 | mv r3, r0 || srl r1, r2 | ||
35 | sra r0, r2 || neg r2, r2 | ||
36 | sll r3, r2 | ||
37 | or r1, r3 || jmp r14 | ||
38 | |||
39 | .align 4 | ||
40 | .globl __ashldi3 | ||
41 | .globl __lshldi3 | ||
42 | __ashldi3: | ||
43 | __lshldi3: | ||
44 | cmpz r2 || ldi r3, #32 | ||
45 | jc r14 || cmpu r2, r3 | ||
46 | bc 1f | ||
47 | ; case 32 =< shift | ||
48 | mv r0, r1 || addi r2, #-32 | ||
49 | sll r0, r2 || ldi r1, #0 | ||
50 | jmp r14 | ||
51 | .fillinsn | ||
52 | 1: ; case shift <32 | ||
53 | mv r3, r1 || sll r0, r2 | ||
54 | sll r1, r2 || neg r2, r2 | ||
55 | srl r3, r2 | ||
56 | or r0, r3 || jmp r14 | ||
57 | |||
58 | .align 4 | ||
59 | .globl __lshrdi3 | ||
60 | __lshrdi3: | ||
61 | cmpz r2 || ldi r3, #32 | ||
62 | jc r14 || cmpu r2, r3 | ||
63 | bc 1f | ||
64 | ; case 32 =< shift | ||
65 | mv r1, r0 || addi r2, #-32 | ||
66 | ldi r0, #0 || srl r1, r2 | ||
67 | jmp r14 | ||
68 | .fillinsn | ||
69 | 1: ; case shift <32 | ||
70 | mv r3, r0 || srl r1, r2 | ||
71 | srl r0, r2 || neg r2, r2 | ||
72 | sll r3, r2 | ||
73 | or r1, r3 || jmp r14 | ||
74 | |||
75 | #else /* LITTLE_ENDIAN */ | ||
76 | |||
77 | .text | ||
78 | .align 4 | ||
79 | .globl __ashrdi3 | ||
80 | __ashrdi3: | ||
81 | cmpz r2 || ldi r3, #32 | ||
82 | jc r14 || cmpu r2, r3 | ||
83 | bc 1f | ||
84 | ; case 32 =< shift | ||
85 | mv r0, r1 || srai r1, #31 | ||
86 | addi r2, #-32 | ||
87 | sra r0, r2 | ||
88 | jmp r14 | ||
89 | .fillinsn | ||
90 | 1: ; case shift <32 | ||
91 | mv r3, r1 || srl r0, r2 | ||
92 | sra r1, r2 || neg r2, r2 | ||
93 | sll r3, r2 | ||
94 | or r0, r3 || jmp r14 | ||
95 | |||
96 | .align 4 | ||
97 | .globl __ashldi3 | ||
98 | .globl __lshldi3 | ||
99 | __ashldi3: | ||
100 | __lshldi3: | ||
101 | cmpz r2 || ldi r3, #32 | ||
102 | jc r14 || cmpu r2, r3 | ||
103 | bc 1f | ||
104 | ; case 32 =< shift | ||
105 | mv r1, r0 || addi r2, #-32 | ||
106 | sll r1, r2 || ldi r0, #0 | ||
107 | jmp r14 | ||
108 | .fillinsn | ||
109 | 1: ; case shift <32 | ||
110 | mv r3, r0 || sll r1, r2 | ||
111 | sll r0, r2 || neg r2, r2 | ||
112 | srl r3, r2 | ||
113 | or r1, r3 || jmp r14 | ||
114 | |||
115 | .align 4 | ||
116 | .globl __lshrdi3 | ||
117 | __lshrdi3: | ||
118 | cmpz r2 || ldi r3, #32 | ||
119 | jc r14 || cmpu r2, r3 | ||
120 | bc 1f | ||
121 | ; case 32 =< shift | ||
122 | mv r0, r1 || addi r2, #-32 | ||
123 | ldi r1, #0 || srl r0, r2 | ||
124 | jmp r14 | ||
125 | .fillinsn | ||
126 | 1: ; case shift <32 | ||
127 | mv r3, r1 || srl r0, r2 | ||
128 | srl r1, r2 || neg r2, r2 | ||
129 | sll r3, r2 | ||
130 | or r0, r3 || jmp r14 | ||
131 | |||
132 | #endif | ||
133 | |||
134 | #else /* not CONFIG_ISA_DUAL_ISSUE */ | ||
135 | |||
136 | #ifndef __LITTLE_ENDIAN__ | ||
137 | |||
138 | .text | ||
139 | .align 4 | ||
140 | .globl __ashrdi3 | ||
141 | __ashrdi3: | ||
142 | beqz r2, 2f | ||
143 | cmpui r2, #32 | ||
144 | bc 1f | ||
145 | ; case 32 =< shift | ||
146 | mv r1, r0 | ||
147 | srai r0, #31 | ||
148 | addi r2, #-32 | ||
149 | sra r1, r2 | ||
150 | jmp r14 | ||
151 | .fillinsn | ||
152 | 1: ; case shift <32 | ||
153 | mv r3, r0 | ||
154 | srl r1, r2 | ||
155 | sra r0, r2 | ||
156 | neg r2, r2 | ||
157 | sll r3, r2 | ||
158 | or r1, r3 | ||
159 | .fillinsn | ||
160 | 2: | ||
161 | jmp r14 | ||
162 | |||
163 | .align 4 | ||
164 | .globl __ashldi3 | ||
165 | .globl __lshldi3 | ||
166 | __ashldi3: | ||
167 | __lshldi3: | ||
168 | beqz r2, 2f | ||
169 | cmpui r2, #32 | ||
170 | bc 1f | ||
171 | ; case 32 =< shift | ||
172 | mv r0, r1 | ||
173 | addi r2, #-32 | ||
174 | sll r0, r2 | ||
175 | ldi r1, #0 | ||
176 | jmp r14 | ||
177 | .fillinsn | ||
178 | 1: ; case shift <32 | ||
179 | mv r3, r1 | ||
180 | sll r0, r2 | ||
181 | sll r1, r2 | ||
182 | neg r2, r2 | ||
183 | srl r3, r2 | ||
184 | or r0, r3 | ||
185 | .fillinsn | ||
186 | 2: | ||
187 | jmp r14 | ||
188 | |||
189 | .align 4 | ||
190 | .globl __lshrdi3 | ||
191 | __lshrdi3: | ||
192 | beqz r2, 2f | ||
193 | cmpui r2, #32 | ||
194 | bc 1f | ||
195 | ; case 32 =< shift | ||
196 | mv r1, r0 | ||
197 | ldi r0, #0 | ||
198 | addi r2, #-32 | ||
199 | srl r1, r2 | ||
200 | jmp r14 | ||
201 | .fillinsn | ||
202 | 1: ; case shift <32 | ||
203 | mv r3, r0 | ||
204 | srl r1, r2 | ||
205 | srl r0, r2 | ||
206 | neg r2, r2 | ||
207 | sll r3, r2 | ||
208 | or r1, r3 | ||
209 | .fillinsn | ||
210 | 2: | ||
211 | jmp r14 | ||
212 | |||
213 | #else | ||
214 | |||
215 | .text | ||
216 | .align 4 | ||
217 | .globl __ashrdi3 | ||
218 | __ashrdi3: | ||
219 | beqz r2, 2f | ||
220 | cmpui r2, #32 | ||
221 | bc 1f | ||
222 | ; case 32 =< shift | ||
223 | mv r0, r1 | ||
224 | srai r1, #31 | ||
225 | addi r2, #-32 | ||
226 | sra r0, r2 | ||
227 | jmp r14 | ||
228 | .fillinsn | ||
229 | 1: ; case shift <32 | ||
230 | mv r3, r1 | ||
231 | srl r0, r2 | ||
232 | sra r1, r2 | ||
233 | neg r2, r2 | ||
234 | sll r3, r2 | ||
235 | or r0, r3 | ||
236 | .fillinsn | ||
237 | 2: | ||
238 | jmp r14 | ||
239 | |||
240 | .align 4 | ||
241 | .globl __ashldi3 | ||
242 | .globl __lshldi3 | ||
243 | __ashldi3: | ||
244 | __lshldi3: | ||
245 | beqz r2, 2f | ||
246 | cmpui r2, #32 | ||
247 | bc 1f | ||
248 | ; case 32 =< shift | ||
249 | mv r1, r0 | ||
250 | addi r2, #-32 | ||
251 | sll r1, r2 | ||
252 | ldi r0, #0 | ||
253 | jmp r14 | ||
254 | .fillinsn | ||
255 | 1: ; case shift <32 | ||
256 | mv r3, r0 | ||
257 | sll r1, r2 | ||
258 | sll r0, r2 | ||
259 | neg r2, r2 | ||
260 | srl r3, r2 | ||
261 | or r1, r3 | ||
262 | .fillinsn | ||
263 | 2: | ||
264 | jmp r14 | ||
265 | |||
266 | .align 4 | ||
267 | .globl __lshrdi3 | ||
268 | __lshrdi3: | ||
269 | beqz r2, 2f | ||
270 | cmpui r2, #32 | ||
271 | bc 1f | ||
272 | ; case 32 =< shift | ||
273 | mv r0, r1 | ||
274 | ldi r1, #0 | ||
275 | addi r2, #-32 | ||
276 | srl r0, r2 | ||
277 | jmp r14 | ||
278 | .fillinsn | ||
279 | 1: ; case shift <32 | ||
280 | mv r3, r1 | ||
281 | srl r0, r2 | ||
282 | srl r1, r2 | ||
283 | neg r2, r2 | ||
284 | sll r3, r2 | ||
285 | or r0, r3 | ||
286 | .fillinsn | ||
287 | 2: | ||
288 | jmp r14 | ||
289 | |||
290 | #endif | ||
291 | |||
292 | #endif /* not CONFIG_ISA_DUAL_ISSUE */ | ||
293 | |||
294 | .end | ||
diff --git a/arch/m32r/lib/checksum.S b/arch/m32r/lib/checksum.S deleted file mode 100644 index 0af0360c76d9..000000000000 --- a/arch/m32r/lib/checksum.S +++ /dev/null | |||
@@ -1,320 +0,0 @@ | |||
1 | /* | ||
2 | * INET An implementation of the TCP/IP protocol suite for the LINUX | ||
3 | * operating system. INET is implemented using the BSD Socket | ||
4 | * interface as the means of communication with the user level. | ||
5 | * | ||
6 | * IP/TCP/UDP checksumming routines | ||
7 | * | ||
8 | * Authors: Jorge Cwik, <jorge@laser.satlink.net> | ||
9 | * Arnt Gulbrandsen, <agulbra@nvg.unit.no> | ||
10 | * Tom May, <ftom@netcom.com> | ||
11 | * Pentium Pro/II routines: | ||
12 | * Alexander Kjeldaas <astor@guardian.no> | ||
13 | * Finn Arne Gangstad <finnag@guardian.no> | ||
14 | * Lots of code moved from tcp.c and ip.c; see those files | ||
15 | * for more names. | ||
16 | * | ||
17 | * Changes: Ingo Molnar, converted csum_partial_copy() to 2.1 exception | ||
18 | * handling. | ||
19 | * Andi Kleen, add zeroing on error | ||
20 | * converted to pure assembler | ||
21 | * Hirokazu Takata,Hiroyuki Kondo rewrite for the m32r architecture. | ||
22 | * | ||
23 | * This program is free software; you can redistribute it and/or | ||
24 | * modify it under the terms of the GNU General Public License | ||
25 | * as published by the Free Software Foundation; either version | ||
26 | * 2 of the License, or (at your option) any later version. | ||
27 | */ | ||
28 | |||
29 | #include <linux/linkage.h> | ||
30 | #include <asm/assembler.h> | ||
31 | #include <asm/errno.h> | ||
32 | |||
33 | /* | ||
34 | * computes a partial checksum, e.g. for TCP/UDP fragments | ||
35 | */ | ||
36 | |||
37 | /* | ||
38 | unsigned int csum_partial(const unsigned char * buff, int len, unsigned int sum) | ||
39 | */ | ||
40 | |||
41 | |||
42 | #ifdef CONFIG_ISA_DUAL_ISSUE | ||
43 | |||
44 | /* | ||
45 | * Experiments with Ethernet and SLIP connections show that buff | ||
46 | * is aligned on either a 2-byte or 4-byte boundary. We get at | ||
47 | * least a twofold speedup on 486 and Pentium if it is 4-byte aligned. | ||
48 | * Fortunately, it is easy to convert 2-byte alignment to 4-byte | ||
49 | * alignment for the unrolled loop. | ||
50 | */ | ||
51 | |||
52 | .text | ||
53 | ENTRY(csum_partial) | ||
54 | ; Function args | ||
55 | ; r0: unsigned char *buff | ||
56 | ; r1: int len | ||
57 | ; r2: unsigned int sum | ||
58 | |||
59 | push r2 || ldi r2, #0 | ||
60 | and3 r7, r0, #1 ; Check alignment. | ||
61 | beqz r7, 1f ; Jump if alignment is ok. | ||
62 | ; 1-byte mis aligned | ||
63 | ldub r4, @r0 || addi r0, #1 | ||
64 | ; clear c-bit || Alignment uses up bytes. | ||
65 | cmp r0, r0 || addi r1, #-1 | ||
66 | ldi r3, #0 || addx r2, r4 | ||
67 | addx r2, r3 | ||
68 | .fillinsn | ||
69 | 1: | ||
70 | and3 r4, r0, #2 ; Check alignment. | ||
71 | beqz r4, 2f ; Jump if alignment is ok. | ||
72 | ; clear c-bit || Alignment uses up two bytes. | ||
73 | cmp r0, r0 || addi r1, #-2 | ||
74 | bgtz r1, 1f ; Jump if we had at least two bytes. | ||
75 | bra 4f || addi r1, #2 | ||
76 | .fillinsn ; len(r1) was < 2. Deal with it. | ||
77 | 1: | ||
78 | ; 2-byte aligned | ||
79 | lduh r4, @r0 || ldi r3, #0 | ||
80 | addx r2, r4 || addi r0, #2 | ||
81 | addx r2, r3 | ||
82 | .fillinsn | ||
83 | 2: | ||
84 | ; 4-byte aligned | ||
85 | cmp r0, r0 ; clear c-bit | ||
86 | srl3 r6, r1, #5 | ||
87 | beqz r6, 2f | ||
88 | .fillinsn | ||
89 | |||
90 | 1: ld r3, @r0+ | ||
91 | ld r4, @r0+ ; +4 | ||
92 | ld r5, @r0+ ; +8 | ||
93 | ld r3, @r0+ || addx r2, r3 ; +12 | ||
94 | ld r4, @r0+ || addx r2, r4 ; +16 | ||
95 | ld r5, @r0+ || addx r2, r5 ; +20 | ||
96 | ld r3, @r0+ || addx r2, r3 ; +24 | ||
97 | ld r4, @r0+ || addx r2, r4 ; +28 | ||
98 | addx r2, r5 || addi r6, #-1 | ||
99 | addx r2, r3 | ||
100 | addx r2, r4 | ||
101 | bnez r6, 1b | ||
102 | |||
103 | addx r2, r6 ; r6=0 | ||
104 | cmp r0, r0 ; This clears c-bit | ||
105 | .fillinsn | ||
106 | 2: and3 r6, r1, #0x1c ; withdraw len | ||
107 | beqz r6, 4f | ||
108 | srli r6, #2 | ||
109 | .fillinsn | ||
110 | |||
111 | 3: ld r4, @r0+ || addi r6, #-1 | ||
112 | addx r2, r4 | ||
113 | bnez r6, 3b | ||
114 | |||
115 | addx r2, r6 ; r6=0 | ||
116 | cmp r0, r0 ; This clears c-bit | ||
117 | .fillinsn | ||
118 | 4: and3 r1, r1, #3 | ||
119 | beqz r1, 7f ; if len == 0 goto end | ||
120 | and3 r6, r1, #2 | ||
121 | beqz r6, 5f ; if len < 2 goto 5f(1byte) | ||
122 | lduh r4, @r0 || addi r0, #2 | ||
123 | addi r1, #-2 || slli r4, #16 | ||
124 | addx r2, r4 | ||
125 | beqz r1, 6f | ||
126 | .fillinsn | ||
127 | 5: ldub r4, @r0 || ldi r1, #0 | ||
128 | #ifndef __LITTLE_ENDIAN__ | ||
129 | slli r4, #8 | ||
130 | #endif | ||
131 | addx r2, r4 | ||
132 | .fillinsn | ||
133 | 6: addx r2, r1 | ||
134 | .fillinsn | ||
135 | 7: | ||
136 | and3 r0, r2, #0xffff | ||
137 | srli r2, #16 | ||
138 | add r0, r2 | ||
139 | srl3 r2, r0, #16 | ||
140 | beqz r2, 1f | ||
141 | addi r0, #1 | ||
142 | and3 r0, r0, #0xffff | ||
143 | .fillinsn | ||
144 | 1: | ||
145 | beqz r7, 1f ; swap the upper byte for the lower | ||
146 | and3 r2, r0, #0xff | ||
147 | srl3 r0, r0, #8 | ||
148 | slli r2, #8 | ||
149 | or r0, r2 | ||
150 | .fillinsn | ||
151 | 1: | ||
152 | pop r2 || cmp r0, r0 | ||
153 | addx r0, r2 || ldi r2, #0 | ||
154 | addx r0, r2 | ||
155 | jmp r14 | ||
156 | |||
157 | #else /* not CONFIG_ISA_DUAL_ISSUE */ | ||
158 | |||
159 | /* | ||
160 | * Experiments with Ethernet and SLIP connections show that buff | ||
161 | * is aligned on either a 2-byte or 4-byte boundary. We get at | ||
162 | * least a twofold speedup on 486 and Pentium if it is 4-byte aligned. | ||
163 | * Fortunately, it is easy to convert 2-byte alignment to 4-byte | ||
164 | * alignment for the unrolled loop. | ||
165 | */ | ||
166 | |||
167 | .text | ||
168 | ENTRY(csum_partial) | ||
169 | ; Function args | ||
170 | ; r0: unsigned char *buff | ||
171 | ; r1: int len | ||
172 | ; r2: unsigned int sum | ||
173 | |||
174 | push r2 | ||
175 | ldi r2, #0 | ||
176 | and3 r7, r0, #1 ; Check alignment. | ||
177 | beqz r7, 1f ; Jump if alignment is ok. | ||
178 | ; 1-byte mis aligned | ||
179 | ldub r4, @r0 | ||
180 | addi r0, #1 | ||
181 | addi r1, #-1 ; Alignment uses up bytes. | ||
182 | cmp r0, r0 ; clear c-bit | ||
183 | ldi r3, #0 | ||
184 | addx r2, r4 | ||
185 | addx r2, r3 | ||
186 | .fillinsn | ||
187 | 1: | ||
188 | and3 r4, r0, #2 ; Check alignment. | ||
189 | beqz r4, 2f ; Jump if alignment is ok. | ||
190 | addi r1, #-2 ; Alignment uses up two bytes. | ||
191 | cmp r0, r0 ; clear c-bit | ||
192 | bgtz r1, 1f ; Jump if we had at least two bytes. | ||
193 | addi r1, #2 ; len(r1) was < 2. Deal with it. | ||
194 | bra 4f | ||
195 | .fillinsn | ||
196 | 1: | ||
197 | ; 2-byte aligned | ||
198 | lduh r4, @r0 | ||
199 | addi r0, #2 | ||
200 | ldi r3, #0 | ||
201 | addx r2, r4 | ||
202 | addx r2, r3 | ||
203 | .fillinsn | ||
204 | 2: | ||
205 | ; 4-byte aligned | ||
206 | cmp r0, r0 ; clear c-bit | ||
207 | srl3 r6, r1, #5 | ||
208 | beqz r6, 2f | ||
209 | .fillinsn | ||
210 | |||
211 | 1: ld r3, @r0+ | ||
212 | ld r4, @r0+ ; +4 | ||
213 | ld r5, @r0+ ; +8 | ||
214 | addx r2, r3 | ||
215 | addx r2, r4 | ||
216 | addx r2, r5 | ||
217 | ld r3, @r0+ ; +12 | ||
218 | ld r4, @r0+ ; +16 | ||
219 | ld r5, @r0+ ; +20 | ||
220 | addx r2, r3 | ||
221 | addx r2, r4 | ||
222 | addx r2, r5 | ||
223 | ld r3, @r0+ ; +24 | ||
224 | ld r4, @r0+ ; +28 | ||
225 | addi r6, #-1 | ||
226 | addx r2, r3 | ||
227 | addx r2, r4 | ||
228 | bnez r6, 1b | ||
229 | addx r2, r6 ; r6=0 | ||
230 | cmp r0, r0 ; This clears c-bit | ||
231 | .fillinsn | ||
232 | |||
233 | 2: and3 r6, r1, #0x1c ; withdraw len | ||
234 | beqz r6, 4f | ||
235 | srli r6, #2 | ||
236 | .fillinsn | ||
237 | |||
238 | 3: ld r4, @r0+ | ||
239 | addi r6, #-1 | ||
240 | addx r2, r4 | ||
241 | bnez r6, 3b | ||
242 | addx r2, r6 ; r6=0 | ||
243 | cmp r0, r0 ; This clears c-bit | ||
244 | .fillinsn | ||
245 | |||
246 | 4: and3 r1, r1, #3 | ||
247 | beqz r1, 7f ; if len == 0 goto end | ||
248 | and3 r6, r1, #2 | ||
249 | beqz r6, 5f ; if len < 2 goto 5f(1byte) | ||
250 | |||
251 | lduh r4, @r0 | ||
252 | addi r0, #2 | ||
253 | addi r1, #-2 | ||
254 | slli r4, #16 | ||
255 | addx r2, r4 | ||
256 | beqz r1, 6f | ||
257 | .fillinsn | ||
258 | 5: ldub r4, @r0 | ||
259 | #ifndef __LITTLE_ENDIAN__ | ||
260 | slli r4, #8 | ||
261 | #endif | ||
262 | addx r2, r4 | ||
263 | .fillinsn | ||
264 | 6: ldi r5, #0 | ||
265 | addx r2, r5 | ||
266 | .fillinsn | ||
267 | 7: | ||
268 | and3 r0, r2, #0xffff | ||
269 | srli r2, #16 | ||
270 | add r0, r2 | ||
271 | srl3 r2, r0, #16 | ||
272 | beqz r2, 1f | ||
273 | addi r0, #1 | ||
274 | and3 r0, r0, #0xffff | ||
275 | .fillinsn | ||
276 | 1: | ||
277 | beqz r7, 1f | ||
278 | mv r2, r0 | ||
279 | srl3 r0, r2, #8 | ||
280 | and3 r2, r2, #0xff | ||
281 | slli r2, #8 | ||
282 | or r0, r2 | ||
283 | .fillinsn | ||
284 | 1: | ||
285 | pop r2 | ||
286 | cmp r0, r0 | ||
287 | addx r0, r2 | ||
288 | ldi r2, #0 | ||
289 | addx r0, r2 | ||
290 | jmp r14 | ||
291 | |||
292 | #endif /* not CONFIG_ISA_DUAL_ISSUE */ | ||
293 | |||
294 | /* | ||
295 | unsigned int csum_partial_copy_generic (const char *src, char *dst, | ||
296 | int len, int sum, int *src_err_ptr, int *dst_err_ptr) | ||
297 | */ | ||
298 | |||
299 | /* | ||
300 | * Copy from ds while checksumming, otherwise like csum_partial | ||
301 | * | ||
302 | * The macros SRC and DST specify the type of access for the instruction. | ||
303 | * thus we can call a custom exception handler for all access types. | ||
304 | * | ||
305 | * FIXME: could someone double-check whether I haven't mixed up some SRC and | ||
306 | * DST definitions? It's damn hard to trigger all cases. I hope I got | ||
307 | * them all but there's no guarantee. | ||
308 | */ | ||
309 | |||
310 | ENTRY(csum_partial_copy_generic) | ||
311 | nop | ||
312 | nop | ||
313 | nop | ||
314 | nop | ||
315 | jmp r14 | ||
316 | nop | ||
317 | nop | ||
318 | nop | ||
319 | |||
320 | .end | ||
diff --git a/arch/m32r/lib/csum_partial_copy.c b/arch/m32r/lib/csum_partial_copy.c deleted file mode 100644 index b3cd59c12b8e..000000000000 --- a/arch/m32r/lib/csum_partial_copy.c +++ /dev/null | |||
@@ -1,59 +0,0 @@ | |||
1 | /* | ||
2 | * INET An implementation of the TCP/IP protocol suite for the LINUX | ||
3 | * operating system. INET is implemented using the BSD Socket | ||
4 | * interface as the means of communication with the user level. | ||
5 | * | ||
6 | * M32R specific IP/TCP/UDP checksumming routines | ||
7 | * (Some code taken from MIPS architecture) | ||
8 | * | ||
9 | * This file is subject to the terms and conditions of the GNU General Public | ||
10 | * License. See the file "COPYING" in the main directory of this archive | ||
11 | * for more details. | ||
12 | * | ||
13 | * Copyright (C) 1994, 1995 Waldorf Electronics GmbH | ||
14 | * Copyright (C) 1998, 1999 Ralf Baechle | ||
15 | * Copyright (C) 2001-2005 Hiroyuki Kondo, Hirokazu Takata | ||
16 | * | ||
17 | */ | ||
18 | |||
19 | #include <linux/module.h> | ||
20 | #include <linux/types.h> | ||
21 | #include <linux/string.h> | ||
22 | |||
23 | #include <net/checksum.h> | ||
24 | #include <asm/byteorder.h> | ||
25 | #include <linux/uaccess.h> | ||
26 | |||
27 | /* | ||
28 | * Copy while checksumming, otherwise like csum_partial | ||
29 | */ | ||
30 | __wsum | ||
31 | csum_partial_copy_nocheck (const void *src, void *dst, int len, __wsum sum) | ||
32 | { | ||
33 | sum = csum_partial(src, len, sum); | ||
34 | memcpy(dst, src, len); | ||
35 | |||
36 | return sum; | ||
37 | } | ||
38 | EXPORT_SYMBOL(csum_partial_copy_nocheck); | ||
39 | |||
40 | /* | ||
41 | * Copy from userspace and compute checksum. If we catch an exception | ||
42 | * then zero the rest of the buffer. | ||
43 | */ | ||
44 | __wsum | ||
45 | csum_partial_copy_from_user (const void __user *src, void *dst, | ||
46 | int len, __wsum sum, int *err_ptr) | ||
47 | { | ||
48 | int missing; | ||
49 | |||
50 | missing = copy_from_user(dst, src, len); | ||
51 | if (missing) { | ||
52 | memset(dst + len - missing, 0, missing); | ||
53 | *err_ptr = -EFAULT; | ||
54 | } | ||
55 | |||
56 | return csum_partial(dst, len-missing, sum); | ||
57 | } | ||
58 | EXPORT_SYMBOL(csum_partial_copy_from_user); | ||
59 | EXPORT_SYMBOL(csum_partial); | ||
diff --git a/arch/m32r/lib/delay.c b/arch/m32r/lib/delay.c deleted file mode 100644 index ae1fe90892f9..000000000000 --- a/arch/m32r/lib/delay.c +++ /dev/null | |||
@@ -1,130 +0,0 @@ | |||
1 | // SPDX-License-Identifier: GPL-2.0 | ||
2 | /* | ||
3 | * linux/arch/m32r/lib/delay.c | ||
4 | * | ||
5 | * Copyright (c) 2002 Hitoshi Yamamoto, Hirokazu Takata | ||
6 | * Copyright (c) 2004 Hirokazu Takata | ||
7 | */ | ||
8 | |||
9 | #include <linux/param.h> | ||
10 | #include <linux/module.h> | ||
11 | #ifdef CONFIG_SMP | ||
12 | #include <linux/sched.h> | ||
13 | #include <asm/current.h> | ||
14 | #include <asm/smp.h> | ||
15 | #endif /* CONFIG_SMP */ | ||
16 | #include <asm/processor.h> | ||
17 | |||
18 | void __delay(unsigned long loops) | ||
19 | { | ||
20 | #ifdef CONFIG_ISA_DUAL_ISSUE | ||
21 | __asm__ __volatile__ ( | ||
22 | "beqz %0, 2f \n\t" | ||
23 | "addi %0, #-1 \n\t" | ||
24 | |||
25 | " .fillinsn \n\t" | ||
26 | "1: \n\t" | ||
27 | "cmpz %0 || addi %0, #-1 \n\t" | ||
28 | "bc 2f || cmpz %0 \n\t" | ||
29 | "bc 2f || addi %0, #-1 \n\t" | ||
30 | "cmpz %0 || addi %0, #-1 \n\t" | ||
31 | "bc 2f || cmpz %0 \n\t" | ||
32 | "bnc 1b || addi %0, #-1 \n\t" | ||
33 | " .fillinsn \n\t" | ||
34 | "2: \n\t" | ||
35 | : "+r" (loops) | ||
36 | : "r" (0) | ||
37 | : "cbit" | ||
38 | ); | ||
39 | #else | ||
40 | __asm__ __volatile__ ( | ||
41 | "beqz %0, 2f \n\t" | ||
42 | " .fillinsn \n\t" | ||
43 | "1: \n\t" | ||
44 | "addi %0, #-1 \n\t" | ||
45 | "blez %0, 2f \n\t" | ||
46 | "addi %0, #-1 \n\t" | ||
47 | "blez %0, 2f \n\t" | ||
48 | "addi %0, #-1 \n\t" | ||
49 | "blez %0, 2f \n\t" | ||
50 | "addi %0, #-1 \n\t" | ||
51 | "bgtz %0, 1b \n\t" | ||
52 | " .fillinsn \n\t" | ||
53 | "2: \n\t" | ||
54 | : "+r" (loops) | ||
55 | : "r" (0) | ||
56 | ); | ||
57 | #endif | ||
58 | } | ||
59 | |||
60 | void __const_udelay(unsigned long xloops) | ||
61 | { | ||
62 | #if defined(CONFIG_ISA_M32R2) && defined(CONFIG_ISA_DSP_LEVEL2) | ||
63 | /* | ||
64 | * loops [1] = (xloops >> 32) [sec] * loops_per_jiffy [1/jiffy] | ||
65 | * * HZ [jiffy/sec] | ||
66 | * = (xloops >> 32) [sec] * (loops_per_jiffy * HZ) [1/sec] | ||
67 | * = (((xloops * loops_per_jiffy) >> 32) * HZ) [1] | ||
68 | * | ||
69 | * NOTE: | ||
70 | * - '[]' depicts variable's dimension in the above equation. | ||
71 | * - "rac" instruction rounds the accumulator in word size. | ||
72 | */ | ||
73 | __asm__ __volatile__ ( | ||
74 | "srli %0, #1 \n\t" | ||
75 | "mulwhi %0, %1 ; a0 \n\t" | ||
76 | "mulwu1 %0, %1 ; a1 \n\t" | ||
77 | "sadd ; a0 += (a1 >> 16) \n\t" | ||
78 | "rac a0, a0, #1 \n\t" | ||
79 | "mvfacmi %0, a0 \n\t" | ||
80 | : "+r" (xloops) | ||
81 | : "r" (current_cpu_data.loops_per_jiffy) | ||
82 | : "a0", "a1" | ||
83 | ); | ||
84 | #elif defined(CONFIG_ISA_M32R2) || defined(CONFIG_ISA_M32R) | ||
85 | /* | ||
86 | * u64 ull; | ||
87 | * ull = (u64)xloops * (u64)current_cpu_data.loops_per_jiffy; | ||
88 | * xloops = (ull >> 32); | ||
89 | */ | ||
90 | __asm__ __volatile__ ( | ||
91 | "and3 r4, %0, #0xffff \n\t" | ||
92 | "and3 r5, %1, #0xffff \n\t" | ||
93 | "mul r4, r5 \n\t" | ||
94 | "srl3 r6, %0, #16 \n\t" | ||
95 | "srli r4, #16 \n\t" | ||
96 | "mul r5, r6 \n\t" | ||
97 | "add r4, r5 \n\t" | ||
98 | "and3 r5, %0, #0xffff \n\t" | ||
99 | "srl3 r6, %1, #16 \n\t" | ||
100 | "mul r5, r6 \n\t" | ||
101 | "add r4, r5 \n\t" | ||
102 | "srl3 r5, %0, #16 \n\t" | ||
103 | "srli r4, #16 \n\t" | ||
104 | "mul r5, r6 \n\t" | ||
105 | "add r4, r5 \n\t" | ||
106 | "mv %0, r4 \n\t" | ||
107 | : "+r" (xloops) | ||
108 | : "r" (current_cpu_data.loops_per_jiffy) | ||
109 | : "r4", "r5", "r6" | ||
110 | ); | ||
111 | #else | ||
112 | #error unknown isa configuration | ||
113 | #endif | ||
114 | __delay(xloops * HZ); | ||
115 | } | ||
116 | |||
117 | void __udelay(unsigned long usecs) | ||
118 | { | ||
119 | __const_udelay(usecs * 0x000010c7); /* 2**32 / 1000000 (rounded up) */ | ||
120 | } | ||
121 | |||
122 | void __ndelay(unsigned long nsecs) | ||
123 | { | ||
124 | __const_udelay(nsecs * 0x00005); /* 2**32 / 1000000000 (rounded up) */ | ||
125 | } | ||
126 | |||
127 | EXPORT_SYMBOL(__delay); | ||
128 | EXPORT_SYMBOL(__const_udelay); | ||
129 | EXPORT_SYMBOL(__udelay); | ||
130 | EXPORT_SYMBOL(__ndelay); | ||
diff --git a/arch/m32r/lib/libgcc.h b/arch/m32r/lib/libgcc.h deleted file mode 100644 index 4854690d944a..000000000000 --- a/arch/m32r/lib/libgcc.h +++ /dev/null | |||
@@ -1,24 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | #ifndef __ASM_LIBGCC_H | ||
3 | #define __ASM_LIBGCC_H | ||
4 | |||
5 | #include <asm/byteorder.h> | ||
6 | |||
7 | #ifdef __BIG_ENDIAN | ||
8 | struct DWstruct { | ||
9 | int high, low; | ||
10 | }; | ||
11 | #elif defined(__LITTLE_ENDIAN) | ||
12 | struct DWstruct { | ||
13 | int low, high; | ||
14 | }; | ||
15 | #else | ||
16 | #error I feel sick. | ||
17 | #endif | ||
18 | |||
19 | typedef union { | ||
20 | struct DWstruct s; | ||
21 | long long ll; | ||
22 | } DWunion; | ||
23 | |||
24 | #endif /* __ASM_LIBGCC_H */ | ||
diff --git a/arch/m32r/lib/memcpy.S b/arch/m32r/lib/memcpy.S deleted file mode 100644 index 249da3e3358d..000000000000 --- a/arch/m32r/lib/memcpy.S +++ /dev/null | |||
@@ -1,93 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | /* | ||
3 | * linux/arch/m32r/lib/memcpy.S | ||
4 | * | ||
5 | * Copyright (C) 2001 Hiroyuki Kondo, and Hirokazu Takata | ||
6 | * Copyright (C) 2004 Hirokazu Takata | ||
7 | * | ||
8 | * void *memcopy(void *dst, const void *src, int n); | ||
9 | * | ||
10 | * dst: r0 | ||
11 | * src: r1 | ||
12 | * n : r2 | ||
13 | */ | ||
14 | |||
15 | .text | ||
16 | #include <linux/linkage.h> | ||
17 | #include <asm/assembler.h> | ||
18 | |||
19 | #ifdef CONFIG_ISA_DUAL_ISSUE | ||
20 | |||
21 | .text | ||
22 | ENTRY(memcpy) | ||
23 | memcopy: | ||
24 | mv r4, r0 || mv r7, r0 | ||
25 | or r7, r1 || cmpz r2 | ||
26 | jc r14 || cmpeq r0, r1 ; return if r2=0 | ||
27 | jc r14 ; return if r0=r1 | ||
28 | |||
29 | and3 r7, r7, #3 | ||
30 | bnez r7, byte_copy | ||
31 | srl3 r3, r2, #2 | ||
32 | and3 r2, r2, #3 | ||
33 | beqz r3, byte_copy | ||
34 | addi r4, #-4 | ||
35 | word_copy: | ||
36 | ld r7, @r1+ || addi r3, #-1 | ||
37 | st r7, @+r4 || cmpz r2 | ||
38 | bnez r3, word_copy | ||
39 | addi r4, #4 || jc r14 ; return if r2=0 | ||
40 | #if defined(CONFIG_ISA_M32R2) | ||
41 | byte_copy: | ||
42 | ldb r7, @r1 || addi r1, #1 | ||
43 | addi r2, #-1 || stb r7, @r4+ | ||
44 | bnez r2, byte_copy | ||
45 | #elif defined(CONFIG_ISA_M32R) | ||
46 | byte_copy: | ||
47 | ldb r7, @r1 || addi r1, #1 | ||
48 | addi r2, #-1 || stb r7, @r4 | ||
49 | addi r4, #1 | ||
50 | bnez r2, byte_copy | ||
51 | #else | ||
52 | #error unknown isa configuration | ||
53 | #endif | ||
54 | end_memcopy: | ||
55 | jmp r14 | ||
56 | |||
57 | #else /* not CONFIG_ISA_DUAL_ISSUE */ | ||
58 | |||
59 | .text | ||
60 | ENTRY(memcpy) | ||
61 | memcopy: | ||
62 | mv r4, r0 | ||
63 | mv r7, r0 | ||
64 | or r7, r1 | ||
65 | beq r0, r1, end_memcopy | ||
66 | beqz r2, end_memcopy | ||
67 | |||
68 | and3 r7, r7, #3 | ||
69 | bnez r7, byte_copy | ||
70 | srl3 r3, r2, #2 | ||
71 | and3 r2, r2, #3 | ||
72 | beqz r3, byte_copy | ||
73 | addi r4, #-4 | ||
74 | word_copy: | ||
75 | ld r7, @r1+ | ||
76 | addi r3, #-1 | ||
77 | st r7, @+r4 | ||
78 | bnez r3, word_copy | ||
79 | beqz r2, end_memcopy | ||
80 | addi r4, #4 | ||
81 | byte_copy: | ||
82 | ldb r7, @r1 | ||
83 | addi r1, #1 | ||
84 | addi r2, #-1 | ||
85 | stb r7, @r4 | ||
86 | addi r4, #1 | ||
87 | bnez r2, byte_copy | ||
88 | end_memcopy: | ||
89 | jmp r14 | ||
90 | |||
91 | #endif /* not CONFIG_ISA_DUAL_ISSUE */ | ||
92 | |||
93 | .end | ||
diff --git a/arch/m32r/lib/memset.S b/arch/m32r/lib/memset.S deleted file mode 100644 index e7f45e6c73f5..000000000000 --- a/arch/m32r/lib/memset.S +++ /dev/null | |||
@@ -1,179 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | /* | ||
3 | * linux/arch/m32r/lib/memset.S | ||
4 | * | ||
5 | * Copyright (C) 2001,2002 Hiroyuki Kondo, and Hirokazu Takata | ||
6 | * Copyright (C) 2004 Hirokazu Takata | ||
7 | * | ||
8 | * void *memset(void *dst, int val, int len); | ||
9 | * | ||
10 | * dst: r0 | ||
11 | * val: r1 | ||
12 | * len: r2 | ||
13 | * ret: r0 | ||
14 | * | ||
15 | */ | ||
16 | |||
17 | .text | ||
18 | .global memset | ||
19 | |||
20 | #ifdef CONFIG_ISA_DUAL_ISSUE | ||
21 | |||
22 | .align 4 | ||
23 | memset: | ||
24 | mv r4, r0 || cmpz r2 | ||
25 | jc r14 | ||
26 | cmpui r2, #16 | ||
27 | bnc qword_align_check | ||
28 | cmpui r2, #4 | ||
29 | bc byte_set | ||
30 | word_align_check: /* len >= 4 */ | ||
31 | and3 r3, r4, #3 | ||
32 | beqz r3, word_set | ||
33 | addi r3, #-4 | ||
34 | neg r3, r3 /* r3 = -(r3 - 4) */ | ||
35 | align_word: | ||
36 | stb r1, @r4 || addi r4, #1 | ||
37 | addi r2, #-1 || addi r3, #-1 | ||
38 | bnez r3, align_word | ||
39 | cmpui r2, #4 | ||
40 | bc byte_set | ||
41 | word_set: | ||
42 | and3 r1, r1, #0x00ff /* r1: abababab <-- ??????ab */ | ||
43 | sll3 r3, r1, #8 | ||
44 | or r1, r3 || addi r4, #-4 | ||
45 | sll3 r3, r1, #16 | ||
46 | or r1, r3 || addi r2, #-4 | ||
47 | word_set_loop: | ||
48 | st r1, @+r4 || addi r2, #-4 | ||
49 | bgtz r2, word_set_loop | ||
50 | bnez r2, byte_set_wrap | ||
51 | st r1, @+r4 | ||
52 | jmp r14 | ||
53 | |||
54 | qword_align_check: /* len >= 16 */ | ||
55 | and3 r3, r4, #15 | ||
56 | bnez r3, word_align_check | ||
57 | qword_set: | ||
58 | and3 r1, r1, #0x00ff /* r1: abababab <-- ??????ab */ | ||
59 | sll3 r3, r1, #8 | ||
60 | or r1, r3 || addi r4, #-4 | ||
61 | sll3 r3, r1, #16 | ||
62 | or r1, r3 || ldi r5, #16 | ||
63 | qword_set_loop: | ||
64 | ld r3, @(4,r4) /* cache line allocate */ | ||
65 | st r1, @+r4 || addi r2, #-16 | ||
66 | st r1, @+r4 || cmpu r2, r5 | ||
67 | st r1, @+r4 | ||
68 | st r1, @+r4 | ||
69 | bnc qword_set_loop || cmpz r2 | ||
70 | jc r14 | ||
71 | set_remainder: | ||
72 | cmpui r2, #4 | ||
73 | bc byte_set_wrap1 | ||
74 | addi r2, #-4 | ||
75 | bra word_set_loop | ||
76 | |||
77 | byte_set_wrap: | ||
78 | addi r2, #4 | ||
79 | cmpz r2 | ||
80 | jc r14 | ||
81 | byte_set_wrap1: | ||
82 | addi r4, #4 | ||
83 | #if defined(CONFIG_ISA_M32R2) | ||
84 | byte_set: | ||
85 | addi r2, #-1 || stb r1, @r4+ | ||
86 | bnez r2, byte_set | ||
87 | #elif defined(CONFIG_ISA_M32R) | ||
88 | byte_set: | ||
89 | addi r2, #-1 || stb r1, @r4 | ||
90 | addi r4, #1 | ||
91 | bnez r2, byte_set | ||
92 | #else | ||
93 | #error unknown isa configuration | ||
94 | #endif | ||
95 | end_memset: | ||
96 | jmp r14 | ||
97 | |||
98 | #else /* not CONFIG_ISA_DUAL_ISSUE */ | ||
99 | |||
100 | .align 4 | ||
101 | memset: | ||
102 | mv r4, r0 | ||
103 | beqz r2, end_memset | ||
104 | cmpui r2, #16 | ||
105 | bnc qword_align_check | ||
106 | cmpui r2, #4 | ||
107 | bc byte_set | ||
108 | word_align_check: /* len >= 4 */ | ||
109 | and3 r3, r4, #3 | ||
110 | beqz r3, word_set | ||
111 | addi r3, #-4 | ||
112 | neg r3, r3 /* r3 = -(r3 - 4) */ | ||
113 | align_word: | ||
114 | stb r1, @r4 | ||
115 | addi r4, #1 | ||
116 | addi r2, #-1 | ||
117 | addi r3, #-1 | ||
118 | bnez r3, align_word | ||
119 | cmpui r2, #4 | ||
120 | bc byte_set | ||
121 | word_set: | ||
122 | and3 r1, r1, #0x00ff /* r1: abababab <-- ??????ab */ | ||
123 | sll3 r3, r1, #8 | ||
124 | or r1, r3 | ||
125 | sll3 r3, r1, #16 | ||
126 | or r1, r3 | ||
127 | addi r2, #-4 | ||
128 | addi r4, #-4 | ||
129 | word_set_loop: | ||
130 | st r1, @+r4 | ||
131 | addi r2, #-4 | ||
132 | bgtz r2, word_set_loop | ||
133 | bnez r2, byte_set_wrap | ||
134 | st r1, @+r4 | ||
135 | jmp r14 | ||
136 | |||
137 | qword_align_check: /* len >= 16 */ | ||
138 | and3 r3, r4, #15 | ||
139 | bnez r3, word_align_check | ||
140 | qword_set: | ||
141 | and3 r1, r1, #0x00ff /* r1: abababab <-- ??????ab */ | ||
142 | sll3 r3, r1, #8 | ||
143 | or r1, r3 | ||
144 | sll3 r3, r1, #16 | ||
145 | or r1, r3 | ||
146 | addi r4, #-4 | ||
147 | qword_set_loop: | ||
148 | ld r3, @(4,r4) /* cache line allocate */ | ||
149 | addi r2, #-16 | ||
150 | st r1, @+r4 | ||
151 | st r1, @+r4 | ||
152 | cmpui r2, #16 | ||
153 | st r1, @+r4 | ||
154 | st r1, @+r4 | ||
155 | bnc qword_set_loop | ||
156 | bnez r2, set_remainder | ||
157 | jmp r14 | ||
158 | set_remainder: | ||
159 | cmpui r2, #4 | ||
160 | bc byte_set_wrap1 | ||
161 | addi r2, #-4 | ||
162 | bra word_set_loop | ||
163 | |||
164 | byte_set_wrap: | ||
165 | addi r2, #4 | ||
166 | beqz r2, end_memset | ||
167 | byte_set_wrap1: | ||
168 | addi r4, #4 | ||
169 | byte_set: | ||
170 | addi r2, #-1 | ||
171 | stb r1, @r4 | ||
172 | addi r4, #1 | ||
173 | bnez r2, byte_set | ||
174 | end_memset: | ||
175 | jmp r14 | ||
176 | |||
177 | #endif /* not CONFIG_ISA_DUAL_ISSUE */ | ||
178 | |||
179 | .end | ||
diff --git a/arch/m32r/lib/strlen.S b/arch/m32r/lib/strlen.S deleted file mode 100644 index 41c77e387593..000000000000 --- a/arch/m32r/lib/strlen.S +++ /dev/null | |||
@@ -1,118 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | /* | ||
3 | * linux/arch/m32r/strlen.S -- strlen code. | ||
4 | * | ||
5 | * Copyright (C) 2001 Hirokazu Takata | ||
6 | * | ||
7 | * size_t strlen(const char *s); | ||
8 | * | ||
9 | */ | ||
10 | |||
11 | #include <linux/linkage.h> | ||
12 | #include <asm/assembler.h> | ||
13 | |||
14 | #ifdef CONFIG_ISA_DUAL_ISSUE | ||
15 | |||
16 | .text | ||
17 | ENTRY(strlen) | ||
18 | mv r6, r0 || ldi r2, #0 | ||
19 | and3 r0, r0, #3 | ||
20 | bnez r0, strlen_byte | ||
21 | ; | ||
22 | strlen_word: | ||
23 | ld r0, @r6+ | ||
24 | ; | ||
25 | seth r5, #high(0x01010101) | ||
26 | or3 r5, r5, #low(0x01010101) | ||
27 | sll3 r7, r5, #7 | ||
28 | strlen_word_loop: | ||
29 | ld r1, @r6+ || not r4, r0 | ||
30 | sub r0, r5 || and r4, r7 | ||
31 | and r4, r0 | ||
32 | bnez r4, strlen_last_bytes | ||
33 | ld r0, @r6+ || not r4, r1 | ||
34 | sub r1, r5 || and r4, r7 | ||
35 | and r4, r1 || addi r2, #4 | ||
36 | bnez r4, strlen_last_bytes | ||
37 | addi r2, #4 || bra.s strlen_word_loop | ||
38 | |||
39 | ; NOTE: If a null char. exists, return 0. | ||
40 | ; if ((x - 0x01010101) & ~x & 0x80808080) | ||
41 | ; return 0; | ||
42 | ; | ||
43 | strlen_byte: | ||
44 | ldb r1, @r6 || addi r6, #1 | ||
45 | beqz r1, strlen_exit | ||
46 | addi r2, #1 || bra.s strlen_byte | ||
47 | ; | ||
48 | strlen_last_bytes: | ||
49 | ldi r0, #4 || addi r6, #-8 | ||
50 | ; | ||
51 | strlen_byte_loop: | ||
52 | ldb r1, @r6 || addi r6, #1 | ||
53 | addi r0, #-1 || cmpz r1 | ||
54 | bc.s strlen_exit || cmpz r0 | ||
55 | addi r2, #1 || bnc.s strlen_byte_loop | ||
56 | ; | ||
57 | strlen_exit: | ||
58 | mv r0, r2 || jmp r14 | ||
59 | |||
60 | #else /* not CONFIG_ISA_DUAL_ISSUE */ | ||
61 | |||
62 | .text | ||
63 | ENTRY(strlen) | ||
64 | mv r6, r0 | ||
65 | ldi r2, #0 | ||
66 | and3 r0, r0, #3 | ||
67 | bnez r0, strlen_byte | ||
68 | ; | ||
69 | strlen_word: | ||
70 | ld r0, @r6+ | ||
71 | ; | ||
72 | seth r5, #high(0x01010101) | ||
73 | or3 r5, r5, #low(0x01010101) | ||
74 | sll3 r7, r5, #7 | ||
75 | strlen_word_loop: | ||
76 | ld r1, @r6+ | ||
77 | not r4, r0 ; NOTE: If a null char. exists, return 0. | ||
78 | sub r0, r5 ; if ((x - 0x01010101) & ~x & 0x80808080) | ||
79 | and r4, r7 ; return 0; | ||
80 | and r4, r0 | ||
81 | bnez r4, strlen_last_bytes | ||
82 | addi r2, #4 | ||
83 | ; | ||
84 | ld r0, @r6+ | ||
85 | not r4, r1 ; NOTE: If a null char. exists, return 0. | ||
86 | sub r1, r5 ; if ((x - 0x01010101) & ~x & 0x80808080) | ||
87 | and r4, r7 ; return 0; | ||
88 | and r4, r1 | ||
89 | bnez r4, strlen_last_bytes | ||
90 | addi r2, #4 | ||
91 | bra strlen_word_loop | ||
92 | ; | ||
93 | strlen_byte: | ||
94 | ldb r1, @r6 | ||
95 | addi r6, #1 | ||
96 | beqz r1, strlen_exit | ||
97 | addi r2, #1 | ||
98 | bra strlen_byte | ||
99 | ; | ||
100 | strlen_last_bytes: | ||
101 | ldi r0, #4 | ||
102 | addi r6, #-8 | ||
103 | ; | ||
104 | strlen_byte_loop: | ||
105 | ldb r1, @r6 | ||
106 | addi r6, #1 | ||
107 | addi r0, #-1 | ||
108 | beqz r1, strlen_exit | ||
109 | addi r2, #1 | ||
110 | bnez r0, strlen_byte_loop | ||
111 | ; | ||
112 | strlen_exit: | ||
113 | mv r0, r2 | ||
114 | jmp r14 | ||
115 | |||
116 | #endif /* not CONFIG_ISA_DUAL_ISSUE */ | ||
117 | |||
118 | .end | ||
diff --git a/arch/m32r/lib/ucmpdi2.c b/arch/m32r/lib/ucmpdi2.c deleted file mode 100644 index e20fa3484fd8..000000000000 --- a/arch/m32r/lib/ucmpdi2.c +++ /dev/null | |||
@@ -1,18 +0,0 @@ | |||
1 | // SPDX-License-Identifier: GPL-2.0 | ||
2 | #include "libgcc.h" | ||
3 | |||
4 | int __ucmpdi2(unsigned long long a, unsigned long long b) | ||
5 | { | ||
6 | const DWunion au = {.ll = a}; | ||
7 | const DWunion bu = {.ll = b}; | ||
8 | |||
9 | if ((unsigned int)au.s.high < (unsigned int)bu.s.high) | ||
10 | return 0; | ||
11 | else if ((unsigned int)au.s.high > (unsigned int)bu.s.high) | ||
12 | return 2; | ||
13 | if ((unsigned int)au.s.low < (unsigned int)bu.s.low) | ||
14 | return 0; | ||
15 | else if ((unsigned int)au.s.low > (unsigned int)bu.s.low) | ||
16 | return 2; | ||
17 | return 1; | ||
18 | } | ||
diff --git a/arch/m32r/lib/usercopy.c b/arch/m32r/lib/usercopy.c deleted file mode 100644 index 0892a4341b3a..000000000000 --- a/arch/m32r/lib/usercopy.c +++ /dev/null | |||
@@ -1,362 +0,0 @@ | |||
1 | // SPDX-License-Identifier: GPL-2.0 | ||
2 | /* | ||
3 | * User address space access functions. | ||
4 | * The non inlined parts of asm-m32r/uaccess.h are here. | ||
5 | * | ||
6 | * Copyright 1997 Andi Kleen <ak@muc.de> | ||
7 | * Copyright 1997 Linus Torvalds | ||
8 | * Copyright 2001, 2002, 2004 Hirokazu Takata | ||
9 | */ | ||
10 | #include <linux/prefetch.h> | ||
11 | #include <linux/string.h> | ||
12 | #include <linux/thread_info.h> | ||
13 | #include <linux/uaccess.h> | ||
14 | |||
15 | /* | ||
16 | * Copy a null terminated string from userspace. | ||
17 | */ | ||
18 | |||
19 | #ifdef CONFIG_ISA_DUAL_ISSUE | ||
20 | |||
21 | #define __do_strncpy_from_user(dst,src,count,res) \ | ||
22 | do { \ | ||
23 | int __d0, __d1, __d2; \ | ||
24 | __asm__ __volatile__( \ | ||
25 | " beqz %1, 2f\n" \ | ||
26 | " .fillinsn\n" \ | ||
27 | "0: ldb r14, @%3 || addi %3, #1\n" \ | ||
28 | " stb r14, @%4 || addi %4, #1\n" \ | ||
29 | " beqz r14, 1f\n" \ | ||
30 | " addi %1, #-1\n" \ | ||
31 | " bnez %1, 0b\n" \ | ||
32 | " .fillinsn\n" \ | ||
33 | "1: sub %0, %1\n" \ | ||
34 | " .fillinsn\n" \ | ||
35 | "2:\n" \ | ||
36 | ".section .fixup,\"ax\"\n" \ | ||
37 | " .balign 4\n" \ | ||
38 | "3: seth r14, #high(2b)\n" \ | ||
39 | " or3 r14, r14, #low(2b)\n" \ | ||
40 | " jmp r14 || ldi %0, #%5\n" \ | ||
41 | ".previous\n" \ | ||
42 | ".section __ex_table,\"a\"\n" \ | ||
43 | " .balign 4\n" \ | ||
44 | " .long 0b,3b\n" \ | ||
45 | ".previous" \ | ||
46 | : "=&r"(res), "=&r"(count), "=&r" (__d0), "=&r" (__d1), \ | ||
47 | "=&r" (__d2) \ | ||
48 | : "i"(-EFAULT), "0"(count), "1"(count), "3"(src), \ | ||
49 | "4"(dst) \ | ||
50 | : "r14", "cbit", "memory"); \ | ||
51 | } while (0) | ||
52 | |||
53 | #else /* not CONFIG_ISA_DUAL_ISSUE */ | ||
54 | |||
55 | #define __do_strncpy_from_user(dst,src,count,res) \ | ||
56 | do { \ | ||
57 | int __d0, __d1, __d2; \ | ||
58 | __asm__ __volatile__( \ | ||
59 | " beqz %1, 2f\n" \ | ||
60 | " .fillinsn\n" \ | ||
61 | "0: ldb r14, @%3\n" \ | ||
62 | " stb r14, @%4\n" \ | ||
63 | " addi %3, #1\n" \ | ||
64 | " addi %4, #1\n" \ | ||
65 | " beqz r14, 1f\n" \ | ||
66 | " addi %1, #-1\n" \ | ||
67 | " bnez %1, 0b\n" \ | ||
68 | " .fillinsn\n" \ | ||
69 | "1: sub %0, %1\n" \ | ||
70 | " .fillinsn\n" \ | ||
71 | "2:\n" \ | ||
72 | ".section .fixup,\"ax\"\n" \ | ||
73 | " .balign 4\n" \ | ||
74 | "3: ldi %0, #%5\n" \ | ||
75 | " seth r14, #high(2b)\n" \ | ||
76 | " or3 r14, r14, #low(2b)\n" \ | ||
77 | " jmp r14\n" \ | ||
78 | ".previous\n" \ | ||
79 | ".section __ex_table,\"a\"\n" \ | ||
80 | " .balign 4\n" \ | ||
81 | " .long 0b,3b\n" \ | ||
82 | ".previous" \ | ||
83 | : "=&r"(res), "=&r"(count), "=&r" (__d0), "=&r" (__d1), \ | ||
84 | "=&r" (__d2) \ | ||
85 | : "i"(-EFAULT), "0"(count), "1"(count), "3"(src), \ | ||
86 | "4"(dst) \ | ||
87 | : "r14", "cbit", "memory"); \ | ||
88 | } while (0) | ||
89 | |||
90 | #endif /* CONFIG_ISA_DUAL_ISSUE */ | ||
91 | |||
92 | long | ||
93 | strncpy_from_user(char *dst, const char __user *src, long count) | ||
94 | { | ||
95 | long res = -EFAULT; | ||
96 | if (access_ok(VERIFY_READ, src, 1)) | ||
97 | __do_strncpy_from_user(dst, src, count, res); | ||
98 | return res; | ||
99 | } | ||
100 | |||
101 | |||
102 | /* | ||
103 | * Zero Userspace | ||
104 | */ | ||
105 | |||
106 | #ifdef CONFIG_ISA_DUAL_ISSUE | ||
107 | |||
108 | #define __do_clear_user(addr,size) \ | ||
109 | do { \ | ||
110 | int __dst, __c; \ | ||
111 | __asm__ __volatile__( \ | ||
112 | " beqz %1, 9f\n" \ | ||
113 | " and3 r14, %0, #3\n" \ | ||
114 | " bnez r14, 2f\n" \ | ||
115 | " and3 r14, %1, #3\n" \ | ||
116 | " bnez r14, 2f\n" \ | ||
117 | " and3 %1, %1, #3\n" \ | ||
118 | " beqz %2, 2f\n" \ | ||
119 | " addi %0, #-4\n" \ | ||
120 | " .fillinsn\n" \ | ||
121 | "0: ; word clear \n" \ | ||
122 | " st %6, @+%0 || addi %2, #-1\n" \ | ||
123 | " bnez %2, 0b\n" \ | ||
124 | " beqz %1, 9f\n" \ | ||
125 | " .fillinsn\n" \ | ||
126 | "2: ; byte clear \n" \ | ||
127 | " stb %6, @%0 || addi %1, #-1\n" \ | ||
128 | " addi %0, #1\n" \ | ||
129 | " bnez %1, 2b\n" \ | ||
130 | " .fillinsn\n" \ | ||
131 | "9:\n" \ | ||
132 | ".section .fixup,\"ax\"\n" \ | ||
133 | " .balign 4\n" \ | ||
134 | "4: slli %2, #2\n" \ | ||
135 | " seth r14, #high(9b)\n" \ | ||
136 | " or3 r14, r14, #low(9b)\n" \ | ||
137 | " jmp r14 || add %1, %2\n" \ | ||
138 | ".previous\n" \ | ||
139 | ".section __ex_table,\"a\"\n" \ | ||
140 | " .balign 4\n" \ | ||
141 | " .long 0b,4b\n" \ | ||
142 | " .long 2b,9b\n" \ | ||
143 | ".previous\n" \ | ||
144 | : "=&r"(__dst), "=&r"(size), "=&r"(__c) \ | ||
145 | : "0"(addr), "1"(size), "2"(size / 4), "r"(0) \ | ||
146 | : "r14", "cbit", "memory"); \ | ||
147 | } while (0) | ||
148 | |||
149 | #else /* not CONFIG_ISA_DUAL_ISSUE */ | ||
150 | |||
151 | #define __do_clear_user(addr,size) \ | ||
152 | do { \ | ||
153 | int __dst, __c; \ | ||
154 | __asm__ __volatile__( \ | ||
155 | " beqz %1, 9f\n" \ | ||
156 | " and3 r14, %0, #3\n" \ | ||
157 | " bnez r14, 2f\n" \ | ||
158 | " and3 r14, %1, #3\n" \ | ||
159 | " bnez r14, 2f\n" \ | ||
160 | " and3 %1, %1, #3\n" \ | ||
161 | " beqz %2, 2f\n" \ | ||
162 | " addi %0, #-4\n" \ | ||
163 | " .fillinsn\n" \ | ||
164 | "0: st %6, @+%0 ; word clear \n" \ | ||
165 | " addi %2, #-1\n" \ | ||
166 | " bnez %2, 0b\n" \ | ||
167 | " beqz %1, 9f\n" \ | ||
168 | " .fillinsn\n" \ | ||
169 | "2: stb %6, @%0 ; byte clear \n" \ | ||
170 | " addi %1, #-1\n" \ | ||
171 | " addi %0, #1\n" \ | ||
172 | " bnez %1, 2b\n" \ | ||
173 | " .fillinsn\n" \ | ||
174 | "9:\n" \ | ||
175 | ".section .fixup,\"ax\"\n" \ | ||
176 | " .balign 4\n" \ | ||
177 | "4: slli %2, #2\n" \ | ||
178 | " add %1, %2\n" \ | ||
179 | " seth r14, #high(9b)\n" \ | ||
180 | " or3 r14, r14, #low(9b)\n" \ | ||
181 | " jmp r14\n" \ | ||
182 | ".previous\n" \ | ||
183 | ".section __ex_table,\"a\"\n" \ | ||
184 | " .balign 4\n" \ | ||
185 | " .long 0b,4b\n" \ | ||
186 | " .long 2b,9b\n" \ | ||
187 | ".previous\n" \ | ||
188 | : "=&r"(__dst), "=&r"(size), "=&r"(__c) \ | ||
189 | : "0"(addr), "1"(size), "2"(size / 4), "r"(0) \ | ||
190 | : "r14", "cbit", "memory"); \ | ||
191 | } while (0) | ||
192 | |||
193 | #endif /* not CONFIG_ISA_DUAL_ISSUE */ | ||
194 | |||
195 | unsigned long | ||
196 | clear_user(void __user *to, unsigned long n) | ||
197 | { | ||
198 | if (access_ok(VERIFY_WRITE, to, n)) | ||
199 | __do_clear_user(to, n); | ||
200 | return n; | ||
201 | } | ||
202 | |||
203 | unsigned long | ||
204 | __clear_user(void __user *to, unsigned long n) | ||
205 | { | ||
206 | __do_clear_user(to, n); | ||
207 | return n; | ||
208 | } | ||
209 | |||
210 | /* | ||
211 | * Return the size of a string (including the ending 0) | ||
212 | * | ||
213 | * Return 0 on exception, a value greater than N if too long | ||
214 | */ | ||
215 | |||
216 | #ifdef CONFIG_ISA_DUAL_ISSUE | ||
217 | |||
218 | long strnlen_user(const char __user *s, long n) | ||
219 | { | ||
220 | unsigned long mask = -__addr_ok(s); | ||
221 | unsigned long res; | ||
222 | |||
223 | __asm__ __volatile__( | ||
224 | " and %0, %5 || mv r1, %1\n" | ||
225 | " beqz %0, strnlen_exit\n" | ||
226 | " and3 r0, %1, #3\n" | ||
227 | " bnez r0, strnlen_byte_loop\n" | ||
228 | " cmpui %0, #4\n" | ||
229 | " bc strnlen_byte_loop\n" | ||
230 | "strnlen_word_loop:\n" | ||
231 | "0: ld r0, @%1+\n" | ||
232 | " pcmpbz r0\n" | ||
233 | " bc strnlen_last_bytes_fixup\n" | ||
234 | " addi %0, #-4\n" | ||
235 | " beqz %0, strnlen_exit\n" | ||
236 | " bgtz %0, strnlen_word_loop\n" | ||
237 | "strnlen_last_bytes:\n" | ||
238 | " mv %0, %4\n" | ||
239 | "strnlen_last_bytes_fixup:\n" | ||
240 | " addi %1, #-4\n" | ||
241 | "strnlen_byte_loop:\n" | ||
242 | "1: ldb r0, @%1 || addi %0, #-1\n" | ||
243 | " beqz r0, strnlen_exit\n" | ||
244 | " addi %1, #1\n" | ||
245 | " bnez %0, strnlen_byte_loop\n" | ||
246 | "strnlen_exit:\n" | ||
247 | " sub %1, r1\n" | ||
248 | " add3 %0, %1, #1\n" | ||
249 | " .fillinsn\n" | ||
250 | "9:\n" | ||
251 | ".section .fixup,\"ax\"\n" | ||
252 | " .balign 4\n" | ||
253 | "4: addi %1, #-4\n" | ||
254 | " .fillinsn\n" | ||
255 | "5: seth r1, #high(9b)\n" | ||
256 | " or3 r1, r1, #low(9b)\n" | ||
257 | " jmp r1 || ldi %0, #0\n" | ||
258 | ".previous\n" | ||
259 | ".section __ex_table,\"a\"\n" | ||
260 | " .balign 4\n" | ||
261 | " .long 0b,4b\n" | ||
262 | " .long 1b,5b\n" | ||
263 | ".previous" | ||
264 | : "=&r" (res), "=r" (s) | ||
265 | : "0" (n), "1" (s), "r" (n & 3), "r" (mask), "r"(0x01010101) | ||
266 | : "r0", "r1", "cbit"); | ||
267 | |||
268 | /* NOTE: strnlen_user() algorithm: | ||
269 | * { | ||
270 | * char *p; | ||
271 | * for (p = s; n-- && *p != '\0'; ++p) | ||
272 | * ; | ||
273 | * return p - s + 1; | ||
274 | * } | ||
275 | */ | ||
276 | |||
277 | /* NOTE: If a null char. exists, return 0. | ||
278 | * if ((x - 0x01010101) & ~x & 0x80808080)\n" | ||
279 | * return 0;\n" | ||
280 | */ | ||
281 | |||
282 | return res & mask; | ||
283 | } | ||
284 | |||
285 | #else /* not CONFIG_ISA_DUAL_ISSUE */ | ||
286 | |||
287 | long strnlen_user(const char __user *s, long n) | ||
288 | { | ||
289 | unsigned long mask = -__addr_ok(s); | ||
290 | unsigned long res; | ||
291 | |||
292 | __asm__ __volatile__( | ||
293 | " and %0, %5\n" | ||
294 | " mv r1, %1\n" | ||
295 | " beqz %0, strnlen_exit\n" | ||
296 | " and3 r0, %1, #3\n" | ||
297 | " bnez r0, strnlen_byte_loop\n" | ||
298 | " cmpui %0, #4\n" | ||
299 | " bc strnlen_byte_loop\n" | ||
300 | " sll3 r3, %6, #7\n" | ||
301 | "strnlen_word_loop:\n" | ||
302 | "0: ld r0, @%1+\n" | ||
303 | " not r2, r0\n" | ||
304 | " sub r0, %6\n" | ||
305 | " and r2, r3\n" | ||
306 | " and r2, r0\n" | ||
307 | " bnez r2, strnlen_last_bytes_fixup\n" | ||
308 | " addi %0, #-4\n" | ||
309 | " beqz %0, strnlen_exit\n" | ||
310 | " bgtz %0, strnlen_word_loop\n" | ||
311 | "strnlen_last_bytes:\n" | ||
312 | " mv %0, %4\n" | ||
313 | "strnlen_last_bytes_fixup:\n" | ||
314 | " addi %1, #-4\n" | ||
315 | "strnlen_byte_loop:\n" | ||
316 | "1: ldb r0, @%1\n" | ||
317 | " addi %0, #-1\n" | ||
318 | " beqz r0, strnlen_exit\n" | ||
319 | " addi %1, #1\n" | ||
320 | " bnez %0, strnlen_byte_loop\n" | ||
321 | "strnlen_exit:\n" | ||
322 | " sub %1, r1\n" | ||
323 | " add3 %0, %1, #1\n" | ||
324 | " .fillinsn\n" | ||
325 | "9:\n" | ||
326 | ".section .fixup,\"ax\"\n" | ||
327 | " .balign 4\n" | ||
328 | "4: addi %1, #-4\n" | ||
329 | " .fillinsn\n" | ||
330 | "5: ldi %0, #0\n" | ||
331 | " seth r1, #high(9b)\n" | ||
332 | " or3 r1, r1, #low(9b)\n" | ||
333 | " jmp r1\n" | ||
334 | ".previous\n" | ||
335 | ".section __ex_table,\"a\"\n" | ||
336 | " .balign 4\n" | ||
337 | " .long 0b,4b\n" | ||
338 | " .long 1b,5b\n" | ||
339 | ".previous" | ||
340 | : "=&r" (res), "=r" (s) | ||
341 | : "0" (n), "1" (s), "r" (n & 3), "r" (mask), "r"(0x01010101) | ||
342 | : "r0", "r1", "r2", "r3", "cbit"); | ||
343 | |||
344 | /* NOTE: strnlen_user() algorithm: | ||
345 | * { | ||
346 | * char *p; | ||
347 | * for (p = s; n-- && *p != '\0'; ++p) | ||
348 | * ; | ||
349 | * return p - s + 1; | ||
350 | * } | ||
351 | */ | ||
352 | |||
353 | /* NOTE: If a null char. exists, return 0. | ||
354 | * if ((x - 0x01010101) & ~x & 0x80808080)\n" | ||
355 | * return 0;\n" | ||
356 | */ | ||
357 | |||
358 | return res & mask; | ||
359 | } | ||
360 | |||
361 | #endif /* CONFIG_ISA_DUAL_ISSUE */ | ||
362 | |||
diff --git a/arch/m32r/mm/Makefile b/arch/m32r/mm/Makefile deleted file mode 100644 index cb20d90c51d1..000000000000 --- a/arch/m32r/mm/Makefile +++ /dev/null | |||
@@ -1,13 +0,0 @@ | |||
1 | # SPDX-License-Identifier: GPL-2.0 | ||
2 | # | ||
3 | # Makefile for the Linux M32R-specific parts of the memory manager. | ||
4 | # | ||
5 | |||
6 | ifdef CONFIG_MMU | ||
7 | obj-y := init.o fault.o mmu.o extable.o ioremap.o cache.o page.o | ||
8 | else | ||
9 | obj-y := init.o fault-nommu.o mmu.o extable.o ioremap-nommu.o cache.o page.o | ||
10 | endif | ||
11 | |||
12 | obj-$(CONFIG_DISCONTIGMEM) += discontig.o | ||
13 | |||
diff --git a/arch/m32r/mm/cache.c b/arch/m32r/mm/cache.c deleted file mode 100644 index 0d1ae744e56f..000000000000 --- a/arch/m32r/mm/cache.c +++ /dev/null | |||
@@ -1,89 +0,0 @@ | |||
1 | // SPDX-License-Identifier: GPL-2.0 | ||
2 | /* | ||
3 | * linux/arch/m32r/mm/cache.c | ||
4 | * | ||
5 | * Copyright (C) 2002-2005 Hirokazu Takata, Hayato Fujiwara | ||
6 | */ | ||
7 | |||
8 | #include <asm/pgtable.h> | ||
9 | |||
10 | #undef MCCR | ||
11 | |||
12 | #if defined(CONFIG_CHIP_XNUX2) || defined(CONFIG_CHIP_M32700) \ | ||
13 | || defined(CONFIG_CHIP_VDEC2) || defined(CONFIG_CHIP_OPSP) | ||
14 | /* Cache Control Register */ | ||
15 | #define MCCR ((volatile unsigned long*)0xfffffffc) | ||
16 | #define MCCR_CC (1UL << 7) /* Cache mode modify bit */ | ||
17 | #define MCCR_IIV (1UL << 6) /* I-cache invalidate */ | ||
18 | #define MCCR_DIV (1UL << 5) /* D-cache invalidate */ | ||
19 | #define MCCR_DCB (1UL << 4) /* D-cache copy back */ | ||
20 | #define MCCR_ICM (1UL << 1) /* I-cache mode [0:off,1:on] */ | ||
21 | #define MCCR_DCM (1UL << 0) /* D-cache mode [0:off,1:on] */ | ||
22 | #define MCCR_ICACHE_INV (MCCR_CC|MCCR_IIV) | ||
23 | #define MCCR_DCACHE_CB (MCCR_CC|MCCR_DCB) | ||
24 | #define MCCR_DCACHE_CBINV (MCCR_CC|MCCR_DIV|MCCR_DCB) | ||
25 | #define CHECK_MCCR(mccr) (mccr = *MCCR) | ||
26 | #elif defined(CONFIG_CHIP_M32102) | ||
27 | #define MCCR ((volatile unsigned char*)0xfffffffe) | ||
28 | #define MCCR_IIV (1UL << 0) /* I-cache invalidate */ | ||
29 | #define MCCR_ICACHE_INV MCCR_IIV | ||
30 | #elif defined(CONFIG_CHIP_M32104) | ||
31 | #define MCCR ((volatile unsigned short*)0xfffffffe) | ||
32 | #define MCCR_IIV (1UL << 8) /* I-cache invalidate */ | ||
33 | #define MCCR_DIV (1UL << 9) /* D-cache invalidate */ | ||
34 | #define MCCR_DCB (1UL << 10) /* D-cache copy back */ | ||
35 | #define MCCR_ICM (1UL << 0) /* I-cache mode [0:off,1:on] */ | ||
36 | #define MCCR_DCM (1UL << 1) /* D-cache mode [0:off,1:on] */ | ||
37 | #define MCCR_ICACHE_INV MCCR_IIV | ||
38 | #define MCCR_DCACHE_CB MCCR_DCB | ||
39 | #define MCCR_DCACHE_CBINV (MCCR_DIV|MCCR_DCB) | ||
40 | #endif | ||
41 | |||
42 | #ifndef MCCR | ||
43 | #error Unknown cache type. | ||
44 | #endif | ||
45 | |||
46 | |||
47 | /* Copy back and invalidate D-cache and invalidate I-cache all */ | ||
48 | void _flush_cache_all(void) | ||
49 | { | ||
50 | #if defined(CONFIG_CHIP_M32102) | ||
51 | unsigned char mccr; | ||
52 | *MCCR = MCCR_ICACHE_INV; | ||
53 | #elif defined(CONFIG_CHIP_M32104) | ||
54 | unsigned short mccr; | ||
55 | |||
56 | /* Copyback and invalidate D-cache */ | ||
57 | /* Invalidate I-cache */ | ||
58 | *MCCR |= (MCCR_ICACHE_INV | MCCR_DCACHE_CBINV); | ||
59 | #else | ||
60 | unsigned long mccr; | ||
61 | |||
62 | /* Copyback and invalidate D-cache */ | ||
63 | /* Invalidate I-cache */ | ||
64 | *MCCR = MCCR_ICACHE_INV | MCCR_DCACHE_CBINV; | ||
65 | #endif | ||
66 | while ((mccr = *MCCR) & MCCR_IIV); /* loop while invalidating... */ | ||
67 | } | ||
68 | |||
69 | /* Copy back D-cache and invalidate I-cache all */ | ||
70 | void _flush_cache_copyback_all(void) | ||
71 | { | ||
72 | #if defined(CONFIG_CHIP_M32102) | ||
73 | unsigned char mccr; | ||
74 | *MCCR = MCCR_ICACHE_INV; | ||
75 | #elif defined(CONFIG_CHIP_M32104) | ||
76 | unsigned short mccr; | ||
77 | |||
78 | /* Copyback and invalidate D-cache */ | ||
79 | /* Invalidate I-cache */ | ||
80 | *MCCR |= (MCCR_ICACHE_INV | MCCR_DCACHE_CB); | ||
81 | #else | ||
82 | unsigned long mccr; | ||
83 | |||
84 | /* Copyback D-cache */ | ||
85 | /* Invalidate I-cache */ | ||
86 | *MCCR = MCCR_ICACHE_INV | MCCR_DCACHE_CB; | ||
87 | #endif | ||
88 | while ((mccr = *MCCR) & MCCR_IIV); /* loop while invalidating... */ | ||
89 | } | ||
diff --git a/arch/m32r/mm/discontig.c b/arch/m32r/mm/discontig.c deleted file mode 100644 index eb8e7966dcaf..000000000000 --- a/arch/m32r/mm/discontig.c +++ /dev/null | |||
@@ -1,163 +0,0 @@ | |||
1 | // SPDX-License-Identifier: GPL-2.0 | ||
2 | /* | ||
3 | * linux/arch/m32r/mm/discontig.c | ||
4 | * | ||
5 | * Discontig memory support | ||
6 | * | ||
7 | * Copyright (c) 2003 Hitoshi Yamamoto | ||
8 | */ | ||
9 | |||
10 | #include <linux/mm.h> | ||
11 | #include <linux/bootmem.h> | ||
12 | #include <linux/mmzone.h> | ||
13 | #include <linux/initrd.h> | ||
14 | #include <linux/nodemask.h> | ||
15 | #include <linux/module.h> | ||
16 | #include <linux/pfn.h> | ||
17 | |||
18 | #include <asm/setup.h> | ||
19 | |||
20 | extern char _end[]; | ||
21 | |||
22 | struct pglist_data *node_data[MAX_NUMNODES]; | ||
23 | EXPORT_SYMBOL(node_data); | ||
24 | |||
25 | pg_data_t m32r_node_data[MAX_NUMNODES]; | ||
26 | |||
27 | /* Memory profile */ | ||
28 | typedef struct { | ||
29 | unsigned long start_pfn; | ||
30 | unsigned long pages; | ||
31 | unsigned long holes; | ||
32 | unsigned long free_pfn; | ||
33 | } mem_prof_t; | ||
34 | static mem_prof_t mem_prof[MAX_NUMNODES]; | ||
35 | |||
36 | extern unsigned long memory_start; | ||
37 | extern unsigned long memory_end; | ||
38 | |||
39 | static void __init mem_prof_init(void) | ||
40 | { | ||
41 | unsigned long start_pfn, holes, free_pfn; | ||
42 | const unsigned long zone_alignment = 1UL << (MAX_ORDER - 1); | ||
43 | unsigned long ul; | ||
44 | mem_prof_t *mp; | ||
45 | |||
46 | /* Node#0 SDRAM */ | ||
47 | mp = &mem_prof[0]; | ||
48 | mp->start_pfn = PFN_UP(CONFIG_MEMORY_START); | ||
49 | mp->pages = PFN_DOWN(memory_end - memory_start); | ||
50 | mp->holes = 0; | ||
51 | mp->free_pfn = PFN_UP(__pa(_end)); | ||
52 | |||
53 | /* Node#1 internal SRAM */ | ||
54 | mp = &mem_prof[1]; | ||
55 | start_pfn = free_pfn = PFN_UP(CONFIG_IRAM_START); | ||
56 | holes = 0; | ||
57 | if (start_pfn & (zone_alignment - 1)) { | ||
58 | ul = zone_alignment; | ||
59 | while (start_pfn >= ul) | ||
60 | ul += zone_alignment; | ||
61 | |||
62 | start_pfn = ul - zone_alignment; | ||
63 | holes = free_pfn - start_pfn; | ||
64 | } | ||
65 | |||
66 | mp->start_pfn = start_pfn; | ||
67 | mp->pages = PFN_DOWN(CONFIG_IRAM_SIZE) + holes; | ||
68 | mp->holes = holes; | ||
69 | mp->free_pfn = PFN_UP(CONFIG_IRAM_START); | ||
70 | } | ||
71 | |||
72 | unsigned long __init setup_memory(void) | ||
73 | { | ||
74 | unsigned long bootmap_size; | ||
75 | unsigned long min_pfn; | ||
76 | int nid; | ||
77 | mem_prof_t *mp; | ||
78 | |||
79 | max_low_pfn = 0; | ||
80 | min_low_pfn = -1; | ||
81 | |||
82 | mem_prof_init(); | ||
83 | |||
84 | for_each_online_node(nid) { | ||
85 | mp = &mem_prof[nid]; | ||
86 | NODE_DATA(nid)=(pg_data_t *)&m32r_node_data[nid]; | ||
87 | NODE_DATA(nid)->bdata = &bootmem_node_data[nid]; | ||
88 | min_pfn = mp->start_pfn; | ||
89 | max_pfn = mp->start_pfn + mp->pages; | ||
90 | bootmap_size = init_bootmem_node(NODE_DATA(nid), mp->free_pfn, | ||
91 | mp->start_pfn, max_pfn); | ||
92 | |||
93 | free_bootmem_node(NODE_DATA(nid), PFN_PHYS(mp->start_pfn), | ||
94 | PFN_PHYS(mp->pages)); | ||
95 | |||
96 | reserve_bootmem_node(NODE_DATA(nid), PFN_PHYS(mp->start_pfn), | ||
97 | PFN_PHYS(mp->free_pfn - mp->start_pfn) + bootmap_size, | ||
98 | BOOTMEM_DEFAULT); | ||
99 | |||
100 | if (max_low_pfn < max_pfn) | ||
101 | max_low_pfn = max_pfn; | ||
102 | |||
103 | if (min_low_pfn > min_pfn) | ||
104 | min_low_pfn = min_pfn; | ||
105 | } | ||
106 | |||
107 | #ifdef CONFIG_BLK_DEV_INITRD | ||
108 | if (LOADER_TYPE && INITRD_START) { | ||
109 | if (INITRD_START + INITRD_SIZE <= PFN_PHYS(max_low_pfn)) { | ||
110 | reserve_bootmem_node(NODE_DATA(0), INITRD_START, | ||
111 | INITRD_SIZE, BOOTMEM_DEFAULT); | ||
112 | initrd_start = INITRD_START + PAGE_OFFSET; | ||
113 | initrd_end = initrd_start + INITRD_SIZE; | ||
114 | printk("initrd:start[%08lx],size[%08lx]\n", | ||
115 | initrd_start, INITRD_SIZE); | ||
116 | } else { | ||
117 | printk("initrd extends beyond end of memory " | ||
118 | "(0x%08lx > 0x%08llx)\ndisabling initrd\n", | ||
119 | INITRD_START + INITRD_SIZE, | ||
120 | (unsigned long long)PFN_PHYS(max_low_pfn)); | ||
121 | |||
122 | initrd_start = 0; | ||
123 | } | ||
124 | } | ||
125 | #endif /* CONFIG_BLK_DEV_INITRD */ | ||
126 | |||
127 | return max_low_pfn; | ||
128 | } | ||
129 | |||
130 | #define START_PFN(nid) (NODE_DATA(nid)->bdata->node_min_pfn) | ||
131 | #define MAX_LOW_PFN(nid) (NODE_DATA(nid)->bdata->node_low_pfn) | ||
132 | |||
133 | void __init zone_sizes_init(void) | ||
134 | { | ||
135 | unsigned long zones_size[MAX_NR_ZONES], zholes_size[MAX_NR_ZONES]; | ||
136 | unsigned long low, start_pfn; | ||
137 | int nid, i; | ||
138 | mem_prof_t *mp; | ||
139 | |||
140 | for_each_online_node(nid) { | ||
141 | mp = &mem_prof[nid]; | ||
142 | for (i = 0 ; i < MAX_NR_ZONES ; i++) { | ||
143 | zones_size[i] = 0; | ||
144 | zholes_size[i] = 0; | ||
145 | } | ||
146 | start_pfn = START_PFN(nid); | ||
147 | low = MAX_LOW_PFN(nid); | ||
148 | zones_size[ZONE_DMA] = low - start_pfn; | ||
149 | zholes_size[ZONE_DMA] = mp->holes; | ||
150 | |||
151 | node_set_state(nid, N_NORMAL_MEMORY); | ||
152 | free_area_init_node(nid, zones_size, start_pfn, zholes_size); | ||
153 | } | ||
154 | |||
155 | /* | ||
156 | * For test | ||
157 | * Use all area of internal RAM. | ||
158 | * see __alloc_pages() | ||
159 | */ | ||
160 | NODE_DATA(1)->node_zones->watermark[WMARK_MIN] = 0; | ||
161 | NODE_DATA(1)->node_zones->watermark[WMARK_LOW] = 0; | ||
162 | NODE_DATA(1)->node_zones->watermark[WMARK_HIGH] = 0; | ||
163 | } | ||
diff --git a/arch/m32r/mm/extable.c b/arch/m32r/mm/extable.c deleted file mode 100644 index 066982756a4e..000000000000 --- a/arch/m32r/mm/extable.c +++ /dev/null | |||
@@ -1,20 +0,0 @@ | |||
1 | // SPDX-License-Identifier: GPL-2.0 | ||
2 | /* | ||
3 | * linux/arch/m32r/mm/extable.c | ||
4 | */ | ||
5 | |||
6 | #include <linux/extable.h> | ||
7 | #include <linux/uaccess.h> | ||
8 | |||
9 | int fixup_exception(struct pt_regs *regs) | ||
10 | { | ||
11 | const struct exception_table_entry *fixup; | ||
12 | |||
13 | fixup = search_exception_tables(regs->bpc); | ||
14 | if (fixup) { | ||
15 | regs->bpc = fixup->fixup; | ||
16 | return 1; | ||
17 | } | ||
18 | |||
19 | return 0; | ||
20 | } | ||
diff --git a/arch/m32r/mm/fault-nommu.c b/arch/m32r/mm/fault-nommu.c deleted file mode 100644 index 240e00067d5e..000000000000 --- a/arch/m32r/mm/fault-nommu.c +++ /dev/null | |||
@@ -1,134 +0,0 @@ | |||
1 | // SPDX-License-Identifier: GPL-2.0 | ||
2 | /* | ||
3 | * linux/arch/m32r/mm/fault.c | ||
4 | * | ||
5 | * Copyright (c) 2001, 2002 Hitoshi Yamamoto, and H. Kondo | ||
6 | * | ||
7 | * Some code taken from i386 version. | ||
8 | * Copyright (C) 1995 Linus Torvalds | ||
9 | */ | ||
10 | |||
11 | #include <linux/signal.h> | ||
12 | #include <linux/sched.h> | ||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/errno.h> | ||
15 | #include <linux/string.h> | ||
16 | #include <linux/types.h> | ||
17 | #include <linux/ptrace.h> | ||
18 | #include <linux/mman.h> | ||
19 | #include <linux/mm.h> | ||
20 | #include <linux/smp.h> | ||
21 | #include <linux/interrupt.h> | ||
22 | #include <linux/init.h> | ||
23 | #include <linux/vt_kern.h> /* For unblank_screen() */ | ||
24 | |||
25 | #include <asm/m32r.h> | ||
26 | #include <linux/uaccess.h> | ||
27 | #include <asm/pgalloc.h> | ||
28 | #include <asm/pgtable.h> | ||
29 | #include <asm/hardirq.h> | ||
30 | #include <asm/mmu_context.h> | ||
31 | |||
32 | extern void die(const char *, struct pt_regs *, long); | ||
33 | |||
34 | #ifndef CONFIG_SMP | ||
35 | asmlinkage unsigned int tlb_entry_i_dat; | ||
36 | asmlinkage unsigned int tlb_entry_d_dat; | ||
37 | #define tlb_entry_i tlb_entry_i_dat | ||
38 | #define tlb_entry_d tlb_entry_d_dat | ||
39 | #else | ||
40 | unsigned int tlb_entry_i_dat[NR_CPUS]; | ||
41 | unsigned int tlb_entry_d_dat[NR_CPUS]; | ||
42 | #define tlb_entry_i tlb_entry_i_dat[smp_processor_id()] | ||
43 | #define tlb_entry_d tlb_entry_d_dat[smp_processor_id()] | ||
44 | #endif | ||
45 | |||
46 | void do_BUG(const char *file, int line) | ||
47 | { | ||
48 | bust_spinlocks(1); | ||
49 | printk("kernel BUG at %s:%d!\n", file, line); | ||
50 | } | ||
51 | |||
52 | /*======================================================================* | ||
53 | * do_page_fault() | ||
54 | *======================================================================* | ||
55 | * This routine handles page faults. It determines the address, | ||
56 | * and the problem, and then passes it off to one of the appropriate | ||
57 | * routines. | ||
58 | * | ||
59 | * ARGUMENT: | ||
60 | * regs : M32R SP reg. | ||
61 | * error_code : See below | ||
62 | * address : M32R MMU MDEVA reg. (Operand ACE) | ||
63 | * : M32R BPC reg. (Instruction ACE) | ||
64 | * | ||
65 | * error_code : | ||
66 | * bit 0 == 0 means no page found, 1 means protection fault | ||
67 | * bit 1 == 0 means read, 1 means write | ||
68 | * bit 2 == 0 means kernel, 1 means user-mode | ||
69 | *======================================================================*/ | ||
70 | asmlinkage void do_page_fault(struct pt_regs *regs, unsigned long error_code, | ||
71 | unsigned long address) | ||
72 | { | ||
73 | |||
74 | /* | ||
75 | * Oops. The kernel tried to access some bad page. We'll have to | ||
76 | * terminate things with extreme prejudice. | ||
77 | */ | ||
78 | |||
79 | bust_spinlocks(1); | ||
80 | |||
81 | if (address < PAGE_SIZE) | ||
82 | printk(KERN_ALERT "Unable to handle kernel NULL pointer dereference"); | ||
83 | else | ||
84 | printk(KERN_ALERT "Unable to handle kernel paging request"); | ||
85 | printk(" at virtual address %08lx\n",address); | ||
86 | printk(" printing bpc:\n"); | ||
87 | printk(KERN_ALERT "bpc = %08lx\n", regs->bpc); | ||
88 | |||
89 | die("Oops", regs, error_code); | ||
90 | bust_spinlocks(0); | ||
91 | do_exit(SIGKILL); | ||
92 | } | ||
93 | |||
94 | /*======================================================================* | ||
95 | * update_mmu_cache() | ||
96 | *======================================================================*/ | ||
97 | void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr, | ||
98 | pte_t *ptep) | ||
99 | { | ||
100 | BUG(); | ||
101 | } | ||
102 | |||
103 | /*======================================================================* | ||
104 | * flush_tlb_page() : flushes one page | ||
105 | *======================================================================*/ | ||
106 | void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long page) | ||
107 | { | ||
108 | BUG(); | ||
109 | } | ||
110 | |||
111 | /*======================================================================* | ||
112 | * flush_tlb_range() : flushes a range of pages | ||
113 | *======================================================================*/ | ||
114 | void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start, | ||
115 | unsigned long end) | ||
116 | { | ||
117 | BUG(); | ||
118 | } | ||
119 | |||
120 | /*======================================================================* | ||
121 | * flush_tlb_mm() : flushes the specified mm context TLB's | ||
122 | *======================================================================*/ | ||
123 | void local_flush_tlb_mm(struct mm_struct *mm) | ||
124 | { | ||
125 | BUG(); | ||
126 | } | ||
127 | |||
128 | /*======================================================================* | ||
129 | * flush_tlb_all() : flushes all processes TLBs | ||
130 | *======================================================================*/ | ||
131 | void local_flush_tlb_all(void) | ||
132 | { | ||
133 | BUG(); | ||
134 | } | ||
diff --git a/arch/m32r/mm/fault.c b/arch/m32r/mm/fault.c deleted file mode 100644 index 46d9a5ca0e3a..000000000000 --- a/arch/m32r/mm/fault.c +++ /dev/null | |||
@@ -1,550 +0,0 @@ | |||
1 | // SPDX-License-Identifier: GPL-2.0 | ||
2 | /* | ||
3 | * linux/arch/m32r/mm/fault.c | ||
4 | * | ||
5 | * Copyright (c) 2001, 2002 Hitoshi Yamamoto, and H. Kondo | ||
6 | * Copyright (c) 2004 Naoto Sugai, NIIBE Yutaka | ||
7 | * | ||
8 | * Some code taken from i386 version. | ||
9 | * Copyright (C) 1995 Linus Torvalds | ||
10 | */ | ||
11 | |||
12 | #include <linux/signal.h> | ||
13 | #include <linux/sched.h> | ||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/errno.h> | ||
16 | #include <linux/string.h> | ||
17 | #include <linux/types.h> | ||
18 | #include <linux/ptrace.h> | ||
19 | #include <linux/mman.h> | ||
20 | #include <linux/mm.h> | ||
21 | #include <linux/smp.h> | ||
22 | #include <linux/interrupt.h> | ||
23 | #include <linux/init.h> | ||
24 | #include <linux/tty.h> | ||
25 | #include <linux/vt_kern.h> /* For unblank_screen() */ | ||
26 | #include <linux/highmem.h> | ||
27 | #include <linux/extable.h> | ||
28 | #include <linux/uaccess.h> | ||
29 | |||
30 | #include <asm/m32r.h> | ||
31 | #include <asm/hardirq.h> | ||
32 | #include <asm/mmu_context.h> | ||
33 | #include <asm/tlbflush.h> | ||
34 | |||
35 | extern void die(const char *, struct pt_regs *, long); | ||
36 | |||
37 | #ifndef CONFIG_SMP | ||
38 | asmlinkage unsigned int tlb_entry_i_dat; | ||
39 | asmlinkage unsigned int tlb_entry_d_dat; | ||
40 | #define tlb_entry_i tlb_entry_i_dat | ||
41 | #define tlb_entry_d tlb_entry_d_dat | ||
42 | #else | ||
43 | unsigned int tlb_entry_i_dat[NR_CPUS]; | ||
44 | unsigned int tlb_entry_d_dat[NR_CPUS]; | ||
45 | #define tlb_entry_i tlb_entry_i_dat[smp_processor_id()] | ||
46 | #define tlb_entry_d tlb_entry_d_dat[smp_processor_id()] | ||
47 | #endif | ||
48 | |||
49 | extern void init_tlb(void); | ||
50 | |||
51 | /*======================================================================* | ||
52 | * do_page_fault() | ||
53 | *======================================================================* | ||
54 | * This routine handles page faults. It determines the address, | ||
55 | * and the problem, and then passes it off to one of the appropriate | ||
56 | * routines. | ||
57 | * | ||
58 | * ARGUMENT: | ||
59 | * regs : M32R SP reg. | ||
60 | * error_code : See below | ||
61 | * address : M32R MMU MDEVA reg. (Operand ACE) | ||
62 | * : M32R BPC reg. (Instruction ACE) | ||
63 | * | ||
64 | * error_code : | ||
65 | * bit 0 == 0 means no page found, 1 means protection fault | ||
66 | * bit 1 == 0 means read, 1 means write | ||
67 | * bit 2 == 0 means kernel, 1 means user-mode | ||
68 | * bit 3 == 0 means data, 1 means instruction | ||
69 | *======================================================================*/ | ||
70 | #define ACE_PROTECTION 1 | ||
71 | #define ACE_WRITE 2 | ||
72 | #define ACE_USERMODE 4 | ||
73 | #define ACE_INSTRUCTION 8 | ||
74 | |||
75 | asmlinkage void do_page_fault(struct pt_regs *regs, unsigned long error_code, | ||
76 | unsigned long address) | ||
77 | { | ||
78 | struct task_struct *tsk; | ||
79 | struct mm_struct *mm; | ||
80 | struct vm_area_struct * vma; | ||
81 | unsigned long page, addr; | ||
82 | unsigned long flags = 0; | ||
83 | int fault; | ||
84 | siginfo_t info; | ||
85 | |||
86 | /* | ||
87 | * If BPSW IE bit enable --> set PSW IE bit | ||
88 | */ | ||
89 | if (regs->psw & M32R_PSW_BIE) | ||
90 | local_irq_enable(); | ||
91 | |||
92 | tsk = current; | ||
93 | |||
94 | info.si_code = SEGV_MAPERR; | ||
95 | |||
96 | /* | ||
97 | * We fault-in kernel-space virtual memory on-demand. The | ||
98 | * 'reference' page table is init_mm.pgd. | ||
99 | * | ||
100 | * NOTE! We MUST NOT take any locks for this case. We may | ||
101 | * be in an interrupt or a critical region, and should | ||
102 | * only copy the information from the master page table, | ||
103 | * nothing more. | ||
104 | * | ||
105 | * This verifies that the fault happens in kernel space | ||
106 | * (error_code & ACE_USERMODE) == 0, and that the fault was not a | ||
107 | * protection error (error_code & ACE_PROTECTION) == 0. | ||
108 | */ | ||
109 | if (address >= TASK_SIZE && !(error_code & ACE_USERMODE)) | ||
110 | goto vmalloc_fault; | ||
111 | |||
112 | mm = tsk->mm; | ||
113 | |||
114 | /* | ||
115 | * If we're in an interrupt or have no user context or have pagefaults | ||
116 | * disabled then we must not take the fault. | ||
117 | */ | ||
118 | if (faulthandler_disabled() || !mm) | ||
119 | goto bad_area_nosemaphore; | ||
120 | |||
121 | if (error_code & ACE_USERMODE) | ||
122 | flags |= FAULT_FLAG_USER; | ||
123 | |||
124 | /* When running in the kernel we expect faults to occur only to | ||
125 | * addresses in user space. All other faults represent errors in the | ||
126 | * kernel and should generate an OOPS. Unfortunately, in the case of an | ||
127 | * erroneous fault occurring in a code path which already holds mmap_sem | ||
128 | * we will deadlock attempting to validate the fault against the | ||
129 | * address space. Luckily the kernel only validly references user | ||
130 | * space from well defined areas of code, which are listed in the | ||
131 | * exceptions table. | ||
132 | * | ||
133 | * As the vast majority of faults will be valid we will only perform | ||
134 | * the source reference check when there is a possibility of a deadlock. | ||
135 | * Attempt to lock the address space, if we cannot we then validate the | ||
136 | * source. If this is invalid we can skip the address space check, | ||
137 | * thus avoiding the deadlock. | ||
138 | */ | ||
139 | if (!down_read_trylock(&mm->mmap_sem)) { | ||
140 | if ((error_code & ACE_USERMODE) == 0 && | ||
141 | !search_exception_tables(regs->psw)) | ||
142 | goto bad_area_nosemaphore; | ||
143 | down_read(&mm->mmap_sem); | ||
144 | } | ||
145 | |||
146 | vma = find_vma(mm, address); | ||
147 | if (!vma) | ||
148 | goto bad_area; | ||
149 | if (vma->vm_start <= address) | ||
150 | goto good_area; | ||
151 | if (!(vma->vm_flags & VM_GROWSDOWN)) | ||
152 | goto bad_area; | ||
153 | |||
154 | if (error_code & ACE_USERMODE) { | ||
155 | /* | ||
156 | * accessing the stack below "spu" is always a bug. | ||
157 | * The "+ 4" is there due to the push instruction | ||
158 | * doing pre-decrement on the stack and that | ||
159 | * doesn't show up until later.. | ||
160 | */ | ||
161 | if (address + 4 < regs->spu) | ||
162 | goto bad_area; | ||
163 | } | ||
164 | |||
165 | if (expand_stack(vma, address)) | ||
166 | goto bad_area; | ||
167 | /* | ||
168 | * Ok, we have a good vm_area for this memory access, so | ||
169 | * we can handle it.. | ||
170 | */ | ||
171 | good_area: | ||
172 | info.si_code = SEGV_ACCERR; | ||
173 | switch (error_code & (ACE_WRITE|ACE_PROTECTION)) { | ||
174 | default: /* 3: write, present */ | ||
175 | /* fall through */ | ||
176 | case ACE_WRITE: /* write, not present */ | ||
177 | if (!(vma->vm_flags & VM_WRITE)) | ||
178 | goto bad_area; | ||
179 | flags |= FAULT_FLAG_WRITE; | ||
180 | break; | ||
181 | case ACE_PROTECTION: /* read, present */ | ||
182 | case 0: /* read, not present */ | ||
183 | if (!(vma->vm_flags & (VM_READ | VM_EXEC))) | ||
184 | goto bad_area; | ||
185 | } | ||
186 | |||
187 | /* | ||
188 | * For instruction access exception, check if the area is executable | ||
189 | */ | ||
190 | if ((error_code & ACE_INSTRUCTION) && !(vma->vm_flags & VM_EXEC)) | ||
191 | goto bad_area; | ||
192 | |||
193 | /* | ||
194 | * If for any reason at all we couldn't handle the fault, | ||
195 | * make sure we exit gracefully rather than endlessly redo | ||
196 | * the fault. | ||
197 | */ | ||
198 | addr = (address & PAGE_MASK); | ||
199 | set_thread_fault_code(error_code); | ||
200 | fault = handle_mm_fault(vma, addr, flags); | ||
201 | if (unlikely(fault & VM_FAULT_ERROR)) { | ||
202 | if (fault & VM_FAULT_OOM) | ||
203 | goto out_of_memory; | ||
204 | else if (fault & VM_FAULT_SIGSEGV) | ||
205 | goto bad_area; | ||
206 | else if (fault & VM_FAULT_SIGBUS) | ||
207 | goto do_sigbus; | ||
208 | BUG(); | ||
209 | } | ||
210 | if (fault & VM_FAULT_MAJOR) | ||
211 | tsk->maj_flt++; | ||
212 | else | ||
213 | tsk->min_flt++; | ||
214 | set_thread_fault_code(0); | ||
215 | up_read(&mm->mmap_sem); | ||
216 | return; | ||
217 | |||
218 | /* | ||
219 | * Something tried to access memory that isn't in our memory map.. | ||
220 | * Fix it, but check if it's kernel or user first.. | ||
221 | */ | ||
222 | bad_area: | ||
223 | up_read(&mm->mmap_sem); | ||
224 | |||
225 | bad_area_nosemaphore: | ||
226 | /* User mode accesses just cause a SIGSEGV */ | ||
227 | if (error_code & ACE_USERMODE) { | ||
228 | tsk->thread.address = address; | ||
229 | tsk->thread.error_code = error_code | (address >= TASK_SIZE); | ||
230 | tsk->thread.trap_no = 14; | ||
231 | info.si_signo = SIGSEGV; | ||
232 | info.si_errno = 0; | ||
233 | /* info.si_code has been set above */ | ||
234 | info.si_addr = (void __user *)address; | ||
235 | force_sig_info(SIGSEGV, &info, tsk); | ||
236 | return; | ||
237 | } | ||
238 | |||
239 | no_context: | ||
240 | /* Are we prepared to handle this kernel fault? */ | ||
241 | if (fixup_exception(regs)) | ||
242 | return; | ||
243 | |||
244 | /* | ||
245 | * Oops. The kernel tried to access some bad page. We'll have to | ||
246 | * terminate things with extreme prejudice. | ||
247 | */ | ||
248 | |||
249 | bust_spinlocks(1); | ||
250 | |||
251 | if (address < PAGE_SIZE) | ||
252 | printk(KERN_ALERT "Unable to handle kernel NULL pointer dereference"); | ||
253 | else | ||
254 | printk(KERN_ALERT "Unable to handle kernel paging request"); | ||
255 | printk(" at virtual address %08lx\n",address); | ||
256 | printk(KERN_ALERT " printing bpc:\n"); | ||
257 | printk("%08lx\n", regs->bpc); | ||
258 | page = *(unsigned long *)MPTB; | ||
259 | page = ((unsigned long *) page)[address >> PGDIR_SHIFT]; | ||
260 | printk(KERN_ALERT "*pde = %08lx\n", page); | ||
261 | if (page & _PAGE_PRESENT) { | ||
262 | page &= PAGE_MASK; | ||
263 | address &= 0x003ff000; | ||
264 | page = ((unsigned long *) __va(page))[address >> PAGE_SHIFT]; | ||
265 | printk(KERN_ALERT "*pte = %08lx\n", page); | ||
266 | } | ||
267 | die("Oops", regs, error_code); | ||
268 | bust_spinlocks(0); | ||
269 | do_exit(SIGKILL); | ||
270 | |||
271 | /* | ||
272 | * We ran out of memory, or some other thing happened to us that made | ||
273 | * us unable to handle the page fault gracefully. | ||
274 | */ | ||
275 | out_of_memory: | ||
276 | up_read(&mm->mmap_sem); | ||
277 | if (!(error_code & ACE_USERMODE)) | ||
278 | goto no_context; | ||
279 | pagefault_out_of_memory(); | ||
280 | return; | ||
281 | |||
282 | do_sigbus: | ||
283 | up_read(&mm->mmap_sem); | ||
284 | |||
285 | /* Kernel mode? Handle exception or die */ | ||
286 | if (!(error_code & ACE_USERMODE)) | ||
287 | goto no_context; | ||
288 | |||
289 | tsk->thread.address = address; | ||
290 | tsk->thread.error_code = error_code; | ||
291 | tsk->thread.trap_no = 14; | ||
292 | info.si_signo = SIGBUS; | ||
293 | info.si_errno = 0; | ||
294 | info.si_code = BUS_ADRERR; | ||
295 | info.si_addr = (void __user *)address; | ||
296 | force_sig_info(SIGBUS, &info, tsk); | ||
297 | return; | ||
298 | |||
299 | vmalloc_fault: | ||
300 | { | ||
301 | /* | ||
302 | * Synchronize this task's top level page-table | ||
303 | * with the 'reference' page table. | ||
304 | * | ||
305 | * Do _not_ use "tsk" here. We might be inside | ||
306 | * an interrupt in the middle of a task switch.. | ||
307 | */ | ||
308 | int offset = pgd_index(address); | ||
309 | pgd_t *pgd, *pgd_k; | ||
310 | pmd_t *pmd, *pmd_k; | ||
311 | pte_t *pte_k; | ||
312 | |||
313 | pgd = (pgd_t *)*(unsigned long *)MPTB; | ||
314 | pgd = offset + (pgd_t *)pgd; | ||
315 | pgd_k = init_mm.pgd + offset; | ||
316 | |||
317 | if (!pgd_present(*pgd_k)) | ||
318 | goto no_context; | ||
319 | |||
320 | /* | ||
321 | * set_pgd(pgd, *pgd_k); here would be useless on PAE | ||
322 | * and redundant with the set_pmd() on non-PAE. | ||
323 | */ | ||
324 | |||
325 | pmd = pmd_offset(pgd, address); | ||
326 | pmd_k = pmd_offset(pgd_k, address); | ||
327 | if (!pmd_present(*pmd_k)) | ||
328 | goto no_context; | ||
329 | set_pmd(pmd, *pmd_k); | ||
330 | |||
331 | pte_k = pte_offset_kernel(pmd_k, address); | ||
332 | if (!pte_present(*pte_k)) | ||
333 | goto no_context; | ||
334 | |||
335 | addr = (address & PAGE_MASK); | ||
336 | set_thread_fault_code(error_code); | ||
337 | update_mmu_cache(NULL, addr, pte_k); | ||
338 | set_thread_fault_code(0); | ||
339 | return; | ||
340 | } | ||
341 | } | ||
342 | |||
343 | /*======================================================================* | ||
344 | * update_mmu_cache() | ||
345 | *======================================================================*/ | ||
346 | #define TLB_MASK (NR_TLB_ENTRIES - 1) | ||
347 | #define ITLB_END (unsigned long *)(ITLB_BASE + (NR_TLB_ENTRIES * 8)) | ||
348 | #define DTLB_END (unsigned long *)(DTLB_BASE + (NR_TLB_ENTRIES * 8)) | ||
349 | void update_mmu_cache(struct vm_area_struct *vma, unsigned long vaddr, | ||
350 | pte_t *ptep) | ||
351 | { | ||
352 | volatile unsigned long *entry1, *entry2; | ||
353 | unsigned long pte_data, flags; | ||
354 | unsigned int *entry_dat; | ||
355 | int inst = get_thread_fault_code() & ACE_INSTRUCTION; | ||
356 | int i; | ||
357 | |||
358 | /* Ptrace may call this routine. */ | ||
359 | if (vma && current->active_mm != vma->vm_mm) | ||
360 | return; | ||
361 | |||
362 | local_irq_save(flags); | ||
363 | |||
364 | vaddr = (vaddr & PAGE_MASK) | get_asid(); | ||
365 | |||
366 | pte_data = pte_val(*ptep); | ||
367 | |||
368 | #ifdef CONFIG_CHIP_OPSP | ||
369 | entry1 = (unsigned long *)ITLB_BASE; | ||
370 | for (i = 0; i < NR_TLB_ENTRIES; i++) { | ||
371 | if (*entry1++ == vaddr) { | ||
372 | set_tlb_data(entry1, pte_data); | ||
373 | break; | ||
374 | } | ||
375 | entry1++; | ||
376 | } | ||
377 | entry2 = (unsigned long *)DTLB_BASE; | ||
378 | for (i = 0; i < NR_TLB_ENTRIES; i++) { | ||
379 | if (*entry2++ == vaddr) { | ||
380 | set_tlb_data(entry2, pte_data); | ||
381 | break; | ||
382 | } | ||
383 | entry2++; | ||
384 | } | ||
385 | #else | ||
386 | /* | ||
387 | * Update TLB entries | ||
388 | * entry1: ITLB entry address | ||
389 | * entry2: DTLB entry address | ||
390 | */ | ||
391 | __asm__ __volatile__ ( | ||
392 | "seth %0, #high(%4) \n\t" | ||
393 | "st %2, @(%5, %0) \n\t" | ||
394 | "ldi %1, #1 \n\t" | ||
395 | "st %1, @(%6, %0) \n\t" | ||
396 | "add3 r4, %0, %7 \n\t" | ||
397 | ".fillinsn \n" | ||
398 | "1: \n\t" | ||
399 | "ld %1, @(%6, %0) \n\t" | ||
400 | "bnez %1, 1b \n\t" | ||
401 | "ld %0, @r4+ \n\t" | ||
402 | "ld %1, @r4 \n\t" | ||
403 | "st %3, @+%0 \n\t" | ||
404 | "st %3, @+%1 \n\t" | ||
405 | : "=&r" (entry1), "=&r" (entry2) | ||
406 | : "r" (vaddr), "r" (pte_data), "i" (MMU_REG_BASE), | ||
407 | "i" (MSVA_offset), "i" (MTOP_offset), "i" (MIDXI_offset) | ||
408 | : "r4", "memory" | ||
409 | ); | ||
410 | #endif | ||
411 | |||
412 | if ((!inst && entry2 >= DTLB_END) || (inst && entry1 >= ITLB_END)) | ||
413 | goto notfound; | ||
414 | |||
415 | found: | ||
416 | local_irq_restore(flags); | ||
417 | |||
418 | return; | ||
419 | |||
420 | /* Valid entry not found */ | ||
421 | notfound: | ||
422 | /* | ||
423 | * Update ITLB or DTLB entry | ||
424 | * entry1: TLB entry address | ||
425 | * entry2: TLB base address | ||
426 | */ | ||
427 | if (!inst) { | ||
428 | entry2 = (unsigned long *)DTLB_BASE; | ||
429 | entry_dat = &tlb_entry_d; | ||
430 | } else { | ||
431 | entry2 = (unsigned long *)ITLB_BASE; | ||
432 | entry_dat = &tlb_entry_i; | ||
433 | } | ||
434 | entry1 = entry2 + (((*entry_dat - 1) & TLB_MASK) << 1); | ||
435 | |||
436 | for (i = 0 ; i < NR_TLB_ENTRIES ; i++) { | ||
437 | if (!(entry1[1] & 2)) /* Valid bit check */ | ||
438 | break; | ||
439 | |||
440 | if (entry1 != entry2) | ||
441 | entry1 -= 2; | ||
442 | else | ||
443 | entry1 += TLB_MASK << 1; | ||
444 | } | ||
445 | |||
446 | if (i >= NR_TLB_ENTRIES) { /* Empty entry not found */ | ||
447 | entry1 = entry2 + (*entry_dat << 1); | ||
448 | *entry_dat = (*entry_dat + 1) & TLB_MASK; | ||
449 | } | ||
450 | *entry1++ = vaddr; /* Set TLB tag */ | ||
451 | set_tlb_data(entry1, pte_data); | ||
452 | |||
453 | goto found; | ||
454 | } | ||
455 | |||
456 | /*======================================================================* | ||
457 | * flush_tlb_page() : flushes one page | ||
458 | *======================================================================*/ | ||
459 | void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long page) | ||
460 | { | ||
461 | if (vma->vm_mm && mm_context(vma->vm_mm) != NO_CONTEXT) { | ||
462 | unsigned long flags; | ||
463 | |||
464 | local_irq_save(flags); | ||
465 | page &= PAGE_MASK; | ||
466 | page |= (mm_context(vma->vm_mm) & MMU_CONTEXT_ASID_MASK); | ||
467 | __flush_tlb_page(page); | ||
468 | local_irq_restore(flags); | ||
469 | } | ||
470 | } | ||
471 | |||
472 | /*======================================================================* | ||
473 | * flush_tlb_range() : flushes a range of pages | ||
474 | *======================================================================*/ | ||
475 | void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start, | ||
476 | unsigned long end) | ||
477 | { | ||
478 | struct mm_struct *mm; | ||
479 | |||
480 | mm = vma->vm_mm; | ||
481 | if (mm_context(mm) != NO_CONTEXT) { | ||
482 | unsigned long flags; | ||
483 | int size; | ||
484 | |||
485 | local_irq_save(flags); | ||
486 | size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT; | ||
487 | if (size > (NR_TLB_ENTRIES / 4)) { /* Too many TLB to flush */ | ||
488 | mm_context(mm) = NO_CONTEXT; | ||
489 | if (mm == current->mm) | ||
490 | activate_context(mm); | ||
491 | } else { | ||
492 | unsigned long asid; | ||
493 | |||
494 | asid = mm_context(mm) & MMU_CONTEXT_ASID_MASK; | ||
495 | start &= PAGE_MASK; | ||
496 | end += (PAGE_SIZE - 1); | ||
497 | end &= PAGE_MASK; | ||
498 | |||
499 | start |= asid; | ||
500 | end |= asid; | ||
501 | while (start < end) { | ||
502 | __flush_tlb_page(start); | ||
503 | start += PAGE_SIZE; | ||
504 | } | ||
505 | } | ||
506 | local_irq_restore(flags); | ||
507 | } | ||
508 | } | ||
509 | |||
510 | /*======================================================================* | ||
511 | * flush_tlb_mm() : flushes the specified mm context TLB's | ||
512 | *======================================================================*/ | ||
513 | void local_flush_tlb_mm(struct mm_struct *mm) | ||
514 | { | ||
515 | /* Invalidate all TLB of this process. */ | ||
516 | /* Instead of invalidating each TLB, we get new MMU context. */ | ||
517 | if (mm_context(mm) != NO_CONTEXT) { | ||
518 | unsigned long flags; | ||
519 | |||
520 | local_irq_save(flags); | ||
521 | mm_context(mm) = NO_CONTEXT; | ||
522 | if (mm == current->mm) | ||
523 | activate_context(mm); | ||
524 | local_irq_restore(flags); | ||
525 | } | ||
526 | } | ||
527 | |||
528 | /*======================================================================* | ||
529 | * flush_tlb_all() : flushes all processes TLBs | ||
530 | *======================================================================*/ | ||
531 | void local_flush_tlb_all(void) | ||
532 | { | ||
533 | unsigned long flags; | ||
534 | |||
535 | local_irq_save(flags); | ||
536 | __flush_tlb_all(); | ||
537 | local_irq_restore(flags); | ||
538 | } | ||
539 | |||
540 | /*======================================================================* | ||
541 | * init_mmu() | ||
542 | *======================================================================*/ | ||
543 | void __init init_mmu(void) | ||
544 | { | ||
545 | tlb_entry_i = 0; | ||
546 | tlb_entry_d = 0; | ||
547 | mmu_context_cache = MMU_CONTEXT_FIRST_VERSION; | ||
548 | set_asid(mmu_context_cache & MMU_CONTEXT_ASID_MASK); | ||
549 | *(volatile unsigned long *)MPTB = (unsigned long)swapper_pg_dir; | ||
550 | } | ||
diff --git a/arch/m32r/mm/init.c b/arch/m32r/mm/init.c deleted file mode 100644 index 93abc8c3a46e..000000000000 --- a/arch/m32r/mm/init.c +++ /dev/null | |||
@@ -1,152 +0,0 @@ | |||
1 | // SPDX-License-Identifier: GPL-2.0 | ||
2 | /* | ||
3 | * linux/arch/m32r/mm/init.c | ||
4 | * | ||
5 | * Copyright (c) 2001, 2002 Hitoshi Yamamoto | ||
6 | * | ||
7 | * Some code taken from sh version. | ||
8 | * Copyright (C) 1999 Niibe Yutaka | ||
9 | * Based on linux/arch/i386/mm/init.c: | ||
10 | * Copyright (C) 1995 Linus Torvalds | ||
11 | */ | ||
12 | |||
13 | #include <linux/init.h> | ||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/mm.h> | ||
16 | #include <linux/pagemap.h> | ||
17 | #include <linux/bootmem.h> | ||
18 | #include <linux/swap.h> | ||
19 | #include <linux/highmem.h> | ||
20 | #include <linux/bitops.h> | ||
21 | #include <linux/nodemask.h> | ||
22 | #include <linux/pfn.h> | ||
23 | #include <linux/gfp.h> | ||
24 | #include <asm/types.h> | ||
25 | #include <asm/processor.h> | ||
26 | #include <asm/page.h> | ||
27 | #include <asm/pgtable.h> | ||
28 | #include <asm/pgalloc.h> | ||
29 | #include <asm/mmu_context.h> | ||
30 | #include <asm/setup.h> | ||
31 | #include <asm/tlb.h> | ||
32 | #include <asm/sections.h> | ||
33 | |||
34 | pgd_t swapper_pg_dir[1024]; | ||
35 | |||
36 | /* | ||
37 | * Cache of MMU context last used. | ||
38 | */ | ||
39 | #ifndef CONFIG_SMP | ||
40 | unsigned long mmu_context_cache_dat; | ||
41 | #else | ||
42 | unsigned long mmu_context_cache_dat[NR_CPUS]; | ||
43 | #endif | ||
44 | |||
45 | /* | ||
46 | * function prototype | ||
47 | */ | ||
48 | void __init paging_init(void); | ||
49 | void __init mem_init(void); | ||
50 | void free_initmem(void); | ||
51 | #ifdef CONFIG_BLK_DEV_INITRD | ||
52 | void free_initrd_mem(unsigned long, unsigned long); | ||
53 | #endif | ||
54 | |||
55 | /* It'd be good if these lines were in the standard header file. */ | ||
56 | #define START_PFN(nid) (NODE_DATA(nid)->bdata->node_min_pfn) | ||
57 | #define MAX_LOW_PFN(nid) (NODE_DATA(nid)->bdata->node_low_pfn) | ||
58 | |||
59 | #ifndef CONFIG_DISCONTIGMEM | ||
60 | void __init zone_sizes_init(void) | ||
61 | { | ||
62 | unsigned long zones_size[MAX_NR_ZONES] = {0, }; | ||
63 | unsigned long start_pfn; | ||
64 | |||
65 | #ifdef CONFIG_MMU | ||
66 | { | ||
67 | unsigned long low; | ||
68 | unsigned long max_dma; | ||
69 | |||
70 | start_pfn = START_PFN(0); | ||
71 | max_dma = virt_to_phys((char *)MAX_DMA_ADDRESS) >> PAGE_SHIFT; | ||
72 | low = MAX_LOW_PFN(0); | ||
73 | |||
74 | if (low < max_dma) { | ||
75 | zones_size[ZONE_DMA] = low - start_pfn; | ||
76 | zones_size[ZONE_NORMAL] = 0; | ||
77 | } else { | ||
78 | zones_size[ZONE_DMA] = low - start_pfn; | ||
79 | zones_size[ZONE_NORMAL] = low - max_dma; | ||
80 | } | ||
81 | } | ||
82 | #else | ||
83 | zones_size[ZONE_DMA] = 0 >> PAGE_SHIFT; | ||
84 | zones_size[ZONE_NORMAL] = __MEMORY_SIZE >> PAGE_SHIFT; | ||
85 | start_pfn = __MEMORY_START >> PAGE_SHIFT; | ||
86 | #endif /* CONFIG_MMU */ | ||
87 | |||
88 | free_area_init_node(0, zones_size, start_pfn, 0); | ||
89 | } | ||
90 | #else /* CONFIG_DISCONTIGMEM */ | ||
91 | extern void zone_sizes_init(void); | ||
92 | #endif /* CONFIG_DISCONTIGMEM */ | ||
93 | |||
94 | /*======================================================================* | ||
95 | * paging_init() : sets up the page tables | ||
96 | *======================================================================*/ | ||
97 | void __init paging_init(void) | ||
98 | { | ||
99 | #ifdef CONFIG_MMU | ||
100 | int i; | ||
101 | pgd_t *pg_dir; | ||
102 | |||
103 | /* We don't need kernel mapping as hardware support that. */ | ||
104 | pg_dir = swapper_pg_dir; | ||
105 | |||
106 | for (i = 0 ; i < USER_PTRS_PER_PGD * 2 ; i++) | ||
107 | pgd_val(pg_dir[i]) = 0; | ||
108 | #endif /* CONFIG_MMU */ | ||
109 | zone_sizes_init(); | ||
110 | } | ||
111 | |||
112 | /*======================================================================* | ||
113 | * mem_init() : | ||
114 | * orig : arch/sh/mm/init.c | ||
115 | *======================================================================*/ | ||
116 | void __init mem_init(void) | ||
117 | { | ||
118 | #ifndef CONFIG_MMU | ||
119 | extern unsigned long memory_end; | ||
120 | |||
121 | high_memory = (void *)(memory_end & PAGE_MASK); | ||
122 | #else | ||
123 | high_memory = (void *)__va(PFN_PHYS(MAX_LOW_PFN(0))); | ||
124 | #endif /* CONFIG_MMU */ | ||
125 | |||
126 | /* clear the zero-page */ | ||
127 | memset(empty_zero_page, 0, PAGE_SIZE); | ||
128 | |||
129 | set_max_mapnr(get_num_physpages()); | ||
130 | free_all_bootmem(); | ||
131 | mem_init_print_info(NULL); | ||
132 | } | ||
133 | |||
134 | /*======================================================================* | ||
135 | * free_initmem() : | ||
136 | * orig : arch/sh/mm/init.c | ||
137 | *======================================================================*/ | ||
138 | void free_initmem(void) | ||
139 | { | ||
140 | free_initmem_default(-1); | ||
141 | } | ||
142 | |||
143 | #ifdef CONFIG_BLK_DEV_INITRD | ||
144 | /*======================================================================* | ||
145 | * free_initrd_mem() : | ||
146 | * orig : arch/sh/mm/init.c | ||
147 | *======================================================================*/ | ||
148 | void free_initrd_mem(unsigned long start, unsigned long end) | ||
149 | { | ||
150 | free_reserved_area((void *)start, (void *)end, -1, "initrd"); | ||
151 | } | ||
152 | #endif | ||
diff --git a/arch/m32r/mm/ioremap-nommu.c b/arch/m32r/mm/ioremap-nommu.c deleted file mode 100644 index 2759f2d48384..000000000000 --- a/arch/m32r/mm/ioremap-nommu.c +++ /dev/null | |||
@@ -1,52 +0,0 @@ | |||
1 | /* | ||
2 | * linux/arch/m32r/mm/ioremap-nommu.c | ||
3 | * | ||
4 | * Copyright (c) 2001, 2002 Hiroyuki Kondo | ||
5 | * | ||
6 | * Taken from mips version. | ||
7 | * (C) Copyright 1995 1996 Linus Torvalds | ||
8 | * (C) Copyright 2001 Ralf Baechle | ||
9 | */ | ||
10 | |||
11 | /* | ||
12 | * This file is subject to the terms and conditions of the GNU General Public | ||
13 | * License. See the file "COPYING" in the main directory of this archive | ||
14 | * for more details. | ||
15 | * | ||
16 | */ | ||
17 | |||
18 | #include <linux/module.h> | ||
19 | #include <asm/addrspace.h> | ||
20 | #include <asm/byteorder.h> | ||
21 | |||
22 | #include <linux/vmalloc.h> | ||
23 | #include <asm/io.h> | ||
24 | #include <asm/pgalloc.h> | ||
25 | #include <asm/cacheflush.h> | ||
26 | #include <asm/tlbflush.h> | ||
27 | |||
28 | |||
29 | /* | ||
30 | * Remap an arbitrary physical address space into the kernel virtual | ||
31 | * address space. Needed when the kernel wants to access high addresses | ||
32 | * directly. | ||
33 | * | ||
34 | * NOTE! We need to allow non-page-aligned mappings too: we will obviously | ||
35 | * have to convert them into an offset in a page-aligned mapping, but the | ||
36 | * caller shouldn't need to know that small detail. | ||
37 | */ | ||
38 | |||
39 | #define IS_LOW512(addr) (!((unsigned long)(addr) & ~0x1fffffffUL)) | ||
40 | |||
41 | void __iomem * | ||
42 | __ioremap(unsigned long phys_addr, unsigned long size, unsigned long flags) | ||
43 | { | ||
44 | return (void *)phys_addr; | ||
45 | } | ||
46 | |||
47 | #define IS_KSEG1(addr) (((unsigned long)(addr) & ~0x1fffffffUL) == KSEG1) | ||
48 | |||
49 | void iounmap(volatile void __iomem *addr) | ||
50 | { | ||
51 | } | ||
52 | |||
diff --git a/arch/m32r/mm/ioremap.c b/arch/m32r/mm/ioremap.c deleted file mode 100644 index 5152c4e6ac80..000000000000 --- a/arch/m32r/mm/ioremap.c +++ /dev/null | |||
@@ -1,111 +0,0 @@ | |||
1 | /* | ||
2 | * linux/arch/m32r/mm/ioremap.c | ||
3 | * | ||
4 | * Copyright (c) 2001, 2002 Hiroyuki Kondo | ||
5 | * | ||
6 | * Taken from mips version. | ||
7 | * (C) Copyright 1995 1996 Linus Torvalds | ||
8 | * (C) Copyright 2001 Ralf Baechle | ||
9 | */ | ||
10 | |||
11 | /* | ||
12 | * This file is subject to the terms and conditions of the GNU General Public | ||
13 | * License. See the file "COPYING" in the main directory of this archive | ||
14 | * for more details. | ||
15 | * | ||
16 | */ | ||
17 | |||
18 | #include <linux/module.h> | ||
19 | #include <asm/addrspace.h> | ||
20 | #include <asm/byteorder.h> | ||
21 | |||
22 | #include <linux/vmalloc.h> | ||
23 | #include <linux/io.h> | ||
24 | #include <asm/pgalloc.h> | ||
25 | |||
26 | /* | ||
27 | * Generic mapping function (not visible outside): | ||
28 | */ | ||
29 | |||
30 | /* | ||
31 | * Remap an arbitrary physical address space into the kernel virtual | ||
32 | * address space. Needed when the kernel wants to access high addresses | ||
33 | * directly. | ||
34 | * | ||
35 | * NOTE! We need to allow non-page-aligned mappings too: we will obviously | ||
36 | * have to convert them into an offset in a page-aligned mapping, but the | ||
37 | * caller shouldn't need to know that small detail. | ||
38 | */ | ||
39 | |||
40 | #define IS_LOW512(addr) (!((unsigned long)(addr) & ~0x1fffffffUL)) | ||
41 | |||
42 | void __iomem * | ||
43 | __ioremap(unsigned long phys_addr, unsigned long size, unsigned long flags) | ||
44 | { | ||
45 | void __iomem * addr; | ||
46 | struct vm_struct * area; | ||
47 | unsigned long offset, last_addr; | ||
48 | pgprot_t pgprot; | ||
49 | |||
50 | /* Don't allow wraparound or zero size */ | ||
51 | last_addr = phys_addr + size - 1; | ||
52 | if (!size || last_addr < phys_addr) | ||
53 | return NULL; | ||
54 | |||
55 | /* | ||
56 | * Map objects in the low 512mb of address space using KSEG1, otherwise | ||
57 | * map using page tables. | ||
58 | */ | ||
59 | if (IS_LOW512(phys_addr) && IS_LOW512(phys_addr + size - 1)) | ||
60 | return (void *) KSEG1ADDR(phys_addr); | ||
61 | |||
62 | /* | ||
63 | * Don't allow anybody to remap normal RAM that we're using.. | ||
64 | */ | ||
65 | if (phys_addr < virt_to_phys(high_memory)) { | ||
66 | char *t_addr, *t_end; | ||
67 | struct page *page; | ||
68 | |||
69 | t_addr = __va(phys_addr); | ||
70 | t_end = t_addr + (size - 1); | ||
71 | |||
72 | for(page = virt_to_page(t_addr); page <= virt_to_page(t_end); page++) | ||
73 | if(!PageReserved(page)) | ||
74 | return NULL; | ||
75 | } | ||
76 | |||
77 | pgprot = __pgprot(_PAGE_GLOBAL | _PAGE_PRESENT | _PAGE_READ | ||
78 | | _PAGE_WRITE | flags); | ||
79 | |||
80 | /* | ||
81 | * Mappings have to be page-aligned | ||
82 | */ | ||
83 | offset = phys_addr & ~PAGE_MASK; | ||
84 | phys_addr &= PAGE_MASK; | ||
85 | size = PAGE_ALIGN(last_addr + 1) - phys_addr; | ||
86 | |||
87 | /* | ||
88 | * Ok, go for it.. | ||
89 | */ | ||
90 | area = get_vm_area(size, VM_IOREMAP); | ||
91 | if (!area) | ||
92 | return NULL; | ||
93 | area->phys_addr = phys_addr; | ||
94 | addr = (void __iomem *) area->addr; | ||
95 | if (ioremap_page_range((unsigned long)addr, (unsigned long)addr + size, | ||
96 | phys_addr, pgprot)) { | ||
97 | vunmap((void __force *) addr); | ||
98 | return NULL; | ||
99 | } | ||
100 | |||
101 | return (void __iomem *) (offset + (char __iomem *)addr); | ||
102 | } | ||
103 | |||
104 | #define IS_KSEG1(addr) (((unsigned long)(addr) & ~0x1fffffffUL) == KSEG1) | ||
105 | |||
106 | void iounmap(volatile void __iomem *addr) | ||
107 | { | ||
108 | if (!IS_KSEG1(addr)) | ||
109 | vfree((void *) (PAGE_MASK & (unsigned long) addr)); | ||
110 | } | ||
111 | |||
diff --git a/arch/m32r/mm/mmu.S b/arch/m32r/mm/mmu.S deleted file mode 100644 index fd8f9c9b7b07..000000000000 --- a/arch/m32r/mm/mmu.S +++ /dev/null | |||
@@ -1,355 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
2 | /* | ||
3 | * linux/arch/m32r/mm/mmu.S | ||
4 | * | ||
5 | * Copyright (C) 2001 by Hiroyuki Kondo | ||
6 | */ | ||
7 | |||
8 | #include <linux/linkage.h> | ||
9 | #include <asm/assembler.h> | ||
10 | #include <asm/smp.h> | ||
11 | |||
12 | .text | ||
13 | #ifdef CONFIG_MMU | ||
14 | |||
15 | #include <asm/mmu_context.h> | ||
16 | #include <asm/page.h> | ||
17 | #include <asm/pgtable.h> | ||
18 | #include <asm/m32r.h> | ||
19 | |||
20 | /* | ||
21 | * TLB Miss Exception handler | ||
22 | */ | ||
23 | .balign 16 | ||
24 | ENTRY(tme_handler) | ||
25 | .global tlb_entry_i_dat | ||
26 | .global tlb_entry_d_dat | ||
27 | |||
28 | SWITCH_TO_KERNEL_STACK | ||
29 | |||
30 | #if defined(CONFIG_ISA_M32R2) | ||
31 | st r0, @-sp | ||
32 | st r1, @-sp | ||
33 | st r2, @-sp | ||
34 | st r3, @-sp | ||
35 | |||
36 | seth r3, #high(MMU_REG_BASE) | ||
37 | ld r1, @(MESTS_offset, r3) ; r1: status (MESTS reg.) | ||
38 | ld r0, @(MDEVP_offset, r3) ; r0: PFN + ASID (MDEVP reg.) | ||
39 | st r1, @(MESTS_offset, r3) ; clear status (MESTS reg.) | ||
40 | and3 r1, r1, #(MESTS_IT) | ||
41 | bnez r1, 1f ; instruction TLB miss? | ||
42 | |||
43 | ;; data TLB miss | ||
44 | ;; input | ||
45 | ;; r0: PFN + ASID (MDEVP reg.) | ||
46 | ;; r1 - r3: free | ||
47 | ;; output | ||
48 | ;; r0: PFN + ASID | ||
49 | ;; r1: TLB entry base address | ||
50 | ;; r2: &tlb_entry_{i|d}_dat | ||
51 | ;; r3: free | ||
52 | |||
53 | #ifndef CONFIG_SMP | ||
54 | seth r2, #high(tlb_entry_d_dat) | ||
55 | or3 r2, r2, #low(tlb_entry_d_dat) | ||
56 | #else /* CONFIG_SMP */ | ||
57 | ldi r1, #-8192 | ||
58 | seth r2, #high(tlb_entry_d_dat) | ||
59 | or3 r2, r2, #low(tlb_entry_d_dat) | ||
60 | and r1, sp | ||
61 | ld r1, @(16, r1) ; current_thread_info->cpu | ||
62 | slli r1, #2 | ||
63 | add r2, r1 | ||
64 | #endif /* !CONFIG_SMP */ | ||
65 | seth r1, #high(DTLB_BASE) | ||
66 | or3 r1, r1, #low(DTLB_BASE) | ||
67 | bra 2f | ||
68 | |||
69 | .balign 16 | ||
70 | .fillinsn | ||
71 | 1: | ||
72 | ;; instrucntion TLB miss | ||
73 | ;; input | ||
74 | ;; r0: MDEVP reg. (included ASID) | ||
75 | ;; r1 - r3: free | ||
76 | ;; output | ||
77 | ;; r0: PFN + ASID | ||
78 | ;; r1: TLB entry base address | ||
79 | ;; r2: &tlb_entry_{i|d}_dat | ||
80 | ;; r3: free | ||
81 | ldi r3, #-4096 | ||
82 | and3 r0, r0, #(MMU_CONTEXT_ASID_MASK) | ||
83 | mvfc r1, bpc | ||
84 | and r1, r3 | ||
85 | or r0, r1 ; r0: PFN + ASID | ||
86 | #ifndef CONFIG_SMP | ||
87 | seth r2, #high(tlb_entry_i_dat) | ||
88 | or3 r2, r2, #low(tlb_entry_i_dat) | ||
89 | #else /* CONFIG_SMP */ | ||
90 | ldi r1, #-8192 | ||
91 | seth r2, #high(tlb_entry_i_dat) | ||
92 | or3 r2, r2, #low(tlb_entry_i_dat) | ||
93 | and r1, sp | ||
94 | ld r1, @(16, r1) ; current_thread_info->cpu | ||
95 | slli r1, #2 | ||
96 | add r2, r1 | ||
97 | #endif /* !CONFIG_SMP */ | ||
98 | seth r1, #high(ITLB_BASE) | ||
99 | or3 r1, r1, #low(ITLB_BASE) | ||
100 | |||
101 | .fillinsn | ||
102 | 2: | ||
103 | ;; select TLB entry | ||
104 | ;; input | ||
105 | ;; r0: PFN + ASID | ||
106 | ;; r1: TLB entry base address | ||
107 | ;; r2: &tlb_entry_{i|d}_dat | ||
108 | ;; r3: free | ||
109 | ;; output | ||
110 | ;; r0: PFN + ASID | ||
111 | ;; r1: TLB entry address | ||
112 | ;; r2, r3: free | ||
113 | #ifdef CONFIG_ISA_DUAL_ISSUE | ||
114 | ld r3, @r2 || srli r1, #3 | ||
115 | #else | ||
116 | ld r3, @r2 | ||
117 | srli r1, #3 | ||
118 | #endif | ||
119 | add r1, r3 | ||
120 | ; tlb_entry_{d|i}_dat++; | ||
121 | addi r3, #1 | ||
122 | and3 r3, r3, #(NR_TLB_ENTRIES - 1) | ||
123 | #ifdef CONFIG_ISA_DUAL_ISSUE | ||
124 | st r3, @r2 || slli r1, #3 | ||
125 | #else | ||
126 | st r3, @r2 | ||
127 | slli r1, #3 | ||
128 | #endif | ||
129 | |||
130 | ;; load pte | ||
131 | ;; input | ||
132 | ;; r0: PFN + ASID | ||
133 | ;; r1: TLB entry address | ||
134 | ;; r2, r3: free | ||
135 | ;; output | ||
136 | ;; r0: PFN + ASID | ||
137 | ;; r1: TLB entry address | ||
138 | ;; r2: pte_data | ||
139 | ;; r3: free | ||
140 | ; pgd = *(unsigned long *)MPTB; | ||
141 | ld24 r2, #(-MPTB - 1) | ||
142 | srl3 r3, r0, #22 | ||
143 | #ifdef CONFIG_ISA_DUAL_ISSUE | ||
144 | not r2, r2 || slli r3, #2 ; r3: pgd offset | ||
145 | #else | ||
146 | not r2, r2 | ||
147 | slli r3, #2 | ||
148 | #endif | ||
149 | ld r2, @r2 ; r2: pgd base addr (MPTB reg.) | ||
150 | or r3, r2 ; r3: pmd addr | ||
151 | |||
152 | ; pmd = pmd_offset(pgd, address); | ||
153 | ld r3, @r3 ; r3: pmd data | ||
154 | beqz r3, 3f ; pmd_none(*pmd) ? | ||
155 | |||
156 | and3 r2, r3, #0xfff | ||
157 | add3 r2, r2, #-355 ; _KERNPG_TABLE(=0x163) | ||
158 | bnez r2, 3f ; pmd_bad(*pmd) ? | ||
159 | ldi r2, #-4096 | ||
160 | |||
161 | ; pte = pte_offset(pmd, address); | ||
162 | and r2, r3 ; r2: pte base addr | ||
163 | srl3 r3, r0, #10 | ||
164 | and3 r3, r3, #0xffc ; r3: pte offset | ||
165 | or r3, r2 | ||
166 | seth r2, #0x8000 | ||
167 | or r3, r2 ; r3: pte addr | ||
168 | |||
169 | ; pte_data = (unsigned long)pte_val(*pte); | ||
170 | ld r2, @r3 ; r2: pte data | ||
171 | and3 r3, r2, #2 ; _PAGE_PRESENT(=2) check | ||
172 | beqz r3, 3f | ||
173 | |||
174 | .fillinsn | ||
175 | 5: | ||
176 | ;; set tlb | ||
177 | ;; input | ||
178 | ;; r0: PFN + ASID | ||
179 | ;; r1: TLB entry address | ||
180 | ;; r2: pte_data | ||
181 | ;; r3: free | ||
182 | st r0, @r1 ; set_tlb_tag(entry++, address); | ||
183 | st r2, @+r1 ; set_tlb_data(entry, pte_data); | ||
184 | |||
185 | .fillinsn | ||
186 | 6: | ||
187 | ld r3, @sp+ | ||
188 | ld r2, @sp+ | ||
189 | ld r1, @sp+ | ||
190 | ld r0, @sp+ | ||
191 | rte | ||
192 | |||
193 | .fillinsn | ||
194 | 3: | ||
195 | ;; error | ||
196 | ;; input | ||
197 | ;; r0: PFN + ASID | ||
198 | ;; r1: TLB entry address | ||
199 | ;; r2, r3: free | ||
200 | ;; output | ||
201 | ;; r0: PFN + ASID | ||
202 | ;; r1: TLB entry address | ||
203 | ;; r2: pte_data | ||
204 | ;; r3: free | ||
205 | #ifdef CONFIG_ISA_DUAL_ISSUE | ||
206 | bra 5b || ldi r2, #2 | ||
207 | #else | ||
208 | ldi r2, #2 ; r2: pte_data = 0 | _PAGE_PRESENT(=2) | ||
209 | bra 5b | ||
210 | #endif | ||
211 | |||
212 | #elif defined (CONFIG_ISA_M32R) | ||
213 | |||
214 | st sp, @-sp | ||
215 | st r0, @-sp | ||
216 | st r1, @-sp | ||
217 | st r2, @-sp | ||
218 | st r3, @-sp | ||
219 | st r4, @-sp | ||
220 | |||
221 | seth r3, #high(MMU_REG_BASE) | ||
222 | ld r0, @(MDEVA_offset,r3) ; r0: address (MDEVA reg.) | ||
223 | mvfc r2, bpc ; r2: bpc | ||
224 | ld r1, @(MESTS_offset,r3) ; r1: status (MESTS reg.) | ||
225 | st r1, @(MESTS_offset,r3) ; clear status (MESTS reg.) | ||
226 | and3 r1, r1, #(MESTS_IT) | ||
227 | beqz r1, 1f ; data TLB miss? | ||
228 | |||
229 | ;; instrucntion TLB miss | ||
230 | mv r0, r2 ; address = bpc; | ||
231 | ; entry = (unsigned long *)ITLB_BASE+tlb_entry_i*2; | ||
232 | seth r3, #shigh(tlb_entry_i_dat) | ||
233 | ld r4, @(low(tlb_entry_i_dat),r3) | ||
234 | sll3 r2, r4, #3 | ||
235 | seth r1, #high(ITLB_BASE) | ||
236 | or3 r1, r1, #low(ITLB_BASE) | ||
237 | add r2, r1 ; r2: entry | ||
238 | addi r4, #1 ; tlb_entry_i++; | ||
239 | and3 r4, r4, #(NR_TLB_ENTRIES-1) | ||
240 | st r4, @(low(tlb_entry_i_dat),r3) | ||
241 | bra 2f | ||
242 | .fillinsn | ||
243 | 1: | ||
244 | ;; data TLB miss | ||
245 | ; entry = (unsigned long *)DTLB_BASE+tlb_entry_d*2; | ||
246 | seth r3, #shigh(tlb_entry_d_dat) | ||
247 | ld r4, @(low(tlb_entry_d_dat),r3) | ||
248 | sll3 r2, r4, #3 | ||
249 | seth r1, #high(DTLB_BASE) | ||
250 | or3 r1, r1, #low(DTLB_BASE) | ||
251 | add r2, r1 ; r2: entry | ||
252 | addi r4, #1 ; tlb_entry_d++; | ||
253 | and3 r4, r4, #(NR_TLB_ENTRIES-1) | ||
254 | st r4, @(low(tlb_entry_d_dat),r3) | ||
255 | .fillinsn | ||
256 | 2: | ||
257 | ;; load pte | ||
258 | ; r0: address, r2: entry | ||
259 | ; r1,r3,r4: (free) | ||
260 | ; pgd = *(unsigned long *)MPTB; | ||
261 | ld24 r1, #(-MPTB-1) | ||
262 | not r1, r1 | ||
263 | ld r1, @r1 | ||
264 | srl3 r4, r0, #22 | ||
265 | sll3 r3, r4, #2 | ||
266 | add r3, r1 ; r3: pgd | ||
267 | ; pmd = pmd_offset(pgd, address); | ||
268 | ld r1, @r3 ; r1: pmd | ||
269 | beqz r1, 3f ; pmd_none(*pmd) ? | ||
270 | ; | ||
271 | and3 r1, r1, #0x3ff | ||
272 | ldi r4, #0x163 ; _KERNPG_TABLE(=0x163) | ||
273 | bne r1, r4, 3f ; pmd_bad(*pmd) ? | ||
274 | |||
275 | .fillinsn | ||
276 | 4: | ||
277 | ; pte = pte_offset(pmd, address); | ||
278 | ld r4, @r3 ; r4: pte | ||
279 | ldi r3, #-4096 | ||
280 | and r4, r3 | ||
281 | srl3 r3, r0, #10 | ||
282 | and3 r3, r3, #0xffc | ||
283 | add r4, r3 | ||
284 | seth r3, #0x8000 | ||
285 | add r4, r3 ; r4: pte | ||
286 | ; pte_data = (unsigned long)pte_val(*pte); | ||
287 | ld r1, @r4 ; r1: pte_data | ||
288 | and3 r3, r1, #2 ; _PAGE_PRESENT(=2) check | ||
289 | beqz r3, 3f | ||
290 | |||
291 | .fillinsn | ||
292 | ;; set tlb | ||
293 | ; r0: address, r1: pte_data, r2: entry | ||
294 | ; r3,r4: (free) | ||
295 | 5: | ||
296 | ldi r3, #-4096 ; set_tlb_tag(entry++, address); | ||
297 | and r3, r0 | ||
298 | seth r4, #shigh(MASID) | ||
299 | ld r4, @(low(MASID),r4) ; r4: MASID | ||
300 | and3 r4, r4, #(MMU_CONTEXT_ASID_MASK) | ||
301 | or r3, r4 | ||
302 | st r3, @r2 | ||
303 | st r1, @(4,r2) ; set_tlb_data(entry, pte_data); | ||
304 | |||
305 | ld r4, @sp+ | ||
306 | ld r3, @sp+ | ||
307 | ld r2, @sp+ | ||
308 | ld r1, @sp+ | ||
309 | ld r0, @sp+ | ||
310 | ld sp, @sp+ | ||
311 | rte | ||
312 | |||
313 | .fillinsn | ||
314 | 3: | ||
315 | ldi r1, #2 ; r1: pte_data = 0 | _PAGE_PRESENT(=2) | ||
316 | bra 5b | ||
317 | |||
318 | #else | ||
319 | #error unknown isa configuration | ||
320 | #endif | ||
321 | |||
322 | ENTRY(init_tlb) | ||
323 | ;; Set MMU Register | ||
324 | seth r0, #high(MMU_REG_BASE) ; Set MMU_REG_BASE higher | ||
325 | or3 r0, r0, #low(MMU_REG_BASE) ; Set MMU_REG_BASE lower | ||
326 | ldi r1, #0 | ||
327 | st r1, @(MPSZ_offset,r0) ; Set MPSZ Reg(Page size 4KB:0 16KB:1 64KB:2) | ||
328 | ldi r1, #0 | ||
329 | st r1, @(MASID_offset,r0) ; Set ASID Zero | ||
330 | |||
331 | ;; Set TLB | ||
332 | seth r0, #high(ITLB_BASE) ; Set ITLB_BASE higher | ||
333 | or3 r0, r0, #low(ITLB_BASE) ; Set ITLB_BASE lower | ||
334 | seth r1, #high(DTLB_BASE) ; Set DTLB_BASE higher | ||
335 | or3 r1, r1, #low(DTLB_BASE) ; Set DTLB_BASE lower | ||
336 | ldi r2, #0 | ||
337 | ldi r3, #NR_TLB_ENTRIES | ||
338 | addi r0, #-4 | ||
339 | addi r1, #-4 | ||
340 | clear_tlb: | ||
341 | st r2, @+r0 ; VPA <- 0 | ||
342 | st r2, @+r0 ; PPA <- 0 | ||
343 | st r2, @+r1 ; VPA <- 0 | ||
344 | st r2, @+r1 ; PPA <- 0 | ||
345 | addi r3, #-1 | ||
346 | bnez r3, clear_tlb | ||
347 | ;; | ||
348 | jmp r14 | ||
349 | |||
350 | ENTRY(m32r_itlb_entrys) | ||
351 | ENTRY(m32r_otlb_entrys) | ||
352 | |||
353 | #endif /* CONFIG_MMU */ | ||
354 | |||
355 | .end | ||
diff --git a/arch/m32r/mm/page.S b/arch/m32r/mm/page.S deleted file mode 100644 index a2e9367dbf79..000000000000 --- a/arch/m32r/mm/page.S +++ /dev/null | |||
@@ -1,82 +0,0 @@ | |||
1 | /* | ||
2 | * linux/arch/m32r/mm/page.S | ||
3 | * | ||
4 | * Clear/Copy page with CPU | ||
5 | * | ||
6 | * Copyright (C) 2004 The Free Software Initiative of Japan | ||
7 | * | ||
8 | * Written by Niibe Yutaka | ||
9 | * | ||
10 | * This file is subject to the terms and conditions of the GNU General Public | ||
11 | * License. See the file "COPYING" in the main directory of this archive | ||
12 | * for more details. | ||
13 | * | ||
14 | */ | ||
15 | .text | ||
16 | .global copy_page | ||
17 | /* | ||
18 | * copy_page (to, from) | ||
19 | * | ||
20 | * PAGE_SIZE = 4096-byte | ||
21 | * Cache line = 16-byte | ||
22 | * 16 * 256 | ||
23 | */ | ||
24 | .align 4 | ||
25 | copy_page: | ||
26 | ldi r2, #255 | ||
27 | ld r3, @r0 /* cache line allocate */ | ||
28 | ld r4, @r1+ | ||
29 | ld r5, @r1+ | ||
30 | ld r6, @r1+ | ||
31 | ld r7, @r1+ | ||
32 | .fillinsn | ||
33 | 0: | ||
34 | st r4, @r0 | ||
35 | st r5, @+r0 | ||
36 | st r6, @+r0 | ||
37 | st r7, @+r0 | ||
38 | ld r4, @r1+ | ||
39 | addi r0, #4 | ||
40 | ld r5, @r1+ | ||
41 | ld r6, @r1+ | ||
42 | ld r7, @r1+ | ||
43 | ld r3, @r0 /* cache line allocate */ | ||
44 | addi r2, #-1 | ||
45 | bnez r2, 0b | ||
46 | |||
47 | st r4, @r0 | ||
48 | st r5, @+r0 | ||
49 | st r6, @+r0 | ||
50 | st r7, @+r0 | ||
51 | jmp r14 | ||
52 | |||
53 | .text | ||
54 | .global clear_page | ||
55 | /* | ||
56 | * clear_page (to) | ||
57 | * | ||
58 | * PAGE_SIZE = 4096-byte | ||
59 | * Cache line = 16-byte | ||
60 | * 16 * 256 | ||
61 | */ | ||
62 | .align 4 | ||
63 | clear_page: | ||
64 | ldi r2, #255 | ||
65 | ldi r4, #0 | ||
66 | ld r3, @r0 /* cache line allocate */ | ||
67 | .fillinsn | ||
68 | 0: | ||
69 | st r4, @r0 | ||
70 | st r4, @+r0 | ||
71 | st r4, @+r0 | ||
72 | st r4, @+r0 | ||
73 | addi r0, #4 | ||
74 | ld r3, @r0 /* cache line allocate */ | ||
75 | addi r2, #-1 | ||
76 | bnez r2, 0b | ||
77 | |||
78 | st r4, @r0 | ||
79 | st r4, @+r0 | ||
80 | st r4, @+r0 | ||
81 | st r4, @+r0 | ||
82 | jmp r14 | ||
diff --git a/arch/m32r/oprofile/Makefile b/arch/m32r/oprofile/Makefile deleted file mode 100644 index 8e63a3a5a64c..000000000000 --- a/arch/m32r/oprofile/Makefile +++ /dev/null | |||
@@ -1,10 +0,0 @@ | |||
1 | # SPDX-License-Identifier: GPL-2.0 | ||
2 | obj-$(CONFIG_OPROFILE) += oprofile.o | ||
3 | |||
4 | DRIVER_OBJS := $(addprefix ../../../drivers/oprofile/, \ | ||
5 | oprof.o cpu_buffer.o buffer_sync.o \ | ||
6 | event_buffer.o oprofile_files.o \ | ||
7 | oprofilefs.o oprofile_stats.o \ | ||
8 | timer_int.o ) | ||
9 | |||
10 | oprofile-y := $(DRIVER_OBJS) init.o | ||
diff --git a/arch/m32r/oprofile/init.c b/arch/m32r/oprofile/init.c deleted file mode 100644 index fa56860f4258..000000000000 --- a/arch/m32r/oprofile/init.c +++ /dev/null | |||
@@ -1,22 +0,0 @@ | |||
1 | /** | ||
2 | * @file init.c | ||
3 | * | ||
4 | * @remark Copyright 2002 OProfile authors | ||
5 | * @remark Read the file COPYING | ||
6 | * | ||
7 | * @author John Levon <levon@movementarian.org> | ||
8 | */ | ||
9 | |||
10 | #include <linux/kernel.h> | ||
11 | #include <linux/oprofile.h> | ||
12 | #include <linux/errno.h> | ||
13 | #include <linux/init.h> | ||
14 | |||
15 | int __init oprofile_arch_init(struct oprofile_operations *ops) | ||
16 | { | ||
17 | return -ENODEV; | ||
18 | } | ||
19 | |||
20 | void oprofile_arch_exit(void) | ||
21 | { | ||
22 | } | ||
diff --git a/arch/m32r/platforms/Makefile b/arch/m32r/platforms/Makefile deleted file mode 100644 index 9e1a82529ad9..000000000000 --- a/arch/m32r/platforms/Makefile +++ /dev/null | |||
@@ -1,10 +0,0 @@ | |||
1 | # SPDX-License-Identifier: GPL-2.0 | ||
2 | # arch/m32r/platforms/Makefile | ||
3 | obj-$(CONFIG_PLAT_M32104UT) += m32104ut/ | ||
4 | obj-$(CONFIG_PLAT_M32700UT) += m32700ut/ | ||
5 | obj-$(CONFIG_PLAT_MAPPI) += mappi/ | ||
6 | obj-$(CONFIG_PLAT_MAPPI2) += mappi2/ | ||
7 | obj-$(CONFIG_PLAT_MAPPI3) += mappi3/ | ||
8 | obj-$(CONFIG_PLAT_OAKS32R) += oaks32r/ | ||
9 | obj-$(CONFIG_PLAT_OPSPUT) += opsput/ | ||
10 | obj-$(CONFIG_PLAT_USRV) += usrv/ | ||
diff --git a/arch/m32r/platforms/m32104ut/Makefile b/arch/m32r/platforms/m32104ut/Makefile deleted file mode 100644 index 0de59084f21c..000000000000 --- a/arch/m32r/platforms/m32104ut/Makefile +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | obj-y := setup.o io.o | ||
diff --git a/arch/m32r/platforms/m32104ut/io.c b/arch/m32r/platforms/m32104ut/io.c deleted file mode 100644 index ff2bb3b58bb5..000000000000 --- a/arch/m32r/platforms/m32104ut/io.c +++ /dev/null | |||
@@ -1,298 +0,0 @@ | |||
1 | // SPDX-License-Identifier: GPL-2.0 | ||
2 | /* | ||
3 | * linux/arch/m32r/platforms/m32104ut/io.c | ||
4 | * | ||
5 | * Typical I/O routines for M32104UT board. | ||
6 | * | ||
7 | * Copyright (c) 2001-2005 Hiroyuki Kondo, Hirokazu Takata, | ||
8 | * Hitoshi Yamamoto, Mamoru Sakugawa, | ||
9 | * Naoto Sugai, Hayato Fujiwara | ||
10 | */ | ||
11 | |||
12 | #include <asm/m32r.h> | ||
13 | #include <asm/page.h> | ||
14 | #include <asm/io.h> | ||
15 | #include <asm/byteorder.h> | ||
16 | |||
17 | #if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC) | ||
18 | #include <linux/types.h> | ||
19 | |||
20 | #define M32R_PCC_IOMAP_SIZE 0x1000 | ||
21 | |||
22 | #define M32R_PCC_IOSTART0 0x1000 | ||
23 | #define M32R_PCC_IOEND0 (M32R_PCC_IOSTART0 + M32R_PCC_IOMAP_SIZE - 1) | ||
24 | |||
25 | extern void pcc_ioread_byte(int, unsigned long, void *, size_t, size_t, int); | ||
26 | extern void pcc_ioread_word(int, unsigned long, void *, size_t, size_t, int); | ||
27 | extern void pcc_iowrite_byte(int, unsigned long, void *, size_t, size_t, int); | ||
28 | extern void pcc_iowrite_word(int, unsigned long, void *, size_t, size_t, int); | ||
29 | #endif /* CONFIG_PCMCIA && CONFIG_M32R_CFC */ | ||
30 | |||
31 | #define PORT2ADDR(port) _port2addr(port) | ||
32 | |||
33 | static inline void *_port2addr(unsigned long port) | ||
34 | { | ||
35 | return (void *)(port | NONCACHE_OFFSET); | ||
36 | } | ||
37 | |||
38 | #if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC) | ||
39 | static inline void *__port2addr_ata(unsigned long port) | ||
40 | { | ||
41 | static int dummy_reg; | ||
42 | |||
43 | switch (port) { | ||
44 | case 0x1f0: return (void *)(0x0c002000 | NONCACHE_OFFSET); | ||
45 | case 0x1f1: return (void *)(0x0c012800 | NONCACHE_OFFSET); | ||
46 | case 0x1f2: return (void *)(0x0c012002 | NONCACHE_OFFSET); | ||
47 | case 0x1f3: return (void *)(0x0c012802 | NONCACHE_OFFSET); | ||
48 | case 0x1f4: return (void *)(0x0c012004 | NONCACHE_OFFSET); | ||
49 | case 0x1f5: return (void *)(0x0c012804 | NONCACHE_OFFSET); | ||
50 | case 0x1f6: return (void *)(0x0c012006 | NONCACHE_OFFSET); | ||
51 | case 0x1f7: return (void *)(0x0c012806 | NONCACHE_OFFSET); | ||
52 | case 0x3f6: return (void *)(0x0c01200e | NONCACHE_OFFSET); | ||
53 | default: return (void *)&dummy_reg; | ||
54 | } | ||
55 | } | ||
56 | #endif | ||
57 | |||
58 | /* | ||
59 | * M32104T-LAN is located in the extended bus space | ||
60 | * from 0x01000000 to 0x01ffffff on physical address. | ||
61 | * The base address of LAN controller(LAN91C111) is 0x300. | ||
62 | */ | ||
63 | #define LAN_IOSTART (0x300 | NONCACHE_OFFSET) | ||
64 | #define LAN_IOEND (0x320 | NONCACHE_OFFSET) | ||
65 | static inline void *_port2addr_ne(unsigned long port) | ||
66 | { | ||
67 | return (void *)(port + NONCACHE_OFFSET + 0x01000000); | ||
68 | } | ||
69 | |||
70 | static inline void delay(void) | ||
71 | { | ||
72 | __asm__ __volatile__ ("push r0; \n\t pop r0;" : : :"memory"); | ||
73 | } | ||
74 | |||
75 | /* | ||
76 | * NIC I/O function | ||
77 | */ | ||
78 | |||
79 | #define PORT2ADDR_NE(port) _port2addr_ne(port) | ||
80 | |||
81 | static inline unsigned char _ne_inb(void *portp) | ||
82 | { | ||
83 | return *(volatile unsigned char *)portp; | ||
84 | } | ||
85 | |||
86 | static inline unsigned short _ne_inw(void *portp) | ||
87 | { | ||
88 | return (unsigned short)le16_to_cpu(*(volatile unsigned short *)portp); | ||
89 | } | ||
90 | |||
91 | static inline void _ne_insb(void *portp, void *addr, unsigned long count) | ||
92 | { | ||
93 | unsigned char *buf = (unsigned char *)addr; | ||
94 | |||
95 | while (count--) | ||
96 | *buf++ = _ne_inb(portp); | ||
97 | } | ||
98 | |||
99 | static inline void _ne_outb(unsigned char b, void *portp) | ||
100 | { | ||
101 | *(volatile unsigned char *)portp = b; | ||
102 | } | ||
103 | |||
104 | static inline void _ne_outw(unsigned short w, void *portp) | ||
105 | { | ||
106 | *(volatile unsigned short *)portp = cpu_to_le16(w); | ||
107 | } | ||
108 | |||
109 | unsigned char _inb(unsigned long port) | ||
110 | { | ||
111 | if (port >= LAN_IOSTART && port < LAN_IOEND) | ||
112 | return _ne_inb(PORT2ADDR_NE(port)); | ||
113 | |||
114 | return *(volatile unsigned char *)PORT2ADDR(port); | ||
115 | } | ||
116 | |||
117 | unsigned short _inw(unsigned long port) | ||
118 | { | ||
119 | if (port >= LAN_IOSTART && port < LAN_IOEND) | ||
120 | return _ne_inw(PORT2ADDR_NE(port)); | ||
121 | |||
122 | return *(volatile unsigned short *)PORT2ADDR(port); | ||
123 | } | ||
124 | |||
125 | unsigned long _inl(unsigned long port) | ||
126 | { | ||
127 | return *(volatile unsigned long *)PORT2ADDR(port); | ||
128 | } | ||
129 | |||
130 | unsigned char _inb_p(unsigned long port) | ||
131 | { | ||
132 | unsigned char v = _inb(port); | ||
133 | delay(); | ||
134 | return (v); | ||
135 | } | ||
136 | |||
137 | unsigned short _inw_p(unsigned long port) | ||
138 | { | ||
139 | unsigned short v = _inw(port); | ||
140 | delay(); | ||
141 | return (v); | ||
142 | } | ||
143 | |||
144 | unsigned long _inl_p(unsigned long port) | ||
145 | { | ||
146 | unsigned long v = _inl(port); | ||
147 | delay(); | ||
148 | return (v); | ||
149 | } | ||
150 | |||
151 | void _outb(unsigned char b, unsigned long port) | ||
152 | { | ||
153 | if (port >= LAN_IOSTART && port < LAN_IOEND) | ||
154 | _ne_outb(b, PORT2ADDR_NE(port)); | ||
155 | else | ||
156 | *(volatile unsigned char *)PORT2ADDR(port) = b; | ||
157 | } | ||
158 | |||
159 | void _outw(unsigned short w, unsigned long port) | ||
160 | { | ||
161 | if (port >= LAN_IOSTART && port < LAN_IOEND) | ||
162 | _ne_outw(w, PORT2ADDR_NE(port)); | ||
163 | else | ||
164 | *(volatile unsigned short *)PORT2ADDR(port) = w; | ||
165 | } | ||
166 | |||
167 | void _outl(unsigned long l, unsigned long port) | ||
168 | { | ||
169 | *(volatile unsigned long *)PORT2ADDR(port) = l; | ||
170 | } | ||
171 | |||
172 | void _outb_p(unsigned char b, unsigned long port) | ||
173 | { | ||
174 | _outb(b, port); | ||
175 | delay(); | ||
176 | } | ||
177 | |||
178 | void _outw_p(unsigned short w, unsigned long port) | ||
179 | { | ||
180 | _outw(w, port); | ||
181 | delay(); | ||
182 | } | ||
183 | |||
184 | void _outl_p(unsigned long l, unsigned long port) | ||
185 | { | ||
186 | _outl(l, port); | ||
187 | delay(); | ||
188 | } | ||
189 | |||
190 | void _insb(unsigned int port, void *addr, unsigned long count) | ||
191 | { | ||
192 | if (port >= LAN_IOSTART && port < LAN_IOEND) | ||
193 | _ne_insb(PORT2ADDR_NE(port), addr, count); | ||
194 | else { | ||
195 | unsigned char *buf = addr; | ||
196 | unsigned char *portp = PORT2ADDR(port); | ||
197 | while (count--) | ||
198 | *buf++ = *(volatile unsigned char *)portp; | ||
199 | } | ||
200 | } | ||
201 | |||
202 | void _insw(unsigned int port, void *addr, unsigned long count) | ||
203 | { | ||
204 | unsigned short *buf = addr; | ||
205 | unsigned short *portp; | ||
206 | |||
207 | if (port >= LAN_IOSTART && port < LAN_IOEND) { | ||
208 | /* | ||
209 | * This portion is only used by smc91111.c to read data | ||
210 | * from the DATA_REG. Do not swap the data. | ||
211 | */ | ||
212 | portp = PORT2ADDR_NE(port); | ||
213 | while (count--) | ||
214 | *buf++ = *(volatile unsigned short *)portp; | ||
215 | #if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC) | ||
216 | } else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) { | ||
217 | pcc_ioread_word(9, port, (void *)addr, sizeof(unsigned short), | ||
218 | count, 1); | ||
219 | #endif | ||
220 | #if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC) | ||
221 | } else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) { | ||
222 | portp = __port2addr_ata(port); | ||
223 | while (count--) | ||
224 | *buf++ = *(volatile unsigned short *)portp; | ||
225 | #endif | ||
226 | } else { | ||
227 | portp = PORT2ADDR(port); | ||
228 | while (count--) | ||
229 | *buf++ = *(volatile unsigned short *)portp; | ||
230 | } | ||
231 | } | ||
232 | |||
233 | void _insl(unsigned int port, void *addr, unsigned long count) | ||
234 | { | ||
235 | unsigned long *buf = addr; | ||
236 | unsigned long *portp; | ||
237 | |||
238 | portp = PORT2ADDR(port); | ||
239 | while (count--) | ||
240 | *buf++ = *(volatile unsigned long *)portp; | ||
241 | } | ||
242 | |||
243 | void _outsb(unsigned int port, const void *addr, unsigned long count) | ||
244 | { | ||
245 | const unsigned char *buf = addr; | ||
246 | unsigned char *portp; | ||
247 | |||
248 | if (port >= LAN_IOSTART && port < LAN_IOEND) { | ||
249 | portp = PORT2ADDR_NE(port); | ||
250 | while (count--) | ||
251 | _ne_outb(*buf++, portp); | ||
252 | } else { | ||
253 | portp = PORT2ADDR(port); | ||
254 | while (count--) | ||
255 | *(volatile unsigned char *)portp = *buf++; | ||
256 | } | ||
257 | } | ||
258 | |||
259 | void _outsw(unsigned int port, const void *addr, unsigned long count) | ||
260 | { | ||
261 | const unsigned short *buf = addr; | ||
262 | unsigned short *portp; | ||
263 | |||
264 | if (port >= LAN_IOSTART && port < LAN_IOEND) { | ||
265 | /* | ||
266 | * This portion is only used by smc91111.c to write data | ||
267 | * into the DATA_REG. Do not swap the data. | ||
268 | */ | ||
269 | portp = PORT2ADDR_NE(port); | ||
270 | while (count--) | ||
271 | *(volatile unsigned short *)portp = *buf++; | ||
272 | #if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC) | ||
273 | } else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) { | ||
274 | portp = __port2addr_ata(port); | ||
275 | while (count--) | ||
276 | *(volatile unsigned short *)portp = *buf++; | ||
277 | #endif | ||
278 | #if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC) | ||
279 | } else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) { | ||
280 | pcc_iowrite_word(9, port, (void *)addr, sizeof(unsigned short), | ||
281 | count, 1); | ||
282 | #endif | ||
283 | } else { | ||
284 | portp = PORT2ADDR(port); | ||
285 | while (count--) | ||
286 | *(volatile unsigned short *)portp = *buf++; | ||
287 | } | ||
288 | } | ||
289 | |||
290 | void _outsl(unsigned int port, const void *addr, unsigned long count) | ||
291 | { | ||
292 | const unsigned long *buf = addr; | ||
293 | unsigned char *portp; | ||
294 | |||
295 | portp = PORT2ADDR(port); | ||
296 | while (count--) | ||
297 | *(volatile unsigned long *)portp = *buf++; | ||
298 | } | ||
diff --git a/arch/m32r/platforms/m32104ut/setup.c b/arch/m32r/platforms/m32104ut/setup.c deleted file mode 100644 index 297936003b1f..000000000000 --- a/arch/m32r/platforms/m32104ut/setup.c +++ /dev/null | |||
@@ -1,139 +0,0 @@ | |||
1 | // SPDX-License-Identifier: GPL-2.0 | ||
2 | /* | ||
3 | * linux/arch/m32r/platforms/m32104ut/setup.c | ||
4 | * | ||
5 | * Setup routines for M32104UT Board | ||
6 | * | ||
7 | * Copyright (c) 2002-2005 Hiroyuki Kondo, Hirokazu Takata, | ||
8 | * Hitoshi Yamamoto, Mamoru Sakugawa, | ||
9 | * Naoto Sugai, Hayato Fujiwara | ||
10 | */ | ||
11 | |||
12 | #include <linux/irq.h> | ||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/init.h> | ||
15 | #include <linux/device.h> | ||
16 | |||
17 | #include <asm/m32r.h> | ||
18 | #include <asm/io.h> | ||
19 | |||
20 | #define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long))) | ||
21 | |||
22 | icu_data_t icu_data[NR_IRQS]; | ||
23 | |||
24 | static void disable_m32104ut_irq(unsigned int irq) | ||
25 | { | ||
26 | unsigned long port, data; | ||
27 | |||
28 | port = irq2port(irq); | ||
29 | data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7; | ||
30 | outl(data, port); | ||
31 | } | ||
32 | |||
33 | static void enable_m32104ut_irq(unsigned int irq) | ||
34 | { | ||
35 | unsigned long port, data; | ||
36 | |||
37 | port = irq2port(irq); | ||
38 | data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6; | ||
39 | outl(data, port); | ||
40 | } | ||
41 | |||
42 | static void mask_m32104ut_irq(struct irq_data *data) | ||
43 | { | ||
44 | disable_m32104ut_irq(data->irq); | ||
45 | } | ||
46 | |||
47 | static void unmask_m32104ut_irq(struct irq_data *data) | ||
48 | { | ||
49 | enable_m32104ut_irq(data->irq); | ||
50 | } | ||
51 | |||
52 | static void shutdown_m32104ut_irq(struct irq_data *data) | ||
53 | { | ||
54 | unsigned int irq = data->irq; | ||
55 | unsigned long port = irq2port(irq); | ||
56 | |||
57 | outl(M32R_ICUCR_ILEVEL7, port); | ||
58 | } | ||
59 | |||
60 | static struct irq_chip m32104ut_irq_type = | ||
61 | { | ||
62 | .name = "M32104UT-IRQ", | ||
63 | .irq_shutdown = shutdown_m32104ut_irq, | ||
64 | .irq_unmask = unmask_m32104ut_irq, | ||
65 | .irq_mask = mask_m32104ut_irq, | ||
66 | }; | ||
67 | |||
68 | void __init init_IRQ(void) | ||
69 | { | ||
70 | static int once = 0; | ||
71 | |||
72 | if (once) | ||
73 | return; | ||
74 | else | ||
75 | once++; | ||
76 | |||
77 | #if defined(CONFIG_SMC91X) | ||
78 | /* INT#0: LAN controller on M32104UT-LAN (SMC91C111)*/ | ||
79 | irq_set_chip_and_handler(M32R_IRQ_INT0, &m32104ut_irq_type, | ||
80 | handle_level_irq); | ||
81 | /* "H" level sense */ | ||
82 | cu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD11; | ||
83 | disable_m32104ut_irq(M32R_IRQ_INT0); | ||
84 | #endif /* CONFIG_SMC91X */ | ||
85 | |||
86 | /* MFT2 : system timer */ | ||
87 | irq_set_chip_and_handler(M32R_IRQ_MFT2, &m32104ut_irq_type, | ||
88 | handle_level_irq); | ||
89 | icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; | ||
90 | disable_m32104ut_irq(M32R_IRQ_MFT2); | ||
91 | |||
92 | #ifdef CONFIG_SERIAL_M32R_SIO | ||
93 | /* SIO0_R : uart receive data */ | ||
94 | irq_set_chip_and_handler(M32R_IRQ_SIO0_R, &m32104ut_irq_type, | ||
95 | handle_level_irq); | ||
96 | icu_data[M32R_IRQ_SIO0_R].icucr = M32R_ICUCR_IEN; | ||
97 | disable_m32104ut_irq(M32R_IRQ_SIO0_R); | ||
98 | |||
99 | /* SIO0_S : uart send data */ | ||
100 | irq_set_chip_and_handler(M32R_IRQ_SIO0_S, &m32104ut_irq_type, | ||
101 | handle_level_irq); | ||
102 | icu_data[M32R_IRQ_SIO0_S].icucr = M32R_ICUCR_IEN; | ||
103 | disable_m32104ut_irq(M32R_IRQ_SIO0_S); | ||
104 | #endif /* CONFIG_SERIAL_M32R_SIO */ | ||
105 | } | ||
106 | |||
107 | #if defined(CONFIG_SMC91X) | ||
108 | |||
109 | #define LAN_IOSTART 0x300 | ||
110 | #define LAN_IOEND 0x320 | ||
111 | static struct resource smc91x_resources[] = { | ||
112 | [0] = { | ||
113 | .start = (LAN_IOSTART), | ||
114 | .end = (LAN_IOEND), | ||
115 | .flags = IORESOURCE_MEM, | ||
116 | }, | ||
117 | [1] = { | ||
118 | .start = M32R_IRQ_INT0, | ||
119 | .end = M32R_IRQ_INT0, | ||
120 | .flags = IORESOURCE_IRQ, | ||
121 | } | ||
122 | }; | ||
123 | |||
124 | static struct platform_device smc91x_device = { | ||
125 | .name = "smc91x", | ||
126 | .id = 0, | ||
127 | .num_resources = ARRAY_SIZE(smc91x_resources), | ||
128 | .resource = smc91x_resources, | ||
129 | }; | ||
130 | #endif | ||
131 | |||
132 | static int __init platform_init(void) | ||
133 | { | ||
134 | #if defined(CONFIG_SMC91X) | ||
135 | platform_device_register(&smc91x_device); | ||
136 | #endif | ||
137 | return 0; | ||
138 | } | ||
139 | arch_initcall(platform_init); | ||
diff --git a/arch/m32r/platforms/m32700ut/Makefile b/arch/m32r/platforms/m32700ut/Makefile deleted file mode 100644 index 0de59084f21c..000000000000 --- a/arch/m32r/platforms/m32700ut/Makefile +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | obj-y := setup.o io.o | ||
diff --git a/arch/m32r/platforms/m32700ut/dot.gdbinit_200MHz_16MB b/arch/m32r/platforms/m32700ut/dot.gdbinit_200MHz_16MB deleted file mode 100644 index 525dab46982b..000000000000 --- a/arch/m32r/platforms/m32700ut/dot.gdbinit_200MHz_16MB +++ /dev/null | |||
@@ -1,249 +0,0 @@ | |||
1 | # .gdbinit file | ||
2 | # $Id: dot.gdbinit_200MHz_16MB,v 1.2 2004/10/20 03:02:27 fujiwara Exp $ | ||
3 | #----- | ||
4 | # NOTE: this file is generated by a script, "gen_gdbinit.pl". | ||
5 | # (Please type "gen_gdbinit.pl --help" and check the help message). | ||
6 | # $ Id: gen_gdbinit.pl,v 1.12 2004/07/26 09:56:10 takata Exp $ | ||
7 | #----- | ||
8 | # target platform: m32700ut | ||
9 | |||
10 | # setting | ||
11 | set width 0d70 | ||
12 | set radix 0d16 | ||
13 | |||
14 | debug_chaos | ||
15 | |||
16 | # clk xin:cpu:bif:bus=25:200:50:50 | ||
17 | define clock_init | ||
18 | set *(unsigned long *)0x00ef4008 = 0x00000000 | ||
19 | set *(unsigned long *)0x00ef4004 = 0 | ||
20 | shell sleep 0.1 | ||
21 | # NOTE: Please change the master clock source from PLL-clock to Xin-clock | ||
22 | # and switch off PLL, before resetting the clock gear ratio. | ||
23 | |||
24 | set *(unsigned long *)0x00ef4024 = 2 | ||
25 | set *(unsigned long *)0x00ef4020 = 2 | ||
26 | set *(unsigned long *)0x00ef4010 = 0 | ||
27 | set *(unsigned long *)0x00ef4014 = 0 | ||
28 | set *(unsigned long *)0x00ef4004 = 3 | ||
29 | shell sleep 0.1 | ||
30 | set *(unsigned long *)0x00ef4008 = 0x00000200 | ||
31 | end | ||
32 | |||
33 | # Initialize SDRAM controller | ||
34 | define sdram_init | ||
35 | # SDIR0 | ||
36 | set *(unsigned long *)0x00ef6008 = 0x00000182 | ||
37 | # SDIR1 | ||
38 | set *(unsigned long *)0x00ef600c = 0x00000001 | ||
39 | # Initialize wait | ||
40 | shell sleep 0.1 | ||
41 | # Ch0-MOD | ||
42 | set *(unsigned long *)0x00ef602c = 0x00000020 | ||
43 | # Ch0-TR | ||
44 | set *(unsigned long *)0x00ef6028 = 0x00041302 | ||
45 | # Ch0-ADR (size:16MB) | ||
46 | set *(unsigned long *)0x00ef6020 = 0x08000002 | ||
47 | # AutoRef On | ||
48 | set *(unsigned long *)0x00ef6004 = 0x00010517 | ||
49 | # Access enable | ||
50 | set *(unsigned long *)0x00ef6024 = 0x00000001 | ||
51 | end | ||
52 | document sdram_init | ||
53 | SDRAM controller initialization | ||
54 | 0x08000000 - 0x08ffffff (16MB) | ||
55 | end | ||
56 | |||
57 | # Initialize BSEL3 for UT-CFC | ||
58 | define cfc_init | ||
59 | set $sfrbase = 0xa0ef0000 | ||
60 | # too fast | ||
61 | # set *(unsigned long *)($sfrbase + 0x5300) = 0x0b0b8000 | ||
62 | # set *(unsigned long *)($sfrbase + 0x5304) = 0x00102204 | ||
63 | # set *(unsigned long *)($sfrbase + 0x5300) = 0x1f1f8000 | ||
64 | # set *(unsigned long *)($sfrbase + 0x5300) = 0x1f1f1fdf | ||
65 | # set *(unsigned long *)($sfrbase + 0x5304) = 0x0013220f | ||
66 | # set *(unsigned long *)($sfrbase + 0x5304) = 0x0013330f | ||
67 | end | ||
68 | document cfc_init | ||
69 | CF controller initialization | ||
70 | end | ||
71 | |||
72 | # MMU enable | ||
73 | define mmu_enable | ||
74 | set $evb=0x88000000 | ||
75 | set *(unsigned long *)0xffff0024=1 | ||
76 | end | ||
77 | |||
78 | # MMU disable | ||
79 | define mmu_disable | ||
80 | set $evb=0 | ||
81 | set *(unsigned long *)0xffff0024=0 | ||
82 | end | ||
83 | |||
84 | # Show TLB entries | ||
85 | define show_tlb_entries | ||
86 | set $i = 0 | ||
87 | set $addr = $arg0 | ||
88 | set $nr_entries = $arg1 | ||
89 | use_mon_code | ||
90 | while ($i < $nr_entries) | ||
91 | set $tlb_tag = *(unsigned long*)$addr | ||
92 | set $tlb_data = *(unsigned long*)($addr + 4) | ||
93 | printf " [%2d] 0x%08lx : 0x%08lx - 0x%08lx\n", $i, $addr, $tlb_tag, $tlb_data | ||
94 | set $i = $i + 1 | ||
95 | set $addr = $addr + 8 | ||
96 | end | ||
97 | use_debug_dma | ||
98 | end | ||
99 | define itlb | ||
100 | set $itlb=0xfe000000 | ||
101 | show_tlb_entries $itlb 0d32 | ||
102 | end | ||
103 | define dtlb | ||
104 | set $dtlb=0xfe000800 | ||
105 | show_tlb_entries $dtlb 0d32 | ||
106 | end | ||
107 | |||
108 | # Initialize TLB entries | ||
109 | define init_tlb_entries | ||
110 | set $i = 0 | ||
111 | set $addr = $arg0 | ||
112 | set $nr_entries = $arg1 | ||
113 | use_mon_code | ||
114 | while ($i < $nr_entries) | ||
115 | set *(unsigned long *)($addr + 0x4) = 0 | ||
116 | set $i = $i + 1 | ||
117 | set $addr = $addr + 8 | ||
118 | end | ||
119 | use_debug_dma | ||
120 | end | ||
121 | define tlb_init | ||
122 | set $itlb=0xfe000000 | ||
123 | init_tlb_entries $itlb 0d32 | ||
124 | set $dtlb=0xfe000800 | ||
125 | init_tlb_entries $dtlb 0d32 | ||
126 | end | ||
127 | |||
128 | # Show current task structure | ||
129 | define show_current | ||
130 | set $current = $spi & 0xffffe000 | ||
131 | printf "$current=0x%08lX\n",$current | ||
132 | print *(struct task_struct *)$current | ||
133 | end | ||
134 | |||
135 | # Show user assigned task structure | ||
136 | define show_task | ||
137 | set = $arg0 & 0xffffe000 | ||
138 | printf "$task=0x%08lX\n",$task | ||
139 | print *(struct task_struct *)$task | ||
140 | end | ||
141 | document show_task | ||
142 | Show user assigned task structure | ||
143 | arg0 : task structure address | ||
144 | end | ||
145 | |||
146 | # Show M32R registers | ||
147 | define show_regs | ||
148 | printf " R0[0x%08lX] R1[0x%08lX] R2[0x%08lX] R3[0x%08lX]\n",$r0,$r1,$r2,$r3 | ||
149 | printf " R4[0x%08lX] R5[0x%08lX] R6[0x%08lX] R7[0x%08lX]\n",$r4,$r5,$r6,$r7 | ||
150 | printf " R8[0x%08lX] R9[0x%08lX] R10[0x%08lX] R11[0x%08lX]\n",$r8,$r9,$r10,$r11 | ||
151 | printf "R12[0x%08lX] FP[0x%08lX] LR[0x%08lX] SP[0x%08lX]\n",$r12,$fp,$lr,$sp | ||
152 | printf "PSW[0x%08lX] CBR[0x%08lX] SPI[0x%08lX] SPU[0x%08lX]\n",$psw,$cbr,$spi,$spu | ||
153 | printf "BPC[0x%08lX] PC[0x%08lX] ACCL[0x%08lX] ACCH[0x%08lX]\n",$bpc,$pc,$accl,$acch | ||
154 | printf "EVB[0x%08lX]\n",$evb | ||
155 | end | ||
156 | |||
157 | # Setup all | ||
158 | define setup | ||
159 | use_mon_code | ||
160 | set *(unsigned int)0xfffffffc=0x60 | ||
161 | shell sleep 0.1 | ||
162 | clock_init | ||
163 | shell sleep 0.1 | ||
164 | # SDRAM: 16MB | ||
165 | set *(unsigned long *)0x00ef6020 = 0x08000002 | ||
166 | cfc_init | ||
167 | # USB | ||
168 | set *(unsigned short *)0xb0301000 = 0x100 | ||
169 | |||
170 | set $evb=0x08000000 | ||
171 | end | ||
172 | |||
173 | # Load modules | ||
174 | define load_modules | ||
175 | use_debug_dma | ||
176 | load | ||
177 | end | ||
178 | |||
179 | # Set kernel parameters | ||
180 | define set_kernel_parameters | ||
181 | set $param = (void*)0x08001000 | ||
182 | # INITRD_START | ||
183 | # set *(unsigned long *)($param + 0x0010) = 0x08300000 | ||
184 | # INITRD_SIZE | ||
185 | # set *(unsigned long *)($param + 0x0014) = 0x00000000 | ||
186 | # M32R_CPUCLK | ||
187 | set *(unsigned long *)($param + 0x0018) = 0d200000000 | ||
188 | # M32R_BUSCLK | ||
189 | set *(unsigned long *)($param + 0x001c) = 0d50000000 | ||
190 | |||
191 | # M32R_TIMER_DIVIDE | ||
192 | set *(unsigned long *)($param + 0x0020) = 0d128 | ||
193 | |||
194 | set {char[0x200]}($param + 0x100) = "console=ttyS0,115200n8x console=tty1 root=/dev/nfsroot nfsroot=192.168.0.1:/project/m32r-linux/export/rootfs,rsize=1024,wsize=1024 nfsaddrs=192.168.0.101:192.168.0.1:192.168.0.1:255.255.255.0:mappi001 mem=16M \0" | ||
195 | end | ||
196 | |||
197 | # Boot | ||
198 | define boot | ||
199 | set_kernel_parameters | ||
200 | set $fp = 0 | ||
201 | set $pc = 0x08002000 | ||
202 | # set *(unsigned char *)0xffffffff = 0x03 | ||
203 | si | ||
204 | c | ||
205 | end | ||
206 | |||
207 | # Set breakpoints | ||
208 | define set_breakpoints | ||
209 | b *0x08000030 | ||
210 | end | ||
211 | |||
212 | # Restart | ||
213 | define restart | ||
214 | sdireset | ||
215 | sdireset | ||
216 | set $pc = 0 | ||
217 | b *0x04001000 | ||
218 | b *0x08001000 | ||
219 | b *0x08002000 | ||
220 | si | ||
221 | c | ||
222 | tlb_init | ||
223 | del | ||
224 | setup | ||
225 | load_modules | ||
226 | boot | ||
227 | end | ||
228 | |||
229 | define si | ||
230 | stepi | ||
231 | x/i $pc | ||
232 | show_reg | ||
233 | end | ||
234 | |||
235 | sdireset | ||
236 | sdireset | ||
237 | file vmlinux | ||
238 | target m32rsdi | ||
239 | set $pc = 0 | ||
240 | b *0x04001000 | ||
241 | b *0x08001000 | ||
242 | b *0x08002000 | ||
243 | c | ||
244 | tlb_init | ||
245 | del | ||
246 | setup | ||
247 | load_modules | ||
248 | boot | ||
249 | |||
diff --git a/arch/m32r/platforms/m32700ut/dot.gdbinit_300MHz_32MB b/arch/m32r/platforms/m32700ut/dot.gdbinit_300MHz_32MB deleted file mode 100644 index aa503657a49b..000000000000 --- a/arch/m32r/platforms/m32700ut/dot.gdbinit_300MHz_32MB +++ /dev/null | |||
@@ -1,249 +0,0 @@ | |||
1 | # .gdbinit file | ||
2 | # $Id: dot.gdbinit_300MHz_32MB,v 1.2 2004/10/20 03:02:27 fujiwara Exp $ | ||
3 | #----- | ||
4 | # NOTE: this file is generated by a script, "gen_gdbinit.pl". | ||
5 | # (Please type "gen_gdbinit.pl --help" and check the help message). | ||
6 | # $ Id: gen_gdbinit.pl,v 1.12 2004/07/26 09:56:10 takata Exp $ | ||
7 | #----- | ||
8 | # target platform: m32700ut | ||
9 | |||
10 | # setting | ||
11 | set width 0d70 | ||
12 | set radix 0d16 | ||
13 | |||
14 | debug_chaos | ||
15 | |||
16 | # clk xin:cpu:bif:bus=25:300:75:75 | ||
17 | define clock_init | ||
18 | set *(unsigned long *)0x00ef4008 = 0x00000000 | ||
19 | set *(unsigned long *)0x00ef4004 = 0 | ||
20 | shell sleep 0.1 | ||
21 | # NOTE: Please change the master clock source from PLL-clock to Xin-clock | ||
22 | # and switch off PLL, before resetting the clock gear ratio. | ||
23 | |||
24 | set *(unsigned long *)0x00ef4024 = 2 | ||
25 | set *(unsigned long *)0x00ef4020 = 2 | ||
26 | set *(unsigned long *)0x00ef4010 = 0 | ||
27 | set *(unsigned long *)0x00ef4014 = 0 | ||
28 | set *(unsigned long *)0x00ef4004 = 5 | ||
29 | shell sleep 0.1 | ||
30 | set *(unsigned long *)0x00ef4008 = 0x00000200 | ||
31 | end | ||
32 | |||
33 | # Initialize SDRAM controller | ||
34 | define sdram_init | ||
35 | # SDIR0 | ||
36 | set *(unsigned long *)0x00ef6008 = 0x00000182 | ||
37 | # SDIR1 | ||
38 | set *(unsigned long *)0x00ef600c = 0x00000001 | ||
39 | # Initialize wait | ||
40 | shell sleep 0.1 | ||
41 | # Ch0-MOD | ||
42 | set *(unsigned long *)0x00ef602c = 0x00000020 | ||
43 | # Ch0-TR | ||
44 | set *(unsigned long *)0x00ef6028 = 0x00051502 | ||
45 | # Ch0-ADR (size:32MB) | ||
46 | set *(unsigned long *)0x00ef6020 = 0x08000003 | ||
47 | # AutoRef On | ||
48 | set *(unsigned long *)0x00ef6004 = 0x00010e24 | ||
49 | # Access enable | ||
50 | set *(unsigned long *)0x00ef6024 = 0x00000001 | ||
51 | end | ||
52 | document sdram_init | ||
53 | SDRAM controller initialization | ||
54 | 0x08000000 - 0x09ffffff (32MB) | ||
55 | end | ||
56 | |||
57 | # Initialize BSEL3 for UT-CFC | ||
58 | define cfc_init | ||
59 | set $sfrbase = 0xa0ef0000 | ||
60 | # too fast | ||
61 | # set *(unsigned long *)($sfrbase + 0x5300) = 0x0b0b8000 | ||
62 | # set *(unsigned long *)($sfrbase + 0x5304) = 0x00102204 | ||
63 | # set *(unsigned long *)($sfrbase + 0x5300) = 0x1f1f8000 | ||
64 | # set *(unsigned long *)($sfrbase + 0x5300) = 0x1f1f1fdf | ||
65 | # set *(unsigned long *)($sfrbase + 0x5304) = 0x0013220f | ||
66 | # set *(unsigned long *)($sfrbase + 0x5304) = 0x0013330f | ||
67 | end | ||
68 | document cfc_init | ||
69 | CF controller initialization | ||
70 | end | ||
71 | |||
72 | # MMU enable | ||
73 | define mmu_enable | ||
74 | set $evb=0x88000000 | ||
75 | set *(unsigned long *)0xffff0024=1 | ||
76 | end | ||
77 | |||
78 | # MMU disable | ||
79 | define mmu_disable | ||
80 | set $evb=0 | ||
81 | set *(unsigned long *)0xffff0024=0 | ||
82 | end | ||
83 | |||
84 | # Show TLB entries | ||
85 | define show_tlb_entries | ||
86 | set $i = 0 | ||
87 | set $addr = $arg0 | ||
88 | set $nr_entries = $arg1 | ||
89 | use_mon_code | ||
90 | while ($i < $nr_entries) | ||
91 | set $tlb_tag = *(unsigned long*)$addr | ||
92 | set $tlb_data = *(unsigned long*)($addr + 4) | ||
93 | printf " [%2d] 0x%08lx : 0x%08lx - 0x%08lx\n", $i, $addr, $tlb_tag, $tlb_data | ||
94 | set $i = $i + 1 | ||
95 | set $addr = $addr + 8 | ||
96 | end | ||
97 | use_debug_dma | ||
98 | end | ||
99 | define itlb | ||
100 | set $itlb=0xfe000000 | ||
101 | show_tlb_entries $itlb 0d32 | ||
102 | end | ||
103 | define dtlb | ||
104 | set $dtlb=0xfe000800 | ||
105 | show_tlb_entries $dtlb 0d32 | ||
106 | end | ||
107 | |||
108 | # Initialize TLB entries | ||
109 | define init_tlb_entries | ||
110 | set $i = 0 | ||
111 | set $addr = $arg0 | ||
112 | set $nr_entries = $arg1 | ||
113 | use_mon_code | ||
114 | while ($i < $nr_entries) | ||
115 | set *(unsigned long *)($addr + 0x4) = 0 | ||
116 | set $i = $i + 1 | ||
117 | set $addr = $addr + 8 | ||
118 | end | ||
119 | use_debug_dma | ||
120 | end | ||
121 | define tlb_init | ||
122 | set $itlb=0xfe000000 | ||
123 | init_tlb_entries $itlb 0d32 | ||
124 | set $dtlb=0xfe000800 | ||
125 | init_tlb_entries $dtlb 0d32 | ||
126 | end | ||
127 | |||
128 | # Show current task structure | ||
129 | define show_current | ||
130 | set $current = $spi & 0xffffe000 | ||
131 | printf "$current=0x%08lX\n",$current | ||
132 | print *(struct task_struct *)$current | ||
133 | end | ||
134 | |||
135 | # Show user assigned task structure | ||
136 | define show_task | ||
137 | set = $arg0 & 0xffffe000 | ||
138 | printf "$task=0x%08lX\n",$task | ||
139 | print *(struct task_struct *)$task | ||
140 | end | ||
141 | document show_task | ||
142 | Show user assigned task structure | ||
143 | arg0 : task structure address | ||
144 | end | ||
145 | |||
146 | # Show M32R registers | ||
147 | define show_regs | ||
148 | printf " R0[0x%08lX] R1[0x%08lX] R2[0x%08lX] R3[0x%08lX]\n",$r0,$r1,$r2,$r3 | ||
149 | printf " R4[0x%08lX] R5[0x%08lX] R6[0x%08lX] R7[0x%08lX]\n",$r4,$r5,$r6,$r7 | ||
150 | printf " R8[0x%08lX] R9[0x%08lX] R10[0x%08lX] R11[0x%08lX]\n",$r8,$r9,$r10,$r11 | ||
151 | printf "R12[0x%08lX] FP[0x%08lX] LR[0x%08lX] SP[0x%08lX]\n",$r12,$fp,$lr,$sp | ||
152 | printf "PSW[0x%08lX] CBR[0x%08lX] SPI[0x%08lX] SPU[0x%08lX]\n",$psw,$cbr,$spi,$spu | ||
153 | printf "BPC[0x%08lX] PC[0x%08lX] ACCL[0x%08lX] ACCH[0x%08lX]\n",$bpc,$pc,$accl,$acch | ||
154 | printf "EVB[0x%08lX]\n",$evb | ||
155 | end | ||
156 | |||
157 | # Setup all | ||
158 | define setup | ||
159 | use_mon_code | ||
160 | set *(unsigned int)0xfffffffc=0x60 | ||
161 | shell sleep 0.1 | ||
162 | clock_init | ||
163 | shell sleep 0.1 | ||
164 | # SDRAM: 32MB | ||
165 | set *(unsigned long *)0x00ef6020 = 0x08000003 | ||
166 | cfc_init | ||
167 | # USB | ||
168 | set *(unsigned short *)0xb0301000 = 0x100 | ||
169 | |||
170 | set $evb=0x08000000 | ||
171 | end | ||
172 | |||
173 | # Load modules | ||
174 | define load_modules | ||
175 | use_debug_dma | ||
176 | load | ||
177 | end | ||
178 | |||
179 | # Set kernel parameters | ||
180 | define set_kernel_parameters | ||
181 | set $param = (void*)0x08001000 | ||
182 | # INITRD_START | ||
183 | # set *(unsigned long *)($param + 0x0010) = 0x08300000 | ||
184 | # INITRD_SIZE | ||
185 | # set *(unsigned long *)($param + 0x0014) = 0x00000000 | ||
186 | # M32R_CPUCLK | ||
187 | set *(unsigned long *)($param + 0x0018) = 0d300000000 | ||
188 | # M32R_BUSCLK | ||
189 | set *(unsigned long *)($param + 0x001c) = 0d75000000 | ||
190 | |||
191 | # M32R_TIMER_DIVIDE | ||
192 | set *(unsigned long *)($param + 0x0020) = 0d128 | ||
193 | |||
194 | set {char[0x200]}($param + 0x100) = "console=ttyS0,115200n8x console=tty1 root=/dev/nfsroot nfsroot=192.168.0.1:/project/m32r-linux/export/rootfs,rsize=1024,wsize=1024 nfsaddrs=192.168.0.101:192.168.0.1:192.168.0.1:255.255.255.0:mappi001 mem=32M \0" | ||
195 | end | ||
196 | |||
197 | # Boot | ||
198 | define boot | ||
199 | set_kernel_parameters | ||
200 | set $fp = 0 | ||
201 | set $pc = 0x08002000 | ||
202 | # set *(unsigned char *)0xffffffff = 0x03 | ||
203 | si | ||
204 | c | ||
205 | end | ||
206 | |||
207 | # Set breakpoints | ||
208 | define set_breakpoints | ||
209 | b *0x08000030 | ||
210 | end | ||
211 | |||
212 | # Restart | ||
213 | define restart | ||
214 | sdireset | ||
215 | sdireset | ||
216 | set $pc = 0 | ||
217 | b *0x04001000 | ||
218 | b *0x08001000 | ||
219 | b *0x08002000 | ||
220 | si | ||
221 | c | ||
222 | tlb_init | ||
223 | del | ||
224 | setup | ||
225 | load_modules | ||
226 | boot | ||
227 | end | ||
228 | |||
229 | define si | ||
230 | stepi | ||
231 | x/i $pc | ||
232 | show_reg | ||
233 | end | ||
234 | |||
235 | sdireset | ||
236 | sdireset | ||
237 | file vmlinux | ||
238 | target m32rsdi | ||
239 | set $pc = 0 | ||
240 | b *0x04001000 | ||
241 | b *0x08001000 | ||
242 | b *0x08002000 | ||
243 | c | ||
244 | tlb_init | ||
245 | del | ||
246 | setup | ||
247 | load_modules | ||
248 | boot | ||
249 | |||
diff --git a/arch/m32r/platforms/m32700ut/dot.gdbinit_400MHz_32MB b/arch/m32r/platforms/m32700ut/dot.gdbinit_400MHz_32MB deleted file mode 100644 index adc608aab2fe..000000000000 --- a/arch/m32r/platforms/m32700ut/dot.gdbinit_400MHz_32MB +++ /dev/null | |||
@@ -1,249 +0,0 @@ | |||
1 | # .gdbinit file | ||
2 | # $Id: dot.gdbinit_400MHz_32MB,v 1.1 2004/10/21 01:41:27 fujiwara Exp $ | ||
3 | #----- | ||
4 | # NOTE: this file is generated by a script, "gen_gdbinit.pl". | ||
5 | # (Please type "gen_gdbinit.pl --help" and check the help message). | ||
6 | # $ Id: gen_gdbinit.pl,v 1.12 2004/07/26 09:56:10 takata Exp $ | ||
7 | #----- | ||
8 | # target platform: m32700ut | ||
9 | |||
10 | # setting | ||
11 | set width 0d70 | ||
12 | set radix 0d16 | ||
13 | |||
14 | debug_chaos | ||
15 | |||
16 | # clk xin:cpu:bif:bus=25:400:100:50 | ||
17 | define clock_init | ||
18 | set *(unsigned long *)0x00ef4008 = 0x00000000 | ||
19 | set *(unsigned long *)0x00ef4004 = 0 | ||
20 | shell sleep 0.1 | ||
21 | # NOTE: Please change the master clock source from PLL-clock to Xin-clock | ||
22 | # and switch off PLL, before resetting the clock gear ratio. | ||
23 | |||
24 | set *(unsigned long *)0x00ef4024 = 3 | ||
25 | set *(unsigned long *)0x00ef4020 = 2 | ||
26 | set *(unsigned long *)0x00ef4010 = 0 | ||
27 | set *(unsigned long *)0x00ef4014 = 0 | ||
28 | set *(unsigned long *)0x00ef4004 = 7 | ||
29 | shell sleep 0.1 | ||
30 | set *(unsigned long *)0x00ef4008 = 0x00000200 | ||
31 | end | ||
32 | |||
33 | # Initialize SDRAM controller | ||
34 | define sdram_init | ||
35 | # SDIR0 | ||
36 | set *(unsigned long *)0x00ef6008 = 0x00000182 | ||
37 | # SDIR1 | ||
38 | set *(unsigned long *)0x00ef600c = 0x00000001 | ||
39 | # Initialize wait | ||
40 | shell sleep 0.1 | ||
41 | # Ch0-MOD | ||
42 | set *(unsigned long *)0x00ef602c = 0x00000020 | ||
43 | # Ch0-TR | ||
44 | set *(unsigned long *)0x00ef6028 = 0x00041302 | ||
45 | # Ch0-ADR (size:32MB) | ||
46 | set *(unsigned long *)0x00ef6020 = 0x08000003 | ||
47 | # AutoRef On | ||
48 | set *(unsigned long *)0x00ef6004 = 0x00010517 | ||
49 | # Access enable | ||
50 | set *(unsigned long *)0x00ef6024 = 0x00000001 | ||
51 | end | ||
52 | document sdram_init | ||
53 | SDRAM controller initialization | ||
54 | 0x08000000 - 0x09ffffff (32MB) | ||
55 | end | ||
56 | |||
57 | # Initialize BSEL3 for UT-CFC | ||
58 | define cfc_init | ||
59 | set $sfrbase = 0xa0ef0000 | ||
60 | # too fast | ||
61 | # set *(unsigned long *)($sfrbase + 0x5300) = 0x0b0b8000 | ||
62 | # set *(unsigned long *)($sfrbase + 0x5304) = 0x00102204 | ||
63 | # set *(unsigned long *)($sfrbase + 0x5300) = 0x1f1f8000 | ||
64 | # set *(unsigned long *)($sfrbase + 0x5300) = 0x1f1f1fdf | ||
65 | # set *(unsigned long *)($sfrbase + 0x5304) = 0x0013220f | ||
66 | # set *(unsigned long *)($sfrbase + 0x5304) = 0x0013330f | ||
67 | end | ||
68 | document cfc_init | ||
69 | CF controller initialization | ||
70 | end | ||
71 | |||
72 | # MMU enable | ||
73 | define mmu_enable | ||
74 | set $evb=0x88000000 | ||
75 | set *(unsigned long *)0xffff0024=1 | ||
76 | end | ||
77 | |||
78 | # MMU disable | ||
79 | define mmu_disable | ||
80 | set $evb=0 | ||
81 | set *(unsigned long *)0xffff0024=0 | ||
82 | end | ||
83 | |||
84 | # Show TLB entries | ||
85 | define show_tlb_entries | ||
86 | set $i = 0 | ||
87 | set $addr = $arg0 | ||
88 | set $nr_entries = $arg1 | ||
89 | use_mon_code | ||
90 | while ($i < $nr_entries) | ||
91 | set $tlb_tag = *(unsigned long*)$addr | ||
92 | set $tlb_data = *(unsigned long*)($addr + 4) | ||
93 | printf " [%2d] 0x%08lx : 0x%08lx - 0x%08lx\n", $i, $addr, $tlb_tag, $tlb_data | ||
94 | set $i = $i + 1 | ||
95 | set $addr = $addr + 8 | ||
96 | end | ||
97 | use_debug_dma | ||
98 | end | ||
99 | define itlb | ||
100 | set $itlb=0xfe000000 | ||
101 | show_tlb_entries $itlb 0d32 | ||
102 | end | ||
103 | define dtlb | ||
104 | set $dtlb=0xfe000800 | ||
105 | show_tlb_entries $dtlb 0d32 | ||
106 | end | ||
107 | |||
108 | # Initialize TLB entries | ||
109 | define init_tlb_entries | ||
110 | set $i = 0 | ||
111 | set $addr = $arg0 | ||
112 | set $nr_entries = $arg1 | ||
113 | use_mon_code | ||
114 | while ($i < $nr_entries) | ||
115 | set *(unsigned long *)($addr + 0x4) = 0 | ||
116 | set $i = $i + 1 | ||
117 | set $addr = $addr + 8 | ||
118 | end | ||
119 | use_debug_dma | ||
120 | end | ||
121 | define tlb_init | ||
122 | set $itlb=0xfe000000 | ||
123 | init_tlb_entries $itlb 0d32 | ||
124 | set $dtlb=0xfe000800 | ||
125 | init_tlb_entries $dtlb 0d32 | ||
126 | end | ||
127 | |||
128 | # Show current task structure | ||
129 | define show_current | ||
130 | set $current = $spi & 0xffffe000 | ||
131 | printf "$current=0x%08lX\n",$current | ||
132 | print *(struct task_struct *)$current | ||
133 | end | ||
134 | |||
135 | # Show user assigned task structure | ||
136 | define show_task | ||
137 | set = $arg0 & 0xffffe000 | ||
138 | printf "$task=0x%08lX\n",$task | ||
139 | print *(struct task_struct *)$task | ||
140 | end | ||
141 | document show_task | ||
142 | Show user assigned task structure | ||
143 | arg0 : task structure address | ||
144 | end | ||
145 | |||
146 | # Show M32R registers | ||
147 | define show_regs | ||
148 | printf " R0[0x%08lX] R1[0x%08lX] R2[0x%08lX] R3[0x%08lX]\n",$r0,$r1,$r2,$r3 | ||
149 | printf " R4[0x%08lX] R5[0x%08lX] R6[0x%08lX] R7[0x%08lX]\n",$r4,$r5,$r6,$r7 | ||
150 | printf " R8[0x%08lX] R9[0x%08lX] R10[0x%08lX] R11[0x%08lX]\n",$r8,$r9,$r10,$r11 | ||
151 | printf "R12[0x%08lX] FP[0x%08lX] LR[0x%08lX] SP[0x%08lX]\n",$r12,$fp,$lr,$sp | ||
152 | printf "PSW[0x%08lX] CBR[0x%08lX] SPI[0x%08lX] SPU[0x%08lX]\n",$psw,$cbr,$spi,$spu | ||
153 | printf "BPC[0x%08lX] PC[0x%08lX] ACCL[0x%08lX] ACCH[0x%08lX]\n",$bpc,$pc,$accl,$acch | ||
154 | printf "EVB[0x%08lX]\n",$evb | ||
155 | end | ||
156 | |||
157 | # Setup all | ||
158 | define setup | ||
159 | use_mon_code | ||
160 | set *(unsigned int)0xfffffffc=0x60 | ||
161 | shell sleep 0.1 | ||
162 | clock_init | ||
163 | shell sleep 0.1 | ||
164 | # SDRAM: 32MB | ||
165 | set *(unsigned long *)0x00ef6020 = 0x08000003 | ||
166 | cfc_init | ||
167 | # USB | ||
168 | set *(unsigned short *)0xb0301000 = 0x100 | ||
169 | |||
170 | set $evb=0x08000000 | ||
171 | end | ||
172 | |||
173 | # Load modules | ||
174 | define load_modules | ||
175 | use_debug_dma | ||
176 | load | ||
177 | end | ||
178 | |||
179 | # Set kernel parameters | ||
180 | define set_kernel_parameters | ||
181 | set $param = (void*)0x08001000 | ||
182 | # INITRD_START | ||
183 | # set *(unsigned long *)($param + 0x0010) = 0x08300000 | ||
184 | # INITRD_SIZE | ||
185 | # set *(unsigned long *)($param + 0x0014) = 0x00000000 | ||
186 | # M32R_CPUCLK | ||
187 | set *(unsigned long *)($param + 0x0018) = 0d400000000 | ||
188 | # M32R_BUSCLK | ||
189 | set *(unsigned long *)($param + 0x001c) = 0d50000000 | ||
190 | |||
191 | # M32R_TIMER_DIVIDE | ||
192 | set *(unsigned long *)($param + 0x0020) = 0d128 | ||
193 | |||
194 | set {char[0x200]}($param + 0x100) = "console=ttyS0,115200n8x console=tty1 root=/dev/nfsroot nfsroot=192.168.0.1:/project/m32r-linux/export/rootfs,rsize=1024,wsize=1024 nfsaddrs=192.168.0.101:192.168.0.1:192.168.0.1:255.255.255.0:mappi001 mem=32M \0" | ||
195 | end | ||
196 | |||
197 | # Boot | ||
198 | define boot | ||
199 | set_kernel_parameters | ||
200 | set $fp = 0 | ||
201 | set $pc = 0x08002000 | ||
202 | # set *(unsigned char *)0xffffffff = 0x03 | ||
203 | si | ||
204 | c | ||
205 | end | ||
206 | |||
207 | # Set breakpoints | ||
208 | define set_breakpoints | ||
209 | b *0x08000030 | ||
210 | end | ||
211 | |||
212 | # Restart | ||
213 | define restart | ||
214 | sdireset | ||
215 | sdireset | ||
216 | set $pc = 0 | ||
217 | b *0x04001000 | ||
218 | b *0x08001000 | ||
219 | b *0x08002000 | ||
220 | si | ||
221 | c | ||
222 | tlb_init | ||
223 | del | ||
224 | setup | ||
225 | load_modules | ||
226 | boot | ||
227 | end | ||
228 | |||
229 | define si | ||
230 | stepi | ||
231 | x/i $pc | ||
232 | show_reg | ||
233 | end | ||
234 | |||
235 | sdireset | ||
236 | sdireset | ||
237 | file vmlinux | ||
238 | target m32rsdi | ||
239 | set $pc = 0 | ||
240 | b *0x04001000 | ||
241 | b *0x08001000 | ||
242 | b *0x08002000 | ||
243 | c | ||
244 | tlb_init | ||
245 | del | ||
246 | setup | ||
247 | load_modules | ||
248 | boot | ||
249 | |||
diff --git a/arch/m32r/platforms/m32700ut/io.c b/arch/m32r/platforms/m32700ut/io.c deleted file mode 100644 index 6862586e58db..000000000000 --- a/arch/m32r/platforms/m32700ut/io.c +++ /dev/null | |||
@@ -1,395 +0,0 @@ | |||
1 | /* | ||
2 | * linux/arch/m32r/platforms/m32700ut/io.c | ||
3 | * | ||
4 | * Typical I/O routines for M32700UT board. | ||
5 | * | ||
6 | * Copyright (c) 2001-2005 Hiroyuki Kondo, Hirokazu Takata, | ||
7 | * Hitoshi Yamamoto, Takeo Takahashi | ||
8 | * | ||
9 | * This file is subject to the terms and conditions of the GNU General | ||
10 | * Public License. See the file "COPYING" in the main directory of this | ||
11 | * archive for more details. | ||
12 | */ | ||
13 | |||
14 | #include <asm/m32r.h> | ||
15 | #include <asm/page.h> | ||
16 | #include <asm/io.h> | ||
17 | #include <asm/byteorder.h> | ||
18 | |||
19 | #if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC) | ||
20 | #include <linux/types.h> | ||
21 | |||
22 | #define M32R_PCC_IOMAP_SIZE 0x1000 | ||
23 | |||
24 | #define M32R_PCC_IOSTART0 0x1000 | ||
25 | #define M32R_PCC_IOEND0 (M32R_PCC_IOSTART0 + M32R_PCC_IOMAP_SIZE - 1) | ||
26 | |||
27 | extern void pcc_ioread_byte(int, unsigned long, void *, size_t, size_t, int); | ||
28 | extern void pcc_ioread_word(int, unsigned long, void *, size_t, size_t, int); | ||
29 | extern void pcc_iowrite_byte(int, unsigned long, void *, size_t, size_t, int); | ||
30 | extern void pcc_iowrite_word(int, unsigned long, void *, size_t, size_t, int); | ||
31 | #endif /* CONFIG_PCMCIA && CONFIG_M32R_CFC */ | ||
32 | |||
33 | #define PORT2ADDR(port) _port2addr(port) | ||
34 | #define PORT2ADDR_USB(port) _port2addr_usb(port) | ||
35 | |||
36 | static inline void *_port2addr(unsigned long port) | ||
37 | { | ||
38 | return (void *)(port | NONCACHE_OFFSET); | ||
39 | } | ||
40 | |||
41 | #if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC) | ||
42 | static inline void *__port2addr_ata(unsigned long port) | ||
43 | { | ||
44 | static int dummy_reg; | ||
45 | |||
46 | switch (port) { | ||
47 | case 0x1f0: return (void *)(0x0c002000 | NONCACHE_OFFSET); | ||
48 | case 0x1f1: return (void *)(0x0c012800 | NONCACHE_OFFSET); | ||
49 | case 0x1f2: return (void *)(0x0c012002 | NONCACHE_OFFSET); | ||
50 | case 0x1f3: return (void *)(0x0c012802 | NONCACHE_OFFSET); | ||
51 | case 0x1f4: return (void *)(0x0c012004 | NONCACHE_OFFSET); | ||
52 | case 0x1f5: return (void *)(0x0c012804 | NONCACHE_OFFSET); | ||
53 | case 0x1f6: return (void *)(0x0c012006 | NONCACHE_OFFSET); | ||
54 | case 0x1f7: return (void *)(0x0c012806 | NONCACHE_OFFSET); | ||
55 | case 0x3f6: return (void *)(0x0c01200e | NONCACHE_OFFSET); | ||
56 | default: return (void *)&dummy_reg; | ||
57 | } | ||
58 | } | ||
59 | #endif | ||
60 | |||
61 | /* | ||
62 | * M32700UT-LAN is located in the extended bus space | ||
63 | * from 0x10000000 to 0x13ffffff on physical address. | ||
64 | * The base address of LAN controller(LAN91C111) is 0x300. | ||
65 | */ | ||
66 | #define LAN_IOSTART (0x300 | NONCACHE_OFFSET) | ||
67 | #define LAN_IOEND (0x320 | NONCACHE_OFFSET) | ||
68 | static inline void *_port2addr_ne(unsigned long port) | ||
69 | { | ||
70 | return (void *)(port + 0x10000000); | ||
71 | } | ||
72 | static inline void *_port2addr_usb(unsigned long port) | ||
73 | { | ||
74 | return (void *)((port & 0x0f) + NONCACHE_OFFSET + 0x10303000); | ||
75 | } | ||
76 | |||
77 | static inline void delay(void) | ||
78 | { | ||
79 | __asm__ __volatile__ ("push r0; \n\t pop r0;" : : :"memory"); | ||
80 | } | ||
81 | |||
82 | /* | ||
83 | * NIC I/O function | ||
84 | */ | ||
85 | |||
86 | #define PORT2ADDR_NE(port) _port2addr_ne(port) | ||
87 | |||
88 | static inline unsigned char _ne_inb(void *portp) | ||
89 | { | ||
90 | return *(volatile unsigned char *)portp; | ||
91 | } | ||
92 | |||
93 | static inline unsigned short _ne_inw(void *portp) | ||
94 | { | ||
95 | return (unsigned short)le16_to_cpu(*(volatile unsigned short *)portp); | ||
96 | } | ||
97 | |||
98 | static inline void _ne_insb(void *portp, void *addr, unsigned long count) | ||
99 | { | ||
100 | unsigned char *buf = (unsigned char *)addr; | ||
101 | |||
102 | while (count--) | ||
103 | *buf++ = _ne_inb(portp); | ||
104 | } | ||
105 | |||
106 | static inline void _ne_outb(unsigned char b, void *portp) | ||
107 | { | ||
108 | *(volatile unsigned char *)portp = b; | ||
109 | } | ||
110 | |||
111 | static inline void _ne_outw(unsigned short w, void *portp) | ||
112 | { | ||
113 | *(volatile unsigned short *)portp = cpu_to_le16(w); | ||
114 | } | ||
115 | |||
116 | unsigned char _inb(unsigned long port) | ||
117 | { | ||
118 | if (port >= LAN_IOSTART && port < LAN_IOEND) | ||
119 | return _ne_inb(PORT2ADDR_NE(port)); | ||
120 | |||
121 | #if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC) | ||
122 | else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) { | ||
123 | return *(volatile unsigned char *)__port2addr_ata(port); | ||
124 | } | ||
125 | #endif | ||
126 | #if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC) | ||
127 | else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) { | ||
128 | unsigned char b; | ||
129 | pcc_ioread_byte(0, port, &b, sizeof(b), 1, 0); | ||
130 | return b; | ||
131 | } else | ||
132 | #endif | ||
133 | |||
134 | return *(volatile unsigned char *)PORT2ADDR(port); | ||
135 | } | ||
136 | |||
137 | unsigned short _inw(unsigned long port) | ||
138 | { | ||
139 | if (port >= LAN_IOSTART && port < LAN_IOEND) | ||
140 | return _ne_inw(PORT2ADDR_NE(port)); | ||
141 | #if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC) | ||
142 | else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) { | ||
143 | return *(volatile unsigned short *)__port2addr_ata(port); | ||
144 | } | ||
145 | #endif | ||
146 | #if defined(CONFIG_USB) | ||
147 | else if(port >= 0x340 && port < 0x3a0) | ||
148 | return *(volatile unsigned short *)PORT2ADDR_USB(port); | ||
149 | #endif | ||
150 | #if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC) | ||
151 | else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) { | ||
152 | unsigned short w; | ||
153 | pcc_ioread_word(0, port, &w, sizeof(w), 1, 0); | ||
154 | return w; | ||
155 | } else | ||
156 | #endif | ||
157 | return *(volatile unsigned short *)PORT2ADDR(port); | ||
158 | } | ||
159 | |||
160 | unsigned long _inl(unsigned long port) | ||
161 | { | ||
162 | #if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC) | ||
163 | if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) { | ||
164 | unsigned long l; | ||
165 | pcc_ioread_word(0, port, &l, sizeof(l), 1, 0); | ||
166 | return l; | ||
167 | } else | ||
168 | #endif | ||
169 | return *(volatile unsigned long *)PORT2ADDR(port); | ||
170 | } | ||
171 | |||
172 | unsigned char _inb_p(unsigned long port) | ||
173 | { | ||
174 | unsigned char v = _inb(port); | ||
175 | delay(); | ||
176 | return (v); | ||
177 | } | ||
178 | |||
179 | unsigned short _inw_p(unsigned long port) | ||
180 | { | ||
181 | unsigned short v = _inw(port); | ||
182 | delay(); | ||
183 | return (v); | ||
184 | } | ||
185 | |||
186 | unsigned long _inl_p(unsigned long port) | ||
187 | { | ||
188 | unsigned long v = _inl(port); | ||
189 | delay(); | ||
190 | return (v); | ||
191 | } | ||
192 | |||
193 | void _outb(unsigned char b, unsigned long port) | ||
194 | { | ||
195 | if (port >= LAN_IOSTART && port < LAN_IOEND) | ||
196 | _ne_outb(b, PORT2ADDR_NE(port)); | ||
197 | else | ||
198 | #if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC) | ||
199 | if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) { | ||
200 | *(volatile unsigned char *)__port2addr_ata(port) = b; | ||
201 | } else | ||
202 | #endif | ||
203 | #if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC) | ||
204 | if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) { | ||
205 | pcc_iowrite_byte(0, port, &b, sizeof(b), 1, 0); | ||
206 | } else | ||
207 | #endif | ||
208 | *(volatile unsigned char *)PORT2ADDR(port) = b; | ||
209 | } | ||
210 | |||
211 | void _outw(unsigned short w, unsigned long port) | ||
212 | { | ||
213 | if (port >= LAN_IOSTART && port < LAN_IOEND) | ||
214 | _ne_outw(w, PORT2ADDR_NE(port)); | ||
215 | else | ||
216 | #if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC) | ||
217 | if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) { | ||
218 | *(volatile unsigned short *)__port2addr_ata(port) = w; | ||
219 | } else | ||
220 | #endif | ||
221 | #if defined(CONFIG_USB) | ||
222 | if(port >= 0x340 && port < 0x3a0) | ||
223 | *(volatile unsigned short *)PORT2ADDR_USB(port) = w; | ||
224 | else | ||
225 | #endif | ||
226 | #if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC) | ||
227 | if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) { | ||
228 | pcc_iowrite_word(0, port, &w, sizeof(w), 1, 0); | ||
229 | } else | ||
230 | #endif | ||
231 | *(volatile unsigned short *)PORT2ADDR(port) = w; | ||
232 | } | ||
233 | |||
234 | void _outl(unsigned long l, unsigned long port) | ||
235 | { | ||
236 | #if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC) | ||
237 | if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) { | ||
238 | pcc_iowrite_word(0, port, &l, sizeof(l), 1, 0); | ||
239 | } else | ||
240 | #endif | ||
241 | *(volatile unsigned long *)PORT2ADDR(port) = l; | ||
242 | } | ||
243 | |||
244 | void _outb_p(unsigned char b, unsigned long port) | ||
245 | { | ||
246 | _outb(b, port); | ||
247 | delay(); | ||
248 | } | ||
249 | |||
250 | void _outw_p(unsigned short w, unsigned long port) | ||
251 | { | ||
252 | _outw(w, port); | ||
253 | delay(); | ||
254 | } | ||
255 | |||
256 | void _outl_p(unsigned long l, unsigned long port) | ||
257 | { | ||
258 | _outl(l, port); | ||
259 | delay(); | ||
260 | } | ||
261 | |||
262 | void _insb(unsigned int port, void *addr, unsigned long count) | ||
263 | { | ||
264 | if (port >= LAN_IOSTART && port < LAN_IOEND) | ||
265 | _ne_insb(PORT2ADDR_NE(port), addr, count); | ||
266 | #if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC) | ||
267 | else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) { | ||
268 | unsigned char *buf = addr; | ||
269 | unsigned char *portp = __port2addr_ata(port); | ||
270 | while (count--) | ||
271 | *buf++ = *(volatile unsigned char *)portp; | ||
272 | } | ||
273 | #endif | ||
274 | #if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC) | ||
275 | else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) { | ||
276 | pcc_ioread_byte(0, port, (void *)addr, sizeof(unsigned char), | ||
277 | count, 1); | ||
278 | } | ||
279 | #endif | ||
280 | else { | ||
281 | unsigned char *buf = addr; | ||
282 | unsigned char *portp = PORT2ADDR(port); | ||
283 | while (count--) | ||
284 | *buf++ = *(volatile unsigned char *)portp; | ||
285 | } | ||
286 | } | ||
287 | |||
288 | void _insw(unsigned int port, void *addr, unsigned long count) | ||
289 | { | ||
290 | unsigned short *buf = addr; | ||
291 | unsigned short *portp; | ||
292 | |||
293 | if (port >= LAN_IOSTART && port < LAN_IOEND) { | ||
294 | /* | ||
295 | * This portion is only used by smc91111.c to read data | ||
296 | * from the DATA_REG. Do not swap the data. | ||
297 | */ | ||
298 | portp = PORT2ADDR_NE(port); | ||
299 | while (count--) | ||
300 | *buf++ = *(volatile unsigned short *)portp; | ||
301 | #if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC) | ||
302 | } else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) { | ||
303 | pcc_ioread_word(9, port, (void *)addr, sizeof(unsigned short), | ||
304 | count, 1); | ||
305 | #endif | ||
306 | #if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC) | ||
307 | } else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) { | ||
308 | portp = __port2addr_ata(port); | ||
309 | while (count--) | ||
310 | *buf++ = *(volatile unsigned short *)portp; | ||
311 | #endif | ||
312 | } else { | ||
313 | portp = PORT2ADDR(port); | ||
314 | while (count--) | ||
315 | *buf++ = *(volatile unsigned short *)portp; | ||
316 | } | ||
317 | } | ||
318 | |||
319 | void _insl(unsigned int port, void *addr, unsigned long count) | ||
320 | { | ||
321 | unsigned long *buf = addr; | ||
322 | unsigned long *portp; | ||
323 | |||
324 | portp = PORT2ADDR(port); | ||
325 | while (count--) | ||
326 | *buf++ = *(volatile unsigned long *)portp; | ||
327 | } | ||
328 | |||
329 | void _outsb(unsigned int port, const void *addr, unsigned long count) | ||
330 | { | ||
331 | const unsigned char *buf = addr; | ||
332 | unsigned char *portp; | ||
333 | |||
334 | if (port >= LAN_IOSTART && port < LAN_IOEND) { | ||
335 | portp = PORT2ADDR_NE(port); | ||
336 | while (count--) | ||
337 | _ne_outb(*buf++, portp); | ||
338 | #if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC) | ||
339 | } else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) { | ||
340 | portp = __port2addr_ata(port); | ||
341 | while (count--) | ||
342 | *(volatile unsigned char *)portp = *buf++; | ||
343 | #endif | ||
344 | #if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC) | ||
345 | } else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) { | ||
346 | pcc_iowrite_byte(0, port, (void *)addr, sizeof(unsigned char), | ||
347 | count, 1); | ||
348 | #endif | ||
349 | } else { | ||
350 | portp = PORT2ADDR(port); | ||
351 | while (count--) | ||
352 | *(volatile unsigned char *)portp = *buf++; | ||
353 | } | ||
354 | } | ||
355 | |||
356 | void _outsw(unsigned int port, const void *addr, unsigned long count) | ||
357 | { | ||
358 | const unsigned short *buf = addr; | ||
359 | unsigned short *portp; | ||
360 | |||
361 | if (port >= LAN_IOSTART && port < LAN_IOEND) { | ||
362 | /* | ||
363 | * This portion is only used by smc91111.c to write data | ||
364 | * into the DATA_REG. Do not swap the data. | ||
365 | */ | ||
366 | portp = PORT2ADDR_NE(port); | ||
367 | while (count--) | ||
368 | *(volatile unsigned short *)portp = *buf++; | ||
369 | #if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC) | ||
370 | } else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) { | ||
371 | portp = __port2addr_ata(port); | ||
372 | while (count--) | ||
373 | *(volatile unsigned short *)portp = *buf++; | ||
374 | #endif | ||
375 | #if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC) | ||
376 | } else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) { | ||
377 | pcc_iowrite_word(9, port, (void *)addr, sizeof(unsigned short), | ||
378 | count, 1); | ||
379 | #endif | ||
380 | } else { | ||
381 | portp = PORT2ADDR(port); | ||
382 | while (count--) | ||
383 | *(volatile unsigned short *)portp = *buf++; | ||
384 | } | ||
385 | } | ||
386 | |||
387 | void _outsl(unsigned int port, const void *addr, unsigned long count) | ||
388 | { | ||
389 | const unsigned long *buf = addr; | ||
390 | unsigned char *portp; | ||
391 | |||
392 | portp = PORT2ADDR(port); | ||
393 | while (count--) | ||
394 | *(volatile unsigned long *)portp = *buf++; | ||
395 | } | ||
diff --git a/arch/m32r/platforms/m32700ut/setup.c b/arch/m32r/platforms/m32700ut/setup.c deleted file mode 100644 index 349eb341752c..000000000000 --- a/arch/m32r/platforms/m32700ut/setup.c +++ /dev/null | |||
@@ -1,451 +0,0 @@ | |||
1 | /* | ||
2 | * linux/arch/m32r/platforms/m32700ut/setup.c | ||
3 | * | ||
4 | * Setup routines for Renesas M32700UT Board | ||
5 | * | ||
6 | * Copyright (c) 2002-2005 Hiroyuki Kondo, Hirokazu Takata, | ||
7 | * Hitoshi Yamamoto, Takeo Takahashi | ||
8 | * | ||
9 | * This file is subject to the terms and conditions of the GNU General | ||
10 | * Public License. See the file "COPYING" in the main directory of this | ||
11 | * archive for more details. | ||
12 | */ | ||
13 | |||
14 | #include <linux/irq.h> | ||
15 | #include <linux/kernel.h> | ||
16 | #include <linux/init.h> | ||
17 | #include <linux/platform_device.h> | ||
18 | |||
19 | #include <asm/m32r.h> | ||
20 | #include <asm/io.h> | ||
21 | |||
22 | /* | ||
23 | * M32700 Interrupt Control Unit (Level 1) | ||
24 | */ | ||
25 | #define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long))) | ||
26 | |||
27 | icu_data_t icu_data[M32700UT_NUM_CPU_IRQ]; | ||
28 | |||
29 | static void disable_m32700ut_irq(unsigned int irq) | ||
30 | { | ||
31 | unsigned long port, data; | ||
32 | |||
33 | port = irq2port(irq); | ||
34 | data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7; | ||
35 | outl(data, port); | ||
36 | } | ||
37 | |||
38 | static void enable_m32700ut_irq(unsigned int irq) | ||
39 | { | ||
40 | unsigned long port, data; | ||
41 | |||
42 | port = irq2port(irq); | ||
43 | data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6; | ||
44 | outl(data, port); | ||
45 | } | ||
46 | |||
47 | static void mask_m32700ut(struct irq_data *data) | ||
48 | { | ||
49 | disable_m32700ut_irq(data->irq); | ||
50 | } | ||
51 | |||
52 | static void unmask_m32700ut(struct irq_data *data) | ||
53 | { | ||
54 | enable_m32700ut_irq(data->irq); | ||
55 | } | ||
56 | |||
57 | static void shutdown_m32700ut(struct irq_data *data) | ||
58 | { | ||
59 | unsigned long port; | ||
60 | |||
61 | port = irq2port(data->irq); | ||
62 | outl(M32R_ICUCR_ILEVEL7, port); | ||
63 | } | ||
64 | |||
65 | static struct irq_chip m32700ut_irq_type = | ||
66 | { | ||
67 | .name = "M32700UT-IRQ", | ||
68 | .irq_shutdown = shutdown_m32700ut, | ||
69 | .irq_mask = mask_m32700ut, | ||
70 | .irq_unmask = unmask_m32700ut | ||
71 | }; | ||
72 | |||
73 | /* | ||
74 | * Interrupt Control Unit of PLD on M32700UT (Level 2) | ||
75 | */ | ||
76 | #define irq2pldirq(x) ((x) - M32700UT_PLD_IRQ_BASE) | ||
77 | #define pldirq2port(x) (unsigned long)((int)PLD_ICUCR1 + \ | ||
78 | (((x) - 1) * sizeof(unsigned short))) | ||
79 | |||
80 | typedef struct { | ||
81 | unsigned short icucr; /* ICU Control Register */ | ||
82 | } pld_icu_data_t; | ||
83 | |||
84 | static pld_icu_data_t pld_icu_data[M32700UT_NUM_PLD_IRQ]; | ||
85 | |||
86 | static void disable_m32700ut_pld_irq(unsigned int irq) | ||
87 | { | ||
88 | unsigned long port, data; | ||
89 | unsigned int pldirq; | ||
90 | |||
91 | pldirq = irq2pldirq(irq); | ||
92 | port = pldirq2port(pldirq); | ||
93 | data = pld_icu_data[pldirq].icucr|PLD_ICUCR_ILEVEL7; | ||
94 | outw(data, port); | ||
95 | } | ||
96 | |||
97 | static void enable_m32700ut_pld_irq(unsigned int irq) | ||
98 | { | ||
99 | unsigned long port, data; | ||
100 | unsigned int pldirq; | ||
101 | |||
102 | pldirq = irq2pldirq(irq); | ||
103 | port = pldirq2port(pldirq); | ||
104 | data = pld_icu_data[pldirq].icucr|PLD_ICUCR_IEN|PLD_ICUCR_ILEVEL6; | ||
105 | outw(data, port); | ||
106 | } | ||
107 | |||
108 | static void mask_m32700ut_pld(struct irq_data *data) | ||
109 | { | ||
110 | disable_m32700ut_pld_irq(data->irq); | ||
111 | } | ||
112 | |||
113 | static void unmask_m32700ut_pld(struct irq_data *data) | ||
114 | { | ||
115 | enable_m32700ut_pld_irq(data->irq); | ||
116 | enable_m32700ut_irq(M32R_IRQ_INT1); | ||
117 | } | ||
118 | |||
119 | static void shutdown_m32700ut_pld_irq(struct irq_data *data) | ||
120 | { | ||
121 | unsigned long port; | ||
122 | unsigned int pldirq; | ||
123 | |||
124 | pldirq = irq2pldirq(data->irq); | ||
125 | port = pldirq2port(pldirq); | ||
126 | outw(PLD_ICUCR_ILEVEL7, port); | ||
127 | } | ||
128 | |||
129 | static struct irq_chip m32700ut_pld_irq_type = | ||
130 | { | ||
131 | .name = "M32700UT-PLD-IRQ", | ||
132 | .irq_shutdown = shutdown_m32700ut_pld_irq, | ||
133 | .irq_mask = mask_m32700ut_pld, | ||
134 | .irq_unmask = unmask_m32700ut_pld, | ||
135 | }; | ||
136 | |||
137 | /* | ||
138 | * Interrupt Control Unit of PLD on M32700UT-LAN (Level 2) | ||
139 | */ | ||
140 | #define irq2lanpldirq(x) ((x) - M32700UT_LAN_PLD_IRQ_BASE) | ||
141 | #define lanpldirq2port(x) (unsigned long)((int)M32700UT_LAN_ICUCR1 + \ | ||
142 | (((x) - 1) * sizeof(unsigned short))) | ||
143 | |||
144 | static pld_icu_data_t lanpld_icu_data[M32700UT_NUM_LAN_PLD_IRQ]; | ||
145 | |||
146 | static void disable_m32700ut_lanpld_irq(unsigned int irq) | ||
147 | { | ||
148 | unsigned long port, data; | ||
149 | unsigned int pldirq; | ||
150 | |||
151 | pldirq = irq2lanpldirq(irq); | ||
152 | port = lanpldirq2port(pldirq); | ||
153 | data = lanpld_icu_data[pldirq].icucr|PLD_ICUCR_ILEVEL7; | ||
154 | outw(data, port); | ||
155 | } | ||
156 | |||
157 | static void enable_m32700ut_lanpld_irq(unsigned int irq) | ||
158 | { | ||
159 | unsigned long port, data; | ||
160 | unsigned int pldirq; | ||
161 | |||
162 | pldirq = irq2lanpldirq(irq); | ||
163 | port = lanpldirq2port(pldirq); | ||
164 | data = lanpld_icu_data[pldirq].icucr|PLD_ICUCR_IEN|PLD_ICUCR_ILEVEL6; | ||
165 | outw(data, port); | ||
166 | } | ||
167 | |||
168 | static void mask_m32700ut_lanpld(struct irq_data *data) | ||
169 | { | ||
170 | disable_m32700ut_lanpld_irq(data->irq); | ||
171 | } | ||
172 | |||
173 | static void unmask_m32700ut_lanpld(struct irq_data *data) | ||
174 | { | ||
175 | enable_m32700ut_lanpld_irq(data->irq); | ||
176 | enable_m32700ut_irq(M32R_IRQ_INT0); | ||
177 | } | ||
178 | |||
179 | static void shutdown_m32700ut_lanpld(struct irq_data *data) | ||
180 | { | ||
181 | unsigned long port; | ||
182 | unsigned int pldirq; | ||
183 | |||
184 | pldirq = irq2lanpldirq(data->irq); | ||
185 | port = lanpldirq2port(pldirq); | ||
186 | outw(PLD_ICUCR_ILEVEL7, port); | ||
187 | } | ||
188 | |||
189 | static struct irq_chip m32700ut_lanpld_irq_type = | ||
190 | { | ||
191 | .name = "M32700UT-PLD-LAN-IRQ", | ||
192 | .irq_shutdown = shutdown_m32700ut_lanpld, | ||
193 | .irq_mask = mask_m32700ut_lanpld, | ||
194 | .irq_unmask = unmask_m32700ut_lanpld, | ||
195 | }; | ||
196 | |||
197 | /* | ||
198 | * Interrupt Control Unit of PLD on M32700UT-LCD (Level 2) | ||
199 | */ | ||
200 | #define irq2lcdpldirq(x) ((x) - M32700UT_LCD_PLD_IRQ_BASE) | ||
201 | #define lcdpldirq2port(x) (unsigned long)((int)M32700UT_LCD_ICUCR1 + \ | ||
202 | (((x) - 1) * sizeof(unsigned short))) | ||
203 | |||
204 | #ifdef CONFIG_USB | ||
205 | static pld_icu_data_t lcdpld_icu_data[M32700UT_NUM_LCD_PLD_IRQ]; | ||
206 | |||
207 | static void disable_m32700ut_lcdpld_irq(unsigned int irq) | ||
208 | { | ||
209 | unsigned long port, data; | ||
210 | unsigned int pldirq; | ||
211 | |||
212 | pldirq = irq2lcdpldirq(irq); | ||
213 | port = lcdpldirq2port(pldirq); | ||
214 | data = lcdpld_icu_data[pldirq].icucr|PLD_ICUCR_ILEVEL7; | ||
215 | outw(data, port); | ||
216 | } | ||
217 | |||
218 | static void enable_m32700ut_lcdpld_irq(unsigned int irq) | ||
219 | { | ||
220 | unsigned long port, data; | ||
221 | unsigned int pldirq; | ||
222 | |||
223 | pldirq = irq2lcdpldirq(irq); | ||
224 | port = lcdpldirq2port(pldirq); | ||
225 | data = lcdpld_icu_data[pldirq].icucr|PLD_ICUCR_IEN|PLD_ICUCR_ILEVEL6; | ||
226 | outw(data, port); | ||
227 | } | ||
228 | |||
229 | static void mask_m32700ut_lcdpld(struct irq_data *data) | ||
230 | { | ||
231 | disable_m32700ut_lcdpld_irq(data->irq); | ||
232 | } | ||
233 | |||
234 | static void unmask_m32700ut_lcdpld(struct irq_data *data) | ||
235 | { | ||
236 | enable_m32700ut_lcdpld_irq(data->irq); | ||
237 | enable_m32700ut_irq(M32R_IRQ_INT2); | ||
238 | } | ||
239 | |||
240 | static void shutdown_m32700ut_lcdpld(struct irq_data *data) | ||
241 | { | ||
242 | unsigned long port; | ||
243 | unsigned int pldirq; | ||
244 | |||
245 | pldirq = irq2lcdpldirq(data->irq); | ||
246 | port = lcdpldirq2port(pldirq); | ||
247 | outw(PLD_ICUCR_ILEVEL7, port); | ||
248 | } | ||
249 | |||
250 | static struct irq_chip m32700ut_lcdpld_irq_type = | ||
251 | { | ||
252 | .name = "M32700UT-PLD-LCD-IRQ", | ||
253 | .irq_shutdown = shutdown_m32700ut_lcdpld, | ||
254 | .irq_mask = mask_m32700ut_lcdpld, | ||
255 | .irq_unmask = unmask_m32700ut_lcdpld, | ||
256 | }; | ||
257 | #endif | ||
258 | |||
259 | void __init init_IRQ(void) | ||
260 | { | ||
261 | #if defined(CONFIG_SMC91X) | ||
262 | /* INT#0: LAN controller on M32700UT-LAN (SMC91C111)*/ | ||
263 | irq_set_chip_and_handler(M32700UT_LAN_IRQ_LAN, | ||
264 | &m32700ut_lanpld_irq_type, handle_level_irq); | ||
265 | lanpld_icu_data[irq2lanpldirq(M32700UT_LAN_IRQ_LAN)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02; /* "H" edge sense */ | ||
266 | disable_m32700ut_lanpld_irq(M32700UT_LAN_IRQ_LAN); | ||
267 | #endif /* CONFIG_SMC91X */ | ||
268 | |||
269 | /* MFT2 : system timer */ | ||
270 | irq_set_chip_and_handler(M32R_IRQ_MFT2, &m32700ut_irq_type, | ||
271 | handle_level_irq); | ||
272 | icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; | ||
273 | disable_m32700ut_irq(M32R_IRQ_MFT2); | ||
274 | |||
275 | /* SIO0 : receive */ | ||
276 | irq_set_chip_and_handler(M32R_IRQ_SIO0_R, &m32700ut_irq_type, | ||
277 | handle_level_irq); | ||
278 | icu_data[M32R_IRQ_SIO0_R].icucr = 0; | ||
279 | disable_m32700ut_irq(M32R_IRQ_SIO0_R); | ||
280 | |||
281 | /* SIO0 : send */ | ||
282 | irq_set_chip_and_handler(M32R_IRQ_SIO0_S, &m32700ut_irq_type, | ||
283 | handle_level_irq); | ||
284 | icu_data[M32R_IRQ_SIO0_S].icucr = 0; | ||
285 | disable_m32700ut_irq(M32R_IRQ_SIO0_S); | ||
286 | |||
287 | /* SIO1 : receive */ | ||
288 | irq_set_chip_and_handler(M32R_IRQ_SIO1_R, &m32700ut_irq_type, | ||
289 | handle_level_irq); | ||
290 | icu_data[M32R_IRQ_SIO1_R].icucr = 0; | ||
291 | disable_m32700ut_irq(M32R_IRQ_SIO1_R); | ||
292 | |||
293 | /* SIO1 : send */ | ||
294 | irq_set_chip_and_handler(M32R_IRQ_SIO1_S, &m32700ut_irq_type, | ||
295 | handle_level_irq); | ||
296 | icu_data[M32R_IRQ_SIO1_S].icucr = 0; | ||
297 | disable_m32700ut_irq(M32R_IRQ_SIO1_S); | ||
298 | |||
299 | /* DMA1 : */ | ||
300 | irq_set_chip_and_handler(M32R_IRQ_DMA1, &m32700ut_irq_type, | ||
301 | handle_level_irq); | ||
302 | icu_data[M32R_IRQ_DMA1].icucr = 0; | ||
303 | disable_m32700ut_irq(M32R_IRQ_DMA1); | ||
304 | |||
305 | #ifdef CONFIG_SERIAL_M32R_PLDSIO | ||
306 | /* INT#1: SIO0 Receive on PLD */ | ||
307 | irq_set_chip_and_handler(PLD_IRQ_SIO0_RCV, &m32700ut_pld_irq_type, | ||
308 | handle_level_irq); | ||
309 | pld_icu_data[irq2pldirq(PLD_IRQ_SIO0_RCV)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD03; | ||
310 | disable_m32700ut_pld_irq(PLD_IRQ_SIO0_RCV); | ||
311 | |||
312 | /* INT#1: SIO0 Send on PLD */ | ||
313 | irq_set_chip_and_handler(PLD_IRQ_SIO0_SND, &m32700ut_pld_irq_type, | ||
314 | handle_level_irq); | ||
315 | pld_icu_data[irq2pldirq(PLD_IRQ_SIO0_SND)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD03; | ||
316 | disable_m32700ut_pld_irq(PLD_IRQ_SIO0_SND); | ||
317 | #endif /* CONFIG_SERIAL_M32R_PLDSIO */ | ||
318 | |||
319 | /* INT#1: CFC IREQ on PLD */ | ||
320 | irq_set_chip_and_handler(PLD_IRQ_CFIREQ, &m32700ut_pld_irq_type, | ||
321 | handle_level_irq); | ||
322 | pld_icu_data[irq2pldirq(PLD_IRQ_CFIREQ)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01; /* 'L' level sense */ | ||
323 | disable_m32700ut_pld_irq(PLD_IRQ_CFIREQ); | ||
324 | |||
325 | /* INT#1: CFC Insert on PLD */ | ||
326 | irq_set_chip_and_handler(PLD_IRQ_CFC_INSERT, &m32700ut_pld_irq_type, | ||
327 | handle_level_irq); | ||
328 | pld_icu_data[irq2pldirq(PLD_IRQ_CFC_INSERT)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD00; /* 'L' edge sense */ | ||
329 | disable_m32700ut_pld_irq(PLD_IRQ_CFC_INSERT); | ||
330 | |||
331 | /* INT#1: CFC Eject on PLD */ | ||
332 | irq_set_chip_and_handler(PLD_IRQ_CFC_EJECT, &m32700ut_pld_irq_type, | ||
333 | handle_level_irq); | ||
334 | pld_icu_data[irq2pldirq(PLD_IRQ_CFC_EJECT)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02; /* 'H' edge sense */ | ||
335 | disable_m32700ut_pld_irq(PLD_IRQ_CFC_EJECT); | ||
336 | |||
337 | /* | ||
338 | * INT0# is used for LAN, DIO | ||
339 | * We enable it here. | ||
340 | */ | ||
341 | icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD11; | ||
342 | enable_m32700ut_irq(M32R_IRQ_INT0); | ||
343 | |||
344 | /* | ||
345 | * INT1# is used for UART, MMC, CF Controller in FPGA. | ||
346 | * We enable it here. | ||
347 | */ | ||
348 | icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD11; | ||
349 | enable_m32700ut_irq(M32R_IRQ_INT1); | ||
350 | |||
351 | #if defined(CONFIG_USB) | ||
352 | outw(USBCR_OTGS, USBCR); /* USBCR: non-OTG */ | ||
353 | irq_set_chip_and_handler(M32700UT_LCD_IRQ_USB_INT1, | ||
354 | &m32700ut_lcdpld_irq_type, handle_level_irq); | ||
355 | |||
356 | lcdpld_icu_data[irq2lcdpldirq(M32700UT_LCD_IRQ_USB_INT1)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01; /* "L" level sense */ | ||
357 | disable_m32700ut_lcdpld_irq(M32700UT_LCD_IRQ_USB_INT1); | ||
358 | #endif | ||
359 | /* | ||
360 | * INT2# is used for BAT, USB, AUDIO | ||
361 | * We enable it here. | ||
362 | */ | ||
363 | icu_data[M32R_IRQ_INT2].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD01; | ||
364 | enable_m32700ut_irq(M32R_IRQ_INT2); | ||
365 | |||
366 | #if defined(CONFIG_VIDEO_M32R_AR) | ||
367 | /* | ||
368 | * INT3# is used for AR | ||
369 | */ | ||
370 | irq_set_chip_and_handler(M32R_IRQ_INT3, &m32700ut_irq_type, | ||
371 | handle_level_irq); | ||
372 | icu_data[M32R_IRQ_INT3].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10; | ||
373 | disable_m32700ut_irq(M32R_IRQ_INT3); | ||
374 | #endif /* CONFIG_VIDEO_M32R_AR */ | ||
375 | } | ||
376 | |||
377 | #if defined(CONFIG_SMC91X) | ||
378 | |||
379 | #define LAN_IOSTART 0x300 | ||
380 | #define LAN_IOEND 0x320 | ||
381 | static struct resource smc91x_resources[] = { | ||
382 | [0] = { | ||
383 | .start = (LAN_IOSTART), | ||
384 | .end = (LAN_IOEND), | ||
385 | .flags = IORESOURCE_MEM, | ||
386 | }, | ||
387 | [1] = { | ||
388 | .start = M32700UT_LAN_IRQ_LAN, | ||
389 | .end = M32700UT_LAN_IRQ_LAN, | ||
390 | .flags = IORESOURCE_IRQ, | ||
391 | } | ||
392 | }; | ||
393 | |||
394 | static struct platform_device smc91x_device = { | ||
395 | .name = "smc91x", | ||
396 | .id = 0, | ||
397 | .num_resources = ARRAY_SIZE(smc91x_resources), | ||
398 | .resource = smc91x_resources, | ||
399 | }; | ||
400 | #endif | ||
401 | |||
402 | #if defined(CONFIG_FB_S1D13XXX) | ||
403 | |||
404 | #include <video/s1d13xxxfb.h> | ||
405 | #include <asm/s1d13806.h> | ||
406 | |||
407 | static struct s1d13xxxfb_pdata s1d13xxxfb_data = { | ||
408 | .initregs = s1d13xxxfb_initregs, | ||
409 | .initregssize = ARRAY_SIZE(s1d13xxxfb_initregs), | ||
410 | .platform_init_video = NULL, | ||
411 | #ifdef CONFIG_PM | ||
412 | .platform_suspend_video = NULL, | ||
413 | .platform_resume_video = NULL, | ||
414 | #endif | ||
415 | }; | ||
416 | |||
417 | static struct resource s1d13xxxfb_resources[] = { | ||
418 | [0] = { | ||
419 | .start = 0x10600000UL, | ||
420 | .end = 0x1073FFFFUL, | ||
421 | .flags = IORESOURCE_MEM, | ||
422 | }, | ||
423 | [1] = { | ||
424 | .start = 0x10400000UL, | ||
425 | .end = 0x104001FFUL, | ||
426 | .flags = IORESOURCE_MEM, | ||
427 | } | ||
428 | }; | ||
429 | |||
430 | static struct platform_device s1d13xxxfb_device = { | ||
431 | .name = S1D_DEVICENAME, | ||
432 | .id = 0, | ||
433 | .dev = { | ||
434 | .platform_data = &s1d13xxxfb_data, | ||
435 | }, | ||
436 | .num_resources = ARRAY_SIZE(s1d13xxxfb_resources), | ||
437 | .resource = s1d13xxxfb_resources, | ||
438 | }; | ||
439 | #endif | ||
440 | |||
441 | static int __init platform_init(void) | ||
442 | { | ||
443 | #if defined(CONFIG_SMC91X) | ||
444 | platform_device_register(&smc91x_device); | ||
445 | #endif | ||
446 | #if defined(CONFIG_FB_S1D13XXX) | ||
447 | platform_device_register(&s1d13xxxfb_device); | ||
448 | #endif | ||
449 | return 0; | ||
450 | } | ||
451 | arch_initcall(platform_init); | ||
diff --git a/arch/m32r/platforms/mappi/Makefile b/arch/m32r/platforms/mappi/Makefile deleted file mode 100644 index 0de59084f21c..000000000000 --- a/arch/m32r/platforms/mappi/Makefile +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | obj-y := setup.o io.o | ||
diff --git a/arch/m32r/platforms/mappi/dot.gdbinit b/arch/m32r/platforms/mappi/dot.gdbinit deleted file mode 100644 index 7a1d293863eb..000000000000 --- a/arch/m32r/platforms/mappi/dot.gdbinit +++ /dev/null | |||
@@ -1,242 +0,0 @@ | |||
1 | # .gdbinit file | ||
2 | # $Id: dot.gdbinit.mappi,v 1.4 2004/10/20 02:24:37 takata Exp $ | ||
3 | #----- | ||
4 | # NOTE: this file is generated by a script, "gen_gdbinit.pl". | ||
5 | # (Please type "gen_gdbinit.pl --help" and check the help message). | ||
6 | # $ Id: gen_gdbinit.pl,v 1.12 2004/07/26 09:56:10 takata Exp $ | ||
7 | #----- | ||
8 | # target platform: mappi | ||
9 | |||
10 | # setting | ||
11 | set width 0d70 | ||
12 | set radix 0d16 | ||
13 | debug_chaos | ||
14 | |||
15 | # clk xin:cpu:bif:bus=30:360:180:90 | ||
16 | define clock_init | ||
17 | set *(unsigned long *)0x00ef4024 = 2 | ||
18 | set *(unsigned long *)0x00ef4020 = 1 | ||
19 | set *(unsigned long *)0x00ef4010 = 0 | ||
20 | set *(unsigned long *)0x00ef4014 = 0 | ||
21 | set *(unsigned long *)0x00ef4004 = 5 | ||
22 | shell sleep 0.1 | ||
23 | set *(unsigned long *)0x00ef4008 = 0x00000200 | ||
24 | end | ||
25 | |||
26 | # Initialize programmable ports | ||
27 | define port_init | ||
28 | set $sfrbase = 0x00ef0000 | ||
29 | set *(unsigned short *)0x00ef1060 = 0x5555 | ||
30 | set *(unsigned short *)0x00ef1062 = 0x5555 | ||
31 | set *(unsigned short *)0x00ef1064 = 0x5555 | ||
32 | set *(unsigned short *)0x00ef1066 = 0x5555 | ||
33 | set *(unsigned short *)0x00ef1068 = 0x5555 | ||
34 | set *(unsigned short *)0x00ef106a = 0x0000 | ||
35 | set *(unsigned short *)0x00ef106e = 0x5555 | ||
36 | set *(unsigned short *)0x00ef1070 = 0x5555 | ||
37 | # LED ON | ||
38 | set *(unsigned char *)($sfrbase + 0x1015) = 0xff | ||
39 | set *(unsigned char *)($sfrbase + 0x1085) = 0xff | ||
40 | shell sleep 0.1 | ||
41 | # LED OFF | ||
42 | set *(unsigned char *)($sfrbase + 0x1085) = 0x00 | ||
43 | end | ||
44 | document port_init | ||
45 | P5=LED(output), P6.b4=LAN_RESET(output) | ||
46 | end | ||
47 | |||
48 | # Initialize SDRAM controller | ||
49 | define sdram_init | ||
50 | # SDIR0 | ||
51 | set *(unsigned long *)0x00ef6008 = 0x00000182 | ||
52 | # SDIR1 | ||
53 | set *(unsigned long *)0x00ef600c = 0x00000001 | ||
54 | # Initialize wait | ||
55 | shell sleep 0.1 | ||
56 | # Ch0-MOD | ||
57 | set *(unsigned long *)0x00ef602c = 0x00000020 | ||
58 | # Ch0-TR | ||
59 | set *(unsigned long *)0x00ef6028 = 0x00051502 | ||
60 | # Ch0-ADR (size:64MB) | ||
61 | set *(unsigned long *)0x00ef6020 = 0x08000004 | ||
62 | # AutoRef On | ||
63 | set *(unsigned long *)0x00ef6004 = 0x00010e2b | ||
64 | # Access enable | ||
65 | set *(unsigned long *)0x00ef6024 = 0x00000001 | ||
66 | end | ||
67 | document sdram_init | ||
68 | SDRAM controller initialization | ||
69 | 0x08000000 - 0x0bffffff (64MB) | ||
70 | end | ||
71 | |||
72 | # Initialize LAN controller | ||
73 | define lanc_init | ||
74 | set $sfrbase = 0x00ef0000 | ||
75 | # Set BSEL3 (BSEL3 for the Chaos's bselc) | ||
76 | set *(unsigned long *)($sfrbase + 0x5300) = 0x0a0a8040 | ||
77 | set *(unsigned long *)($sfrbase + 0x5304) = 0x01120203 | ||
78 | set *(unsigned long *)($sfrbase + 0x5308) = 0x00000001 | ||
79 | # Reset (P5=LED,P6.b4=LAN_RESET) | ||
80 | set *(unsigned short *)($sfrbase + 0x106c) = 0x0000 | ||
81 | set *(unsigned char *)($sfrbase + 0x1016) = 0xff | ||
82 | set *(unsigned char *)($sfrbase + 0x1086) = 0xff | ||
83 | shell sleep 0.1 | ||
84 | # swivel: 0=normal, 4=reverse | ||
85 | # set *(unsigned char *)($sfrbase + 0x1086) = 0x00 | ||
86 | set *(unsigned char *)($sfrbase + 0x1086) = 0x04 | ||
87 | set *(unsigned long *)(0x0c000330) = 0xffffffff | ||
88 | # Set mac address | ||
89 | set $lanc = (void*)0x0c000300 | ||
90 | set *(unsigned long *)($lanc + 0x0000) = 0x00610010 | ||
91 | set *(unsigned long *)($lanc + 0x0004) = 0x00200030 | ||
92 | set *(unsigned long *)($lanc + 0x0008) = 0x00400050 | ||
93 | set *(unsigned long *)($lanc + 0x000c) = 0x00600007 | ||
94 | end | ||
95 | document lanc_init | ||
96 | LAN controller initialization | ||
97 | ex.) MAC address: 10 20 30 40 50 60 | ||
98 | end | ||
99 | |||
100 | # LCD & CRT dual-head setting (8bpp) | ||
101 | define dispc_init | ||
102 | set $sfrbase = 0x00ef0000 | ||
103 | # BSEL4 Dispc | ||
104 | set *(unsigned long *)($sfrbase + 0x5400) = 0x0e0e8000 | ||
105 | set *(unsigned long *)($sfrbase + 0x5404) = 0x0012220a | ||
106 | end | ||
107 | |||
108 | # MMU enable | ||
109 | define mmu_enable | ||
110 | set $evb=0x88000000 | ||
111 | set *(unsigned long *)0xffff0024=1 | ||
112 | end | ||
113 | |||
114 | # MMU disable | ||
115 | define mmu_disable | ||
116 | set $evb=0 | ||
117 | set *(unsigned long *)0xffff0024=0 | ||
118 | end | ||
119 | |||
120 | # Show TLB entries | ||
121 | define show_tlb_entries | ||
122 | set $i = 0 | ||
123 | set $addr = $arg0 | ||
124 | set $nr_entries = $arg1 | ||
125 | use_mon_code | ||
126 | while ($i < $nr_entries) | ||
127 | set $tlb_tag = *(unsigned long*)$addr | ||
128 | set $tlb_data = *(unsigned long*)($addr + 4) | ||
129 | printf " [%2d] 0x%08lx : 0x%08lx - 0x%08lx\n", $i, $addr, $tlb_tag, $tlb_data | ||
130 | set $i = $i + 1 | ||
131 | set $addr = $addr + 8 | ||
132 | end | ||
133 | use_debug_dma | ||
134 | end | ||
135 | define itlb | ||
136 | set $itlb=0xfe000000 | ||
137 | show_tlb_entries $itlb 0d32 | ||
138 | end | ||
139 | define dtlb | ||
140 | set $dtlb=0xfe000800 | ||
141 | show_tlb_entries $dtlb 0d32 | ||
142 | end | ||
143 | |||
144 | # Show current task structure | ||
145 | define show_current | ||
146 | set $current = $spi & 0xffffe000 | ||
147 | printf "$current=0x%08lX\n",$current | ||
148 | print *(struct task_struct *)$current | ||
149 | end | ||
150 | |||
151 | # Show user assigned task structure | ||
152 | define show_task | ||
153 | set = $arg0 & 0xffffe000 | ||
154 | printf "$task=0x%08lX\n",$task | ||
155 | print *(struct task_struct *)$task | ||
156 | end | ||
157 | document show_task | ||
158 | Show user assigned task structure | ||
159 | arg0 : task structure address | ||
160 | end | ||
161 | |||
162 | # Show M32R registers | ||
163 | define show_regs | ||
164 | printf " R0[0x%08lX] R1[0x%08lX] R2[0x%08lX] R3[0x%08lX]\n",$r0,$r1,$r2,$r3 | ||
165 | printf " R4[0x%08lX] R5[0x%08lX] R6[0x%08lX] R7[0x%08lX]\n",$r4,$r5,$r6,$r7 | ||
166 | printf " R8[0x%08lX] R9[0x%08lX] R10[0x%08lX] R11[0x%08lX]\n",$r8,$r9,$r10,$r11 | ||
167 | printf "R12[0x%08lX] FP[0x%08lX] LR[0x%08lX] SP[0x%08lX]\n",$r12,$fp,$lr,$sp | ||
168 | printf "PSW[0x%08lX] CBR[0x%08lX] SPI[0x%08lX] SPU[0x%08lX]\n",$psw,$cbr,$spi,$spu | ||
169 | printf "BPC[0x%08lX] PC[0x%08lX] ACCL[0x%08lX] ACCH[0x%08lX]\n",$bpc,$pc,$accl,$acch | ||
170 | printf "EVB[0x%08lX]\n",$evb | ||
171 | end | ||
172 | |||
173 | # Setup all | ||
174 | define setup | ||
175 | use_mon_code | ||
176 | set *(unsigned int)0xfffffffc=0x60 | ||
177 | shell sleep 0.1 | ||
178 | clock_init | ||
179 | shell sleep 0.1 | ||
180 | port_init | ||
181 | sdram_init | ||
182 | lanc_init | ||
183 | dispc_init | ||
184 | set $evb=0x08000000 | ||
185 | end | ||
186 | |||
187 | # Load modules | ||
188 | define load_modules | ||
189 | use_debug_dma | ||
190 | load | ||
191 | end | ||
192 | |||
193 | # Set kernel parameters | ||
194 | define set_kernel_parameters | ||
195 | set $param = (void*)0x08001000 | ||
196 | # INITRD_START | ||
197 | # set *(unsigned long *)($param + 0x0010) = 0x08300000 | ||
198 | # INITRD_SIZE | ||
199 | # set *(unsigned long *)($param + 0x0014) = 0x00000000 | ||
200 | # M32R_CPUCLK | ||
201 | set *(unsigned long *)($param + 0x0018) = 0d360000000 | ||
202 | # M32R_BUSCLK | ||
203 | set *(unsigned long *)($param + 0x001c) = 0d90000000 | ||
204 | |||
205 | # M32R_TIMER_DIVIDE | ||
206 | set *(unsigned long *)($param + 0x0020) = 0d128 | ||
207 | |||
208 | set {char[0x200]}($param + 0x100) = "console=ttyS0,115200n8x console=tty1 root=/dev/nfsroot nfsroot=192.168.0.1:/project/m32r-linux/export/rootfs nfsaddrs=192.168.0.101:192.168.0.1:192.168.0.1:255.255.255.0:mappi001 \0" | ||
209 | end | ||
210 | |||
211 | # Boot | ||
212 | define boot | ||
213 | set_kernel_parameters | ||
214 | set $fp = 0 | ||
215 | set $pc = 0x08002000 | ||
216 | si | ||
217 | c | ||
218 | end | ||
219 | |||
220 | # Set breakpoints | ||
221 | define set_breakpoints | ||
222 | b *0x08000030 | ||
223 | end | ||
224 | |||
225 | # Restart | ||
226 | define restart | ||
227 | sdireset | ||
228 | sdireset | ||
229 | setup | ||
230 | load_modules | ||
231 | boot | ||
232 | end | ||
233 | |||
234 | sdireset | ||
235 | sdireset | ||
236 | file vmlinux | ||
237 | target m32rsdi | ||
238 | setup | ||
239 | #load_modules | ||
240 | #set_breakpoints | ||
241 | #boot | ||
242 | |||
diff --git a/arch/m32r/platforms/mappi/dot.gdbinit.nommu b/arch/m32r/platforms/mappi/dot.gdbinit.nommu deleted file mode 100644 index 297536cf67cf..000000000000 --- a/arch/m32r/platforms/mappi/dot.gdbinit.nommu +++ /dev/null | |||
@@ -1,245 +0,0 @@ | |||
1 | # .gdbinit file | ||
2 | # $Id$ | ||
3 | #----- | ||
4 | # NOTE: this file is generated by a script, "gen_gdbinit.pl". | ||
5 | # (Please type "gen_gdbinit.pl --help" and check the help message). | ||
6 | # $ Id: gen_gdbinit.pl,v 1.5 2004/01/23 08:23:25 takata Exp $ | ||
7 | #----- | ||
8 | # target platform: mappi | ||
9 | |||
10 | # setting | ||
11 | set width 0d70 | ||
12 | set radix 0d16 | ||
13 | debug_chaos | ||
14 | |||
15 | # clk xin:cpu:bif:bus=25:200:50:50 | ||
16 | define clock_init | ||
17 | set *(unsigned long *)0x00ef4024 = 2 | ||
18 | set *(unsigned long *)0x00ef4020 = 2 | ||
19 | set *(unsigned long *)0x00ef4010 = 0 | ||
20 | set *(unsigned long *)0x00ef4014 = 0 | ||
21 | set *(unsigned long *)0x00ef4004 = 3 | ||
22 | shell sleep 0.1 | ||
23 | set *(unsigned long *)0x00ef4008 = 0x00000200 | ||
24 | end | ||
25 | |||
26 | # Initialize programmable ports | ||
27 | define port_init | ||
28 | set $sfrbase = 0x00ef0000 | ||
29 | set *(unsigned short *)0x00ef1060 = 0x5555 | ||
30 | set *(unsigned short *)0x00ef1062 = 0x5555 | ||
31 | set *(unsigned short *)0x00ef1064 = 0x5555 | ||
32 | set *(unsigned short *)0x00ef1066 = 0x5555 | ||
33 | set *(unsigned short *)0x00ef1068 = 0x5555 | ||
34 | set *(unsigned short *)0x00ef106a = 0x0000 | ||
35 | set *(unsigned short *)0x00ef106e = 0x5555 | ||
36 | set *(unsigned short *)0x00ef1070 = 0x5555 | ||
37 | # LED ON | ||
38 | set *(unsigned char *)($sfrbase + 0x1015) = 0xff | ||
39 | set *(unsigned char *)($sfrbase + 0x1085) = 0xff | ||
40 | shell sleep 0.1 | ||
41 | # LED OFF | ||
42 | set *(unsigned char *)($sfrbase + 0x1085) = 0x00 | ||
43 | end | ||
44 | document port_init | ||
45 | P5=LED(output), P6.b4=LAN_RESET(output) | ||
46 | end | ||
47 | |||
48 | # Initialize SDRAM controller | ||
49 | define sdram_init | ||
50 | # SDIR0 | ||
51 | set *(unsigned long *)0x00ef6008 = 0x00000182 | ||
52 | # SDIR1 | ||
53 | set *(unsigned long *)0x00ef600c = 0x00000001 | ||
54 | # Initialize wait | ||
55 | shell sleep 0.1 | ||
56 | # Ch0-MOD | ||
57 | set *(unsigned long *)0x00ef602c = 0x00000020 | ||
58 | # Ch0-TR | ||
59 | set *(unsigned long *)0x00ef6028 = 0x00051502 | ||
60 | # Ch0-ADR (size:64MB) | ||
61 | set *(unsigned long *)0x00ef6020 = 0x00000004 | ||
62 | # AutoRef On | ||
63 | set *(unsigned long *)0x00ef6004 = 0x00010f05 | ||
64 | # Access enable | ||
65 | set *(unsigned long *)0x00ef6024 = 0x00000001 | ||
66 | end | ||
67 | document sdram_init | ||
68 | SDRAM controller initialization | ||
69 | 0x08000000 - 0x0bffffff (64MB) | ||
70 | end | ||
71 | |||
72 | # Initialize LAN controller | ||
73 | define lanc_init | ||
74 | set $sfrbase = 0x00ef0000 | ||
75 | # Set BSEL3 (BSEL3 for the Chaos's bselc) | ||
76 | set *(unsigned long *)($sfrbase + 0x5300) = 0x07078040 | ||
77 | set *(unsigned long *)($sfrbase + 0x5304) = 0x01110102 | ||
78 | set *(unsigned long *)($sfrbase + 0x5308) = 0x00000001 | ||
79 | # Reset (P5=LED,P6.b4=LAN_RESET) | ||
80 | set *(unsigned short *)($sfrbase + 0x106c) = 0x0000 | ||
81 | set *(unsigned char *)($sfrbase + 0x1016) = 0xff | ||
82 | set *(unsigned char *)($sfrbase + 0x1086) = 0xff | ||
83 | shell sleep 0.1 | ||
84 | # swivel: 0=normal, 4=reverse | ||
85 | # set *(unsigned char *)($sfrbase + 0x1086) = 0x00 | ||
86 | set *(unsigned char *)($sfrbase + 0x1086) = 0x04 | ||
87 | set *(unsigned long *)(0x0c000330) = 0xffffffff | ||
88 | # Set mac address | ||
89 | set $lanc = (void*)0x0c000300 | ||
90 | set *(unsigned long *)($lanc + 0x0000) = 0x00610010 | ||
91 | set *(unsigned long *)($lanc + 0x0004) = 0x00200030 | ||
92 | set *(unsigned long *)($lanc + 0x0008) = 0x00400050 | ||
93 | set *(unsigned long *)($lanc + 0x000c) = 0x00600007 | ||
94 | end | ||
95 | document lanc_init | ||
96 | LAN controller initialization | ||
97 | ex.) MAC address: 10 20 30 40 50 60 | ||
98 | end | ||
99 | |||
100 | # LCD & CRT dual-head setting (8bpp) | ||
101 | define dispc_init | ||
102 | set $sfrbase = 0x00ef0000 | ||
103 | # BSEL4 Dispc | ||
104 | set *(unsigned long *)($sfrbase + 0x5400) = 0x06078000 | ||
105 | set *(unsigned long *)($sfrbase + 0x5404) = 0x00101101 | ||
106 | end | ||
107 | |||
108 | # MMU enable | ||
109 | define mmu_enable | ||
110 | set $evb=0x88000000 | ||
111 | set *(unsigned long *)0xffff0024=1 | ||
112 | end | ||
113 | |||
114 | # MMU disable | ||
115 | define mmu_disable | ||
116 | set $evb=0 | ||
117 | set *(unsigned long *)0xffff0024=0 | ||
118 | end | ||
119 | |||
120 | # Show TLB entries | ||
121 | define show_tlb_entries | ||
122 | set $i = 0 | ||
123 | set $addr = $arg0 | ||
124 | set $nr_entries = $arg1 | ||
125 | use_mon_code | ||
126 | while ($i < $nr_entries) | ||
127 | set $tlb_tag = *(unsigned long*)$addr | ||
128 | set $tlb_data = *(unsigned long*)($addr + 4) | ||
129 | printf " [%2d] 0x%08lx : 0x%08lx - 0x%08lx\n", $i, $addr, $tlb_tag, $tlb_data | ||
130 | set $i = $i + 1 | ||
131 | set $addr = $addr + 8 | ||
132 | end | ||
133 | use_debug_dma | ||
134 | end | ||
135 | define itlb | ||
136 | set $itlb=0xfe000000 | ||
137 | show_tlb_entries $itlb 0d32 | ||
138 | end | ||
139 | define dtlb | ||
140 | set $dtlb=0xfe000800 | ||
141 | show_tlb_entries $dtlb 0d32 | ||
142 | end | ||
143 | |||
144 | # Show current task structure | ||
145 | define show_current | ||
146 | set $current = $spi & 0xffffe000 | ||
147 | printf "$current=0x%08lX\n",$current | ||
148 | print *(struct task_struct *)$current | ||
149 | end | ||
150 | |||
151 | # Show user assigned task structure | ||
152 | define show_task | ||
153 | set = $arg0 & 0xffffe000 | ||
154 | printf "$task=0x%08lX\n",$task | ||
155 | print *(struct task_struct *)$task | ||
156 | end | ||
157 | document show_task | ||
158 | Show user assigned task structure | ||
159 | arg0 : task structure address | ||
160 | end | ||
161 | |||
162 | # Show M32R registers | ||
163 | define show_regs | ||
164 | printf " R0[0x%08lX] R1[0x%08lX] R2[0x%08lX] R3[0x%08lX]\n",$r0,$r1,$r2,$r3 | ||
165 | printf " R4[0x%08lX] R5[0x%08lX] R6[0x%08lX] R7[0x%08lX]\n",$r4,$r5,$r6,$r7 | ||
166 | printf " R8[0x%08lX] R9[0x%08lX] R10[0x%08lX] R11[0x%08lX]\n",$r8,$r9,$r10,$r11 | ||
167 | printf "R12[0x%08lX] FP[0x%08lX] LR[0x%08lX] SP[0x%08lX]\n",$r12,$fp,$lr,$sp | ||
168 | printf "PSW[0x%08lX] CBR[0x%08lX] SPI[0x%08lX] SPU[0x%08lX]\n",$psw,$cbr,$spi,$spu | ||
169 | printf "BPC[0x%08lX] PC[0x%08lX] ACCL[0x%08lX] ACCH[0x%08lX]\n",$bpc,$pc,$accl,$acch | ||
170 | printf "EVB[0x%08lX]\n",$evb | ||
171 | end | ||
172 | |||
173 | # Setup all | ||
174 | define setup | ||
175 | use_mon_code | ||
176 | set *(unsigned int)0xfffffffc=0x60 | ||
177 | shell sleep 0.1 | ||
178 | clock_init | ||
179 | shell sleep 0.1 | ||
180 | port_init | ||
181 | sdram_init | ||
182 | lanc_init | ||
183 | dispc_init | ||
184 | set $evb=0x00000000 | ||
185 | end | ||
186 | |||
187 | # Load modules | ||
188 | define load_modules | ||
189 | use_debug_dma | ||
190 | load | ||
191 | end | ||
192 | |||
193 | # Set kernel parameters | ||
194 | define set_kernel_parameters | ||
195 | set $param = (void*)0x00001000 | ||
196 | # INITRD_START | ||
197 | #set *(unsigned long *)($param + 0x0010) = 0x082a0000 | ||
198 | # INITRD_SIZE | ||
199 | #set *(unsigned long *)($param + 0x0014) = 0x00000000 | ||
200 | # M32R_CPUCLK | ||
201 | set *(unsigned long *)($param + 0x0018) = 0d200000000 | ||
202 | # M32R_BUSCLK | ||
203 | set *(unsigned long *)($param + 0x001c) = 0d50000000 | ||
204 | |||
205 | # M32R_TIMER_DIVIDE | ||
206 | set *(unsigned long *)($param + 0x0020) = 0d128 | ||
207 | |||
208 | set {char[0x200]}($param + 0x100) = "console=ttyS0,115200n8x root=/dev/nfsroot nfsroot=192.168.0.1:/project/m32r-linux/export/root.bbox-httpd nfsaddrs=192.168.0.101:192.168.0.1:192.168.0.1:255.255.255.0:mappi001 \0" | ||
209 | end | ||
210 | |||
211 | # Boot | ||
212 | define boot | ||
213 | set_kernel_parameters | ||
214 | set $fp = 0 | ||
215 | set $pc=0x00002000 | ||
216 | set *(long *)0xfffffff4=0x8080 | ||
217 | # b load_flat_binary | ||
218 | # set *(unsigned char *)0x08001003=0x63 | ||
219 | # set *(unsigned char *)0x08001003=0x02 | ||
220 | si | ||
221 | # c | ||
222 | end | ||
223 | |||
224 | # Set breakpoints | ||
225 | define set_breakpoints | ||
226 | b *0x08000030 | ||
227 | end | ||
228 | |||
229 | # Restart | ||
230 | define restart | ||
231 | sdireset | ||
232 | sdireset | ||
233 | setup | ||
234 | load_modules | ||
235 | boot | ||
236 | end | ||
237 | |||
238 | sdireset | ||
239 | sdireset | ||
240 | file vmlinux | ||
241 | target m32rsdi | ||
242 | setup | ||
243 | load_modules | ||
244 | boot | ||
245 | |||
diff --git a/arch/m32r/platforms/mappi/dot.gdbinit.smp b/arch/m32r/platforms/mappi/dot.gdbinit.smp deleted file mode 100644 index 171489a440d9..000000000000 --- a/arch/m32r/platforms/mappi/dot.gdbinit.smp +++ /dev/null | |||
@@ -1,344 +0,0 @@ | |||
1 | # .gdbinit file | ||
2 | # $Id$ | ||
3 | |||
4 | # setting | ||
5 | set width 0d70 | ||
6 | set radix 0d16 | ||
7 | debug_chaos | ||
8 | |||
9 | # clk xin:cpu:bif:bus=1:4:2:1 | ||
10 | define clock_init_on | ||
11 | set *(unsigned long *)0x00ef4024 = 2 | ||
12 | set *(unsigned long *)0x00ef4020 = 1 | ||
13 | set *(unsigned long *)0x00ef4010 = 0 | ||
14 | set *(unsigned long *)0x00ef4014 = 0 | ||
15 | set *(unsigned long *)0x00ef4004 = 0x1 | ||
16 | shell sleep 0.1 | ||
17 | set *(unsigned long *)0x00ef4008 = 0x0200 | ||
18 | # set *(unsigned long *)0x00ef4008 = 0x0201 | ||
19 | end | ||
20 | |||
21 | # clk xin:cpu:bif:bus=1:4:1:1 | ||
22 | define clock_init_on_1411 | ||
23 | set *(unsigned long *)0x00ef4024 = 2 | ||
24 | set *(unsigned long *)0x00ef4020 = 2 | ||
25 | set *(unsigned long *)0x00ef4010 = 0 | ||
26 | set *(unsigned long *)0x00ef4014 = 0 | ||
27 | set *(unsigned long *)0x00ef4004 = 0x1 | ||
28 | shell sleep 0.1 | ||
29 | set *(unsigned long *)0x00ef4008 = 0x0200 | ||
30 | end | ||
31 | |||
32 | # clk xin:cpu:bif:bus=1:4:2:1 | ||
33 | define clock_init_on_1421 | ||
34 | set *(unsigned long *)0x00ef4024 = 2 | ||
35 | set *(unsigned long *)0x00ef4020 = 1 | ||
36 | set *(unsigned long *)0x00ef4010 = 0 | ||
37 | set *(unsigned long *)0x00ef4014 = 0 | ||
38 | set *(unsigned long *)0x00ef4004 = 0x1 | ||
39 | shell sleep 0.1 | ||
40 | set *(unsigned long *)0x00ef4008 = 0x0200 | ||
41 | end | ||
42 | |||
43 | # clk xin:cpu:bif:bus=1:8:2:1 | ||
44 | define clock_init_on_1821 | ||
45 | set *(unsigned long *)0x00ef4024 = 3 | ||
46 | set *(unsigned long *)0x00ef4020 = 2 | ||
47 | set *(unsigned long *)0x00ef4010 = 0 | ||
48 | set *(unsigned long *)0x00ef4014 = 0 | ||
49 | set *(unsigned long *)0x00ef4004 = 0x3 | ||
50 | shell sleep 0.1 | ||
51 | set *(unsigned long *)0x00ef4008 = 0x0200 | ||
52 | end | ||
53 | |||
54 | # clk xin:cpu:bif:bus=1:8:4:1 | ||
55 | define clock_init_on_1841 | ||
56 | set *(unsigned long *)0x00ef4024 = 3 | ||
57 | set *(unsigned long *)0x00ef4020 = 1 | ||
58 | set *(unsigned long *)0x00ef4010 = 0 | ||
59 | set *(unsigned long *)0x00ef4014 = 0 | ||
60 | set *(unsigned long *)0x00ef4004 = 0x3 | ||
61 | shell sleep 0.1 | ||
62 | set *(unsigned long *)0x00ef4008 = 0x0200 | ||
63 | end | ||
64 | |||
65 | # clk xin:cpu:bif:bus=1:16:8:1 | ||
66 | define clock_init_on_11681 | ||
67 | set *(unsigned long *)0x00ef4024 = 4 | ||
68 | set *(unsigned long *)0x00ef4020 = 2 | ||
69 | set *(unsigned long *)0x00ef4010 = 0 | ||
70 | set *(unsigned long *)0x00ef4014 = 0 | ||
71 | set *(unsigned long *)0x00ef4004 = 0x7 | ||
72 | shell sleep 0.1 | ||
73 | set *(unsigned long *)0x00ef4008 = 0x0200 | ||
74 | end | ||
75 | |||
76 | # clk xin:cpu:bif:bus=1:1:1:1 | ||
77 | define clock_init_off | ||
78 | # CPU | ||
79 | set *(unsigned long *)0x00ef4010 = 0 | ||
80 | set *(unsigned long *)0x00ef4014 = 0 | ||
81 | # BIF | ||
82 | set *(unsigned long *)0x00ef4020 = 0 | ||
83 | # BUS | ||
84 | set *(unsigned long *)0x00ef4024 = 0 | ||
85 | # PLL | ||
86 | set *(unsigned long *)0x00ef4008 = 0x0000 | ||
87 | end | ||
88 | |||
89 | # Initialize programmable ports | ||
90 | define port_init | ||
91 | set $sfrbase = 0x00ef0000 | ||
92 | set *(unsigned short *)0x00ef1060 = 0x5555 | ||
93 | set *(unsigned short *)0x00ef1062 = 0x5555 | ||
94 | set *(unsigned short *)0x00ef1064 = 0x5555 | ||
95 | set *(unsigned short *)0x00ef1066 = 0x5555 | ||
96 | set *(unsigned short *)0x00ef1068 = 0x5555 | ||
97 | set *(unsigned short *)0x00ef106a = 0x0000 | ||
98 | set *(unsigned short *)0x00ef106e = 0x5555 | ||
99 | set *(unsigned short *)0x00ef1070 = 0x5555 | ||
100 | # LED ON | ||
101 | set *(unsigned char *)($sfrbase + 0x1015) = 0xff | ||
102 | set *(unsigned char *)($sfrbase + 0x1085) = 0xff | ||
103 | shell sleep 0.1 | ||
104 | # LED OFF | ||
105 | set *(unsigned char *)($sfrbase + 0x1085) = 0x00 | ||
106 | end | ||
107 | document port_init | ||
108 | P5=LED(output), P6.b4=LAN_RESET(output) | ||
109 | end | ||
110 | |||
111 | # Initialize SDRAM controller for Mappi | ||
112 | define sdram_init | ||
113 | # SDIR0 | ||
114 | set *(unsigned long *)0x00ef6008 = 0x00000182 | ||
115 | # SDIR1 | ||
116 | set *(unsigned long *)0x00ef600c = 0x00000001 | ||
117 | # Initialize wait | ||
118 | shell sleep 0.1 | ||
119 | # Ch0-MOD | ||
120 | set *(unsigned long *)0x00ef602c = 0x00000020 | ||
121 | # Ch0-TR | ||
122 | set *(unsigned long *)0x00ef6028 = 0x00010002 | ||
123 | # Ch0-ADR | ||
124 | set *(unsigned long *)0x00ef6020 = 0x08000004 | ||
125 | # AutoRef On | ||
126 | set *(unsigned long *)0x00ef6004 = 0x00010107 | ||
127 | # Access enable | ||
128 | set *(unsigned long *)0x00ef6024 = 0x00000001 | ||
129 | end | ||
130 | document sdram_init | ||
131 | Mappi SDRAM controller initialization | ||
132 | 0x08000000 - 0x0bffffff (64MB) | ||
133 | end | ||
134 | |||
135 | # Initialize LAN controller for Mappi | ||
136 | define lanc_init | ||
137 | set $sfrbase = 0x00ef0000 | ||
138 | # Set BSEL3 (BSEL3 for the Chaos's bselc) | ||
139 | # set *(unsigned long *)($sfrbase + 0x5300) = 0x01018040 | ||
140 | # set *(unsigned long *)($sfrbase + 0x5304) = 0x01011101 | ||
141 | set *(unsigned long *)($sfrbase + 0x5300) = 0x04048000 | ||
142 | set *(unsigned long *)($sfrbase + 0x5304) = 0x01011103 | ||
143 | set *(unsigned long *)($sfrbase + 0x5308) = 0x00000001 | ||
144 | # Reset (P5=LED,P6.b4=LAN_RESET) | ||
145 | set *(unsigned short *)($sfrbase + 0x106c) = 0x0000 | ||
146 | set *(unsigned char *)($sfrbase + 0x1016) = 0xff | ||
147 | set *(unsigned char *)($sfrbase + 0x1086) = 0xff | ||
148 | shell sleep 0.1 | ||
149 | # set *(unsigned char *)($sfrbase + 0x1086) = 0x00 | ||
150 | set *(unsigned char *)($sfrbase + 0x1086) = 0x04 | ||
151 | set *(unsigned long *)(0x0c000330) = 0xffffffff | ||
152 | # Set mac address | ||
153 | set $lanc = (void*)0x0c000300 | ||
154 | set *(unsigned long *)($lanc + 0x0000) = 0x00610010 | ||
155 | set *(unsigned long *)($lanc + 0x0004) = 0x00200030 | ||
156 | set *(unsigned long *)($lanc + 0x0008) = 0x00400050 | ||
157 | set *(unsigned long *)($lanc + 0x000c) = 0x00600007 | ||
158 | end | ||
159 | document lanc_init | ||
160 | Mappi LAN controller initialization | ||
161 | ex.) MAC address: 10 20 30 40 50 60 | ||
162 | end | ||
163 | |||
164 | # LCD & CRT dual-head setting (8bpp) | ||
165 | define dispc_init | ||
166 | set $sfrbase = 0x00ef0000 | ||
167 | # BSEL4 Dispc | ||
168 | # 20MHz | ||
169 | # set *(unsigned long *)($sfrbase + 0x5400) = 0x02028282 | ||
170 | # set *(unsigned long *)($sfrbase + 0x5404) = 0x00122202 | ||
171 | # 40MHz | ||
172 | set *(unsigned long *)($sfrbase + 0x5400) = 0x04048000 | ||
173 | set *(unsigned long *)($sfrbase + 0x5404) = 0x00101103 | ||
174 | end | ||
175 | |||
176 | # MMU enable | ||
177 | define mmu_enable | ||
178 | set $evb=0x88000000 | ||
179 | set *(unsigned long *)0xffff0024=1 | ||
180 | end | ||
181 | |||
182 | # MMU disable | ||
183 | define mmu_disable | ||
184 | set $evb=0 | ||
185 | set *(unsigned long *)0xffff0024=0 | ||
186 | end | ||
187 | |||
188 | # Show TLB entries | ||
189 | define show_tlb_entries | ||
190 | set $i = 0 | ||
191 | set $addr = $arg0 | ||
192 | use_mon_code | ||
193 | while ($i < 0d32 ) | ||
194 | set $tlb_tag = *(unsigned long*)$addr | ||
195 | set $tlb_data = *(unsigned long*)($addr + 4) | ||
196 | printf " [%2d] 0x%08lx : 0x%08lx - 0x%08lx\n", $i, $addr, $tlb_tag, $tlb_data | ||
197 | set $i = $i + 1 | ||
198 | set $addr = $addr + 8 | ||
199 | end | ||
200 | use_debug_dma | ||
201 | end | ||
202 | define itlb | ||
203 | set $itlb=0xfe000000 | ||
204 | show_tlb_entries $itlb | ||
205 | end | ||
206 | define dtlb | ||
207 | set $dtlb=0xfe000800 | ||
208 | show_tlb_entries $dtlb | ||
209 | end | ||
210 | |||
211 | |||
212 | # Show current task structure | ||
213 | define show_current | ||
214 | set $current = $spi & 0xffffe000 | ||
215 | printf "$current=0x%08lX\n",$current | ||
216 | print *(struct task_struct *)$current | ||
217 | end | ||
218 | |||
219 | # Show user assigned task structure | ||
220 | define show_task | ||
221 | set $task = $arg0 & 0xffffe000 | ||
222 | printf "$task=0x%08lX\n",$task | ||
223 | print *(struct task_struct *)$task | ||
224 | end | ||
225 | document show_task | ||
226 | Show user assigned task structure | ||
227 | arg0 : task structure address | ||
228 | end | ||
229 | |||
230 | # Show M32R registers | ||
231 | define show_regs | ||
232 | printf " R0[0x%08lX] R1[0x%08lX] R2[0x%08lX] R3[0x%08lX]\n",$r0,$r1,$r2,$r3 | ||
233 | printf " R4[0x%08lX] R5[0x%08lX] R6[0x%08lX] R7[0x%08lX]\n",$r4,$r5,$r6,$r7 | ||
234 | printf " R8[0x%08lX] R9[0x%08lX] R10[0x%08lX] R11[0x%08lX]\n",$r8,$r9,$r10,$r11 | ||
235 | printf "R12[0x%08lX] FP[0x%08lX] LR[0x%08lX] SP[0x%08lX]\n",$r12,$fp,$lr,$fp | ||
236 | printf "PSW[0x%08lX] CBR[0x%08lX] SPI[0x%08lX] SPU[0x%08lX]\n",$psw,$cbr,$spi,$spu | ||
237 | printf "BPC[0x%08lX] PC[0x%08lX] ACCL[0x%08lX] ACCH[0x%08lX]\n",$bpc,$pc,$accl,$acch | ||
238 | printf "EVB[0x%08lX]\n",$evb | ||
239 | end | ||
240 | |||
241 | |||
242 | # Setup all | ||
243 | define setup | ||
244 | use_mon_code | ||
245 | set *(unsigned int)0xfffffffc=0x60 | ||
246 | shell sleep 0.1 | ||
247 | # clock_init_on_1411 | ||
248 | clock_init_on_1421 | ||
249 | # clock_init_on_1821 | ||
250 | # clock_init_on_1841 | ||
251 | # clock_init_on_11681 | ||
252 | # clock_init_off | ||
253 | shell sleep 0.1 | ||
254 | port_init | ||
255 | sdram_init | ||
256 | lanc_init | ||
257 | dispc_init | ||
258 | set $evb=0x08000000 | ||
259 | end | ||
260 | |||
261 | # Load modules | ||
262 | define load_modules | ||
263 | use_debug_dma | ||
264 | load | ||
265 | # load ramdisk_082a0000.mot | ||
266 | # load romfs_082a0000.mot | ||
267 | # use_mon_code | ||
268 | end | ||
269 | |||
270 | # Set kernel parameters | ||
271 | define set_kernel_parameters | ||
272 | set $param = (void*)0x08001000 | ||
273 | # INITRD_START | ||
274 | # set *(unsigned long *)($param + 0x0010) = 0x082a0000 | ||
275 | # INITRD_SIZE | ||
276 | # set *(unsigned long *)($param + 0x0014) = 0x00000000 | ||
277 | # M32R_CPUCLK | ||
278 | set *(unsigned long *)($param + 0x0018) = 0d160000000 | ||
279 | # set *(unsigned long *)($param + 0x0018) = 0d80000000 | ||
280 | # set *(unsigned long *)($param + 0x0018) = 0d40000000 | ||
281 | # M32R_BUSCLK | ||
282 | set *(unsigned long *)($param + 0x001c) = 0d40000000 | ||
283 | |||
284 | # M32R_TIMER_DIVIDE | ||
285 | set *(unsigned long *)($param + 0x0020) = 0d128 | ||
286 | |||
287 | set {char[0x200]}($param + 0x100) = "console=tty1 console=ttyS0,115200n8x root=/dev/nfsroot nfsroot=192.168.0.1:/project/m32r-linux/export/root.x nfsaddrs=192.168.0.101:192.168.0.1:192.168.0.1:255.255.255.0:mappi001 \0" | ||
288 | # set {char[0x200]}($param + 0x100) = "console=tty1 root=/dev/nfsroot nfsroot=192.168.0.1:/project/m32r-linux/export/root.x nfsaddrs=192.168.0.101:192.168.0.1:192.168.0.1:255.255.255.0:mappi001 \0" | ||
289 | end | ||
290 | |||
291 | # Boot | ||
292 | define boot | ||
293 | set_kernel_parameters | ||
294 | set $pc=0x08002000 | ||
295 | set *(unsigned char *)0x08001003=0x03 | ||
296 | si | ||
297 | c | ||
298 | end | ||
299 | |||
300 | # Set breakpoints | ||
301 | define set_breakpoints | ||
302 | b *0x08000030 | ||
303 | end | ||
304 | |||
305 | ## Boot MP | ||
306 | define boot_mp | ||
307 | set_kernel_parameters | ||
308 | set *(unsigned long *)0x00f00000 = boot - 0x80000000 | ||
309 | set *(unsigned long *)0x00eff2f8 = 0x2 | ||
310 | x 0x00eff2f8 | ||
311 | |||
312 | set $pc=0x08002000 | ||
313 | si | ||
314 | c | ||
315 | end | ||
316 | document boot_mp | ||
317 | Boot BSP | ||
318 | end | ||
319 | |||
320 | ## Boot UP | ||
321 | define boot_up | ||
322 | set_kernel_parameters | ||
323 | set $pc=0x08002000 | ||
324 | si | ||
325 | c | ||
326 | end | ||
327 | document boot_up | ||
328 | Boot BSP | ||
329 | end | ||
330 | |||
331 | # Restart | ||
332 | define restart | ||
333 | sdireset | ||
334 | sdireset | ||
335 | setup | ||
336 | load_modules | ||
337 | boot_mp | ||
338 | end | ||
339 | |||
340 | sdireset | ||
341 | sdireset | ||
342 | file vmlinux | ||
343 | target m32rsdi | ||
344 | setup | ||
diff --git a/arch/m32r/platforms/mappi/io.c b/arch/m32r/platforms/mappi/io.c deleted file mode 100644 index 06ea6d9bc576..000000000000 --- a/arch/m32r/platforms/mappi/io.c +++ /dev/null | |||
@@ -1,326 +0,0 @@ | |||
1 | // SPDX-License-Identifier: GPL-2.0 | ||
2 | /* | ||
3 | * linux/arch/m32r/platforms/mappi/io.c | ||
4 | * | ||
5 | * Typical I/O routines for Mappi board. | ||
6 | * | ||
7 | * Copyright (c) 2001-2005 Hiroyuki Kondo, Hirokazu Takata, | ||
8 | * Hitoshi Yamamoto | ||
9 | */ | ||
10 | |||
11 | #include <asm/m32r.h> | ||
12 | #include <asm/page.h> | ||
13 | #include <asm/io.h> | ||
14 | #include <asm/byteorder.h> | ||
15 | |||
16 | #if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_PCC) | ||
17 | #include <linux/types.h> | ||
18 | |||
19 | #define M32R_PCC_IOMAP_SIZE 0x1000 | ||
20 | |||
21 | #define M32R_PCC_IOSTART0 0x1000 | ||
22 | #define M32R_PCC_IOEND0 (M32R_PCC_IOSTART0 + M32R_PCC_IOMAP_SIZE - 1) | ||
23 | #define M32R_PCC_IOSTART1 0x2000 | ||
24 | #define M32R_PCC_IOEND1 (M32R_PCC_IOSTART1 + M32R_PCC_IOMAP_SIZE - 1) | ||
25 | |||
26 | extern void pcc_ioread(int, unsigned long, void *, size_t, size_t, int); | ||
27 | extern void pcc_iowrite(int, unsigned long, void *, size_t, size_t, int); | ||
28 | #endif /* CONFIG_PCMCIA && CONFIG_M32R_PCC */ | ||
29 | |||
30 | #define PORT2ADDR(port) _port2addr(port) | ||
31 | |||
32 | static inline void *_port2addr(unsigned long port) | ||
33 | { | ||
34 | return (void *)(port | NONCACHE_OFFSET); | ||
35 | } | ||
36 | |||
37 | static inline void *_port2addr_ne(unsigned long port) | ||
38 | { | ||
39 | return (void *)((port<<1) + NONCACHE_OFFSET + 0x0C000000); | ||
40 | } | ||
41 | |||
42 | static inline void delay(void) | ||
43 | { | ||
44 | __asm__ __volatile__ ("push r0; \n\t pop r0;" : : :"memory"); | ||
45 | } | ||
46 | |||
47 | /* | ||
48 | * NIC I/O function | ||
49 | */ | ||
50 | |||
51 | #define PORT2ADDR_NE(port) _port2addr_ne(port) | ||
52 | |||
53 | static inline unsigned char _ne_inb(void *portp) | ||
54 | { | ||
55 | return (unsigned char) *(volatile unsigned short *)portp; | ||
56 | } | ||
57 | |||
58 | static inline unsigned short _ne_inw(void *portp) | ||
59 | { | ||
60 | unsigned short tmp; | ||
61 | |||
62 | tmp = *(volatile unsigned short *)portp; | ||
63 | return le16_to_cpu(tmp); | ||
64 | } | ||
65 | |||
66 | static inline void _ne_outb(unsigned char b, void *portp) | ||
67 | { | ||
68 | *(volatile unsigned short *)portp = (unsigned short)b; | ||
69 | } | ||
70 | |||
71 | static inline void _ne_outw(unsigned short w, void *portp) | ||
72 | { | ||
73 | *(volatile unsigned short *)portp = cpu_to_le16(w); | ||
74 | } | ||
75 | |||
76 | unsigned char _inb(unsigned long port) | ||
77 | { | ||
78 | if (port >= 0x300 && port < 0x320) | ||
79 | return _ne_inb(PORT2ADDR_NE(port)); | ||
80 | else | ||
81 | #if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_PCC) | ||
82 | if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) { | ||
83 | unsigned char b; | ||
84 | pcc_ioread(0, port, &b, sizeof(b), 1, 0); | ||
85 | return b; | ||
86 | } else if (port >= M32R_PCC_IOSTART1 && port <= M32R_PCC_IOEND1) { | ||
87 | unsigned char b; | ||
88 | pcc_ioread(1, port, &b, sizeof(b), 1, 0); | ||
89 | return b; | ||
90 | } else | ||
91 | #endif | ||
92 | |||
93 | return *(volatile unsigned char *)PORT2ADDR(port); | ||
94 | } | ||
95 | |||
96 | unsigned short _inw(unsigned long port) | ||
97 | { | ||
98 | if (port >= 0x300 && port < 0x320) | ||
99 | return _ne_inw(PORT2ADDR_NE(port)); | ||
100 | else | ||
101 | #if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_PCC) | ||
102 | if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) { | ||
103 | unsigned short w; | ||
104 | pcc_ioread(0, port, &w, sizeof(w), 1, 0); | ||
105 | return w; | ||
106 | } else if (port >= M32R_PCC_IOSTART1 && port <= M32R_PCC_IOEND1) { | ||
107 | unsigned short w; | ||
108 | pcc_ioread(1, port, &w, sizeof(w), 1, 0); | ||
109 | return w; | ||
110 | } else | ||
111 | #endif | ||
112 | return *(volatile unsigned short *)PORT2ADDR(port); | ||
113 | } | ||
114 | |||
115 | unsigned long _inl(unsigned long port) | ||
116 | { | ||
117 | #if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_PCC) | ||
118 | if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) { | ||
119 | unsigned long l; | ||
120 | pcc_ioread(0, port, &l, sizeof(l), 1, 0); | ||
121 | return l; | ||
122 | } else if (port >= M32R_PCC_IOSTART1 && port <= M32R_PCC_IOEND1) { | ||
123 | unsigned short l; | ||
124 | pcc_ioread(1, port, &l, sizeof(l), 1, 0); | ||
125 | return l; | ||
126 | } else | ||
127 | #endif | ||
128 | return *(volatile unsigned long *)PORT2ADDR(port); | ||
129 | } | ||
130 | |||
131 | unsigned char _inb_p(unsigned long port) | ||
132 | { | ||
133 | unsigned char v = _inb(port); | ||
134 | delay(); | ||
135 | return (v); | ||
136 | } | ||
137 | |||
138 | unsigned short _inw_p(unsigned long port) | ||
139 | { | ||
140 | unsigned short v = _inw(port); | ||
141 | delay(); | ||
142 | return (v); | ||
143 | } | ||
144 | |||
145 | unsigned long _inl_p(unsigned long port) | ||
146 | { | ||
147 | unsigned long v = _inl(port); | ||
148 | delay(); | ||
149 | return (v); | ||
150 | } | ||
151 | |||
152 | void _outb(unsigned char b, unsigned long port) | ||
153 | { | ||
154 | if (port >= 0x300 && port < 0x320) | ||
155 | _ne_outb(b, PORT2ADDR_NE(port)); | ||
156 | else | ||
157 | #if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_PCC) | ||
158 | if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) { | ||
159 | pcc_iowrite(0, port, &b, sizeof(b), 1, 0); | ||
160 | } else if (port >= M32R_PCC_IOSTART1 && port <= M32R_PCC_IOEND1) { | ||
161 | pcc_iowrite(1, port, &b, sizeof(b), 1, 0); | ||
162 | } else | ||
163 | #endif | ||
164 | *(volatile unsigned char *)PORT2ADDR(port) = b; | ||
165 | } | ||
166 | |||
167 | void _outw(unsigned short w, unsigned long port) | ||
168 | { | ||
169 | if (port >= 0x300 && port < 0x320) | ||
170 | _ne_outw(w, PORT2ADDR_NE(port)); | ||
171 | else | ||
172 | #if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_PCC) | ||
173 | if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) { | ||
174 | pcc_iowrite(0, port, &w, sizeof(w), 1, 0); | ||
175 | } else if (port >= M32R_PCC_IOSTART1 && port <= M32R_PCC_IOEND1) { | ||
176 | pcc_iowrite(1, port, &w, sizeof(w), 1, 0); | ||
177 | } else | ||
178 | #endif | ||
179 | *(volatile unsigned short *)PORT2ADDR(port) = w; | ||
180 | } | ||
181 | |||
182 | void _outl(unsigned long l, unsigned long port) | ||
183 | { | ||
184 | #if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_PCC) | ||
185 | if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) { | ||
186 | pcc_iowrite(0, port, &l, sizeof(l), 1, 0); | ||
187 | } else if (port >= M32R_PCC_IOSTART1 && port <= M32R_PCC_IOEND1) { | ||
188 | pcc_iowrite(1, port, &l, sizeof(l), 1, 0); | ||
189 | } else | ||
190 | #endif | ||
191 | *(volatile unsigned long *)PORT2ADDR(port) = l; | ||
192 | } | ||
193 | |||
194 | void _outb_p(unsigned char b, unsigned long port) | ||
195 | { | ||
196 | _outb(b, port); | ||
197 | delay(); | ||
198 | } | ||
199 | |||
200 | void _outw_p(unsigned short w, unsigned long port) | ||
201 | { | ||
202 | _outw(w, port); | ||
203 | delay(); | ||
204 | } | ||
205 | |||
206 | void _outl_p(unsigned long l, unsigned long port) | ||
207 | { | ||
208 | _outl(l, port); | ||
209 | delay(); | ||
210 | } | ||
211 | |||
212 | void _insb(unsigned int port, void *addr, unsigned long count) | ||
213 | { | ||
214 | unsigned short *buf = addr; | ||
215 | unsigned short *portp; | ||
216 | |||
217 | if (port >= 0x300 && port < 0x320){ | ||
218 | portp = PORT2ADDR_NE(port); | ||
219 | while (count--) | ||
220 | *buf++ = *(volatile unsigned char *)portp; | ||
221 | #if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_PCC) | ||
222 | } else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) { | ||
223 | pcc_ioread(0, port, (void *)addr, sizeof(unsigned char), | ||
224 | count, 1); | ||
225 | } else if (port >= M32R_PCC_IOSTART1 && port <= M32R_PCC_IOEND1) { | ||
226 | pcc_ioread(1, port, (void *)addr, sizeof(unsigned char), | ||
227 | count, 1); | ||
228 | #endif | ||
229 | } else { | ||
230 | portp = PORT2ADDR(port); | ||
231 | while (count--) | ||
232 | *buf++ = *(volatile unsigned char *)portp; | ||
233 | } | ||
234 | } | ||
235 | |||
236 | void _insw(unsigned int port, void *addr, unsigned long count) | ||
237 | { | ||
238 | unsigned short *buf = addr; | ||
239 | unsigned short *portp; | ||
240 | |||
241 | if (port >= 0x300 && port < 0x320) { | ||
242 | portp = PORT2ADDR_NE(port); | ||
243 | while (count--) | ||
244 | *buf++ = _ne_inw(portp); | ||
245 | #if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_PCC) | ||
246 | } else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) { | ||
247 | pcc_ioread(0, port, (void *)addr, sizeof(unsigned short), | ||
248 | count, 1); | ||
249 | } else if (port >= M32R_PCC_IOSTART1 && port <= M32R_PCC_IOEND1) { | ||
250 | pcc_ioread(1, port, (void *)addr, sizeof(unsigned short), | ||
251 | count, 1); | ||
252 | #endif | ||
253 | } else { | ||
254 | portp = PORT2ADDR(port); | ||
255 | while (count--) | ||
256 | *buf++ = *(volatile unsigned short *)portp; | ||
257 | } | ||
258 | } | ||
259 | |||
260 | void _insl(unsigned int port, void *addr, unsigned long count) | ||
261 | { | ||
262 | unsigned long *buf = addr; | ||
263 | unsigned long *portp; | ||
264 | |||
265 | portp = PORT2ADDR(port); | ||
266 | while (count--) | ||
267 | *buf++ = *(volatile unsigned long *)portp; | ||
268 | } | ||
269 | |||
270 | void _outsb(unsigned int port, const void *addr, unsigned long count) | ||
271 | { | ||
272 | const unsigned char *buf = addr; | ||
273 | unsigned char *portp; | ||
274 | |||
275 | if (port >= 0x300 && port < 0x320) { | ||
276 | portp = PORT2ADDR_NE(port); | ||
277 | while (count--) | ||
278 | _ne_outb(*buf++, portp); | ||
279 | #if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_PCC) | ||
280 | } else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) { | ||
281 | pcc_iowrite(0, port, (void *)addr, sizeof(unsigned char), | ||
282 | count, 1); | ||
283 | } else if (port >= M32R_PCC_IOSTART1 && port <= M32R_PCC_IOEND1) { | ||
284 | pcc_iowrite(1, port, (void *)addr, sizeof(unsigned char), | ||
285 | count, 1); | ||
286 | #endif | ||
287 | } else { | ||
288 | portp = PORT2ADDR(port); | ||
289 | while (count--) | ||
290 | *(volatile unsigned char *)portp = *buf++; | ||
291 | } | ||
292 | } | ||
293 | |||
294 | void _outsw(unsigned int port, const void *addr, unsigned long count) | ||
295 | { | ||
296 | const unsigned short *buf = addr; | ||
297 | unsigned short *portp; | ||
298 | |||
299 | if (port >= 0x300 && port < 0x320) { | ||
300 | portp = PORT2ADDR_NE(port); | ||
301 | while (count--) | ||
302 | _ne_outw(*buf++, portp); | ||
303 | #if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_PCC) | ||
304 | } else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) { | ||
305 | pcc_iowrite(0, port, (void *)addr, sizeof(unsigned short), | ||
306 | count, 1); | ||
307 | } else if (port >= M32R_PCC_IOSTART1 && port <= M32R_PCC_IOEND1) { | ||
308 | pcc_iowrite(1, port, (void *)addr, sizeof(unsigned short), | ||
309 | count, 1); | ||
310 | #endif | ||
311 | } else { | ||
312 | portp = PORT2ADDR(port); | ||
313 | while (count--) | ||
314 | *(volatile unsigned short *)portp = *buf++; | ||
315 | } | ||
316 | } | ||
317 | |||
318 | void _outsl(unsigned int port, const void *addr, unsigned long count) | ||
319 | { | ||
320 | const unsigned long *buf = addr; | ||
321 | unsigned char *portp; | ||
322 | |||
323 | portp = PORT2ADDR(port); | ||
324 | while (count--) | ||
325 | *(volatile unsigned long *)portp = *buf++; | ||
326 | } | ||
diff --git a/arch/m32r/platforms/mappi/setup.c b/arch/m32r/platforms/mappi/setup.c deleted file mode 100644 index c8d642ec4bfb..000000000000 --- a/arch/m32r/platforms/mappi/setup.c +++ /dev/null | |||
@@ -1,175 +0,0 @@ | |||
1 | // SPDX-License-Identifier: GPL-2.0 | ||
2 | /* | ||
3 | * linux/arch/m32r/platforms/mappi/setup.c | ||
4 | * | ||
5 | * Setup routines for Renesas MAPPI Board | ||
6 | * | ||
7 | * Copyright (c) 2001-2005 Hiroyuki Kondo, Hirokazu Takata, | ||
8 | * Hitoshi Yamamoto | ||
9 | */ | ||
10 | |||
11 | #include <linux/irq.h> | ||
12 | #include <linux/kernel.h> | ||
13 | #include <linux/init.h> | ||
14 | #include <linux/platform_device.h> | ||
15 | |||
16 | #include <asm/m32r.h> | ||
17 | #include <asm/io.h> | ||
18 | |||
19 | #define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long))) | ||
20 | |||
21 | icu_data_t icu_data[NR_IRQS]; | ||
22 | |||
23 | static void disable_mappi_irq(unsigned int irq) | ||
24 | { | ||
25 | unsigned long port, data; | ||
26 | |||
27 | port = irq2port(irq); | ||
28 | data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7; | ||
29 | outl(data, port); | ||
30 | } | ||
31 | |||
32 | static void enable_mappi_irq(unsigned int irq) | ||
33 | { | ||
34 | unsigned long port, data; | ||
35 | |||
36 | port = irq2port(irq); | ||
37 | data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6; | ||
38 | outl(data, port); | ||
39 | } | ||
40 | |||
41 | static void mask_mappi(struct irq_data *data) | ||
42 | { | ||
43 | disable_mappi_irq(data->irq); | ||
44 | } | ||
45 | |||
46 | static void unmask_mappi(struct irq_data *data) | ||
47 | { | ||
48 | enable_mappi_irq(data->irq); | ||
49 | } | ||
50 | |||
51 | static void shutdown_mappi(struct irq_data *data) | ||
52 | { | ||
53 | unsigned long port; | ||
54 | |||
55 | port = irq2port(data->irq); | ||
56 | outl(M32R_ICUCR_ILEVEL7, port); | ||
57 | } | ||
58 | |||
59 | static struct irq_chip mappi_irq_type = | ||
60 | { | ||
61 | .name = "MAPPI-IRQ", | ||
62 | .irq_shutdown = shutdown_mappi, | ||
63 | .irq_mask = mask_mappi, | ||
64 | .irq_unmask = unmask_mappi, | ||
65 | }; | ||
66 | |||
67 | void __init init_IRQ(void) | ||
68 | { | ||
69 | static int once = 0; | ||
70 | |||
71 | if (once) | ||
72 | return; | ||
73 | else | ||
74 | once++; | ||
75 | |||
76 | #ifdef CONFIG_NE2000 | ||
77 | /* INT0 : LAN controller (RTL8019AS) */ | ||
78 | irq_set_chip_and_handler(M32R_IRQ_INT0, &mappi_irq_type, | ||
79 | handle_level_irq); | ||
80 | icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD11; | ||
81 | disable_mappi_irq(M32R_IRQ_INT0); | ||
82 | #endif /* CONFIG_M32R_NE2000 */ | ||
83 | |||
84 | /* MFT2 : system timer */ | ||
85 | irq_set_chip_and_handler(M32R_IRQ_MFT2, &mappi_irq_type, | ||
86 | handle_level_irq); | ||
87 | icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; | ||
88 | disable_mappi_irq(M32R_IRQ_MFT2); | ||
89 | |||
90 | #ifdef CONFIG_SERIAL_M32R_SIO | ||
91 | /* SIO0_R : uart receive data */ | ||
92 | irq_set_chip_and_handler(M32R_IRQ_SIO0_R, &mappi_irq_type, | ||
93 | handle_level_irq); | ||
94 | icu_data[M32R_IRQ_SIO0_R].icucr = 0; | ||
95 | disable_mappi_irq(M32R_IRQ_SIO0_R); | ||
96 | |||
97 | /* SIO0_S : uart send data */ | ||
98 | irq_set_chip_and_handler(M32R_IRQ_SIO0_S, &mappi_irq_type, | ||
99 | handle_level_irq); | ||
100 | icu_data[M32R_IRQ_SIO0_S].icucr = 0; | ||
101 | disable_mappi_irq(M32R_IRQ_SIO0_S); | ||
102 | |||
103 | /* SIO1_R : uart receive data */ | ||
104 | irq_set_chip_and_handler(M32R_IRQ_SIO1_R, &mappi_irq_type, | ||
105 | handle_level_irq); | ||
106 | icu_data[M32R_IRQ_SIO1_R].icucr = 0; | ||
107 | disable_mappi_irq(M32R_IRQ_SIO1_R); | ||
108 | |||
109 | /* SIO1_S : uart send data */ | ||
110 | irq_set_chip_and_handler(M32R_IRQ_SIO1_S, &mappi_irq_type, | ||
111 | handle_level_irq); | ||
112 | icu_data[M32R_IRQ_SIO1_S].icucr = 0; | ||
113 | disable_mappi_irq(M32R_IRQ_SIO1_S); | ||
114 | #endif /* CONFIG_SERIAL_M32R_SIO */ | ||
115 | |||
116 | #if defined(CONFIG_M32R_PCC) | ||
117 | /* INT1 : pccard0 interrupt */ | ||
118 | irq_set_chip_and_handler(M32R_IRQ_INT1, &mappi_irq_type, | ||
119 | handle_level_irq); | ||
120 | icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD00; | ||
121 | disable_mappi_irq(M32R_IRQ_INT1); | ||
122 | |||
123 | /* INT2 : pccard1 interrupt */ | ||
124 | irq_set_chip_and_handler(M32R_IRQ_INT2, &mappi_irq_type, | ||
125 | handle_level_irq); | ||
126 | icu_data[M32R_IRQ_INT2].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD00; | ||
127 | disable_mappi_irq(M32R_IRQ_INT2); | ||
128 | #endif /* CONFIG_M32RPCC */ | ||
129 | } | ||
130 | |||
131 | #if defined(CONFIG_FB_S1D13XXX) | ||
132 | |||
133 | #include <video/s1d13xxxfb.h> | ||
134 | #include <asm/s1d13806.h> | ||
135 | |||
136 | static struct s1d13xxxfb_pdata s1d13xxxfb_data = { | ||
137 | .initregs = s1d13xxxfb_initregs, | ||
138 | .initregssize = ARRAY_SIZE(s1d13xxxfb_initregs), | ||
139 | .platform_init_video = NULL, | ||
140 | #ifdef CONFIG_PM | ||
141 | .platform_suspend_video = NULL, | ||
142 | .platform_resume_video = NULL, | ||
143 | #endif | ||
144 | }; | ||
145 | |||
146 | static struct resource s1d13xxxfb_resources[] = { | ||
147 | [0] = { | ||
148 | .start = 0x10200000UL, | ||
149 | .end = 0x1033FFFFUL, | ||
150 | .flags = IORESOURCE_MEM, | ||
151 | }, | ||
152 | [1] = { | ||
153 | .start = 0x10000000UL, | ||
154 | .end = 0x100001FFUL, | ||
155 | .flags = IORESOURCE_MEM, | ||
156 | } | ||
157 | }; | ||
158 | |||
159 | static struct platform_device s1d13xxxfb_device = { | ||
160 | .name = S1D_DEVICENAME, | ||
161 | .id = 0, | ||
162 | .dev = { | ||
163 | .platform_data = &s1d13xxxfb_data, | ||
164 | }, | ||
165 | .num_resources = ARRAY_SIZE(s1d13xxxfb_resources), | ||
166 | .resource = s1d13xxxfb_resources, | ||
167 | }; | ||
168 | |||
169 | static int __init platform_init(void) | ||
170 | { | ||
171 | platform_device_register(&s1d13xxxfb_device); | ||
172 | return 0; | ||
173 | } | ||
174 | arch_initcall(platform_init); | ||
175 | #endif | ||
diff --git a/arch/m32r/platforms/mappi2/Makefile b/arch/m32r/platforms/mappi2/Makefile deleted file mode 100644 index 0de59084f21c..000000000000 --- a/arch/m32r/platforms/mappi2/Makefile +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | obj-y := setup.o io.o | ||
diff --git a/arch/m32r/platforms/mappi2/dot.gdbinit.vdec2 b/arch/m32r/platforms/mappi2/dot.gdbinit.vdec2 deleted file mode 100644 index 797a830bd4b7..000000000000 --- a/arch/m32r/platforms/mappi2/dot.gdbinit.vdec2 +++ /dev/null | |||
@@ -1,233 +0,0 @@ | |||
1 | # .gdbinit file | ||
2 | # $Id: dot.gdbinit.vdec2,v 1.2 2004/11/11 02:03:15 takata Exp $ | ||
3 | |||
4 | # setting | ||
5 | set width 0d70 | ||
6 | set radix 0d16 | ||
7 | use_debug_dma | ||
8 | |||
9 | # Initialize SDRAM controller for Mappi | ||
10 | define sdram_init | ||
11 | # SDIR0 | ||
12 | set *(unsigned long *)0x00ef6008=0x00000182 | ||
13 | # SDIR1 | ||
14 | set *(unsigned long *)0x00ef600c=0x00000001 | ||
15 | # Initialize wait | ||
16 | shell sleep 1 | ||
17 | # Ch0-MOD | ||
18 | set *(unsigned long *)0x00ef602c=0x00000020 | ||
19 | # Ch0-TR | ||
20 | set *(unsigned long *)0x00ef6028=0x00041302 | ||
21 | # Ch0-ADR | ||
22 | set *(unsigned long *)0x00ef6020=0x08000004 | ||
23 | # AutoRef On | ||
24 | set *(unsigned long *)0x00ef6004=0x00010705 | ||
25 | # Access enable | ||
26 | set *(unsigned long *)0x00ef6024=0x00000001 | ||
27 | end | ||
28 | document sdram_init | ||
29 | Mappi SDRAM controller initialization | ||
30 | 0x08000000 - 0x0bffffff (64MB) | ||
31 | end | ||
32 | |||
33 | # Initialize SDRAM controller for Mappi | ||
34 | define sdram_init2 | ||
35 | # SDIR0 | ||
36 | set *(unsigned long *)0x00ef6008=0x00000182 | ||
37 | # Ch0-MOD | ||
38 | set *(unsigned long *)0x00ef602c=0x00000020 | ||
39 | # Ch0-TR | ||
40 | set *(unsigned long *)0x00ef6028=0x00010002 | ||
41 | # Ch0-ADR | ||
42 | set *(unsigned long *)0x00ef6020=0x08000004 | ||
43 | # AutoRef On | ||
44 | set *(unsigned long *)0x00ef6004=0x00010107 | ||
45 | # SDIR1 | ||
46 | set *(unsigned long *)0x00ef600c=0x00000001 | ||
47 | # Initialize wait | ||
48 | shell sleep 1 | ||
49 | # Access enable | ||
50 | set *(unsigned long *)0x00ef6024=0x00000001 | ||
51 | shell sleep 1 | ||
52 | end | ||
53 | document sdram_init | ||
54 | Mappi SDRAM controller initialization | ||
55 | 0x08000000 - 0x0bffffff (64MB) | ||
56 | end | ||
57 | |||
58 | # Initialize LAN controller for Mappi | ||
59 | define lanc_init | ||
60 | # Set BSEL1 (BSEL3 for the Chaos's bselc) | ||
61 | #set *(unsigned long *)0x00ef5004 = 0x0fff330f | ||
62 | #set *(unsigned long *)0x00ef5004 = 0x01113301 | ||
63 | |||
64 | # set *(unsigned long *)0x00ef5004 = 0x02011101 | ||
65 | # set *(unsigned long *)0x00ef5004 = 0x04441104 | ||
66 | |||
67 | # BSEL5 | ||
68 | # set *(unsigned long *)0x00ef5014 = 0x0ccc310c | ||
69 | # set *(unsigned long *)0x00ef5014 = 0x0303310f | ||
70 | # set *(unsigned long *)0x00ef5014 = 0x01011102 -> NG | ||
71 | # set *(unsigned long *)0x00ef5014 = 0x03033103 | ||
72 | |||
73 | set *(unsigned long *)0x00ef500c = 0x0b0b1304 | ||
74 | set *(unsigned long *)0x00ef5010 = 0x03033302 | ||
75 | # set *(unsigned long *)0x00ef5018 = 0x02223302 | ||
76 | end | ||
77 | |||
78 | # MMU enable | ||
79 | define mmu_enable | ||
80 | set $evb=0x88000000 | ||
81 | set *(unsigned long *)0xffff0024=1 | ||
82 | end | ||
83 | |||
84 | # MMU disable | ||
85 | define mmu_disable | ||
86 | set $evb=0 | ||
87 | set *(unsigned long *)0xffff0024=0 | ||
88 | end | ||
89 | |||
90 | # Show TLB entries | ||
91 | define show_tlb_entries | ||
92 | set $i = 0 | ||
93 | set $addr = $arg0 | ||
94 | while ($i < 0d16 ) | ||
95 | set $tlb_tag = *(unsigned long*)$addr | ||
96 | set $tlb_data = *(unsigned long*)($addr + 4) | ||
97 | printf " [%2d] 0x%08lx : 0x%08lx - 0x%08lx\n", $i, $addr, $tlb_tag, $tlb_data | ||
98 | set $i = $i + 1 | ||
99 | set $addr = $addr + 8 | ||
100 | end | ||
101 | end | ||
102 | define itlb | ||
103 | set $itlb=0xfe000000 | ||
104 | show_tlb_entries $itlb | ||
105 | end | ||
106 | define dtlb | ||
107 | set $dtlb=0xfe000800 | ||
108 | show_tlb_entries $dtlb | ||
109 | end | ||
110 | |||
111 | # Cache ON | ||
112 | define set_cache_type | ||
113 | set $mctype = (void*)0xfffffff8 | ||
114 | # chaos | ||
115 | # set *(unsigned long *)($mctype) = 0x0000c000 | ||
116 | # m32102 i-cache only | ||
117 | set *(unsigned long *)($mctype) = 0x00008000 | ||
118 | # m32102 d-cache only | ||
119 | # set *(unsigned long *)($mctype) = 0x00004000 | ||
120 | end | ||
121 | define cache_on | ||
122 | set $param = (void*)0x08001000 | ||
123 | set *(unsigned long *)($param) = 0x60ff6102 | ||
124 | end | ||
125 | |||
126 | |||
127 | # Show current task structure | ||
128 | define show_current | ||
129 | set $current = $spi & 0xffffe000 | ||
130 | printf "$current=0x%08lX\n",$current | ||
131 | print *(struct task_struct *)$current | ||
132 | end | ||
133 | |||
134 | # Show user assigned task structure | ||
135 | define show_task | ||
136 | set $task = $arg0 & 0xffffe000 | ||
137 | printf "$task=0x%08lX\n",$task | ||
138 | print *(struct task_struct *)$task | ||
139 | end | ||
140 | document show_task | ||
141 | Show user assigned task structure | ||
142 | arg0 : task structure address | ||
143 | end | ||
144 | |||
145 | # Show M32R registers | ||
146 | define show_regs | ||
147 | printf " R0[0x%08lX] R1[0x%08lX] R2[0x%08lX] R3[0x%08lX]\n",$r0,$r1,$r2,$r3 | ||
148 | printf " R4[0x%08lX] R5[0x%08lX] R6[0x%08lX] R7[0x%08lX]\n",$r4,$r5,$r6,$r7 | ||
149 | printf " R8[0x%08lX] R9[0x%08lX] R10[0x%08lX] R11[0x%08lX]\n",$r8,$r9,$r10,$r11 | ||
150 | printf "R12[0x%08lX] FP[0x%08lX] LR[0x%08lX] SP[0x%08lX]\n",$r12,$fp,$lr,$sp | ||
151 | printf "PSW[0x%08lX] CBR[0x%08lX] SPI[0x%08lX] SPU[0x%08lX]\n",$psw,$cbr,$spi,$spu | ||
152 | printf "BPC[0x%08lX] PC[0x%08lX] ACCL[0x%08lX] ACCH[0x%08lX]\n",$bpc,$pc,$accl,$acch | ||
153 | printf "EVB[0x%08lX]\n",$evb | ||
154 | |||
155 | set $mests = *(unsigned long *)0xffff000c | ||
156 | set $mdeva = *(unsigned long *)0xffff0010 | ||
157 | printf "MESTS[0x%08lX] MDEVA[0x%08lX]\n",$mests,$mdeva | ||
158 | end | ||
159 | |||
160 | |||
161 | # Setup all | ||
162 | define setup | ||
163 | sdram_init | ||
164 | # lanc_init | ||
165 | # dispc_init | ||
166 | # set $evb=0x08000000 | ||
167 | end | ||
168 | |||
169 | # Load modules | ||
170 | define load_modules | ||
171 | use_debug_dma | ||
172 | load | ||
173 | # load busybox.mot | ||
174 | end | ||
175 | |||
176 | # Set kernel parameters | ||
177 | define set_kernel_parameters | ||
178 | set $param = (void*)0x08001000 | ||
179 | |||
180 | ## MOUNT_ROOT_RDONLY | ||
181 | set {long}($param+0x00)=0 | ||
182 | ## RAMDISK_FLAGS | ||
183 | #set {long}($param+0x04)=0 | ||
184 | ## ORIG_ROOT_DEV | ||
185 | #set {long}($param+0x08)=0x00000100 | ||
186 | ## LOADER_TYPE | ||
187 | #set {long}($param+0x0C)=0 | ||
188 | ## INITRD_START | ||
189 | set {long}($param+0x10)=0x082a0000 | ||
190 | ## INITRD_SIZE | ||
191 | set {long}($param+0x14)=0d6200000 | ||
192 | |||
193 | # M32R_CPUCLK | ||
194 | set *(unsigned long *)($param + 0x0018) = 0d25000000 | ||
195 | # M32R_BUSCLK | ||
196 | set *(unsigned long *)($param + 0x001c) = 0d25000000 | ||
197 | # M32R_TIMER_DIVIDE | ||
198 | set *(unsigned long *)($param + 0x0020) = 0d128 | ||
199 | |||
200 | |||
201 | set {char[0x200]}($param + 0x100) = "console=ttyS0,115200n8x root=/dev/nfsroot nfsroot=192.168.0.1:/project/m32r-linux/export/root.2.6 nfsaddrs=192.168.0.102:192.168.0.1:192.168.0.1:255.255.255.0:mappi: \0" | ||
202 | |||
203 | |||
204 | end | ||
205 | |||
206 | # Boot | ||
207 | define boot | ||
208 | set_kernel_parameters | ||
209 | debug_chaos | ||
210 | set $pc=0x08002000 | ||
211 | set $fp=0 | ||
212 | del b | ||
213 | si | ||
214 | end | ||
215 | |||
216 | # Restart | ||
217 | define restart | ||
218 | sdireset | ||
219 | sdireset | ||
220 | setup | ||
221 | load_modules | ||
222 | boot | ||
223 | end | ||
224 | |||
225 | sdireset | ||
226 | sdireset | ||
227 | file vmlinux | ||
228 | target m32rsdi | ||
229 | |||
230 | restart | ||
231 | boot | ||
232 | |||
233 | |||
diff --git a/arch/m32r/platforms/mappi2/io.c b/arch/m32r/platforms/mappi2/io.c deleted file mode 100644 index 18a408ff3fd1..000000000000 --- a/arch/m32r/platforms/mappi2/io.c +++ /dev/null | |||
@@ -1,384 +0,0 @@ | |||
1 | // SPDX-License-Identifier: GPL-2.0 | ||
2 | /* | ||
3 | * linux/arch/m32r/platforms/mappi2/io.c | ||
4 | * | ||
5 | * Typical I/O routines for Mappi2 board. | ||
6 | * | ||
7 | * Copyright (c) 2001-2005 Hiroyuki Kondo, Hirokazu Takata, | ||
8 | * Hitoshi Yamamoto, Mamoru Sakugawa | ||
9 | */ | ||
10 | |||
11 | #include <asm/m32r.h> | ||
12 | #include <asm/page.h> | ||
13 | #include <asm/io.h> | ||
14 | #include <asm/byteorder.h> | ||
15 | |||
16 | #if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC) | ||
17 | #include <linux/types.h> | ||
18 | |||
19 | #define M32R_PCC_IOMAP_SIZE 0x1000 | ||
20 | |||
21 | #define M32R_PCC_IOSTART0 0x1000 | ||
22 | #define M32R_PCC_IOEND0 (M32R_PCC_IOSTART0 + M32R_PCC_IOMAP_SIZE - 1) | ||
23 | |||
24 | extern void pcc_ioread_byte(int, unsigned long, void *, size_t, size_t, int); | ||
25 | extern void pcc_ioread_word(int, unsigned long, void *, size_t, size_t, int); | ||
26 | extern void pcc_iowrite_byte(int, unsigned long, void *, size_t, size_t, int); | ||
27 | extern void pcc_iowrite_word(int, unsigned long, void *, size_t, size_t, int); | ||
28 | #endif /* CONFIG_PCMCIA && CONFIG_M32R_CFC */ | ||
29 | |||
30 | #define PORT2ADDR(port) _port2addr(port) | ||
31 | #define PORT2ADDR_NE(port) _port2addr_ne(port) | ||
32 | #define PORT2ADDR_USB(port) _port2addr_usb(port) | ||
33 | |||
34 | static inline void *_port2addr(unsigned long port) | ||
35 | { | ||
36 | return (void *)(port | NONCACHE_OFFSET); | ||
37 | } | ||
38 | |||
39 | #if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC) | ||
40 | static inline void *__port2addr_ata(unsigned long port) | ||
41 | { | ||
42 | static int dummy_reg; | ||
43 | |||
44 | switch (port) { | ||
45 | case 0x1f0: return (void *)(0x0c002000 | NONCACHE_OFFSET); | ||
46 | case 0x1f1: return (void *)(0x0c012800 | NONCACHE_OFFSET); | ||
47 | case 0x1f2: return (void *)(0x0c012002 | NONCACHE_OFFSET); | ||
48 | case 0x1f3: return (void *)(0x0c012802 | NONCACHE_OFFSET); | ||
49 | case 0x1f4: return (void *)(0x0c012004 | NONCACHE_OFFSET); | ||
50 | case 0x1f5: return (void *)(0x0c012804 | NONCACHE_OFFSET); | ||
51 | case 0x1f6: return (void *)(0x0c012006 | NONCACHE_OFFSET); | ||
52 | case 0x1f7: return (void *)(0x0c012806 | NONCACHE_OFFSET); | ||
53 | case 0x3f6: return (void *)(0x0c01200e | NONCACHE_OFFSET); | ||
54 | default: return (void *)&dummy_reg; | ||
55 | } | ||
56 | } | ||
57 | #endif | ||
58 | |||
59 | #define LAN_IOSTART (0x300 | NONCACHE_OFFSET) | ||
60 | #define LAN_IOEND (0x320 | NONCACHE_OFFSET) | ||
61 | #ifdef CONFIG_CHIP_OPSP | ||
62 | static inline void *_port2addr_ne(unsigned long port) | ||
63 | { | ||
64 | return (void *)(port + 0x10000000); | ||
65 | } | ||
66 | #else | ||
67 | static inline void *_port2addr_ne(unsigned long port) | ||
68 | { | ||
69 | return (void *)(port + 0x04000000); | ||
70 | } | ||
71 | #endif | ||
72 | static inline void *_port2addr_usb(unsigned long port) | ||
73 | { | ||
74 | return (void *)(port + NONCACHE_OFFSET + 0x14000000); | ||
75 | } | ||
76 | static inline void delay(void) | ||
77 | { | ||
78 | __asm__ __volatile__ ("push r0; \n\t pop r0;" : : :"memory"); | ||
79 | } | ||
80 | |||
81 | /* | ||
82 | * NIC I/O function | ||
83 | */ | ||
84 | |||
85 | static inline unsigned char _ne_inb(void *portp) | ||
86 | { | ||
87 | return (unsigned char) *(volatile unsigned char *)portp; | ||
88 | } | ||
89 | |||
90 | static inline unsigned short _ne_inw(void *portp) | ||
91 | { | ||
92 | return (unsigned short)le16_to_cpu(*(volatile unsigned short *)portp); | ||
93 | } | ||
94 | |||
95 | static inline void _ne_insb(void *portp, void * addr, unsigned long count) | ||
96 | { | ||
97 | unsigned char *buf = addr; | ||
98 | |||
99 | while (count--) | ||
100 | *buf++ = *(volatile unsigned char *)portp; | ||
101 | } | ||
102 | |||
103 | static inline void _ne_outb(unsigned char b, void *portp) | ||
104 | { | ||
105 | *(volatile unsigned char *)portp = (unsigned char)b; | ||
106 | } | ||
107 | |||
108 | static inline void _ne_outw(unsigned short w, void *portp) | ||
109 | { | ||
110 | *(volatile unsigned short *)portp = cpu_to_le16(w); | ||
111 | } | ||
112 | |||
113 | unsigned char _inb(unsigned long port) | ||
114 | { | ||
115 | if (port >= LAN_IOSTART && port < LAN_IOEND) | ||
116 | return _ne_inb(PORT2ADDR_NE(port)); | ||
117 | #if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC) | ||
118 | else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) { | ||
119 | return *(volatile unsigned char *)__port2addr_ata(port); | ||
120 | } | ||
121 | #endif | ||
122 | #if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC) | ||
123 | else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) { | ||
124 | unsigned char b; | ||
125 | pcc_ioread_byte(0, port, &b, sizeof(b), 1, 0); | ||
126 | return b; | ||
127 | } else | ||
128 | #endif | ||
129 | |||
130 | return *(volatile unsigned char *)PORT2ADDR(port); | ||
131 | } | ||
132 | |||
133 | unsigned short _inw(unsigned long port) | ||
134 | { | ||
135 | if (port >= LAN_IOSTART && port < LAN_IOEND) | ||
136 | return _ne_inw(PORT2ADDR_NE(port)); | ||
137 | #if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC) | ||
138 | else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) { | ||
139 | return *(volatile unsigned short *)__port2addr_ata(port); | ||
140 | } | ||
141 | #endif | ||
142 | #if defined(CONFIG_USB) | ||
143 | else if (port >= 0x340 && port < 0x3a0) | ||
144 | return *(volatile unsigned short *)PORT2ADDR_USB(port); | ||
145 | #endif | ||
146 | |||
147 | #if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC) | ||
148 | else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) { | ||
149 | unsigned short w; | ||
150 | pcc_ioread_word(0, port, &w, sizeof(w), 1, 0); | ||
151 | return w; | ||
152 | } else | ||
153 | #endif | ||
154 | return *(volatile unsigned short *)PORT2ADDR(port); | ||
155 | } | ||
156 | |||
157 | unsigned long _inl(unsigned long port) | ||
158 | { | ||
159 | #if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC) | ||
160 | if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) { | ||
161 | unsigned long l; | ||
162 | pcc_ioread_word(0, port, &l, sizeof(l), 1, 0); | ||
163 | return l; | ||
164 | } else | ||
165 | #endif | ||
166 | return *(volatile unsigned long *)PORT2ADDR(port); | ||
167 | } | ||
168 | |||
169 | unsigned char _inb_p(unsigned long port) | ||
170 | { | ||
171 | unsigned char v = _inb(port); | ||
172 | delay(); | ||
173 | return (v); | ||
174 | } | ||
175 | |||
176 | unsigned short _inw_p(unsigned long port) | ||
177 | { | ||
178 | unsigned short v = _inw(port); | ||
179 | delay(); | ||
180 | return (v); | ||
181 | } | ||
182 | |||
183 | unsigned long _inl_p(unsigned long port) | ||
184 | { | ||
185 | unsigned long v = _inl(port); | ||
186 | delay(); | ||
187 | return (v); | ||
188 | } | ||
189 | |||
190 | void _outb(unsigned char b, unsigned long port) | ||
191 | { | ||
192 | if (port >= LAN_IOSTART && port < LAN_IOEND) | ||
193 | _ne_outb(b, PORT2ADDR_NE(port)); | ||
194 | else | ||
195 | #if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC) | ||
196 | if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) { | ||
197 | *(volatile unsigned char *)__port2addr_ata(port) = b; | ||
198 | } else | ||
199 | #endif | ||
200 | #if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC) | ||
201 | if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) { | ||
202 | pcc_iowrite_byte(0, port, &b, sizeof(b), 1, 0); | ||
203 | } else | ||
204 | #endif | ||
205 | *(volatile unsigned char *)PORT2ADDR(port) = b; | ||
206 | } | ||
207 | |||
208 | void _outw(unsigned short w, unsigned long port) | ||
209 | { | ||
210 | if (port >= LAN_IOSTART && port < LAN_IOEND) | ||
211 | _ne_outw(w, PORT2ADDR_NE(port)); | ||
212 | else | ||
213 | #if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC) | ||
214 | if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) { | ||
215 | *(volatile unsigned short *)__port2addr_ata(port) = w; | ||
216 | } else | ||
217 | #endif | ||
218 | #if defined(CONFIG_USB) | ||
219 | if (port >= 0x340 && port < 0x3a0) | ||
220 | *(volatile unsigned short *)PORT2ADDR_USB(port) = w; | ||
221 | else | ||
222 | #endif | ||
223 | #if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC) | ||
224 | if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) { | ||
225 | pcc_iowrite_word(0, port, &w, sizeof(w), 1, 0); | ||
226 | } else | ||
227 | #endif | ||
228 | *(volatile unsigned short *)PORT2ADDR(port) = w; | ||
229 | } | ||
230 | |||
231 | void _outl(unsigned long l, unsigned long port) | ||
232 | { | ||
233 | #if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC) | ||
234 | if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) { | ||
235 | pcc_iowrite_word(0, port, &l, sizeof(l), 1, 0); | ||
236 | } else | ||
237 | #endif | ||
238 | *(volatile unsigned long *)PORT2ADDR(port) = l; | ||
239 | } | ||
240 | |||
241 | void _outb_p(unsigned char b, unsigned long port) | ||
242 | { | ||
243 | _outb(b, port); | ||
244 | delay(); | ||
245 | } | ||
246 | |||
247 | void _outw_p(unsigned short w, unsigned long port) | ||
248 | { | ||
249 | _outw(w, port); | ||
250 | delay(); | ||
251 | } | ||
252 | |||
253 | void _outl_p(unsigned long l, unsigned long port) | ||
254 | { | ||
255 | _outl(l, port); | ||
256 | delay(); | ||
257 | } | ||
258 | |||
259 | void _insb(unsigned int port, void * addr, unsigned long count) | ||
260 | { | ||
261 | if (port >= LAN_IOSTART && port < LAN_IOEND) | ||
262 | _ne_insb(PORT2ADDR_NE(port), addr, count); | ||
263 | #if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC) | ||
264 | else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) { | ||
265 | unsigned char *buf = addr; | ||
266 | unsigned char *portp = __port2addr_ata(port); | ||
267 | while (count--) | ||
268 | *buf++ = *(volatile unsigned char *)portp; | ||
269 | } | ||
270 | #endif | ||
271 | #if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC) | ||
272 | else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) { | ||
273 | pcc_ioread_byte(0, port, (void *)addr, sizeof(unsigned char), | ||
274 | count, 1); | ||
275 | } | ||
276 | #endif | ||
277 | else { | ||
278 | unsigned char *buf = addr; | ||
279 | unsigned char *portp = PORT2ADDR(port); | ||
280 | while (count--) | ||
281 | *buf++ = *(volatile unsigned char *)portp; | ||
282 | } | ||
283 | } | ||
284 | |||
285 | void _insw(unsigned int port, void * addr, unsigned long count) | ||
286 | { | ||
287 | unsigned short *buf = addr; | ||
288 | unsigned short *portp; | ||
289 | |||
290 | if (port >= LAN_IOSTART && port < LAN_IOEND) { | ||
291 | portp = PORT2ADDR_NE(port); | ||
292 | while (count--) | ||
293 | *buf++ = *(volatile unsigned short *)portp; | ||
294 | #if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC) | ||
295 | } else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) { | ||
296 | pcc_ioread_word(9, port, (void *)addr, sizeof(unsigned short), | ||
297 | count, 1); | ||
298 | #endif | ||
299 | #if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC) | ||
300 | } else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) { | ||
301 | portp = __port2addr_ata(port); | ||
302 | while (count--) | ||
303 | *buf++ = *(volatile unsigned short *)portp; | ||
304 | #endif | ||
305 | } else { | ||
306 | portp = PORT2ADDR(port); | ||
307 | while (count--) | ||
308 | *buf++ = *(volatile unsigned short *)portp; | ||
309 | } | ||
310 | } | ||
311 | |||
312 | void _insl(unsigned int port, void * addr, unsigned long count) | ||
313 | { | ||
314 | unsigned long *buf = addr; | ||
315 | unsigned long *portp; | ||
316 | |||
317 | portp = PORT2ADDR(port); | ||
318 | while (count--) | ||
319 | *buf++ = *(volatile unsigned long *)portp; | ||
320 | } | ||
321 | |||
322 | void _outsb(unsigned int port, const void * addr, unsigned long count) | ||
323 | { | ||
324 | const unsigned char *buf = addr; | ||
325 | unsigned char *portp; | ||
326 | |||
327 | if (port >= LAN_IOSTART && port < LAN_IOEND) { | ||
328 | portp = PORT2ADDR_NE(port); | ||
329 | while (count--) | ||
330 | _ne_outb(*buf++, portp); | ||
331 | #if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC) | ||
332 | } else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) { | ||
333 | portp = __port2addr_ata(port); | ||
334 | while (count--) | ||
335 | *(volatile unsigned char *)portp = *buf++; | ||
336 | #endif | ||
337 | #if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC) | ||
338 | } else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) { | ||
339 | pcc_iowrite_byte(0, port, (void *)addr, sizeof(unsigned char), | ||
340 | count, 1); | ||
341 | #endif | ||
342 | } else { | ||
343 | portp = PORT2ADDR(port); | ||
344 | while (count--) | ||
345 | *(volatile unsigned char *)portp = *buf++; | ||
346 | } | ||
347 | } | ||
348 | |||
349 | void _outsw(unsigned int port, const void * addr, unsigned long count) | ||
350 | { | ||
351 | const unsigned short *buf = addr; | ||
352 | unsigned short *portp; | ||
353 | |||
354 | if (port >= LAN_IOSTART && port < LAN_IOEND) { | ||
355 | portp = PORT2ADDR_NE(port); | ||
356 | while (count--) | ||
357 | *(volatile unsigned short *)portp = *buf++; | ||
358 | #if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC) | ||
359 | } else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) { | ||
360 | portp = __port2addr_ata(port); | ||
361 | while (count--) | ||
362 | *(volatile unsigned short *)portp = *buf++; | ||
363 | #endif | ||
364 | #if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC) | ||
365 | } else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) { | ||
366 | pcc_iowrite_word(9, port, (void *)addr, sizeof(unsigned short), | ||
367 | count, 1); | ||
368 | #endif | ||
369 | } else { | ||
370 | portp = PORT2ADDR(port); | ||
371 | while (count--) | ||
372 | *(volatile unsigned short *)portp = *buf++; | ||
373 | } | ||
374 | } | ||
375 | |||
376 | void _outsl(unsigned int port, const void * addr, unsigned long count) | ||
377 | { | ||
378 | const unsigned long *buf = addr; | ||
379 | unsigned char *portp; | ||
380 | |||
381 | portp = PORT2ADDR(port); | ||
382 | while (count--) | ||
383 | *(volatile unsigned long *)portp = *buf++; | ||
384 | } | ||
diff --git a/arch/m32r/platforms/mappi2/setup.c b/arch/m32r/platforms/mappi2/setup.c deleted file mode 100644 index 7253258a7880..000000000000 --- a/arch/m32r/platforms/mappi2/setup.c +++ /dev/null | |||
@@ -1,172 +0,0 @@ | |||
1 | // SPDX-License-Identifier: GPL-2.0 | ||
2 | /* | ||
3 | * linux/arch/m32r/platforms/mappi2/setup.c | ||
4 | * | ||
5 | * Setup routines for Renesas MAPPI-II(M3A-ZA36) Board | ||
6 | * | ||
7 | * Copyright (c) 2001-2005 Hiroyuki Kondo, Hirokazu Takata, | ||
8 | * Hitoshi Yamamoto, Mamoru Sakugawa | ||
9 | */ | ||
10 | |||
11 | #include <linux/irq.h> | ||
12 | #include <linux/kernel.h> | ||
13 | #include <linux/init.h> | ||
14 | #include <linux/platform_device.h> | ||
15 | |||
16 | #include <asm/m32r.h> | ||
17 | #include <asm/io.h> | ||
18 | |||
19 | #define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long))) | ||
20 | |||
21 | icu_data_t icu_data[NR_IRQS]; | ||
22 | |||
23 | static void disable_mappi2_irq(unsigned int irq) | ||
24 | { | ||
25 | unsigned long port, data; | ||
26 | |||
27 | if ((irq == 0) ||(irq >= NR_IRQS)) { | ||
28 | printk("bad irq 0x%08x\n", irq); | ||
29 | return; | ||
30 | } | ||
31 | port = irq2port(irq); | ||
32 | data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7; | ||
33 | outl(data, port); | ||
34 | } | ||
35 | |||
36 | static void enable_mappi2_irq(unsigned int irq) | ||
37 | { | ||
38 | unsigned long port, data; | ||
39 | |||
40 | if ((irq == 0) ||(irq >= NR_IRQS)) { | ||
41 | printk("bad irq 0x%08x\n", irq); | ||
42 | return; | ||
43 | } | ||
44 | port = irq2port(irq); | ||
45 | data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6; | ||
46 | outl(data, port); | ||
47 | } | ||
48 | |||
49 | static void mask_mappi2(struct irq_data *data) | ||
50 | { | ||
51 | disable_mappi2_irq(data->irq); | ||
52 | } | ||
53 | |||
54 | static void unmask_mappi2(struct irq_data *data) | ||
55 | { | ||
56 | enable_mappi2_irq(data->irq); | ||
57 | } | ||
58 | |||
59 | static void shutdown_mappi2(struct irq_data *data) | ||
60 | { | ||
61 | unsigned long port; | ||
62 | |||
63 | port = irq2port(data->irq); | ||
64 | outl(M32R_ICUCR_ILEVEL7, port); | ||
65 | } | ||
66 | |||
67 | static struct irq_chip mappi2_irq_type = | ||
68 | { | ||
69 | .name = "MAPPI2-IRQ", | ||
70 | .irq_shutdown = shutdown_mappi2, | ||
71 | .irq_mask = mask_mappi2, | ||
72 | .irq_unmask = unmask_mappi2, | ||
73 | }; | ||
74 | |||
75 | void __init init_IRQ(void) | ||
76 | { | ||
77 | #if defined(CONFIG_SMC91X) | ||
78 | /* INT0 : LAN controller (SMC91111) */ | ||
79 | irq_set_chip_and_handler(M32R_IRQ_INT0, &mappi2_irq_type, | ||
80 | handle_level_irq); | ||
81 | icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10; | ||
82 | disable_mappi2_irq(M32R_IRQ_INT0); | ||
83 | #endif /* CONFIG_SMC91X */ | ||
84 | |||
85 | /* MFT2 : system timer */ | ||
86 | irq_set_chip_and_handler(M32R_IRQ_MFT2, &mappi2_irq_type, | ||
87 | handle_level_irq); | ||
88 | icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; | ||
89 | disable_mappi2_irq(M32R_IRQ_MFT2); | ||
90 | |||
91 | #ifdef CONFIG_SERIAL_M32R_SIO | ||
92 | /* SIO0_R : uart receive data */ | ||
93 | irq_set_chip_and_handler(M32R_IRQ_SIO0_R, &mappi2_irq_type, | ||
94 | handle_level_irq); | ||
95 | icu_data[M32R_IRQ_SIO0_R].icucr = 0; | ||
96 | disable_mappi2_irq(M32R_IRQ_SIO0_R); | ||
97 | |||
98 | /* SIO0_S : uart send data */ | ||
99 | irq_set_chip_and_handler(M32R_IRQ_SIO0_S, &mappi2_irq_type, | ||
100 | handle_level_irq); | ||
101 | icu_data[M32R_IRQ_SIO0_S].icucr = 0; | ||
102 | disable_mappi2_irq(M32R_IRQ_SIO0_S); | ||
103 | /* SIO1_R : uart receive data */ | ||
104 | irq_set_chip_and_handler(M32R_IRQ_SIO1_R, &mappi2_irq_type, | ||
105 | handle_level_irq); | ||
106 | icu_data[M32R_IRQ_SIO1_R].icucr = 0; | ||
107 | disable_mappi2_irq(M32R_IRQ_SIO1_R); | ||
108 | |||
109 | /* SIO1_S : uart send data */ | ||
110 | irq_set_chip_and_handler(M32R_IRQ_SIO1_S, &mappi2_irq_type, | ||
111 | handle_level_irq); | ||
112 | icu_data[M32R_IRQ_SIO1_S].icucr = 0; | ||
113 | disable_mappi2_irq(M32R_IRQ_SIO1_S); | ||
114 | #endif /* CONFIG_M32R_USE_DBG_CONSOLE */ | ||
115 | |||
116 | #if defined(CONFIG_USB) | ||
117 | /* INT1 : USB Host controller interrupt */ | ||
118 | irq_set_chip_and_handler(M32R_IRQ_INT1, &mappi2_irq_type, | ||
119 | handle_level_irq); | ||
120 | icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_ISMOD01; | ||
121 | disable_mappi2_irq(M32R_IRQ_INT1); | ||
122 | #endif /* CONFIG_USB */ | ||
123 | |||
124 | /* ICUCR40: CFC IREQ */ | ||
125 | irq_set_chip_and_handler(PLD_IRQ_CFIREQ, &mappi2_irq_type, | ||
126 | handle_level_irq); | ||
127 | icu_data[PLD_IRQ_CFIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD01; | ||
128 | disable_mappi2_irq(PLD_IRQ_CFIREQ); | ||
129 | |||
130 | #if defined(CONFIG_M32R_CFC) | ||
131 | /* ICUCR41: CFC Insert */ | ||
132 | irq_set_chip_and_handler(PLD_IRQ_CFC_INSERT, &mappi2_irq_type, | ||
133 | handle_level_irq); | ||
134 | icu_data[PLD_IRQ_CFC_INSERT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD00; | ||
135 | disable_mappi2_irq(PLD_IRQ_CFC_INSERT); | ||
136 | |||
137 | /* ICUCR42: CFC Eject */ | ||
138 | irq_set_chip_and_handler(PLD_IRQ_CFC_EJECT, &mappi2_irq_type, | ||
139 | handle_level_irq); | ||
140 | icu_data[PLD_IRQ_CFC_EJECT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10; | ||
141 | disable_mappi2_irq(PLD_IRQ_CFC_EJECT); | ||
142 | #endif /* CONFIG_MAPPI2_CFC */ | ||
143 | } | ||
144 | |||
145 | #define LAN_IOSTART 0x300 | ||
146 | #define LAN_IOEND 0x320 | ||
147 | static struct resource smc91x_resources[] = { | ||
148 | [0] = { | ||
149 | .start = (LAN_IOSTART), | ||
150 | .end = (LAN_IOEND), | ||
151 | .flags = IORESOURCE_MEM, | ||
152 | }, | ||
153 | [1] = { | ||
154 | .start = M32R_IRQ_INT0, | ||
155 | .end = M32R_IRQ_INT0, | ||
156 | .flags = IORESOURCE_IRQ, | ||
157 | } | ||
158 | }; | ||
159 | |||
160 | static struct platform_device smc91x_device = { | ||
161 | .name = "smc91x", | ||
162 | .id = 0, | ||
163 | .num_resources = ARRAY_SIZE(smc91x_resources), | ||
164 | .resource = smc91x_resources, | ||
165 | }; | ||
166 | |||
167 | static int __init platform_init(void) | ||
168 | { | ||
169 | platform_device_register(&smc91x_device); | ||
170 | return 0; | ||
171 | } | ||
172 | arch_initcall(platform_init); | ||
diff --git a/arch/m32r/platforms/mappi3/Makefile b/arch/m32r/platforms/mappi3/Makefile deleted file mode 100644 index 0de59084f21c..000000000000 --- a/arch/m32r/platforms/mappi3/Makefile +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | obj-y := setup.o io.o | ||
diff --git a/arch/m32r/platforms/mappi3/dot.gdbinit b/arch/m32r/platforms/mappi3/dot.gdbinit deleted file mode 100644 index 89c22184e139..000000000000 --- a/arch/m32r/platforms/mappi3/dot.gdbinit +++ /dev/null | |||
@@ -1,224 +0,0 @@ | |||
1 | # .gdbinit file | ||
2 | # $Id: dot.gdbinit,v 1.1 2005/04/11 02:21:08 sakugawa Exp $ | ||
3 | |||
4 | # setting | ||
5 | set width 0d70 | ||
6 | set radix 0d16 | ||
7 | use_debug_dma | ||
8 | |||
9 | # Initialize SDRAM controller for Mappi | ||
10 | define sdram_init | ||
11 | # SDIR0 | ||
12 | set *(unsigned long *)0x00ef6008 = 0x00000182 | ||
13 | # SDIR1 | ||
14 | set *(unsigned long *)0x00ef600c = 0x00000001 | ||
15 | # Initialize wait | ||
16 | shell sleep 0.1 | ||
17 | # MOD | ||
18 | set *(unsigned long *)0x00ef602c = 0x00000020 | ||
19 | set *(unsigned long *)0x00ef604c = 0x00000020 | ||
20 | # TR | ||
21 | set *(unsigned long *)0x00ef6028 = 0x00051502 | ||
22 | set *(unsigned long *)0x00ef6048 = 0x00051502 | ||
23 | # ADR | ||
24 | set *(unsigned long *)0x00ef6020 = 0x08000004 | ||
25 | set *(unsigned long *)0x00ef6040 = 0x0c000004 | ||
26 | # AutoRef On | ||
27 | set *(unsigned long *)0x00ef6004 = 0x00010517 | ||
28 | # Access enable | ||
29 | set *(unsigned long *)0x00ef6024 = 0x00000001 | ||
30 | set *(unsigned long *)0x00ef6044 = 0x00000001 | ||
31 | end | ||
32 | |||
33 | # Initialize LAN controller for Mappi | ||
34 | define lanc_init | ||
35 | # Set BSEL4 | ||
36 | #set *(unsigned long *)0x00ef5004 = 0x0fff330f | ||
37 | #set *(unsigned long *)0x00ef5004 = 0x01113301 | ||
38 | |||
39 | # set *(unsigned long *)0x00ef5004 = 0x02011101 | ||
40 | # set *(unsigned long *)0x00ef5004 = 0x04441104 | ||
41 | end | ||
42 | |||
43 | define clock_init | ||
44 | set *(unsigned long *)0x00ef4010 = 2 | ||
45 | set *(unsigned long *)0x00ef4014 = 2 | ||
46 | set *(unsigned long *)0x00ef4020 = 3 | ||
47 | set *(unsigned long *)0x00ef4024 = 3 | ||
48 | set *(unsigned long *)0x00ef4004 = 0x7 | ||
49 | # shell sleep 0.1 | ||
50 | # set *(unsigned long *)0x00ef4004 = 0x5 | ||
51 | shell sleep 0.1 | ||
52 | set *(unsigned long *)0x00ef4008 = 0x0200 | ||
53 | end | ||
54 | |||
55 | define port_init | ||
56 | set $sfrbase = 0x00ef0000 | ||
57 | set *(unsigned short *)0x00ef1060 = 0x5555 | ||
58 | set *(unsigned short *)0x00ef1062 = 0x5555 | ||
59 | set *(unsigned short *)0x00ef1064 = 0x5555 | ||
60 | set *(unsigned short *)0x00ef1066 = 0x5555 | ||
61 | set *(unsigned short *)0x00ef1068 = 0x5555 | ||
62 | set *(unsigned short *)0x00ef106a = 0x0000 | ||
63 | set *(unsigned short *)0x00ef106e = 0x5555 | ||
64 | set *(unsigned short *)0x00ef1070 = 0x5555 | ||
65 | end | ||
66 | |||
67 | # MMU enable | ||
68 | define mmu_enable | ||
69 | set $evb=0x88000000 | ||
70 | set *(unsigned long *)0xffff0024=1 | ||
71 | end | ||
72 | |||
73 | # MMU disable | ||
74 | define mmu_disable | ||
75 | set $evb=0 | ||
76 | set *(unsigned long *)0xffff0024=0 | ||
77 | end | ||
78 | |||
79 | # Show TLB entries | ||
80 | define show_tlb_entries | ||
81 | set $i = 0 | ||
82 | set $addr = $arg0 | ||
83 | while ($i < 0d16 ) | ||
84 | set $tlb_tag = *(unsigned long*)$addr | ||
85 | set $tlb_data = *(unsigned long*)($addr + 4) | ||
86 | printf " [%2d] 0x%08lx : 0x%08lx - 0x%08lx\n", $i, $addr, $tlb_tag, $tlb_data | ||
87 | set $i = $i + 1 | ||
88 | set $addr = $addr + 8 | ||
89 | end | ||
90 | end | ||
91 | define itlb | ||
92 | set $itlb=0xfe000000 | ||
93 | show_tlb_entries $itlb | ||
94 | end | ||
95 | define dtlb | ||
96 | set $dtlb=0xfe000800 | ||
97 | show_tlb_entries $dtlb | ||
98 | end | ||
99 | |||
100 | # Cache ON | ||
101 | define set_cache_type | ||
102 | set $mctype = (void*)0xfffffff8 | ||
103 | # chaos | ||
104 | # set *(unsigned long *)($mctype) = 0x0000c000 | ||
105 | # m32102 i-cache only | ||
106 | set *(unsigned long *)($mctype) = 0x00008000 | ||
107 | # m32102 d-cache only | ||
108 | # set *(unsigned long *)($mctype) = 0x00004000 | ||
109 | end | ||
110 | define cache_on | ||
111 | set $param = (void*)0x08001000 | ||
112 | set *(unsigned long *)($param) = 0x60ff6102 | ||
113 | end | ||
114 | |||
115 | |||
116 | # Show current task structure | ||
117 | define show_current | ||
118 | set $current = $spi & 0xffffe000 | ||
119 | printf "$current=0x%08lX\n",$current | ||
120 | print *(struct task_struct *)$current | ||
121 | end | ||
122 | |||
123 | # Show user assigned task structure | ||
124 | define show_task | ||
125 | set $task = $arg0 & 0xffffe000 | ||
126 | printf "$task=0x%08lX\n",$task | ||
127 | print *(struct task_struct *)$task | ||
128 | end | ||
129 | document show_task | ||
130 | Show user assigned task structure | ||
131 | arg0 : task structure address | ||
132 | end | ||
133 | |||
134 | # Show M32R registers | ||
135 | define show_regs | ||
136 | printf " R0[0x%08lX] R1[0x%08lX] R2[0x%08lX] R3[0x%08lX]\n",$r0,$r1,$r2,$r3 | ||
137 | printf " R4[0x%08lX] R5[0x%08lX] R6[0x%08lX] R7[0x%08lX]\n",$r4,$r5,$r6,$r7 | ||
138 | printf " R8[0x%08lX] R9[0x%08lX] R10[0x%08lX] R11[0x%08lX]\n",$r8,$r9,$r10,$r11 | ||
139 | printf "R12[0x%08lX] FP[0x%08lX] LR[0x%08lX] SP[0x%08lX]\n",$r12,$fp,$lr,$sp | ||
140 | printf "PSW[0x%08lX] CBR[0x%08lX] SPI[0x%08lX] SPU[0x%08lX]\n",$psw,$cbr,$spi,$spu | ||
141 | printf "BPC[0x%08lX] PC[0x%08lX] ACCL[0x%08lX] ACCH[0x%08lX]\n",$bpc,$pc,$accl,$acch | ||
142 | printf "EVB[0x%08lX]\n",$evb | ||
143 | |||
144 | set $mests = *(unsigned long *)0xffff000c | ||
145 | set $mdeva = *(unsigned long *)0xffff0010 | ||
146 | printf "MESTS[0x%08lX] MDEVA[0x%08lX]\n",$mests,$mdeva | ||
147 | end | ||
148 | |||
149 | |||
150 | # Setup all | ||
151 | define setup | ||
152 | clock_init | ||
153 | shell sleep 0.1 | ||
154 | port_init | ||
155 | sdram_init | ||
156 | # lanc_init | ||
157 | # dispc_init | ||
158 | # set $evb=0x08000000 | ||
159 | end | ||
160 | |||
161 | # Load modules | ||
162 | define load_modules | ||
163 | use_debug_dma | ||
164 | load | ||
165 | # load busybox.mot | ||
166 | end | ||
167 | |||
168 | # Set kernel parameters | ||
169 | define set_kernel_parameters | ||
170 | set $param = (void*)0x08001000 | ||
171 | |||
172 | ## MOUNT_ROOT_RDONLY | ||
173 | set {long}($param+0x00)=0 | ||
174 | ## RAMDISK_FLAGS | ||
175 | #set {long}($param+0x04)=0 | ||
176 | ## ORIG_ROOT_DEV | ||
177 | #set {long}($param+0x08)=0x00000100 | ||
178 | ## LOADER_TYPE | ||
179 | #set {long}($param+0x0C)=0 | ||
180 | ## INITRD_START | ||
181 | set {long}($param+0x10)=0x082a0000 | ||
182 | ## INITRD_SIZE | ||
183 | set {long}($param+0x14)=0d6200000 | ||
184 | |||
185 | # M32R_CPUCLK | ||
186 | set *(unsigned long *)($param + 0x0018) = 0d100000000 | ||
187 | # M32R_BUSCLK | ||
188 | set *(unsigned long *)($param + 0x001c) = 0d50000000 | ||
189 | # M32R_TIMER_DIVIDE | ||
190 | set *(unsigned long *)($param + 0x0020) = 0d128 | ||
191 | |||
192 | |||
193 | set {char[0x200]}($param + 0x100) = "console=ttyS0,115200n8x root=/dev/nfsroot nfsroot=192.168.0.1:/project/m32r-linux/export/root.2.6_04 nfsaddrs=192.168.0.102:192.168.0.1:192.168.0.1:255.255.255.0:mappi: \0" | ||
194 | |||
195 | |||
196 | end | ||
197 | |||
198 | # Boot | ||
199 | define boot | ||
200 | set_kernel_parameters | ||
201 | debug_chaos | ||
202 | set *(unsigned long *)0x00f00000=0x08002000 | ||
203 | set $pc=0x08002000 | ||
204 | set $fp=0 | ||
205 | del b | ||
206 | si | ||
207 | end | ||
208 | |||
209 | # Restart | ||
210 | define restart | ||
211 | sdireset | ||
212 | sdireset | ||
213 | setup | ||
214 | load_modules | ||
215 | boot | ||
216 | end | ||
217 | |||
218 | sdireset | ||
219 | sdireset | ||
220 | file vmlinux | ||
221 | target m32rsdi | ||
222 | |||
223 | restart | ||
224 | boot | ||
diff --git a/arch/m32r/platforms/mappi3/io.c b/arch/m32r/platforms/mappi3/io.c deleted file mode 100644 index e7edcab72a6b..000000000000 --- a/arch/m32r/platforms/mappi3/io.c +++ /dev/null | |||
@@ -1,406 +0,0 @@ | |||
1 | // SPDX-License-Identifier: GPL-2.0 | ||
2 | /* | ||
3 | * linux/arch/m32r/platforms/mappi3/io.c | ||
4 | * | ||
5 | * Typical I/O routines for Mappi3 board. | ||
6 | * | ||
7 | * Copyright (c) 2001-2005 Hiroyuki Kondo, Hirokazu Takata, | ||
8 | * Hitoshi Yamamoto, Mamoru Sakugawa | ||
9 | */ | ||
10 | |||
11 | #include <asm/m32r.h> | ||
12 | #include <asm/page.h> | ||
13 | #include <asm/io.h> | ||
14 | #include <asm/byteorder.h> | ||
15 | |||
16 | #if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC) | ||
17 | #include <linux/types.h> | ||
18 | |||
19 | #define M32R_PCC_IOMAP_SIZE 0x1000 | ||
20 | |||
21 | #define M32R_PCC_IOSTART0 0x1000 | ||
22 | #define M32R_PCC_IOEND0 (M32R_PCC_IOSTART0 + M32R_PCC_IOMAP_SIZE - 1) | ||
23 | |||
24 | extern void pcc_ioread_byte(int, unsigned long, void *, size_t, size_t, int); | ||
25 | extern void pcc_ioread_word(int, unsigned long, void *, size_t, size_t, int); | ||
26 | extern void pcc_iowrite_byte(int, unsigned long, void *, size_t, size_t, int); | ||
27 | extern void pcc_iowrite_word(int, unsigned long, void *, size_t, size_t, int); | ||
28 | #endif /* CONFIG_PCMCIA && CONFIG_M32R_CFC */ | ||
29 | |||
30 | #define PORT2ADDR(port) _port2addr(port) | ||
31 | #define PORT2ADDR_NE(port) _port2addr_ne(port) | ||
32 | #define PORT2ADDR_USB(port) _port2addr_usb(port) | ||
33 | |||
34 | static inline void *_port2addr(unsigned long port) | ||
35 | { | ||
36 | return (void *)(port | NONCACHE_OFFSET); | ||
37 | } | ||
38 | |||
39 | #if defined(CONFIG_IDE) | ||
40 | static inline void *__port2addr_ata(unsigned long port) | ||
41 | { | ||
42 | static int dummy_reg; | ||
43 | |||
44 | switch (port) { | ||
45 | /* IDE0 CF */ | ||
46 | case 0x1f0: return (void *)(0x14002000 | NONCACHE_OFFSET); | ||
47 | case 0x1f1: return (void *)(0x14012800 | NONCACHE_OFFSET); | ||
48 | case 0x1f2: return (void *)(0x14012002 | NONCACHE_OFFSET); | ||
49 | case 0x1f3: return (void *)(0x14012802 | NONCACHE_OFFSET); | ||
50 | case 0x1f4: return (void *)(0x14012004 | NONCACHE_OFFSET); | ||
51 | case 0x1f5: return (void *)(0x14012804 | NONCACHE_OFFSET); | ||
52 | case 0x1f6: return (void *)(0x14012006 | NONCACHE_OFFSET); | ||
53 | case 0x1f7: return (void *)(0x14012806 | NONCACHE_OFFSET); | ||
54 | case 0x3f6: return (void *)(0x1401200e | NONCACHE_OFFSET); | ||
55 | /* IDE1 IDE */ | ||
56 | case 0x170: /* Data 16bit */ | ||
57 | return (void *)(0x14810000 | NONCACHE_OFFSET); | ||
58 | case 0x171: /* Features / Error */ | ||
59 | return (void *)(0x14810002 | NONCACHE_OFFSET); | ||
60 | case 0x172: /* Sector count */ | ||
61 | return (void *)(0x14810004 | NONCACHE_OFFSET); | ||
62 | case 0x173: /* Sector number */ | ||
63 | return (void *)(0x14810006 | NONCACHE_OFFSET); | ||
64 | case 0x174: /* Cylinder low */ | ||
65 | return (void *)(0x14810008 | NONCACHE_OFFSET); | ||
66 | case 0x175: /* Cylinder high */ | ||
67 | return (void *)(0x1481000a | NONCACHE_OFFSET); | ||
68 | case 0x176: /* Device head */ | ||
69 | return (void *)(0x1481000c | NONCACHE_OFFSET); | ||
70 | case 0x177: /* Command */ | ||
71 | return (void *)(0x1481000e | NONCACHE_OFFSET); | ||
72 | case 0x376: /* Device control / Alt status */ | ||
73 | return (void *)(0x1480800c | NONCACHE_OFFSET); | ||
74 | |||
75 | default: return (void *)&dummy_reg; | ||
76 | } | ||
77 | } | ||
78 | #endif | ||
79 | |||
80 | #define LAN_IOSTART (0x300 | NONCACHE_OFFSET) | ||
81 | #define LAN_IOEND (0x320 | NONCACHE_OFFSET) | ||
82 | static inline void *_port2addr_ne(unsigned long port) | ||
83 | { | ||
84 | return (void *)(port + 0x10000000); | ||
85 | } | ||
86 | |||
87 | static inline void *_port2addr_usb(unsigned long port) | ||
88 | { | ||
89 | return (void *)(port + NONCACHE_OFFSET + 0x12000000); | ||
90 | } | ||
91 | static inline void delay(void) | ||
92 | { | ||
93 | __asm__ __volatile__ ("push r0; \n\t pop r0;" : : :"memory"); | ||
94 | } | ||
95 | |||
96 | /* | ||
97 | * NIC I/O function | ||
98 | */ | ||
99 | |||
100 | static inline unsigned char _ne_inb(void *portp) | ||
101 | { | ||
102 | return (unsigned char) *(volatile unsigned char *)portp; | ||
103 | } | ||
104 | |||
105 | static inline unsigned short _ne_inw(void *portp) | ||
106 | { | ||
107 | return (unsigned short)le16_to_cpu(*(volatile unsigned short *)portp); | ||
108 | } | ||
109 | |||
110 | static inline void _ne_insb(void *portp, void * addr, unsigned long count) | ||
111 | { | ||
112 | unsigned char *buf = addr; | ||
113 | |||
114 | while (count--) | ||
115 | *buf++ = *(volatile unsigned char *)portp; | ||
116 | } | ||
117 | |||
118 | static inline void _ne_outb(unsigned char b, void *portp) | ||
119 | { | ||
120 | *(volatile unsigned char *)portp = (unsigned char)b; | ||
121 | } | ||
122 | |||
123 | static inline void _ne_outw(unsigned short w, void *portp) | ||
124 | { | ||
125 | *(volatile unsigned short *)portp = cpu_to_le16(w); | ||
126 | } | ||
127 | |||
128 | unsigned char _inb(unsigned long port) | ||
129 | { | ||
130 | if (port >= LAN_IOSTART && port < LAN_IOEND) | ||
131 | return _ne_inb(PORT2ADDR_NE(port)); | ||
132 | #if defined(CONFIG_IDE) | ||
133 | else if ( ((port >= 0x170 && port <=0x177) || port == 0x376) || | ||
134 | ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) ){ | ||
135 | return *(volatile unsigned char *)__port2addr_ata(port); | ||
136 | } | ||
137 | #endif | ||
138 | #if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC) | ||
139 | else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) { | ||
140 | unsigned char b; | ||
141 | pcc_ioread_byte(0, port, &b, sizeof(b), 1, 0); | ||
142 | return b; | ||
143 | } else | ||
144 | #endif | ||
145 | return *(volatile unsigned char *)PORT2ADDR(port); | ||
146 | } | ||
147 | |||
148 | unsigned short _inw(unsigned long port) | ||
149 | { | ||
150 | if (port >= LAN_IOSTART && port < LAN_IOEND) | ||
151 | return _ne_inw(PORT2ADDR_NE(port)); | ||
152 | #if defined(CONFIG_IDE) | ||
153 | else if ( ((port >= 0x170 && port <=0x177) || port == 0x376) || | ||
154 | ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) ){ | ||
155 | return *(volatile unsigned short *)__port2addr_ata(port); | ||
156 | } | ||
157 | #endif | ||
158 | #if defined(CONFIG_USB) | ||
159 | else if (port >= 0x340 && port < 0x3a0) | ||
160 | return *(volatile unsigned short *)PORT2ADDR_USB(port); | ||
161 | #endif | ||
162 | |||
163 | #if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC) | ||
164 | else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) { | ||
165 | unsigned short w; | ||
166 | pcc_ioread_word(0, port, &w, sizeof(w), 1, 0); | ||
167 | return w; | ||
168 | } else | ||
169 | #endif | ||
170 | return *(volatile unsigned short *)PORT2ADDR(port); | ||
171 | } | ||
172 | |||
173 | unsigned long _inl(unsigned long port) | ||
174 | { | ||
175 | #if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC) | ||
176 | if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) { | ||
177 | unsigned long l; | ||
178 | pcc_ioread_word(0, port, &l, sizeof(l), 1, 0); | ||
179 | return l; | ||
180 | } else | ||
181 | #endif | ||
182 | return *(volatile unsigned long *)PORT2ADDR(port); | ||
183 | } | ||
184 | |||
185 | unsigned char _inb_p(unsigned long port) | ||
186 | { | ||
187 | unsigned char v = _inb(port); | ||
188 | delay(); | ||
189 | return (v); | ||
190 | } | ||
191 | |||
192 | unsigned short _inw_p(unsigned long port) | ||
193 | { | ||
194 | unsigned short v = _inw(port); | ||
195 | delay(); | ||
196 | return (v); | ||
197 | } | ||
198 | |||
199 | unsigned long _inl_p(unsigned long port) | ||
200 | { | ||
201 | unsigned long v = _inl(port); | ||
202 | delay(); | ||
203 | return (v); | ||
204 | } | ||
205 | |||
206 | void _outb(unsigned char b, unsigned long port) | ||
207 | { | ||
208 | if (port >= LAN_IOSTART && port < LAN_IOEND) | ||
209 | _ne_outb(b, PORT2ADDR_NE(port)); | ||
210 | else | ||
211 | #if defined(CONFIG_IDE) | ||
212 | if ( ((port >= 0x170 && port <=0x177) || port == 0x376) || | ||
213 | ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) ){ | ||
214 | *(volatile unsigned char *)__port2addr_ata(port) = b; | ||
215 | } else | ||
216 | #endif | ||
217 | #if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC) | ||
218 | if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) { | ||
219 | pcc_iowrite_byte(0, port, &b, sizeof(b), 1, 0); | ||
220 | } else | ||
221 | #endif | ||
222 | *(volatile unsigned char *)PORT2ADDR(port) = b; | ||
223 | } | ||
224 | |||
225 | void _outw(unsigned short w, unsigned long port) | ||
226 | { | ||
227 | if (port >= LAN_IOSTART && port < LAN_IOEND) | ||
228 | _ne_outw(w, PORT2ADDR_NE(port)); | ||
229 | else | ||
230 | #if defined(CONFIG_IDE) | ||
231 | if ( ((port >= 0x170 && port <=0x177) || port == 0x376) || | ||
232 | ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) ){ | ||
233 | *(volatile unsigned short *)__port2addr_ata(port) = w; | ||
234 | } else | ||
235 | #endif | ||
236 | #if defined(CONFIG_USB) | ||
237 | if (port >= 0x340 && port < 0x3a0) | ||
238 | *(volatile unsigned short *)PORT2ADDR_USB(port) = w; | ||
239 | else | ||
240 | #endif | ||
241 | #if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC) | ||
242 | if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) { | ||
243 | pcc_iowrite_word(0, port, &w, sizeof(w), 1, 0); | ||
244 | } else | ||
245 | #endif | ||
246 | *(volatile unsigned short *)PORT2ADDR(port) = w; | ||
247 | } | ||
248 | |||
249 | void _outl(unsigned long l, unsigned long port) | ||
250 | { | ||
251 | #if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC) | ||
252 | if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) { | ||
253 | pcc_iowrite_word(0, port, &l, sizeof(l), 1, 0); | ||
254 | } else | ||
255 | #endif | ||
256 | *(volatile unsigned long *)PORT2ADDR(port) = l; | ||
257 | } | ||
258 | |||
259 | void _outb_p(unsigned char b, unsigned long port) | ||
260 | { | ||
261 | _outb(b, port); | ||
262 | delay(); | ||
263 | } | ||
264 | |||
265 | void _outw_p(unsigned short w, unsigned long port) | ||
266 | { | ||
267 | _outw(w, port); | ||
268 | delay(); | ||
269 | } | ||
270 | |||
271 | void _outl_p(unsigned long l, unsigned long port) | ||
272 | { | ||
273 | _outl(l, port); | ||
274 | delay(); | ||
275 | } | ||
276 | |||
277 | void _insb(unsigned int port, void * addr, unsigned long count) | ||
278 | { | ||
279 | if (port >= LAN_IOSTART && port < LAN_IOEND) | ||
280 | _ne_insb(PORT2ADDR_NE(port), addr, count); | ||
281 | #if defined(CONFIG_IDE) | ||
282 | else if ( ((port >= 0x170 && port <=0x177) || port == 0x376) || | ||
283 | ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) ){ | ||
284 | unsigned char *buf = addr; | ||
285 | unsigned char *portp = __port2addr_ata(port); | ||
286 | while (count--) | ||
287 | *buf++ = *(volatile unsigned char *)portp; | ||
288 | } | ||
289 | #endif | ||
290 | #if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC) | ||
291 | else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) { | ||
292 | pcc_ioread_byte(0, port, (void *)addr, sizeof(unsigned char), | ||
293 | count, 1); | ||
294 | } | ||
295 | #endif | ||
296 | else { | ||
297 | unsigned char *buf = addr; | ||
298 | unsigned char *portp = PORT2ADDR(port); | ||
299 | while (count--) | ||
300 | *buf++ = *(volatile unsigned char *)portp; | ||
301 | } | ||
302 | } | ||
303 | |||
304 | void _insw(unsigned int port, void * addr, unsigned long count) | ||
305 | { | ||
306 | unsigned short *buf = addr; | ||
307 | unsigned short *portp; | ||
308 | |||
309 | if (port >= LAN_IOSTART && port < LAN_IOEND) { | ||
310 | portp = PORT2ADDR_NE(port); | ||
311 | while (count--) | ||
312 | *buf++ = *(volatile unsigned short *)portp; | ||
313 | #if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC) | ||
314 | } else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) { | ||
315 | pcc_ioread_word(9, port, (void *)addr, sizeof(unsigned short), | ||
316 | count, 1); | ||
317 | #endif | ||
318 | #if defined(CONFIG_IDE) | ||
319 | } else if ( ((port >= 0x170 && port <=0x177) || port == 0x376) || | ||
320 | ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) ){ | ||
321 | portp = __port2addr_ata(port); | ||
322 | while (count--) | ||
323 | *buf++ = *(volatile unsigned short *)portp; | ||
324 | #endif | ||
325 | } else { | ||
326 | portp = PORT2ADDR(port); | ||
327 | while (count--) | ||
328 | *buf++ = *(volatile unsigned short *)portp; | ||
329 | } | ||
330 | } | ||
331 | |||
332 | void _insl(unsigned int port, void * addr, unsigned long count) | ||
333 | { | ||
334 | unsigned long *buf = addr; | ||
335 | unsigned long *portp; | ||
336 | |||
337 | portp = PORT2ADDR(port); | ||
338 | while (count--) | ||
339 | *buf++ = *(volatile unsigned long *)portp; | ||
340 | } | ||
341 | |||
342 | void _outsb(unsigned int port, const void * addr, unsigned long count) | ||
343 | { | ||
344 | const unsigned char *buf = addr; | ||
345 | unsigned char *portp; | ||
346 | |||
347 | if (port >= LAN_IOSTART && port < LAN_IOEND) { | ||
348 | portp = PORT2ADDR_NE(port); | ||
349 | while (count--) | ||
350 | _ne_outb(*buf++, portp); | ||
351 | #if defined(CONFIG_IDE) | ||
352 | } else if ( ((port >= 0x170 && port <=0x177) || port == 0x376) || | ||
353 | ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) ){ | ||
354 | portp = __port2addr_ata(port); | ||
355 | while (count--) | ||
356 | *(volatile unsigned char *)portp = *buf++; | ||
357 | #endif | ||
358 | #if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC) | ||
359 | } else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) { | ||
360 | pcc_iowrite_byte(0, port, (void *)addr, sizeof(unsigned char), | ||
361 | count, 1); | ||
362 | #endif | ||
363 | } else { | ||
364 | portp = PORT2ADDR(port); | ||
365 | while (count--) | ||
366 | *(volatile unsigned char *)portp = *buf++; | ||
367 | } | ||
368 | } | ||
369 | |||
370 | void _outsw(unsigned int port, const void * addr, unsigned long count) | ||
371 | { | ||
372 | const unsigned short *buf = addr; | ||
373 | unsigned short *portp; | ||
374 | |||
375 | if (port >= LAN_IOSTART && port < LAN_IOEND) { | ||
376 | portp = PORT2ADDR_NE(port); | ||
377 | while (count--) | ||
378 | *(volatile unsigned short *)portp = *buf++; | ||
379 | #if defined(CONFIG_IDE) | ||
380 | } else if ( ((port >= 0x170 && port <=0x177) || port == 0x376) || | ||
381 | ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) ){ | ||
382 | portp = __port2addr_ata(port); | ||
383 | while (count--) | ||
384 | *(volatile unsigned short *)portp = *buf++; | ||
385 | #endif | ||
386 | #if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC) | ||
387 | } else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) { | ||
388 | pcc_iowrite_word(9, port, (void *)addr, sizeof(unsigned short), | ||
389 | count, 1); | ||
390 | #endif | ||
391 | } else { | ||
392 | portp = PORT2ADDR(port); | ||
393 | while (count--) | ||
394 | *(volatile unsigned short *)portp = *buf++; | ||
395 | } | ||
396 | } | ||
397 | |||
398 | void _outsl(unsigned int port, const void * addr, unsigned long count) | ||
399 | { | ||
400 | const unsigned long *buf = addr; | ||
401 | unsigned char *portp; | ||
402 | |||
403 | portp = PORT2ADDR(port); | ||
404 | while (count--) | ||
405 | *(volatile unsigned long *)portp = *buf++; | ||
406 | } | ||
diff --git a/arch/m32r/platforms/mappi3/setup.c b/arch/m32r/platforms/mappi3/setup.c deleted file mode 100644 index 87d2000081f7..000000000000 --- a/arch/m32r/platforms/mappi3/setup.c +++ /dev/null | |||
@@ -1,221 +0,0 @@ | |||
1 | // SPDX-License-Identifier: GPL-2.0 | ||
2 | /* | ||
3 | * linux/arch/m32r/platforms/mappi3/setup.c | ||
4 | * | ||
5 | * Setup routines for Renesas MAPPI-III(M3A-2170) Board | ||
6 | * | ||
7 | * Copyright (c) 2001-2005 Hiroyuki Kondo, Hirokazu Takata, | ||
8 | * Hitoshi Yamamoto, Mamoru Sakugawa | ||
9 | */ | ||
10 | |||
11 | #include <linux/irq.h> | ||
12 | #include <linux/kernel.h> | ||
13 | #include <linux/init.h> | ||
14 | #include <linux/platform_device.h> | ||
15 | |||
16 | #include <asm/m32r.h> | ||
17 | #include <asm/io.h> | ||
18 | |||
19 | #define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long))) | ||
20 | |||
21 | icu_data_t icu_data[NR_IRQS]; | ||
22 | |||
23 | static void disable_mappi3_irq(unsigned int irq) | ||
24 | { | ||
25 | unsigned long port, data; | ||
26 | |||
27 | if ((irq == 0) ||(irq >= NR_IRQS)) { | ||
28 | printk("bad irq 0x%08x\n", irq); | ||
29 | return; | ||
30 | } | ||
31 | port = irq2port(irq); | ||
32 | data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7; | ||
33 | outl(data, port); | ||
34 | } | ||
35 | |||
36 | static void enable_mappi3_irq(unsigned int irq) | ||
37 | { | ||
38 | unsigned long port, data; | ||
39 | |||
40 | if ((irq == 0) ||(irq >= NR_IRQS)) { | ||
41 | printk("bad irq 0x%08x\n", irq); | ||
42 | return; | ||
43 | } | ||
44 | port = irq2port(irq); | ||
45 | data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6; | ||
46 | outl(data, port); | ||
47 | } | ||
48 | |||
49 | static void mask_mappi3(struct irq_data *data) | ||
50 | { | ||
51 | disable_mappi3_irq(data->irq); | ||
52 | } | ||
53 | |||
54 | static void unmask_mappi3(struct irq_data *data) | ||
55 | { | ||
56 | enable_mappi3_irq(data->irq); | ||
57 | } | ||
58 | |||
59 | static void shutdown_mappi3(struct irq_data *data) | ||
60 | { | ||
61 | unsigned long port; | ||
62 | |||
63 | port = irq2port(data->irq); | ||
64 | outl(M32R_ICUCR_ILEVEL7, port); | ||
65 | } | ||
66 | |||
67 | static struct irq_chip mappi3_irq_type = { | ||
68 | .name = "MAPPI3-IRQ", | ||
69 | .irq_shutdown = shutdown_mappi3, | ||
70 | .irq_mask = mask_mappi3, | ||
71 | .irq_unmask = unmask_mappi3, | ||
72 | }; | ||
73 | |||
74 | void __init init_IRQ(void) | ||
75 | { | ||
76 | #if defined(CONFIG_SMC91X) | ||
77 | /* INT0 : LAN controller (SMC91111) */ | ||
78 | irq_set_chip_and_handler(M32R_IRQ_INT0, &mappi3_irq_type, | ||
79 | handle_level_irq); | ||
80 | icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10; | ||
81 | disable_mappi3_irq(M32R_IRQ_INT0); | ||
82 | #endif /* CONFIG_SMC91X */ | ||
83 | |||
84 | /* MFT2 : system timer */ | ||
85 | irq_set_chip_and_handler(M32R_IRQ_MFT2, &mappi3_irq_type, | ||
86 | handle_level_irq); | ||
87 | icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; | ||
88 | disable_mappi3_irq(M32R_IRQ_MFT2); | ||
89 | |||
90 | #ifdef CONFIG_SERIAL_M32R_SIO | ||
91 | /* SIO0_R : uart receive data */ | ||
92 | irq_set_chip_and_handler(M32R_IRQ_SIO0_R, &mappi3_irq_type, | ||
93 | handle_level_irq); | ||
94 | icu_data[M32R_IRQ_SIO0_R].icucr = 0; | ||
95 | disable_mappi3_irq(M32R_IRQ_SIO0_R); | ||
96 | |||
97 | /* SIO0_S : uart send data */ | ||
98 | irq_set_chip_and_handler(M32R_IRQ_SIO0_S, &mappi3_irq_type, | ||
99 | handle_level_irq); | ||
100 | icu_data[M32R_IRQ_SIO0_S].icucr = 0; | ||
101 | disable_mappi3_irq(M32R_IRQ_SIO0_S); | ||
102 | /* SIO1_R : uart receive data */ | ||
103 | irq_set_chip_and_handler(M32R_IRQ_SIO1_R, &mappi3_irq_type, | ||
104 | handle_level_irq); | ||
105 | icu_data[M32R_IRQ_SIO1_R].icucr = 0; | ||
106 | disable_mappi3_irq(M32R_IRQ_SIO1_R); | ||
107 | |||
108 | /* SIO1_S : uart send data */ | ||
109 | irq_set_chip_and_handler(M32R_IRQ_SIO1_S, &mappi3_irq_type, | ||
110 | handle_level_irq); | ||
111 | icu_data[M32R_IRQ_SIO1_S].icucr = 0; | ||
112 | disable_mappi3_irq(M32R_IRQ_SIO1_S); | ||
113 | #endif /* CONFIG_M32R_USE_DBG_CONSOLE */ | ||
114 | |||
115 | #if defined(CONFIG_USB) | ||
116 | /* INT1 : USB Host controller interrupt */ | ||
117 | irq_set_chip_and_handler(M32R_IRQ_INT1, &mappi3_irq_type, | ||
118 | handle_level_irq); | ||
119 | icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_ISMOD01; | ||
120 | disable_mappi3_irq(M32R_IRQ_INT1); | ||
121 | #endif /* CONFIG_USB */ | ||
122 | |||
123 | /* CFC IREQ */ | ||
124 | irq_set_chip_and_handler(PLD_IRQ_CFIREQ, &mappi3_irq_type, | ||
125 | handle_level_irq); | ||
126 | icu_data[PLD_IRQ_CFIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD01; | ||
127 | disable_mappi3_irq(PLD_IRQ_CFIREQ); | ||
128 | |||
129 | #if defined(CONFIG_M32R_CFC) | ||
130 | /* ICUCR41: CFC Insert & eject */ | ||
131 | irq_set_chip_and_handler(PLD_IRQ_CFC_INSERT, &mappi3_irq_type, | ||
132 | handle_level_irq); | ||
133 | icu_data[PLD_IRQ_CFC_INSERT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD00; | ||
134 | disable_mappi3_irq(PLD_IRQ_CFC_INSERT); | ||
135 | |||
136 | #endif /* CONFIG_M32R_CFC */ | ||
137 | |||
138 | /* IDE IREQ */ | ||
139 | irq_set_chip_and_handler(PLD_IRQ_IDEIREQ, &mappi3_irq_type, | ||
140 | handle_level_irq); | ||
141 | icu_data[PLD_IRQ_IDEIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10; | ||
142 | disable_mappi3_irq(PLD_IRQ_IDEIREQ); | ||
143 | |||
144 | } | ||
145 | |||
146 | #if defined(CONFIG_SMC91X) | ||
147 | |||
148 | #define LAN_IOSTART 0x300 | ||
149 | #define LAN_IOEND 0x320 | ||
150 | static struct resource smc91x_resources[] = { | ||
151 | [0] = { | ||
152 | .start = (LAN_IOSTART), | ||
153 | .end = (LAN_IOEND), | ||
154 | .flags = IORESOURCE_MEM, | ||
155 | }, | ||
156 | [1] = { | ||
157 | .start = M32R_IRQ_INT0, | ||
158 | .end = M32R_IRQ_INT0, | ||
159 | .flags = IORESOURCE_IRQ, | ||
160 | } | ||
161 | }; | ||
162 | |||
163 | static struct platform_device smc91x_device = { | ||
164 | .name = "smc91x", | ||
165 | .id = 0, | ||
166 | .num_resources = ARRAY_SIZE(smc91x_resources), | ||
167 | .resource = smc91x_resources, | ||
168 | }; | ||
169 | |||
170 | #endif | ||
171 | |||
172 | #if defined(CONFIG_FB_S1D13XXX) | ||
173 | |||
174 | #include <video/s1d13xxxfb.h> | ||
175 | #include <asm/s1d13806.h> | ||
176 | |||
177 | static struct s1d13xxxfb_pdata s1d13xxxfb_data = { | ||
178 | .initregs = s1d13xxxfb_initregs, | ||
179 | .initregssize = ARRAY_SIZE(s1d13xxxfb_initregs), | ||
180 | .platform_init_video = NULL, | ||
181 | #ifdef CONFIG_PM | ||
182 | .platform_suspend_video = NULL, | ||
183 | .platform_resume_video = NULL, | ||
184 | #endif | ||
185 | }; | ||
186 | |||
187 | static struct resource s1d13xxxfb_resources[] = { | ||
188 | [0] = { | ||
189 | .start = 0x1d600000UL, | ||
190 | .end = 0x1d73FFFFUL, | ||
191 | .flags = IORESOURCE_MEM, | ||
192 | }, | ||
193 | [1] = { | ||
194 | .start = 0x1d400000UL, | ||
195 | .end = 0x1d4001FFUL, | ||
196 | .flags = IORESOURCE_MEM, | ||
197 | } | ||
198 | }; | ||
199 | |||
200 | static struct platform_device s1d13xxxfb_device = { | ||
201 | .name = S1D_DEVICENAME, | ||
202 | .id = 0, | ||
203 | .dev = { | ||
204 | .platform_data = &s1d13xxxfb_data, | ||
205 | }, | ||
206 | .num_resources = ARRAY_SIZE(s1d13xxxfb_resources), | ||
207 | .resource = s1d13xxxfb_resources, | ||
208 | }; | ||
209 | #endif | ||
210 | |||
211 | static int __init platform_init(void) | ||
212 | { | ||
213 | #if defined(CONFIG_SMC91X) | ||
214 | platform_device_register(&smc91x_device); | ||
215 | #endif | ||
216 | #if defined(CONFIG_FB_S1D13XXX) | ||
217 | platform_device_register(&s1d13xxxfb_device); | ||
218 | #endif | ||
219 | return 0; | ||
220 | } | ||
221 | arch_initcall(platform_init); | ||
diff --git a/arch/m32r/platforms/oaks32r/Makefile b/arch/m32r/platforms/oaks32r/Makefile deleted file mode 100644 index 0de59084f21c..000000000000 --- a/arch/m32r/platforms/oaks32r/Makefile +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | obj-y := setup.o io.o | ||
diff --git a/arch/m32r/platforms/oaks32r/dot.gdbinit.nommu b/arch/m32r/platforms/oaks32r/dot.gdbinit.nommu deleted file mode 100644 index d481d972b802..000000000000 --- a/arch/m32r/platforms/oaks32r/dot.gdbinit.nommu +++ /dev/null | |||
@@ -1,154 +0,0 @@ | |||
1 | # .gdbinit file | ||
2 | # $Id: dot.gdbinit.oaks32r,v 1.4 2004/10/20 02:24:37 takata Exp $ | ||
3 | #----- | ||
4 | # NOTE: this file is generated by a script, "gen_gdbinit.pl". | ||
5 | # (Please type "gen_gdbinit.pl --help" and check the help message). | ||
6 | # $ Id: gen_gdbinit.pl,v 1.12 2004/07/26 09:56:10 takata Exp $ | ||
7 | #----- | ||
8 | # target platform: oaks32r | ||
9 | |||
10 | # setting | ||
11 | set width 0d70 | ||
12 | set radix 0d16 | ||
13 | |||
14 | # clk xin:cpu:bus=16:66:33 | ||
15 | define clock_init | ||
16 | set *(unsigned long *)0x00ef4008 = 1 | ||
17 | shell sleep 0.1 | ||
18 | set *(unsigned long *)0x00ef4000 = 0x00020100 | ||
19 | end | ||
20 | |||
21 | # Initialize programmable ports | ||
22 | define port_init | ||
23 | set *(unsigned long *)0x00ef1000 = 0x1 | ||
24 | set *(unsigned long *)0x00ef1060 = 0x01400001 | ||
25 | set *(unsigned long *)0x00ef1064 = 0x00015555 | ||
26 | set *(unsigned long *)0x00ef1068 = 0x55555050 | ||
27 | set *(unsigned long *)0x00ef106c = 0x05150040 | ||
28 | end | ||
29 | |||
30 | # Initialize SDRAM controller | ||
31 | define sdram_init | ||
32 | set *(unsigned long *)0x00ef6008 = 0x00000182 | ||
33 | set *(unsigned long *)0x00ef600c = 0x00000001 | ||
34 | shell sleep 0.1 | ||
35 | set *(unsigned long *)0x00ef602c = 0x00000010 | ||
36 | set *(unsigned long *)0x00ef6028 = 0x00000300 | ||
37 | set *(unsigned long *)0x00ef6048 = 0x00000001 | ||
38 | set *(unsigned long *)0x00ef6020 = 0x01000041 | ||
39 | set *(unsigned long *)0x00ef6004 = 0x00010117 | ||
40 | set *(unsigned long *)0x00ef6010 = 0x00000001 | ||
41 | set *(unsigned long *)0x00ef6024 = 0x00000001 | ||
42 | end | ||
43 | document sdram_init | ||
44 | SDRAM controller initialization | ||
45 | 0x01000000 - 0x017fffff (8MB) | ||
46 | end | ||
47 | |||
48 | # Initialize LAN controller | ||
49 | define lanc_init | ||
50 | set *(unsigned long *)0x00ef5008 = 0x03031303 | ||
51 | #RST DRV (P64) | ||
52 | set *(unsigned char *)0x00ef1046 = 0x08 | ||
53 | set *(unsigned char *)0x00ef1026 = 0xff | ||
54 | set *(unsigned char *)0x00ef1026 = 0x00 | ||
55 | set *(unsigned short *)0x02000630 = 0xffff | ||
56 | end | ||
57 | |||
58 | # Show current task structure | ||
59 | define show_current | ||
60 | set $current = $spi & 0xffffe000 | ||
61 | printf "$current=0x%08lX\n",$current | ||
62 | print *(struct task_struct *)$current | ||
63 | end | ||
64 | |||
65 | # Show user assigned task structure | ||
66 | define show_task | ||
67 | set = $arg0 & 0xffffe000 | ||
68 | printf "$task=0x%08lX\n",$task | ||
69 | print *(struct task_struct *)$task | ||
70 | end | ||
71 | document show_task | ||
72 | Show user assigned task structure | ||
73 | arg0 : task structure address | ||
74 | end | ||
75 | |||
76 | # Show M32R registers | ||
77 | define show_regs | ||
78 | printf " R0[0x%08lX] R1[0x%08lX] R2[0x%08lX] R3[0x%08lX]\n",$r0,$r1,$r2,$r3 | ||
79 | printf " R4[0x%08lX] R5[0x%08lX] R6[0x%08lX] R7[0x%08lX]\n",$r4,$r5,$r6,$r7 | ||
80 | printf " R8[0x%08lX] R9[0x%08lX] R10[0x%08lX] R11[0x%08lX]\n",$r8,$r9,$r10,$r11 | ||
81 | printf "R12[0x%08lX] FP[0x%08lX] LR[0x%08lX] SP[0x%08lX]\n",$r12,$fp,$lr,$sp | ||
82 | printf "PSW[0x%08lX] CBR[0x%08lX] SPI[0x%08lX] SPU[0x%08lX]\n",$psw,$cbr,$spi,$spu | ||
83 | printf "BPC[0x%08lX] PC[0x%08lX] ACCL[0x%08lX] ACCH[0x%08lX]\n",$bpc,$pc,$accl,$acch | ||
84 | end | ||
85 | |||
86 | # Setup all | ||
87 | define setup | ||
88 | use_mon_code | ||
89 | set *(unsigned int)0xfffffffc=0x60 | ||
90 | shell sleep 0.1 | ||
91 | clock_init | ||
92 | shell sleep 0.1 | ||
93 | port_init | ||
94 | sdram_init | ||
95 | lanc_init | ||
96 | end | ||
97 | |||
98 | # Load modules | ||
99 | define load_modules | ||
100 | use_debug_dma | ||
101 | load | ||
102 | end | ||
103 | |||
104 | # Set kernel parameters | ||
105 | define set_kernel_parameters | ||
106 | set $param = (void*)0x01001000 | ||
107 | # INITRD_START | ||
108 | # set *(unsigned long *)($param + 0x0010) = 0x00000000 | ||
109 | # INITRD_SIZE | ||
110 | # set *(unsigned long *)($param + 0x0014) = 0x00000000 | ||
111 | # M32R_CPUCLK | ||
112 | set *(unsigned long *)($param + 0x0018) = 0d66666667 | ||
113 | # M32R_BUSCLK | ||
114 | set *(unsigned long *)($param + 0x001c) = 0d33333333 | ||
115 | |||
116 | # M32R_TIMER_DIVIDE | ||
117 | set *(unsigned long *)($param + 0x0020) = 0d128 | ||
118 | |||
119 | set {char[0x200]}($param + 0x100) = "console=ttyS0,115200n8x root=/dev/nfsroot nfsroot=192.168.0.1:/project/m32r-linux/export/rootfs nfsaddrs=192.168.0.101:192.168.0.1:192.168.0.1:255.255.255.0:mappi001 \0" | ||
120 | end | ||
121 | |||
122 | # Boot | ||
123 | define boot | ||
124 | set_kernel_parameters | ||
125 | set $fp = 0 | ||
126 | set $pc = 0x01002000 | ||
127 | si | ||
128 | c | ||
129 | end | ||
130 | |||
131 | # Set breakpoints | ||
132 | define set_breakpoints | ||
133 | b *0x00000020 | ||
134 | b *0x00000030 | ||
135 | end | ||
136 | |||
137 | # Restart | ||
138 | define restart | ||
139 | sdireset | ||
140 | sdireset | ||
141 | setup | ||
142 | load_modules | ||
143 | boot | ||
144 | end | ||
145 | |||
146 | sdireset | ||
147 | sdireset | ||
148 | file vmlinux | ||
149 | target m32rsdi | ||
150 | setup | ||
151 | #load_modules | ||
152 | #set_breakpoints | ||
153 | #boot | ||
154 | |||
diff --git a/arch/m32r/platforms/oaks32r/io.c b/arch/m32r/platforms/oaks32r/io.c deleted file mode 100644 index 3ce1f3ac0d16..000000000000 --- a/arch/m32r/platforms/oaks32r/io.c +++ /dev/null | |||
@@ -1,229 +0,0 @@ | |||
1 | // SPDX-License-Identifier: GPL-2.0 | ||
2 | /* | ||
3 | * linux/arch/m32r/platforms/oaks32r/io.c | ||
4 | * | ||
5 | * Typical I/O routines for OAKS32R board. | ||
6 | * | ||
7 | * Copyright (c) 2001-2005 Hiroyuki Kondo, Hirokazu Takata, | ||
8 | * Hitoshi Yamamoto, Mamoru Sakugawa | ||
9 | */ | ||
10 | |||
11 | #include <asm/m32r.h> | ||
12 | #include <asm/page.h> | ||
13 | #include <asm/io.h> | ||
14 | |||
15 | #define PORT2ADDR(port) _port2addr(port) | ||
16 | |||
17 | static inline void *_port2addr(unsigned long port) | ||
18 | { | ||
19 | return (void *)(port | NONCACHE_OFFSET); | ||
20 | } | ||
21 | |||
22 | static inline void *_port2addr_ne(unsigned long port) | ||
23 | { | ||
24 | return (void *)((port<<1) + NONCACHE_OFFSET + 0x02000000); | ||
25 | } | ||
26 | |||
27 | static inline void delay(void) | ||
28 | { | ||
29 | __asm__ __volatile__ ("push r0; \n\t pop r0;" : : :"memory"); | ||
30 | } | ||
31 | |||
32 | /* | ||
33 | * NIC I/O function | ||
34 | */ | ||
35 | |||
36 | #define PORT2ADDR_NE(port) _port2addr_ne(port) | ||
37 | |||
38 | static inline unsigned char _ne_inb(void *portp) | ||
39 | { | ||
40 | return *(volatile unsigned char *)(portp+1); | ||
41 | } | ||
42 | |||
43 | static inline unsigned short _ne_inw(void *portp) | ||
44 | { | ||
45 | unsigned short tmp; | ||
46 | |||
47 | tmp = *(unsigned short *)(portp) & 0xff; | ||
48 | tmp |= *(unsigned short *)(portp+2) << 8; | ||
49 | return tmp; | ||
50 | } | ||
51 | |||
52 | static inline void _ne_insb(void *portp, void *addr, unsigned long count) | ||
53 | { | ||
54 | unsigned char *buf = addr; | ||
55 | while (count--) | ||
56 | *buf++ = *(volatile unsigned char *)(portp+1); | ||
57 | } | ||
58 | |||
59 | static inline void _ne_outb(unsigned char b, void *portp) | ||
60 | { | ||
61 | *(volatile unsigned char *)(portp+1) = b; | ||
62 | } | ||
63 | |||
64 | static inline void _ne_outw(unsigned short w, void *portp) | ||
65 | { | ||
66 | *(volatile unsigned short *)portp = (w >> 8); | ||
67 | *(volatile unsigned short *)(portp+2) = (w & 0xff); | ||
68 | } | ||
69 | |||
70 | unsigned char _inb(unsigned long port) | ||
71 | { | ||
72 | if (port >= 0x300 && port < 0x320) | ||
73 | return _ne_inb(PORT2ADDR_NE(port)); | ||
74 | |||
75 | return *(volatile unsigned char *)PORT2ADDR(port); | ||
76 | } | ||
77 | |||
78 | unsigned short _inw(unsigned long port) | ||
79 | { | ||
80 | if (port >= 0x300 && port < 0x320) | ||
81 | return _ne_inw(PORT2ADDR_NE(port)); | ||
82 | |||
83 | return *(volatile unsigned short *)PORT2ADDR(port); | ||
84 | } | ||
85 | |||
86 | unsigned long _inl(unsigned long port) | ||
87 | { | ||
88 | return *(volatile unsigned long *)PORT2ADDR(port); | ||
89 | } | ||
90 | |||
91 | unsigned char _inb_p(unsigned long port) | ||
92 | { | ||
93 | unsigned char v = _inb(port); | ||
94 | delay(); | ||
95 | return (v); | ||
96 | } | ||
97 | |||
98 | unsigned short _inw_p(unsigned long port) | ||
99 | { | ||
100 | unsigned short v = _inw(port); | ||
101 | delay(); | ||
102 | return (v); | ||
103 | } | ||
104 | |||
105 | unsigned long _inl_p(unsigned long port) | ||
106 | { | ||
107 | unsigned long v = _inl(port); | ||
108 | delay(); | ||
109 | return (v); | ||
110 | } | ||
111 | |||
112 | void _outb(unsigned char b, unsigned long port) | ||
113 | { | ||
114 | if (port >= 0x300 && port < 0x320) | ||
115 | _ne_outb(b, PORT2ADDR_NE(port)); | ||
116 | else | ||
117 | *(volatile unsigned char *)PORT2ADDR(port) = b; | ||
118 | } | ||
119 | |||
120 | void _outw(unsigned short w, unsigned long port) | ||
121 | { | ||
122 | if (port >= 0x300 && port < 0x320) | ||
123 | _ne_outw(w, PORT2ADDR_NE(port)); | ||
124 | else | ||
125 | *(volatile unsigned short *)PORT2ADDR(port) = w; | ||
126 | } | ||
127 | |||
128 | void _outl(unsigned long l, unsigned long port) | ||
129 | { | ||
130 | *(volatile unsigned long *)PORT2ADDR(port) = l; | ||
131 | } | ||
132 | |||
133 | void _outb_p(unsigned char b, unsigned long port) | ||
134 | { | ||
135 | _outb(b, port); | ||
136 | delay(); | ||
137 | } | ||
138 | |||
139 | void _outw_p(unsigned short w, unsigned long port) | ||
140 | { | ||
141 | _outw(w, port); | ||
142 | delay(); | ||
143 | } | ||
144 | |||
145 | void _outl_p(unsigned long l, unsigned long port) | ||
146 | { | ||
147 | _outl(l, port); | ||
148 | delay(); | ||
149 | } | ||
150 | |||
151 | void _insb(unsigned int port, void *addr, unsigned long count) | ||
152 | { | ||
153 | if (port >= 0x300 && port < 0x320) | ||
154 | _ne_insb(PORT2ADDR_NE(port), addr, count); | ||
155 | else { | ||
156 | unsigned char *buf = addr; | ||
157 | unsigned char *portp = PORT2ADDR(port); | ||
158 | while (count--) | ||
159 | *buf++ = *(volatile unsigned char *)portp; | ||
160 | } | ||
161 | } | ||
162 | |||
163 | void _insw(unsigned int port, void *addr, unsigned long count) | ||
164 | { | ||
165 | unsigned short *buf = addr; | ||
166 | unsigned short *portp; | ||
167 | |||
168 | if (port >= 0x300 && port < 0x320) { | ||
169 | portp = PORT2ADDR_NE(port); | ||
170 | while (count--) | ||
171 | *buf++ = _ne_inw(portp); | ||
172 | } else { | ||
173 | portp = PORT2ADDR(port); | ||
174 | while (count--) | ||
175 | *buf++ = *(volatile unsigned short *)portp; | ||
176 | } | ||
177 | } | ||
178 | |||
179 | void _insl(unsigned int port, void *addr, unsigned long count) | ||
180 | { | ||
181 | unsigned long *buf = addr; | ||
182 | unsigned long *portp; | ||
183 | |||
184 | portp = PORT2ADDR(port); | ||
185 | while (count--) | ||
186 | *buf++ = *(volatile unsigned long *)portp; | ||
187 | } | ||
188 | |||
189 | void _outsb(unsigned int port, const void *addr, unsigned long count) | ||
190 | { | ||
191 | const unsigned char *buf = addr; | ||
192 | unsigned char *portp; | ||
193 | |||
194 | if (port >= 0x300 && port < 0x320) { | ||
195 | portp = PORT2ADDR_NE(port); | ||
196 | while (count--) | ||
197 | _ne_outb(*buf++, portp); | ||
198 | } else { | ||
199 | portp = PORT2ADDR(port); | ||
200 | while (count--) | ||
201 | *(volatile unsigned char *)portp = *buf++; | ||
202 | } | ||
203 | } | ||
204 | |||
205 | void _outsw(unsigned int port, const void *addr, unsigned long count) | ||
206 | { | ||
207 | const unsigned short *buf = addr; | ||
208 | unsigned short *portp; | ||
209 | |||
210 | if (port >= 0x300 && port < 0x320) { | ||
211 | portp = PORT2ADDR_NE(port); | ||
212 | while (count--) | ||
213 | _ne_outw(*buf++, portp); | ||
214 | } else { | ||
215 | portp = PORT2ADDR(port); | ||
216 | while (count--) | ||
217 | *(volatile unsigned short *)portp = *buf++; | ||
218 | } | ||
219 | } | ||
220 | |||
221 | void _outsl(unsigned int port, const void *addr, unsigned long count) | ||
222 | { | ||
223 | const unsigned long *buf = addr; | ||
224 | unsigned char *portp; | ||
225 | |||
226 | portp = PORT2ADDR(port); | ||
227 | while (count--) | ||
228 | *(volatile unsigned long *)portp = *buf++; | ||
229 | } | ||
diff --git a/arch/m32r/platforms/oaks32r/setup.c b/arch/m32r/platforms/oaks32r/setup.c deleted file mode 100644 index 8188c0baa064..000000000000 --- a/arch/m32r/platforms/oaks32r/setup.c +++ /dev/null | |||
@@ -1,114 +0,0 @@ | |||
1 | // SPDX-License-Identifier: GPL-2.0 | ||
2 | /* | ||
3 | * linux/arch/m32r/platforms/oaks32r/setup.c | ||
4 | * | ||
5 | * Setup routines for OAKS32R Board | ||
6 | * | ||
7 | * Copyright (c) 2002-2005 Hiroyuki Kondo, Hirokazu Takata, | ||
8 | * Hitoshi Yamamoto, Mamoru Sakugawa | ||
9 | */ | ||
10 | |||
11 | #include <linux/irq.h> | ||
12 | #include <linux/kernel.h> | ||
13 | #include <linux/init.h> | ||
14 | |||
15 | #include <asm/m32r.h> | ||
16 | #include <asm/io.h> | ||
17 | |||
18 | #define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long))) | ||
19 | |||
20 | icu_data_t icu_data[NR_IRQS]; | ||
21 | |||
22 | static void disable_oaks32r_irq(unsigned int irq) | ||
23 | { | ||
24 | unsigned long port, data; | ||
25 | |||
26 | port = irq2port(irq); | ||
27 | data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7; | ||
28 | outl(data, port); | ||
29 | } | ||
30 | |||
31 | static void enable_oaks32r_irq(unsigned int irq) | ||
32 | { | ||
33 | unsigned long port, data; | ||
34 | |||
35 | port = irq2port(irq); | ||
36 | data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6; | ||
37 | outl(data, port); | ||
38 | } | ||
39 | |||
40 | static void mask_oaks32r(struct irq_data *data) | ||
41 | { | ||
42 | disable_oaks32r_irq(data->irq); | ||
43 | } | ||
44 | |||
45 | static void unmask_oaks32r(struct irq_data *data) | ||
46 | { | ||
47 | enable_oaks32r_irq(data->irq); | ||
48 | } | ||
49 | |||
50 | static void shutdown_oaks32r(struct irq_data *data) | ||
51 | { | ||
52 | unsigned long port; | ||
53 | |||
54 | port = irq2port(data->irq); | ||
55 | outl(M32R_ICUCR_ILEVEL7, port); | ||
56 | } | ||
57 | |||
58 | static struct irq_chip oaks32r_irq_type = | ||
59 | { | ||
60 | .name = "OAKS32R-IRQ", | ||
61 | .irq_shutdown = shutdown_oaks32r, | ||
62 | .irq_mask = mask_oaks32r, | ||
63 | .irq_unmask = unmask_oaks32r, | ||
64 | }; | ||
65 | |||
66 | void __init init_IRQ(void) | ||
67 | { | ||
68 | static int once = 0; | ||
69 | |||
70 | if (once) | ||
71 | return; | ||
72 | else | ||
73 | once++; | ||
74 | |||
75 | #ifdef CONFIG_NE2000 | ||
76 | /* INT3 : LAN controller (RTL8019AS) */ | ||
77 | irq_set_chip_and_handler(M32R_IRQ_INT3, &oaks32r_irq_type, | ||
78 | handle_level_irq); | ||
79 | icu_data[M32R_IRQ_INT3].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10; | ||
80 | disable_oaks32r_irq(M32R_IRQ_INT3); | ||
81 | #endif /* CONFIG_M32R_NE2000 */ | ||
82 | |||
83 | /* MFT2 : system timer */ | ||
84 | irq_set_chip_and_handler(M32R_IRQ_MFT2, &oaks32r_irq_type, | ||
85 | handle_level_irq); | ||
86 | icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; | ||
87 | disable_oaks32r_irq(M32R_IRQ_MFT2); | ||
88 | |||
89 | #ifdef CONFIG_SERIAL_M32R_SIO | ||
90 | /* SIO0_R : uart receive data */ | ||
91 | irq_set_chip_and_handler(M32R_IRQ_SIO0_R, &oaks32r_irq_type, | ||
92 | handle_level_irq); | ||
93 | icu_data[M32R_IRQ_SIO0_R].icucr = 0; | ||
94 | disable_oaks32r_irq(M32R_IRQ_SIO0_R); | ||
95 | |||
96 | /* SIO0_S : uart send data */ | ||
97 | irq_set_chip_and_handler(M32R_IRQ_SIO0_S, &oaks32r_irq_type, | ||
98 | handle_level_irq); | ||
99 | icu_data[M32R_IRQ_SIO0_S].icucr = 0; | ||
100 | disable_oaks32r_irq(M32R_IRQ_SIO0_S); | ||
101 | |||
102 | /* SIO1_R : uart receive data */ | ||
103 | irq_set_chip_and_handler(M32R_IRQ_SIO1_R, &oaks32r_irq_type, | ||
104 | handle_level_irq); | ||
105 | icu_data[M32R_IRQ_SIO1_R].icucr = 0; | ||
106 | disable_oaks32r_irq(M32R_IRQ_SIO1_R); | ||
107 | |||
108 | /* SIO1_S : uart send data */ | ||
109 | irq_set_chip_and_handler(M32R_IRQ_SIO1_S, &oaks32r_irq_type, | ||
110 | handle_level_irq); | ||
111 | icu_data[M32R_IRQ_SIO1_S].icucr = 0; | ||
112 | disable_oaks32r_irq(M32R_IRQ_SIO1_S); | ||
113 | #endif /* CONFIG_SERIAL_M32R_SIO */ | ||
114 | } | ||
diff --git a/arch/m32r/platforms/opsput/Makefile b/arch/m32r/platforms/opsput/Makefile deleted file mode 100644 index 0de59084f21c..000000000000 --- a/arch/m32r/platforms/opsput/Makefile +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | obj-y := setup.o io.o | ||
diff --git a/arch/m32r/platforms/opsput/dot.gdbinit b/arch/m32r/platforms/opsput/dot.gdbinit deleted file mode 100644 index b7e6c6640857..000000000000 --- a/arch/m32r/platforms/opsput/dot.gdbinit +++ /dev/null | |||
@@ -1,218 +0,0 @@ | |||
1 | # .gdbinit file | ||
2 | # $Id: dot.gdbinit,v 1.1 2004/07/27 06:54:20 sakugawa Exp $ | ||
3 | |||
4 | # setting | ||
5 | set width 0d70 | ||
6 | set radix 0d16 | ||
7 | set height 0 | ||
8 | debug_chaos | ||
9 | |||
10 | # clk xin:cpu:bus=1:8:1 | ||
11 | define clock_init_on_181 | ||
12 | set *(unsigned long *)0x00ef400c = 0x2 | ||
13 | set *(unsigned long *)0x00ef4004 = 0x1 | ||
14 | shell sleep 0.1 | ||
15 | set *(unsigned long *)0x00ef4000 = 0x101 | ||
16 | end | ||
17 | # clk xin:cpu:bus=1:8:2 | ||
18 | define clock_init_on_182 | ||
19 | set *(unsigned long *)0x00ef400c = 0x1 | ||
20 | set *(unsigned long *)0x00ef4004 = 0x1 | ||
21 | shell sleep 0.1 | ||
22 | set *(unsigned long *)0x00ef4000 = 0x101 | ||
23 | end | ||
24 | |||
25 | # clk xin:cpu:bus=1:8:4 | ||
26 | define clock_init_on_184 | ||
27 | set *(unsigned long *)0x00ef400c = 0x0 | ||
28 | set *(unsigned long *)0x00ef4004 = 0x1 | ||
29 | shell sleep 0.1 | ||
30 | set *(unsigned long *)0x00ef4000 = 0x101 | ||
31 | end | ||
32 | |||
33 | # clk xin:cpu:bus=1:1:1 | ||
34 | define clock_init_off | ||
35 | shell sleep 0.1 | ||
36 | set *(unsigned long *)0x00ef4000 = 0x0 | ||
37 | shell sleep 0.1 | ||
38 | set *(unsigned long *)0x00ef4004 = 0x0 | ||
39 | shell sleep 0.1 | ||
40 | set *(unsigned long *)0x00ef400c = 0x0 | ||
41 | end | ||
42 | |||
43 | define tlb_init | ||
44 | set $tlbbase = 0xfe000000 | ||
45 | set *(unsigned long *)($tlbbase + 0x04) = 0x0 | ||
46 | set *(unsigned long *)($tlbbase + 0x0c) = 0x0 | ||
47 | set *(unsigned long *)($tlbbase + 0x14) = 0x0 | ||
48 | set *(unsigned long *)($tlbbase + 0x1c) = 0x0 | ||
49 | set *(unsigned long *)($tlbbase + 0x24) = 0x0 | ||
50 | set *(unsigned long *)($tlbbase + 0x2c) = 0x0 | ||
51 | set *(unsigned long *)($tlbbase + 0x34) = 0x0 | ||
52 | set *(unsigned long *)($tlbbase + 0x3c) = 0x0 | ||
53 | set *(unsigned long *)($tlbbase + 0x44) = 0x0 | ||
54 | set *(unsigned long *)($tlbbase + 0x4c) = 0x0 | ||
55 | set *(unsigned long *)($tlbbase + 0x54) = 0x0 | ||
56 | set *(unsigned long *)($tlbbase + 0x5c) = 0x0 | ||
57 | set *(unsigned long *)($tlbbase + 0x64) = 0x0 | ||
58 | set *(unsigned long *)($tlbbase + 0x6c) = 0x0 | ||
59 | set *(unsigned long *)($tlbbase + 0x74) = 0x0 | ||
60 | set *(unsigned long *)($tlbbase + 0x7c) = 0x0 | ||
61 | set *(unsigned long *)($tlbbase + 0x84) = 0x0 | ||
62 | set *(unsigned long *)($tlbbase + 0x8c) = 0x0 | ||
63 | set *(unsigned long *)($tlbbase + 0x94) = 0x0 | ||
64 | set *(unsigned long *)($tlbbase + 0x9c) = 0x0 | ||
65 | set *(unsigned long *)($tlbbase + 0xa4) = 0x0 | ||
66 | set *(unsigned long *)($tlbbase + 0xac) = 0x0 | ||
67 | set *(unsigned long *)($tlbbase + 0xb4) = 0x0 | ||
68 | set *(unsigned long *)($tlbbase + 0xbc) = 0x0 | ||
69 | set *(unsigned long *)($tlbbase + 0xc4) = 0x0 | ||
70 | set *(unsigned long *)($tlbbase + 0xcc) = 0x0 | ||
71 | set *(unsigned long *)($tlbbase + 0xd4) = 0x0 | ||
72 | set *(unsigned long *)($tlbbase + 0xdc) = 0x0 | ||
73 | set *(unsigned long *)($tlbbase + 0xe4) = 0x0 | ||
74 | set *(unsigned long *)($tlbbase + 0xec) = 0x0 | ||
75 | set *(unsigned long *)($tlbbase + 0xf4) = 0x0 | ||
76 | set *(unsigned long *)($tlbbase + 0xfc) = 0x0 | ||
77 | set $tlbbase = 0xfe000800 | ||
78 | set *(unsigned long *)($tlbbase + 0x04) = 0x0 | ||
79 | set *(unsigned long *)($tlbbase + 0x0c) = 0x0 | ||
80 | set *(unsigned long *)($tlbbase + 0x14) = 0x0 | ||
81 | set *(unsigned long *)($tlbbase + 0x1c) = 0x0 | ||
82 | set *(unsigned long *)($tlbbase + 0x24) = 0x0 | ||
83 | set *(unsigned long *)($tlbbase + 0x2c) = 0x0 | ||
84 | set *(unsigned long *)($tlbbase + 0x34) = 0x0 | ||
85 | set *(unsigned long *)($tlbbase + 0x3c) = 0x0 | ||
86 | set *(unsigned long *)($tlbbase + 0x44) = 0x0 | ||
87 | set *(unsigned long *)($tlbbase + 0x4c) = 0x0 | ||
88 | set *(unsigned long *)($tlbbase + 0x54) = 0x0 | ||
89 | set *(unsigned long *)($tlbbase + 0x5c) = 0x0 | ||
90 | set *(unsigned long *)($tlbbase + 0x64) = 0x0 | ||
91 | set *(unsigned long *)($tlbbase + 0x6c) = 0x0 | ||
92 | set *(unsigned long *)($tlbbase + 0x74) = 0x0 | ||
93 | set *(unsigned long *)($tlbbase + 0x7c) = 0x0 | ||
94 | set *(unsigned long *)($tlbbase + 0x84) = 0x0 | ||
95 | set *(unsigned long *)($tlbbase + 0x8c) = 0x0 | ||
96 | set *(unsigned long *)($tlbbase + 0x94) = 0x0 | ||
97 | set *(unsigned long *)($tlbbase + 0x9c) = 0x0 | ||
98 | set *(unsigned long *)($tlbbase + 0xa4) = 0x0 | ||
99 | set *(unsigned long *)($tlbbase + 0xac) = 0x0 | ||
100 | set *(unsigned long *)($tlbbase + 0xb4) = 0x0 | ||
101 | set *(unsigned long *)($tlbbase + 0xbc) = 0x0 | ||
102 | set *(unsigned long *)($tlbbase + 0xc4) = 0x0 | ||
103 | set *(unsigned long *)($tlbbase + 0xcc) = 0x0 | ||
104 | set *(unsigned long *)($tlbbase + 0xd4) = 0x0 | ||
105 | set *(unsigned long *)($tlbbase + 0xdc) = 0x0 | ||
106 | set *(unsigned long *)($tlbbase + 0xe4) = 0x0 | ||
107 | set *(unsigned long *)($tlbbase + 0xec) = 0x0 | ||
108 | set *(unsigned long *)($tlbbase + 0xf4) = 0x0 | ||
109 | set *(unsigned long *)($tlbbase + 0xfc) = 0x0 | ||
110 | end | ||
111 | |||
112 | define load_modules | ||
113 | use_debug_dma | ||
114 | load | ||
115 | end | ||
116 | |||
117 | # Set kernel parameters | ||
118 | define set_kernel_parameters | ||
119 | set $param = (void*)0x88001000 | ||
120 | # INITRD_START | ||
121 | # set *(unsigned long *)($param + 0x0010) = 0x08300000 | ||
122 | # INITRD_SIZE | ||
123 | # set *(unsigned long *)($param + 0x0014) = 0x00400000 | ||
124 | # M32R_CPUCLK | ||
125 | set *(unsigned long *)($param + 0x0018) = 0d200000000 | ||
126 | # M32R_BUSCLK | ||
127 | set *(unsigned long *)($param + 0x001c) = 0d50000000 | ||
128 | # set *(unsigned long *)($param + 0x001c) = 0d25000000 | ||
129 | |||
130 | # M32R_TIMER_DIVIDE | ||
131 | set *(unsigned long *)($param + 0x0020) = 0d128 | ||
132 | |||
133 | set {char[0x200]}($param + 0x100) = "console=ttyS0,115200n8x console=tty1 \ | ||
134 | root=/dev/nfsroot \ | ||
135 | nfsroot=192.168.0.1:/project/m32r-linux/export/root.2.6 \ | ||
136 | nfsaddrs=192.168.0.101:192.168.0.1:192.168.0.1:255.255.255.0:mappi001 \ | ||
137 | mem=16m \0" | ||
138 | end | ||
139 | |||
140 | define boot | ||
141 | set_kernel_parameters | ||
142 | set $pc=0x88002000 | ||
143 | set $fp=0 | ||
144 | set $evb=0x88000000 | ||
145 | si | ||
146 | c | ||
147 | end | ||
148 | |||
149 | # Show TLB entries | ||
150 | define show_tlb_entries | ||
151 | set $i = 0 | ||
152 | set $addr = $arg0 | ||
153 | use_mon_code | ||
154 | while ($i < 0d32 ) | ||
155 | set $tlb_tag = *(unsigned long*)$addr | ||
156 | set $tlb_data = *(unsigned long*)($addr + 4) | ||
157 | printf " [%2d] 0x%08lx : 0x%08lx - 0x%08lx\n", $i, $addr, $tlb_tag, $tlb_data | ||
158 | set $i = $i + 1 | ||
159 | set $addr = $addr + 8 | ||
160 | end | ||
161 | # use_debug_dma | ||
162 | end | ||
163 | define itlb | ||
164 | set $itlb=0xfe000000 | ||
165 | show_tlb_entries $itlb | ||
166 | end | ||
167 | define dtlb | ||
168 | set $dtlb=0xfe000800 | ||
169 | show_tlb_entries $dtlb | ||
170 | end | ||
171 | |||
172 | define show_regs | ||
173 | printf " R0[%08lx] R1[%08lx] R2[%08lx] R3[%08lx]\n",$r0,$r1,$r2,$r3 | ||
174 | printf " R4[%08lx] R5[%08lx] R6[%08lx] R7[%08lx]\n",$r4,$r5,$r6,$r7 | ||
175 | printf " R8[%08lx] R9[%08lx] R10[%08lx] R11[%08lx]\n",$r8,$r9,$r10,$r11 | ||
176 | printf "R12[%08lx] FP[%08lx] LR[%08lx] SP[%08lx]\n",$r12,$fp,$lr,$sp | ||
177 | printf "PSW[%08lx] CBR[%08lx] SPI[%08lx] SPU[%08lx]\n",$psw,$cbr,$spi,$spu | ||
178 | printf "BPC[%08lx] PC[%08lx] ACCL[%08lx] ACCH[%08lx]\n",$bpc,$pc,$accl,$acch | ||
179 | printf "EVB[%08lx]\n",$evb | ||
180 | end | ||
181 | |||
182 | define restart | ||
183 | sdireset | ||
184 | sdireset | ||
185 | en 1 | ||
186 | set $pc=0x0 | ||
187 | c | ||
188 | tlb_init | ||
189 | setup | ||
190 | load_modules | ||
191 | boot | ||
192 | end | ||
193 | |||
194 | define setup | ||
195 | debug_chaos | ||
196 | # Clock | ||
197 | # shell sleep 0.1 | ||
198 | # clock_init_off | ||
199 | # shell sleep 1 | ||
200 | # clock_init_on_182 | ||
201 | # shell sleep 0.1 | ||
202 | # SDRAM | ||
203 | set *(unsigned long *)0xa0ef6004 = 0x0001053f | ||
204 | set *(unsigned long *)0xa0ef6028 = 0x00031102 | ||
205 | end | ||
206 | |||
207 | sdireset | ||
208 | sdireset | ||
209 | file vmlinux | ||
210 | target m32rsdi | ||
211 | set $pc=0x0 | ||
212 | b *0x30000 | ||
213 | c | ||
214 | dis 1 | ||
215 | setup | ||
216 | tlb_init | ||
217 | load_modules | ||
218 | boot | ||
diff --git a/arch/m32r/platforms/opsput/io.c b/arch/m32r/platforms/opsput/io.c deleted file mode 100644 index 379efb77123d..000000000000 --- a/arch/m32r/platforms/opsput/io.c +++ /dev/null | |||
@@ -1,395 +0,0 @@ | |||
1 | /* | ||
2 | * linux/arch/m32r/platforms/opsput/io.c | ||
3 | * | ||
4 | * Typical I/O routines for OPSPUT board. | ||
5 | * | ||
6 | * Copyright (c) 2001-2005 Hiroyuki Kondo, Hirokazu Takata, | ||
7 | * Hitoshi Yamamoto, Takeo Takahashi | ||
8 | * | ||
9 | * This file is subject to the terms and conditions of the GNU General | ||
10 | * Public License. See the file "COPYING" in the main directory of this | ||
11 | * archive for more details. | ||
12 | */ | ||
13 | |||
14 | #include <asm/m32r.h> | ||
15 | #include <asm/page.h> | ||
16 | #include <asm/io.h> | ||
17 | #include <asm/byteorder.h> | ||
18 | |||
19 | #if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC) | ||
20 | #include <linux/types.h> | ||
21 | |||
22 | #define M32R_PCC_IOMAP_SIZE 0x1000 | ||
23 | |||
24 | #define M32R_PCC_IOSTART0 0x1000 | ||
25 | #define M32R_PCC_IOEND0 (M32R_PCC_IOSTART0 + M32R_PCC_IOMAP_SIZE - 1) | ||
26 | |||
27 | extern void pcc_ioread_byte(int, unsigned long, void *, size_t, size_t, int); | ||
28 | extern void pcc_ioread_word(int, unsigned long, void *, size_t, size_t, int); | ||
29 | extern void pcc_iowrite_byte(int, unsigned long, void *, size_t, size_t, int); | ||
30 | extern void pcc_iowrite_word(int, unsigned long, void *, size_t, size_t, int); | ||
31 | #endif /* CONFIG_PCMCIA && CONFIG_M32R_CFC */ | ||
32 | |||
33 | #define PORT2ADDR(port) _port2addr(port) | ||
34 | #define PORT2ADDR_USB(port) _port2addr_usb(port) | ||
35 | |||
36 | static inline void *_port2addr(unsigned long port) | ||
37 | { | ||
38 | return (void *)(port | NONCACHE_OFFSET); | ||
39 | } | ||
40 | |||
41 | #if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC) | ||
42 | static inline void *__port2addr_ata(unsigned long port) | ||
43 | { | ||
44 | static int dummy_reg; | ||
45 | |||
46 | switch (port) { | ||
47 | case 0x1f0: return (void *)(0x0c002000 | NONCACHE_OFFSET); | ||
48 | case 0x1f1: return (void *)(0x0c012800 | NONCACHE_OFFSET); | ||
49 | case 0x1f2: return (void *)(0x0c012002 | NONCACHE_OFFSET); | ||
50 | case 0x1f3: return (void *)(0x0c012802 | NONCACHE_OFFSET); | ||
51 | case 0x1f4: return (void *)(0x0c012004 | NONCACHE_OFFSET); | ||
52 | case 0x1f5: return (void *)(0x0c012804 | NONCACHE_OFFSET); | ||
53 | case 0x1f6: return (void *)(0x0c012006 | NONCACHE_OFFSET); | ||
54 | case 0x1f7: return (void *)(0x0c012806 | NONCACHE_OFFSET); | ||
55 | case 0x3f6: return (void *)(0x0c01200e | NONCACHE_OFFSET); | ||
56 | default: return (void *)&dummy_reg; | ||
57 | } | ||
58 | } | ||
59 | #endif | ||
60 | |||
61 | /* | ||
62 | * OPSPUT-LAN is located in the extended bus space | ||
63 | * from 0x10000000 to 0x13ffffff on physical address. | ||
64 | * The base address of LAN controller(LAN91C111) is 0x300. | ||
65 | */ | ||
66 | #define LAN_IOSTART (0x300 | NONCACHE_OFFSET) | ||
67 | #define LAN_IOEND (0x320 | NONCACHE_OFFSET) | ||
68 | static inline void *_port2addr_ne(unsigned long port) | ||
69 | { | ||
70 | return (void *)(port + 0x10000000); | ||
71 | } | ||
72 | static inline void *_port2addr_usb(unsigned long port) | ||
73 | { | ||
74 | return (void *)((port & 0x0f) + NONCACHE_OFFSET + 0x10303000); | ||
75 | } | ||
76 | |||
77 | static inline void delay(void) | ||
78 | { | ||
79 | __asm__ __volatile__ ("push r0; \n\t pop r0;" : : :"memory"); | ||
80 | } | ||
81 | |||
82 | /* | ||
83 | * NIC I/O function | ||
84 | */ | ||
85 | |||
86 | #define PORT2ADDR_NE(port) _port2addr_ne(port) | ||
87 | |||
88 | static inline unsigned char _ne_inb(void *portp) | ||
89 | { | ||
90 | return *(volatile unsigned char *)portp; | ||
91 | } | ||
92 | |||
93 | static inline unsigned short _ne_inw(void *portp) | ||
94 | { | ||
95 | return (unsigned short)le16_to_cpu(*(volatile unsigned short *)portp); | ||
96 | } | ||
97 | |||
98 | static inline void _ne_insb(void *portp, void *addr, unsigned long count) | ||
99 | { | ||
100 | unsigned char *buf = (unsigned char *)addr; | ||
101 | |||
102 | while (count--) | ||
103 | *buf++ = _ne_inb(portp); | ||
104 | } | ||
105 | |||
106 | static inline void _ne_outb(unsigned char b, void *portp) | ||
107 | { | ||
108 | *(volatile unsigned char *)portp = b; | ||
109 | } | ||
110 | |||
111 | static inline void _ne_outw(unsigned short w, void *portp) | ||
112 | { | ||
113 | *(volatile unsigned short *)portp = cpu_to_le16(w); | ||
114 | } | ||
115 | |||
116 | unsigned char _inb(unsigned long port) | ||
117 | { | ||
118 | if (port >= LAN_IOSTART && port < LAN_IOEND) | ||
119 | return _ne_inb(PORT2ADDR_NE(port)); | ||
120 | |||
121 | #if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC) | ||
122 | else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) { | ||
123 | return *(volatile unsigned char *)__port2addr_ata(port); | ||
124 | } | ||
125 | #endif | ||
126 | #if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC) | ||
127 | else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) { | ||
128 | unsigned char b; | ||
129 | pcc_ioread_byte(0, port, &b, sizeof(b), 1, 0); | ||
130 | return b; | ||
131 | } else | ||
132 | #endif | ||
133 | |||
134 | return *(volatile unsigned char *)PORT2ADDR(port); | ||
135 | } | ||
136 | |||
137 | unsigned short _inw(unsigned long port) | ||
138 | { | ||
139 | if (port >= LAN_IOSTART && port < LAN_IOEND) | ||
140 | return _ne_inw(PORT2ADDR_NE(port)); | ||
141 | #if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC) | ||
142 | else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) { | ||
143 | return *(volatile unsigned short *)__port2addr_ata(port); | ||
144 | } | ||
145 | #endif | ||
146 | #if defined(CONFIG_USB) | ||
147 | else if(port >= 0x340 && port < 0x3a0) | ||
148 | return *(volatile unsigned short *)PORT2ADDR_USB(port); | ||
149 | #endif | ||
150 | #if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC) | ||
151 | else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) { | ||
152 | unsigned short w; | ||
153 | pcc_ioread_word(0, port, &w, sizeof(w), 1, 0); | ||
154 | return w; | ||
155 | } else | ||
156 | #endif | ||
157 | return *(volatile unsigned short *)PORT2ADDR(port); | ||
158 | } | ||
159 | |||
160 | unsigned long _inl(unsigned long port) | ||
161 | { | ||
162 | #if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC) | ||
163 | if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) { | ||
164 | unsigned long l; | ||
165 | pcc_ioread_word(0, port, &l, sizeof(l), 1, 0); | ||
166 | return l; | ||
167 | } else | ||
168 | #endif | ||
169 | return *(volatile unsigned long *)PORT2ADDR(port); | ||
170 | } | ||
171 | |||
172 | unsigned char _inb_p(unsigned long port) | ||
173 | { | ||
174 | unsigned char v = _inb(port); | ||
175 | delay(); | ||
176 | return (v); | ||
177 | } | ||
178 | |||
179 | unsigned short _inw_p(unsigned long port) | ||
180 | { | ||
181 | unsigned short v = _inw(port); | ||
182 | delay(); | ||
183 | return (v); | ||
184 | } | ||
185 | |||
186 | unsigned long _inl_p(unsigned long port) | ||
187 | { | ||
188 | unsigned long v = _inl(port); | ||
189 | delay(); | ||
190 | return (v); | ||
191 | } | ||
192 | |||
193 | void _outb(unsigned char b, unsigned long port) | ||
194 | { | ||
195 | if (port >= LAN_IOSTART && port < LAN_IOEND) | ||
196 | _ne_outb(b, PORT2ADDR_NE(port)); | ||
197 | else | ||
198 | #if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC) | ||
199 | if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) { | ||
200 | *(volatile unsigned char *)__port2addr_ata(port) = b; | ||
201 | } else | ||
202 | #endif | ||
203 | #if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC) | ||
204 | if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) { | ||
205 | pcc_iowrite_byte(0, port, &b, sizeof(b), 1, 0); | ||
206 | } else | ||
207 | #endif | ||
208 | *(volatile unsigned char *)PORT2ADDR(port) = b; | ||
209 | } | ||
210 | |||
211 | void _outw(unsigned short w, unsigned long port) | ||
212 | { | ||
213 | if (port >= LAN_IOSTART && port < LAN_IOEND) | ||
214 | _ne_outw(w, PORT2ADDR_NE(port)); | ||
215 | else | ||
216 | #if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC) | ||
217 | if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) { | ||
218 | *(volatile unsigned short *)__port2addr_ata(port) = w; | ||
219 | } else | ||
220 | #endif | ||
221 | #if defined(CONFIG_USB) | ||
222 | if(port >= 0x340 && port < 0x3a0) | ||
223 | *(volatile unsigned short *)PORT2ADDR_USB(port) = w; | ||
224 | else | ||
225 | #endif | ||
226 | #if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC) | ||
227 | if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) { | ||
228 | pcc_iowrite_word(0, port, &w, sizeof(w), 1, 0); | ||
229 | } else | ||
230 | #endif | ||
231 | *(volatile unsigned short *)PORT2ADDR(port) = w; | ||
232 | } | ||
233 | |||
234 | void _outl(unsigned long l, unsigned long port) | ||
235 | { | ||
236 | #if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC) | ||
237 | if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) { | ||
238 | pcc_iowrite_word(0, port, &l, sizeof(l), 1, 0); | ||
239 | } else | ||
240 | #endif | ||
241 | *(volatile unsigned long *)PORT2ADDR(port) = l; | ||
242 | } | ||
243 | |||
244 | void _outb_p(unsigned char b, unsigned long port) | ||
245 | { | ||
246 | _outb(b, port); | ||
247 | delay(); | ||
248 | } | ||
249 | |||
250 | void _outw_p(unsigned short w, unsigned long port) | ||
251 | { | ||
252 | _outw(w, port); | ||
253 | delay(); | ||
254 | } | ||
255 | |||
256 | void _outl_p(unsigned long l, unsigned long port) | ||
257 | { | ||
258 | _outl(l, port); | ||
259 | delay(); | ||
260 | } | ||
261 | |||
262 | void _insb(unsigned int port, void *addr, unsigned long count) | ||
263 | { | ||
264 | if (port >= LAN_IOSTART && port < LAN_IOEND) | ||
265 | _ne_insb(PORT2ADDR_NE(port), addr, count); | ||
266 | #if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC) | ||
267 | else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) { | ||
268 | unsigned char *buf = addr; | ||
269 | unsigned char *portp = __port2addr_ata(port); | ||
270 | while (count--) | ||
271 | *buf++ = *(volatile unsigned char *)portp; | ||
272 | } | ||
273 | #endif | ||
274 | #if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC) | ||
275 | else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) { | ||
276 | pcc_ioread_byte(0, port, (void *)addr, sizeof(unsigned char), | ||
277 | count, 1); | ||
278 | } | ||
279 | #endif | ||
280 | else { | ||
281 | unsigned char *buf = addr; | ||
282 | unsigned char *portp = PORT2ADDR(port); | ||
283 | while (count--) | ||
284 | *buf++ = *(volatile unsigned char *)portp; | ||
285 | } | ||
286 | } | ||
287 | |||
288 | void _insw(unsigned int port, void *addr, unsigned long count) | ||
289 | { | ||
290 | unsigned short *buf = addr; | ||
291 | unsigned short *portp; | ||
292 | |||
293 | if (port >= LAN_IOSTART && port < LAN_IOEND) { | ||
294 | /* | ||
295 | * This portion is only used by smc91111.c to read data | ||
296 | * from the DATA_REG. Do not swap the data. | ||
297 | */ | ||
298 | portp = PORT2ADDR_NE(port); | ||
299 | while (count--) | ||
300 | *buf++ = *(volatile unsigned short *)portp; | ||
301 | #if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC) | ||
302 | } else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) { | ||
303 | pcc_ioread_word(9, port, (void *)addr, sizeof(unsigned short), | ||
304 | count, 1); | ||
305 | #endif | ||
306 | #if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC) | ||
307 | } else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) { | ||
308 | portp = __port2addr_ata(port); | ||
309 | while (count--) | ||
310 | *buf++ = *(volatile unsigned short *)portp; | ||
311 | #endif | ||
312 | } else { | ||
313 | portp = PORT2ADDR(port); | ||
314 | while (count--) | ||
315 | *buf++ = *(volatile unsigned short *)portp; | ||
316 | } | ||
317 | } | ||
318 | |||
319 | void _insl(unsigned int port, void *addr, unsigned long count) | ||
320 | { | ||
321 | unsigned long *buf = addr; | ||
322 | unsigned long *portp; | ||
323 | |||
324 | portp = PORT2ADDR(port); | ||
325 | while (count--) | ||
326 | *buf++ = *(volatile unsigned long *)portp; | ||
327 | } | ||
328 | |||
329 | void _outsb(unsigned int port, const void *addr, unsigned long count) | ||
330 | { | ||
331 | const unsigned char *buf = addr; | ||
332 | unsigned char *portp; | ||
333 | |||
334 | if (port >= LAN_IOSTART && port < LAN_IOEND) { | ||
335 | portp = PORT2ADDR_NE(port); | ||
336 | while (count--) | ||
337 | _ne_outb(*buf++, portp); | ||
338 | #if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC) | ||
339 | } else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) { | ||
340 | portp = __port2addr_ata(port); | ||
341 | while (count--) | ||
342 | *(volatile unsigned char *)portp = *buf++; | ||
343 | #endif | ||
344 | #if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC) | ||
345 | } else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) { | ||
346 | pcc_iowrite_byte(0, port, (void *)addr, sizeof(unsigned char), | ||
347 | count, 1); | ||
348 | #endif | ||
349 | } else { | ||
350 | portp = PORT2ADDR(port); | ||
351 | while (count--) | ||
352 | *(volatile unsigned char *)portp = *buf++; | ||
353 | } | ||
354 | } | ||
355 | |||
356 | void _outsw(unsigned int port, const void *addr, unsigned long count) | ||
357 | { | ||
358 | const unsigned short *buf = addr; | ||
359 | unsigned short *portp; | ||
360 | |||
361 | if (port >= LAN_IOSTART && port < LAN_IOEND) { | ||
362 | /* | ||
363 | * This portion is only used by smc91111.c to write data | ||
364 | * into the DATA_REG. Do not swap the data. | ||
365 | */ | ||
366 | portp = PORT2ADDR_NE(port); | ||
367 | while (count--) | ||
368 | *(volatile unsigned short *)portp = *buf++; | ||
369 | #if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC) | ||
370 | } else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) { | ||
371 | portp = __port2addr_ata(port); | ||
372 | while (count--) | ||
373 | *(volatile unsigned short *)portp = *buf++; | ||
374 | #endif | ||
375 | #if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC) | ||
376 | } else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) { | ||
377 | pcc_iowrite_word(9, port, (void *)addr, sizeof(unsigned short), | ||
378 | count, 1); | ||
379 | #endif | ||
380 | } else { | ||
381 | portp = PORT2ADDR(port); | ||
382 | while (count--) | ||
383 | *(volatile unsigned short *)portp = *buf++; | ||
384 | } | ||
385 | } | ||
386 | |||
387 | void _outsl(unsigned int port, const void *addr, unsigned long count) | ||
388 | { | ||
389 | const unsigned long *buf = addr; | ||
390 | unsigned char *portp; | ||
391 | |||
392 | portp = PORT2ADDR(port); | ||
393 | while (count--) | ||
394 | *(volatile unsigned long *)portp = *buf++; | ||
395 | } | ||
diff --git a/arch/m32r/platforms/opsput/setup.c b/arch/m32r/platforms/opsput/setup.c deleted file mode 100644 index cd0170483e83..000000000000 --- a/arch/m32r/platforms/opsput/setup.c +++ /dev/null | |||
@@ -1,448 +0,0 @@ | |||
1 | /* | ||
2 | * linux/arch/m32r/platforms/opsput/setup.c | ||
3 | * | ||
4 | * Setup routines for Renesas OPSPUT Board | ||
5 | * | ||
6 | * Copyright (c) 2002-2005 | ||
7 | * Hiroyuki Kondo, Hirokazu Takata, | ||
8 | * Hitoshi Yamamoto, Takeo Takahashi, Mamoru Sakugawa | ||
9 | * | ||
10 | * This file is subject to the terms and conditions of the GNU General | ||
11 | * Public License. See the file "COPYING" in the main directory of this | ||
12 | * archive for more details. | ||
13 | */ | ||
14 | |||
15 | #include <linux/irq.h> | ||
16 | #include <linux/kernel.h> | ||
17 | #include <linux/init.h> | ||
18 | #include <linux/platform_device.h> | ||
19 | |||
20 | #include <asm/m32r.h> | ||
21 | #include <asm/io.h> | ||
22 | |||
23 | /* | ||
24 | * OPSP Interrupt Control Unit (Level 1) | ||
25 | */ | ||
26 | #define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long))) | ||
27 | |||
28 | icu_data_t icu_data[OPSPUT_NUM_CPU_IRQ]; | ||
29 | |||
30 | static void disable_opsput_irq(unsigned int irq) | ||
31 | { | ||
32 | unsigned long port, data; | ||
33 | |||
34 | port = irq2port(irq); | ||
35 | data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7; | ||
36 | outl(data, port); | ||
37 | } | ||
38 | |||
39 | static void enable_opsput_irq(unsigned int irq) | ||
40 | { | ||
41 | unsigned long port, data; | ||
42 | |||
43 | port = irq2port(irq); | ||
44 | data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6; | ||
45 | outl(data, port); | ||
46 | } | ||
47 | |||
48 | static void mask_opsput(struct irq_data *data) | ||
49 | { | ||
50 | disable_opsput_irq(data->irq); | ||
51 | } | ||
52 | |||
53 | static void unmask_opsput(struct irq_data *data) | ||
54 | { | ||
55 | enable_opsput_irq(data->irq); | ||
56 | } | ||
57 | |||
58 | static void shutdown_opsput(struct irq_data *data) | ||
59 | { | ||
60 | unsigned long port; | ||
61 | |||
62 | port = irq2port(data->irq); | ||
63 | outl(M32R_ICUCR_ILEVEL7, port); | ||
64 | } | ||
65 | |||
66 | static struct irq_chip opsput_irq_type = | ||
67 | { | ||
68 | .name = "OPSPUT-IRQ", | ||
69 | .irq_shutdown = shutdown_opsput, | ||
70 | .irq_mask = mask_opsput, | ||
71 | .irq_unmask = unmask_opsput, | ||
72 | }; | ||
73 | |||
74 | /* | ||
75 | * Interrupt Control Unit of PLD on OPSPUT (Level 2) | ||
76 | */ | ||
77 | #define irq2pldirq(x) ((x) - OPSPUT_PLD_IRQ_BASE) | ||
78 | #define pldirq2port(x) (unsigned long)((int)PLD_ICUCR1 + \ | ||
79 | (((x) - 1) * sizeof(unsigned short))) | ||
80 | |||
81 | typedef struct { | ||
82 | unsigned short icucr; /* ICU Control Register */ | ||
83 | } pld_icu_data_t; | ||
84 | |||
85 | static pld_icu_data_t pld_icu_data[OPSPUT_NUM_PLD_IRQ]; | ||
86 | |||
87 | static void disable_opsput_pld_irq(unsigned int irq) | ||
88 | { | ||
89 | unsigned long port, data; | ||
90 | unsigned int pldirq; | ||
91 | |||
92 | pldirq = irq2pldirq(irq); | ||
93 | port = pldirq2port(pldirq); | ||
94 | data = pld_icu_data[pldirq].icucr|PLD_ICUCR_ILEVEL7; | ||
95 | outw(data, port); | ||
96 | } | ||
97 | |||
98 | static void enable_opsput_pld_irq(unsigned int irq) | ||
99 | { | ||
100 | unsigned long port, data; | ||
101 | unsigned int pldirq; | ||
102 | |||
103 | pldirq = irq2pldirq(irq); | ||
104 | port = pldirq2port(pldirq); | ||
105 | data = pld_icu_data[pldirq].icucr|PLD_ICUCR_IEN|PLD_ICUCR_ILEVEL6; | ||
106 | outw(data, port); | ||
107 | } | ||
108 | |||
109 | static void mask_opsput_pld(struct irq_data *data) | ||
110 | { | ||
111 | disable_opsput_pld_irq(data->irq); | ||
112 | } | ||
113 | |||
114 | static void unmask_opsput_pld(struct irq_data *data) | ||
115 | { | ||
116 | enable_opsput_pld_irq(data->irq); | ||
117 | enable_opsput_irq(M32R_IRQ_INT1); | ||
118 | } | ||
119 | |||
120 | static void shutdown_opsput_pld(struct irq_data *data) | ||
121 | { | ||
122 | unsigned long port; | ||
123 | unsigned int pldirq; | ||
124 | |||
125 | pldirq = irq2pldirq(data->irq); | ||
126 | port = pldirq2port(pldirq); | ||
127 | outw(PLD_ICUCR_ILEVEL7, port); | ||
128 | } | ||
129 | |||
130 | static struct irq_chip opsput_pld_irq_type = | ||
131 | { | ||
132 | .name = "OPSPUT-PLD-IRQ", | ||
133 | .irq_shutdown = shutdown_opsput_pld, | ||
134 | .irq_mask = mask_opsput_pld, | ||
135 | .irq_unmask = unmask_opsput_pld, | ||
136 | }; | ||
137 | |||
138 | /* | ||
139 | * Interrupt Control Unit of PLD on OPSPUT-LAN (Level 2) | ||
140 | */ | ||
141 | #define irq2lanpldirq(x) ((x) - OPSPUT_LAN_PLD_IRQ_BASE) | ||
142 | #define lanpldirq2port(x) (unsigned long)((int)OPSPUT_LAN_ICUCR1 + \ | ||
143 | (((x) - 1) * sizeof(unsigned short))) | ||
144 | |||
145 | static pld_icu_data_t lanpld_icu_data[OPSPUT_NUM_LAN_PLD_IRQ]; | ||
146 | |||
147 | static void disable_opsput_lanpld_irq(unsigned int irq) | ||
148 | { | ||
149 | unsigned long port, data; | ||
150 | unsigned int pldirq; | ||
151 | |||
152 | pldirq = irq2lanpldirq(irq); | ||
153 | port = lanpldirq2port(pldirq); | ||
154 | data = lanpld_icu_data[pldirq].icucr|PLD_ICUCR_ILEVEL7; | ||
155 | outw(data, port); | ||
156 | } | ||
157 | |||
158 | static void enable_opsput_lanpld_irq(unsigned int irq) | ||
159 | { | ||
160 | unsigned long port, data; | ||
161 | unsigned int pldirq; | ||
162 | |||
163 | pldirq = irq2lanpldirq(irq); | ||
164 | port = lanpldirq2port(pldirq); | ||
165 | data = lanpld_icu_data[pldirq].icucr|PLD_ICUCR_IEN|PLD_ICUCR_ILEVEL6; | ||
166 | outw(data, port); | ||
167 | } | ||
168 | |||
169 | static void mask_opsput_lanpld(struct irq_data *data) | ||
170 | { | ||
171 | disable_opsput_lanpld_irq(data->irq); | ||
172 | } | ||
173 | |||
174 | static void unmask_opsput_lanpld(struct irq_data *data) | ||
175 | { | ||
176 | enable_opsput_lanpld_irq(data->irq); | ||
177 | enable_opsput_irq(M32R_IRQ_INT0); | ||
178 | } | ||
179 | |||
180 | static void shutdown_opsput_lanpld(struct irq_data *data) | ||
181 | { | ||
182 | unsigned long port; | ||
183 | unsigned int pldirq; | ||
184 | |||
185 | pldirq = irq2lanpldirq(data->irq); | ||
186 | port = lanpldirq2port(pldirq); | ||
187 | outw(PLD_ICUCR_ILEVEL7, port); | ||
188 | } | ||
189 | |||
190 | static struct irq_chip opsput_lanpld_irq_type = | ||
191 | { | ||
192 | .name = "OPSPUT-PLD-LAN-IRQ", | ||
193 | .irq_shutdown = shutdown_opsput_lanpld, | ||
194 | .irq_mask = mask_opsput_lanpld, | ||
195 | .irq_unmask = unmask_opsput_lanpld, | ||
196 | }; | ||
197 | |||
198 | /* | ||
199 | * Interrupt Control Unit of PLD on OPSPUT-LCD (Level 2) | ||
200 | */ | ||
201 | #define irq2lcdpldirq(x) ((x) - OPSPUT_LCD_PLD_IRQ_BASE) | ||
202 | #define lcdpldirq2port(x) (unsigned long)((int)OPSPUT_LCD_ICUCR1 + \ | ||
203 | (((x) - 1) * sizeof(unsigned short))) | ||
204 | |||
205 | static pld_icu_data_t lcdpld_icu_data[OPSPUT_NUM_LCD_PLD_IRQ]; | ||
206 | |||
207 | static void disable_opsput_lcdpld_irq(unsigned int irq) | ||
208 | { | ||
209 | unsigned long port, data; | ||
210 | unsigned int pldirq; | ||
211 | |||
212 | pldirq = irq2lcdpldirq(irq); | ||
213 | port = lcdpldirq2port(pldirq); | ||
214 | data = lcdpld_icu_data[pldirq].icucr|PLD_ICUCR_ILEVEL7; | ||
215 | outw(data, port); | ||
216 | } | ||
217 | |||
218 | static void enable_opsput_lcdpld_irq(unsigned int irq) | ||
219 | { | ||
220 | unsigned long port, data; | ||
221 | unsigned int pldirq; | ||
222 | |||
223 | pldirq = irq2lcdpldirq(irq); | ||
224 | port = lcdpldirq2port(pldirq); | ||
225 | data = lcdpld_icu_data[pldirq].icucr|PLD_ICUCR_IEN|PLD_ICUCR_ILEVEL6; | ||
226 | outw(data, port); | ||
227 | } | ||
228 | |||
229 | static void mask_opsput_lcdpld(struct irq_data *data) | ||
230 | { | ||
231 | disable_opsput_lcdpld_irq(data->irq); | ||
232 | } | ||
233 | |||
234 | static void unmask_opsput_lcdpld(struct irq_data *data) | ||
235 | { | ||
236 | enable_opsput_lcdpld_irq(data->irq); | ||
237 | enable_opsput_irq(M32R_IRQ_INT2); | ||
238 | } | ||
239 | |||
240 | static void shutdown_opsput_lcdpld(struct irq_data *data) | ||
241 | { | ||
242 | unsigned long port; | ||
243 | unsigned int pldirq; | ||
244 | |||
245 | pldirq = irq2lcdpldirq(data->irq); | ||
246 | port = lcdpldirq2port(pldirq); | ||
247 | outw(PLD_ICUCR_ILEVEL7, port); | ||
248 | } | ||
249 | |||
250 | static struct irq_chip opsput_lcdpld_irq_type = { | ||
251 | .name = "OPSPUT-PLD-LCD-IRQ", | ||
252 | .irq_shutdown = shutdown_opsput_lcdpld, | ||
253 | .irq_mask = mask_opsput_lcdpld, | ||
254 | .irq_unmask = unmask_opsput_lcdpld, | ||
255 | }; | ||
256 | |||
257 | void __init init_IRQ(void) | ||
258 | { | ||
259 | #if defined(CONFIG_SMC91X) | ||
260 | /* INT#0: LAN controller on OPSPUT-LAN (SMC91C111)*/ | ||
261 | irq_set_chip_and_handler(OPSPUT_LAN_IRQ_LAN, &opsput_lanpld_irq_type, | ||
262 | handle_level_irq); | ||
263 | lanpld_icu_data[irq2lanpldirq(OPSPUT_LAN_IRQ_LAN)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02; /* "H" edge sense */ | ||
264 | disable_opsput_lanpld_irq(OPSPUT_LAN_IRQ_LAN); | ||
265 | #endif /* CONFIG_SMC91X */ | ||
266 | |||
267 | /* MFT2 : system timer */ | ||
268 | irq_set_chip_and_handler(M32R_IRQ_MFT2, &opsput_irq_type, | ||
269 | handle_level_irq); | ||
270 | icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; | ||
271 | disable_opsput_irq(M32R_IRQ_MFT2); | ||
272 | |||
273 | /* SIO0 : receive */ | ||
274 | irq_set_chip_and_handler(M32R_IRQ_SIO0_R, &opsput_irq_type, | ||
275 | handle_level_irq); | ||
276 | icu_data[M32R_IRQ_SIO0_R].icucr = 0; | ||
277 | disable_opsput_irq(M32R_IRQ_SIO0_R); | ||
278 | |||
279 | /* SIO0 : send */ | ||
280 | irq_set_chip_and_handler(M32R_IRQ_SIO0_S, &opsput_irq_type, | ||
281 | handle_level_irq); | ||
282 | icu_data[M32R_IRQ_SIO0_S].icucr = 0; | ||
283 | disable_opsput_irq(M32R_IRQ_SIO0_S); | ||
284 | |||
285 | /* SIO1 : receive */ | ||
286 | irq_set_chip_and_handler(M32R_IRQ_SIO1_R, &opsput_irq_type, | ||
287 | handle_level_irq); | ||
288 | icu_data[M32R_IRQ_SIO1_R].icucr = 0; | ||
289 | disable_opsput_irq(M32R_IRQ_SIO1_R); | ||
290 | |||
291 | /* SIO1 : send */ | ||
292 | irq_set_chip_and_handler(M32R_IRQ_SIO1_S, &opsput_irq_type, | ||
293 | handle_level_irq); | ||
294 | icu_data[M32R_IRQ_SIO1_S].icucr = 0; | ||
295 | disable_opsput_irq(M32R_IRQ_SIO1_S); | ||
296 | |||
297 | /* DMA1 : */ | ||
298 | irq_set_chip_and_handler(M32R_IRQ_DMA1, &opsput_irq_type, | ||
299 | handle_level_irq); | ||
300 | icu_data[M32R_IRQ_DMA1].icucr = 0; | ||
301 | disable_opsput_irq(M32R_IRQ_DMA1); | ||
302 | |||
303 | #ifdef CONFIG_SERIAL_M32R_PLDSIO | ||
304 | /* INT#1: SIO0 Receive on PLD */ | ||
305 | irq_set_chip_and_handler(PLD_IRQ_SIO0_RCV, &opsput_pld_irq_type, | ||
306 | handle_level_irq); | ||
307 | pld_icu_data[irq2pldirq(PLD_IRQ_SIO0_RCV)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD03; | ||
308 | disable_opsput_pld_irq(PLD_IRQ_SIO0_RCV); | ||
309 | |||
310 | /* INT#1: SIO0 Send on PLD */ | ||
311 | irq_set_chip_and_handler(PLD_IRQ_SIO0_SND, &opsput_pld_irq_type, | ||
312 | handle_level_irq); | ||
313 | pld_icu_data[irq2pldirq(PLD_IRQ_SIO0_SND)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD03; | ||
314 | disable_opsput_pld_irq(PLD_IRQ_SIO0_SND); | ||
315 | #endif /* CONFIG_SERIAL_M32R_PLDSIO */ | ||
316 | |||
317 | /* INT#1: CFC IREQ on PLD */ | ||
318 | irq_set_chip_and_handler(PLD_IRQ_CFIREQ, &opsput_pld_irq_type, | ||
319 | handle_level_irq); | ||
320 | pld_icu_data[irq2pldirq(PLD_IRQ_CFIREQ)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01; /* 'L' level sense */ | ||
321 | disable_opsput_pld_irq(PLD_IRQ_CFIREQ); | ||
322 | |||
323 | /* INT#1: CFC Insert on PLD */ | ||
324 | irq_set_chip_and_handler(PLD_IRQ_CFC_INSERT, &opsput_pld_irq_type, | ||
325 | handle_level_irq); | ||
326 | pld_icu_data[irq2pldirq(PLD_IRQ_CFC_INSERT)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD00; /* 'L' edge sense */ | ||
327 | disable_opsput_pld_irq(PLD_IRQ_CFC_INSERT); | ||
328 | |||
329 | /* INT#1: CFC Eject on PLD */ | ||
330 | irq_set_chip_and_handler(PLD_IRQ_CFC_EJECT, &opsput_pld_irq_type, | ||
331 | handle_level_irq); | ||
332 | pld_icu_data[irq2pldirq(PLD_IRQ_CFC_EJECT)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02; /* 'H' edge sense */ | ||
333 | disable_opsput_pld_irq(PLD_IRQ_CFC_EJECT); | ||
334 | |||
335 | /* | ||
336 | * INT0# is used for LAN, DIO | ||
337 | * We enable it here. | ||
338 | */ | ||
339 | icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD11; | ||
340 | enable_opsput_irq(M32R_IRQ_INT0); | ||
341 | |||
342 | /* | ||
343 | * INT1# is used for UART, MMC, CF Controller in FPGA. | ||
344 | * We enable it here. | ||
345 | */ | ||
346 | icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD11; | ||
347 | enable_opsput_irq(M32R_IRQ_INT1); | ||
348 | |||
349 | #if defined(CONFIG_USB) | ||
350 | outw(USBCR_OTGS, USBCR); /* USBCR: non-OTG */ | ||
351 | irq_set_chip_and_handler(OPSPUT_LCD_IRQ_USB_INT1, | ||
352 | &opsput_lcdpld_irq_type, handle_level_irq); | ||
353 | lcdpld_icu_data[irq2lcdpldirq(OPSPUT_LCD_IRQ_USB_INT1)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01; /* "L" level sense */ | ||
354 | disable_opsput_lcdpld_irq(OPSPUT_LCD_IRQ_USB_INT1); | ||
355 | #endif | ||
356 | /* | ||
357 | * INT2# is used for BAT, USB, AUDIO | ||
358 | * We enable it here. | ||
359 | */ | ||
360 | icu_data[M32R_IRQ_INT2].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD01; | ||
361 | enable_opsput_irq(M32R_IRQ_INT2); | ||
362 | |||
363 | #if defined(CONFIG_VIDEO_M32R_AR) | ||
364 | /* | ||
365 | * INT3# is used for AR | ||
366 | */ | ||
367 | irq_set_chip_and_handler(M32R_IRQ_INT3, &opsput_irq_type, | ||
368 | handle_level_irq); | ||
369 | icu_data[M32R_IRQ_INT3].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10; | ||
370 | disable_opsput_irq(M32R_IRQ_INT3); | ||
371 | #endif /* CONFIG_VIDEO_M32R_AR */ | ||
372 | } | ||
373 | |||
374 | #if defined(CONFIG_SMC91X) | ||
375 | |||
376 | #define LAN_IOSTART 0x300 | ||
377 | #define LAN_IOEND 0x320 | ||
378 | static struct resource smc91x_resources[] = { | ||
379 | [0] = { | ||
380 | .start = (LAN_IOSTART), | ||
381 | .end = (LAN_IOEND), | ||
382 | .flags = IORESOURCE_MEM, | ||
383 | }, | ||
384 | [1] = { | ||
385 | .start = OPSPUT_LAN_IRQ_LAN, | ||
386 | .end = OPSPUT_LAN_IRQ_LAN, | ||
387 | .flags = IORESOURCE_IRQ, | ||
388 | } | ||
389 | }; | ||
390 | |||
391 | static struct platform_device smc91x_device = { | ||
392 | .name = "smc91x", | ||
393 | .id = 0, | ||
394 | .num_resources = ARRAY_SIZE(smc91x_resources), | ||
395 | .resource = smc91x_resources, | ||
396 | }; | ||
397 | #endif | ||
398 | |||
399 | #if defined(CONFIG_FB_S1D13XXX) | ||
400 | |||
401 | #include <video/s1d13xxxfb.h> | ||
402 | #include <asm/s1d13806.h> | ||
403 | |||
404 | static struct s1d13xxxfb_pdata s1d13xxxfb_data = { | ||
405 | .initregs = s1d13xxxfb_initregs, | ||
406 | .initregssize = ARRAY_SIZE(s1d13xxxfb_initregs), | ||
407 | .platform_init_video = NULL, | ||
408 | #ifdef CONFIG_PM | ||
409 | .platform_suspend_video = NULL, | ||
410 | .platform_resume_video = NULL, | ||
411 | #endif | ||
412 | }; | ||
413 | |||
414 | static struct resource s1d13xxxfb_resources[] = { | ||
415 | [0] = { | ||
416 | .start = 0x10600000UL, | ||
417 | .end = 0x1073FFFFUL, | ||
418 | .flags = IORESOURCE_MEM, | ||
419 | }, | ||
420 | [1] = { | ||
421 | .start = 0x10400000UL, | ||
422 | .end = 0x104001FFUL, | ||
423 | .flags = IORESOURCE_MEM, | ||
424 | } | ||
425 | }; | ||
426 | |||
427 | static struct platform_device s1d13xxxfb_device = { | ||
428 | .name = S1D_DEVICENAME, | ||
429 | .id = 0, | ||
430 | .dev = { | ||
431 | .platform_data = &s1d13xxxfb_data, | ||
432 | }, | ||
433 | .num_resources = ARRAY_SIZE(s1d13xxxfb_resources), | ||
434 | .resource = s1d13xxxfb_resources, | ||
435 | }; | ||
436 | #endif | ||
437 | |||
438 | static int __init platform_init(void) | ||
439 | { | ||
440 | #if defined(CONFIG_SMC91X) | ||
441 | platform_device_register(&smc91x_device); | ||
442 | #endif | ||
443 | #if defined(CONFIG_FB_S1D13XXX) | ||
444 | platform_device_register(&s1d13xxxfb_device); | ||
445 | #endif | ||
446 | return 0; | ||
447 | } | ||
448 | arch_initcall(platform_init); | ||
diff --git a/arch/m32r/platforms/usrv/Makefile b/arch/m32r/platforms/usrv/Makefile deleted file mode 100644 index 0de59084f21c..000000000000 --- a/arch/m32r/platforms/usrv/Makefile +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | obj-y := setup.o io.o | ||
diff --git a/arch/m32r/platforms/usrv/io.c b/arch/m32r/platforms/usrv/io.c deleted file mode 100644 index f5e50d37badb..000000000000 --- a/arch/m32r/platforms/usrv/io.c +++ /dev/null | |||
@@ -1,225 +0,0 @@ | |||
1 | /* | ||
2 | * linux/arch/m32r/platforms/usrv/io.c | ||
3 | * | ||
4 | * Typical I/O routines for uServer board. | ||
5 | * | ||
6 | * Copyright (c) 2001-2005 Hiroyuki Kondo, Hirokazu Takata, | ||
7 | * Hitoshi Yamamoto, Takeo Takahashi | ||
8 | * | ||
9 | * This file is subject to the terms and conditions of the GNU General | ||
10 | * Public License. See the file "COPYING" in the main directory of this | ||
11 | * archive for more details. | ||
12 | * | ||
13 | */ | ||
14 | |||
15 | #include <asm/m32r.h> | ||
16 | #include <asm/page.h> | ||
17 | #include <asm/io.h> | ||
18 | |||
19 | #include <linux/types.h> | ||
20 | #include "../../../../drivers/pcmcia/m32r_cfc.h" | ||
21 | |||
22 | extern void pcc_ioread_byte(int, unsigned long, void *, size_t, size_t, int); | ||
23 | extern void pcc_ioread_word(int, unsigned long, void *, size_t, size_t, int); | ||
24 | extern void pcc_iowrite_byte(int, unsigned long, void *, size_t, size_t, int); | ||
25 | extern void pcc_iowrite_word(int, unsigned long, void *, size_t, size_t, int); | ||
26 | #define CFC_IOSTART CFC_IOPORT_BASE | ||
27 | #define CFC_IOEND (CFC_IOSTART + (M32R_PCC_MAPSIZE * M32R_MAX_PCC) - 1) | ||
28 | |||
29 | #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE) | ||
30 | #define UART0_REGSTART 0x04c20000 | ||
31 | #define UART1_REGSTART 0x04c20100 | ||
32 | #define UART_IOMAP_SIZE 8 | ||
33 | #define UART0_IOSTART 0x3f8 | ||
34 | #define UART0_IOEND (UART0_IOSTART + UART_IOMAP_SIZE - 1) | ||
35 | #define UART1_IOSTART 0x2f8 | ||
36 | #define UART1_IOEND (UART1_IOSTART + UART_IOMAP_SIZE - 1) | ||
37 | #endif /* CONFIG_SERIAL_8250 || CONFIG_SERIAL_8250_MODULE */ | ||
38 | |||
39 | #define PORT2ADDR(port) _port2addr(port) | ||
40 | |||
41 | static inline void *_port2addr(unsigned long port) | ||
42 | { | ||
43 | #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE) | ||
44 | if (port >= UART0_IOSTART && port <= UART0_IOEND) | ||
45 | port = ((port - UART0_IOSTART) << 1) + UART0_REGSTART; | ||
46 | else if (port >= UART1_IOSTART && port <= UART1_IOEND) | ||
47 | port = ((port - UART1_IOSTART) << 1) + UART1_REGSTART; | ||
48 | #endif /* CONFIG_SERIAL_8250 || CONFIG_SERIAL_8250_MODULE */ | ||
49 | return (void *)(port | (NONCACHE_OFFSET)); | ||
50 | } | ||
51 | |||
52 | static inline void delay(void) | ||
53 | { | ||
54 | __asm__ __volatile__ ("push r0; \n\t pop r0;" : : :"memory"); | ||
55 | } | ||
56 | |||
57 | unsigned char _inb(unsigned long port) | ||
58 | { | ||
59 | if (port >= CFC_IOSTART && port <= CFC_IOEND) { | ||
60 | unsigned char b; | ||
61 | pcc_ioread_byte(0, port, &b, sizeof(b), 1, 0); | ||
62 | return b; | ||
63 | } else | ||
64 | return *(volatile unsigned char *)PORT2ADDR(port); | ||
65 | } | ||
66 | |||
67 | unsigned short _inw(unsigned long port) | ||
68 | { | ||
69 | if (port >= CFC_IOSTART && port <= CFC_IOEND) { | ||
70 | unsigned short w; | ||
71 | pcc_ioread_word(0, port, &w, sizeof(w), 1, 0); | ||
72 | return w; | ||
73 | } else | ||
74 | return *(volatile unsigned short *)PORT2ADDR(port); | ||
75 | } | ||
76 | |||
77 | unsigned long _inl(unsigned long port) | ||
78 | { | ||
79 | if (port >= CFC_IOSTART && port <= CFC_IOEND) { | ||
80 | unsigned long l; | ||
81 | pcc_ioread_word(0, port, &l, sizeof(l), 1, 0); | ||
82 | return l; | ||
83 | } else | ||
84 | return *(volatile unsigned long *)PORT2ADDR(port); | ||
85 | } | ||
86 | |||
87 | unsigned char _inb_p(unsigned long port) | ||
88 | { | ||
89 | unsigned char v = _inb(port); | ||
90 | delay(); | ||
91 | return v; | ||
92 | } | ||
93 | |||
94 | unsigned short _inw_p(unsigned long port) | ||
95 | { | ||
96 | unsigned short v = _inw(port); | ||
97 | delay(); | ||
98 | return v; | ||
99 | } | ||
100 | |||
101 | unsigned long _inl_p(unsigned long port) | ||
102 | { | ||
103 | unsigned long v = _inl(port); | ||
104 | delay(); | ||
105 | return v; | ||
106 | } | ||
107 | |||
108 | void _outb(unsigned char b, unsigned long port) | ||
109 | { | ||
110 | if (port >= CFC_IOSTART && port <= CFC_IOEND) | ||
111 | pcc_iowrite_byte(0, port, &b, sizeof(b), 1, 0); | ||
112 | else | ||
113 | *(volatile unsigned char *)PORT2ADDR(port) = b; | ||
114 | } | ||
115 | |||
116 | void _outw(unsigned short w, unsigned long port) | ||
117 | { | ||
118 | if (port >= CFC_IOSTART && port <= CFC_IOEND) | ||
119 | pcc_iowrite_word(0, port, &w, sizeof(w), 1, 0); | ||
120 | else | ||
121 | *(volatile unsigned short *)PORT2ADDR(port) = w; | ||
122 | } | ||
123 | |||
124 | void _outl(unsigned long l, unsigned long port) | ||
125 | { | ||
126 | if (port >= CFC_IOSTART && port <= CFC_IOEND) | ||
127 | pcc_iowrite_word(0, port, &l, sizeof(l), 1, 0); | ||
128 | else | ||
129 | *(volatile unsigned long *)PORT2ADDR(port) = l; | ||
130 | } | ||
131 | |||
132 | void _outb_p(unsigned char b, unsigned long port) | ||
133 | { | ||
134 | _outb(b, port); | ||
135 | delay(); | ||
136 | } | ||
137 | |||
138 | void _outw_p(unsigned short w, unsigned long port) | ||
139 | { | ||
140 | _outw(w, port); | ||
141 | delay(); | ||
142 | } | ||
143 | |||
144 | void _outl_p(unsigned long l, unsigned long port) | ||
145 | { | ||
146 | _outl(l, port); | ||
147 | delay(); | ||
148 | } | ||
149 | |||
150 | void _insb(unsigned int port, void * addr, unsigned long count) | ||
151 | { | ||
152 | if (port >= CFC_IOSTART && port <= CFC_IOEND) | ||
153 | pcc_ioread_byte(0, port, addr, sizeof(unsigned char), count, 1); | ||
154 | else { | ||
155 | unsigned char *buf = addr; | ||
156 | unsigned char *portp = PORT2ADDR(port); | ||
157 | while (count--) | ||
158 | *buf++ = *(volatile unsigned char *)portp; | ||
159 | } | ||
160 | } | ||
161 | |||
162 | void _insw(unsigned int port, void * addr, unsigned long count) | ||
163 | { | ||
164 | unsigned short *buf = addr; | ||
165 | unsigned short *portp; | ||
166 | |||
167 | if (port >= CFC_IOSTART && port <= CFC_IOEND) | ||
168 | pcc_ioread_word(0, port, addr, sizeof(unsigned short), count, | ||
169 | 1); | ||
170 | else { | ||
171 | portp = PORT2ADDR(port); | ||
172 | while (count--) | ||
173 | *buf++ = *(volatile unsigned short *)portp; | ||
174 | } | ||
175 | } | ||
176 | |||
177 | void _insl(unsigned int port, void * addr, unsigned long count) | ||
178 | { | ||
179 | unsigned long *buf = addr; | ||
180 | unsigned long *portp; | ||
181 | |||
182 | portp = PORT2ADDR(port); | ||
183 | while (count--) | ||
184 | *buf++ = *(volatile unsigned long *)portp; | ||
185 | } | ||
186 | |||
187 | void _outsb(unsigned int port, const void * addr, unsigned long count) | ||
188 | { | ||
189 | const unsigned char *buf = addr; | ||
190 | unsigned char *portp; | ||
191 | |||
192 | if (port >= CFC_IOSTART && port <= CFC_IOEND) | ||
193 | pcc_iowrite_byte(0, port, (void *)addr, sizeof(unsigned char), | ||
194 | count, 1); | ||
195 | else { | ||
196 | portp = PORT2ADDR(port); | ||
197 | while (count--) | ||
198 | *(volatile unsigned char *)portp = *buf++; | ||
199 | } | ||
200 | } | ||
201 | |||
202 | void _outsw(unsigned int port, const void * addr, unsigned long count) | ||
203 | { | ||
204 | const unsigned short *buf = addr; | ||
205 | unsigned short *portp; | ||
206 | |||
207 | if (port >= CFC_IOSTART && port <= CFC_IOEND) | ||
208 | pcc_iowrite_word(0, port, (void *)addr, sizeof(unsigned short), | ||
209 | count, 1); | ||
210 | else { | ||
211 | portp = PORT2ADDR(port); | ||
212 | while (count--) | ||
213 | *(volatile unsigned short *)portp = *buf++; | ||
214 | } | ||
215 | } | ||
216 | |||
217 | void _outsl(unsigned int port, const void * addr, unsigned long count) | ||
218 | { | ||
219 | const unsigned long *buf = addr; | ||
220 | unsigned char *portp; | ||
221 | |||
222 | portp = PORT2ADDR(port); | ||
223 | while (count--) | ||
224 | *(volatile unsigned long *)portp = *buf++; | ||
225 | } | ||
diff --git a/arch/m32r/platforms/usrv/setup.c b/arch/m32r/platforms/usrv/setup.c deleted file mode 100644 index ba828b16c6e3..000000000000 --- a/arch/m32r/platforms/usrv/setup.c +++ /dev/null | |||
@@ -1,213 +0,0 @@ | |||
1 | // SPDX-License-Identifier: GPL-2.0 | ||
2 | /* | ||
3 | * linux/arch/m32r/platforms/usrv/setup.c | ||
4 | * | ||
5 | * Setup routines for MITSUBISHI uServer | ||
6 | * | ||
7 | * Copyright (c) 2001, 2002, 2003 Hiroyuki Kondo, Hirokazu Takata, | ||
8 | * Hitoshi Yamamoto | ||
9 | */ | ||
10 | |||
11 | #include <linux/irq.h> | ||
12 | #include <linux/kernel.h> | ||
13 | #include <linux/init.h> | ||
14 | |||
15 | #include <asm/m32r.h> | ||
16 | #include <asm/io.h> | ||
17 | |||
18 | #define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long))) | ||
19 | |||
20 | icu_data_t icu_data[M32700UT_NUM_CPU_IRQ]; | ||
21 | |||
22 | static void disable_mappi_irq(unsigned int irq) | ||
23 | { | ||
24 | unsigned long port, data; | ||
25 | |||
26 | port = irq2port(irq); | ||
27 | data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7; | ||
28 | outl(data, port); | ||
29 | } | ||
30 | |||
31 | static void enable_mappi_irq(unsigned int irq) | ||
32 | { | ||
33 | unsigned long port, data; | ||
34 | |||
35 | port = irq2port(irq); | ||
36 | data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6; | ||
37 | outl(data, port); | ||
38 | } | ||
39 | |||
40 | static void mask_mappi(struct irq_data *data) | ||
41 | { | ||
42 | disable_mappi_irq(data->irq); | ||
43 | } | ||
44 | |||
45 | static void unmask_mappi(struct irq_data *data) | ||
46 | { | ||
47 | enable_mappi_irq(data->irq); | ||
48 | } | ||
49 | |||
50 | static void shutdown_mappi(struct irq_data *data) | ||
51 | { | ||
52 | unsigned long port; | ||
53 | |||
54 | port = irq2port(data->irq); | ||
55 | outl(M32R_ICUCR_ILEVEL7, port); | ||
56 | } | ||
57 | |||
58 | static struct irq_chip mappi_irq_type = | ||
59 | { | ||
60 | .name = "M32700-IRQ", | ||
61 | .irq_shutdown = shutdown_mappi, | ||
62 | .irq_mask = mask_mappi, | ||
63 | .irq_unmask = unmask_mappi, | ||
64 | }; | ||
65 | |||
66 | /* | ||
67 | * Interrupt Control Unit of PLD on M32700UT (Level 2) | ||
68 | */ | ||
69 | #define irq2pldirq(x) ((x) - M32700UT_PLD_IRQ_BASE) | ||
70 | #define pldirq2port(x) (unsigned long)((int)PLD_ICUCR1 + \ | ||
71 | (((x) - 1) * sizeof(unsigned short))) | ||
72 | |||
73 | typedef struct { | ||
74 | unsigned short icucr; /* ICU Control Register */ | ||
75 | } pld_icu_data_t; | ||
76 | |||
77 | static pld_icu_data_t pld_icu_data[M32700UT_NUM_PLD_IRQ]; | ||
78 | |||
79 | static void disable_m32700ut_pld_irq(unsigned int irq) | ||
80 | { | ||
81 | unsigned long port, data; | ||
82 | unsigned int pldirq; | ||
83 | |||
84 | pldirq = irq2pldirq(irq); | ||
85 | port = pldirq2port(pldirq); | ||
86 | data = pld_icu_data[pldirq].icucr|PLD_ICUCR_ILEVEL7; | ||
87 | outw(data, port); | ||
88 | } | ||
89 | |||
90 | static void enable_m32700ut_pld_irq(unsigned int irq) | ||
91 | { | ||
92 | unsigned long port, data; | ||
93 | unsigned int pldirq; | ||
94 | |||
95 | pldirq = irq2pldirq(irq); | ||
96 | port = pldirq2port(pldirq); | ||
97 | data = pld_icu_data[pldirq].icucr|PLD_ICUCR_IEN|PLD_ICUCR_ILEVEL6; | ||
98 | outw(data, port); | ||
99 | } | ||
100 | |||
101 | static void mask_m32700ut_pld(struct irq_data *data) | ||
102 | { | ||
103 | disable_m32700ut_pld_irq(data->irq); | ||
104 | } | ||
105 | |||
106 | static void unmask_m32700ut_pld(struct irq_data *data) | ||
107 | { | ||
108 | enable_m32700ut_pld_irq(data->irq); | ||
109 | enable_mappi_irq(M32R_IRQ_INT1); | ||
110 | } | ||
111 | |||
112 | static void shutdown_m32700ut_pld(struct irq_data *data) | ||
113 | { | ||
114 | unsigned long port; | ||
115 | unsigned int pldirq; | ||
116 | |||
117 | pldirq = irq2pldirq(data->irq); | ||
118 | port = pldirq2port(pldirq); | ||
119 | outw(PLD_ICUCR_ILEVEL7, port); | ||
120 | } | ||
121 | |||
122 | static struct irq_chip m32700ut_pld_irq_type = | ||
123 | { | ||
124 | .name = "USRV-PLD-IRQ", | ||
125 | .irq_shutdown = shutdown_m32700ut_pld, | ||
126 | .irq_mask = mask_m32700ut_pld, | ||
127 | .irq_unmask = unmask_m32700ut_pld, | ||
128 | }; | ||
129 | |||
130 | void __init init_IRQ(void) | ||
131 | { | ||
132 | static int once = 0; | ||
133 | int i; | ||
134 | |||
135 | if (once) | ||
136 | return; | ||
137 | else | ||
138 | once++; | ||
139 | |||
140 | /* MFT2 : system timer */ | ||
141 | irq_set_chip_and_handler(M32R_IRQ_MFT2, &mappi_irq_type, | ||
142 | handle_level_irq); | ||
143 | icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; | ||
144 | disable_mappi_irq(M32R_IRQ_MFT2); | ||
145 | |||
146 | #if defined(CONFIG_SERIAL_M32R_SIO) | ||
147 | /* SIO0_R : uart receive data */ | ||
148 | irq_set_chip_and_handler(M32R_IRQ_SIO0_R, &mappi_irq_type, | ||
149 | handle_level_irq); | ||
150 | icu_data[M32R_IRQ_SIO0_R].icucr = 0; | ||
151 | disable_mappi_irq(M32R_IRQ_SIO0_R); | ||
152 | |||
153 | /* SIO0_S : uart send data */ | ||
154 | irq_set_chip_and_handler(M32R_IRQ_SIO0_S, &mappi_irq_type, | ||
155 | handle_level_irq); | ||
156 | icu_data[M32R_IRQ_SIO0_S].icucr = 0; | ||
157 | disable_mappi_irq(M32R_IRQ_SIO0_S); | ||
158 | |||
159 | /* SIO1_R : uart receive data */ | ||
160 | irq_set_chip_and_handler(M32R_IRQ_SIO1_R, &mappi_irq_type, | ||
161 | handle_level_irq); | ||
162 | icu_data[M32R_IRQ_SIO1_R].icucr = 0; | ||
163 | disable_mappi_irq(M32R_IRQ_SIO1_R); | ||
164 | |||
165 | /* SIO1_S : uart send data */ | ||
166 | irq_set_chip_and_handler(M32R_IRQ_SIO1_S, &mappi_irq_type, | ||
167 | handle_level_irq); | ||
168 | icu_data[M32R_IRQ_SIO1_S].icucr = 0; | ||
169 | disable_mappi_irq(M32R_IRQ_SIO1_S); | ||
170 | #endif /* CONFIG_SERIAL_M32R_SIO */ | ||
171 | |||
172 | /* INT#67-#71: CFC#0 IREQ on PLD */ | ||
173 | for (i = 0 ; i < CONFIG_M32R_CFC_NUM ; i++ ) { | ||
174 | irq_set_chip_and_handler(PLD_IRQ_CF0 + i, | ||
175 | &m32700ut_pld_irq_type, | ||
176 | handle_level_irq); | ||
177 | pld_icu_data[irq2pldirq(PLD_IRQ_CF0 + i)].icucr | ||
178 | = PLD_ICUCR_ISMOD01; /* 'L' level sense */ | ||
179 | disable_m32700ut_pld_irq(PLD_IRQ_CF0 + i); | ||
180 | } | ||
181 | |||
182 | #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE) | ||
183 | /* INT#76: 16552D#0 IREQ on PLD */ | ||
184 | irq_set_chip_and_handler(PLD_IRQ_UART0, &m32700ut_pld_irq_type, | ||
185 | handle_level_irq); | ||
186 | pld_icu_data[irq2pldirq(PLD_IRQ_UART0)].icucr | ||
187 | = PLD_ICUCR_ISMOD03; /* 'H' level sense */ | ||
188 | disable_m32700ut_pld_irq(PLD_IRQ_UART0); | ||
189 | |||
190 | /* INT#77: 16552D#1 IREQ on PLD */ | ||
191 | irq_set_chip_and_handler(PLD_IRQ_UART1, &m32700ut_pld_irq_type, | ||
192 | handle_level_irq); | ||
193 | pld_icu_data[irq2pldirq(PLD_IRQ_UART1)].icucr | ||
194 | = PLD_ICUCR_ISMOD03; /* 'H' level sense */ | ||
195 | disable_m32700ut_pld_irq(PLD_IRQ_UART1); | ||
196 | #endif /* CONFIG_SERIAL_8250 || CONFIG_SERIAL_8250_MODULE */ | ||
197 | |||
198 | #if defined(CONFIG_IDC_AK4524) || defined(CONFIG_IDC_AK4524_MODULE) | ||
199 | /* INT#80: AK4524 IREQ on PLD */ | ||
200 | irq_set_chip_and_handler(PLD_IRQ_SNDINT, &m32700ut_pld_irq_type, | ||
201 | handle_level_irq); | ||
202 | pld_icu_data[irq2pldirq(PLD_IRQ_SNDINT)].icucr | ||
203 | = PLD_ICUCR_ISMOD01; /* 'L' level sense */ | ||
204 | disable_m32700ut_pld_irq(PLD_IRQ_SNDINT); | ||
205 | #endif /* CONFIG_IDC_AK4524 || CONFIG_IDC_AK4524_MODULE */ | ||
206 | |||
207 | /* | ||
208 | * INT1# is used for UART, MMC, CF Controller in FPGA. | ||
209 | * We enable it here. | ||
210 | */ | ||
211 | icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_ISMOD11; | ||
212 | enable_mappi_irq(M32R_IRQ_INT1); | ||
213 | } | ||
diff --git a/tools/arch/m32r/include/uapi/asm/bitsperlong.h b/tools/arch/m32r/include/uapi/asm/bitsperlong.h deleted file mode 100644 index 76da34b10f59..000000000000 --- a/tools/arch/m32r/include/uapi/asm/bitsperlong.h +++ /dev/null | |||
@@ -1,2 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | ||
2 | #include <asm-generic/bitsperlong.h> | ||
diff --git a/tools/arch/m32r/include/uapi/asm/mman.h b/tools/arch/m32r/include/uapi/asm/mman.h deleted file mode 100644 index d19b82c9c290..000000000000 --- a/tools/arch/m32r/include/uapi/asm/mman.h +++ /dev/null | |||
@@ -1,7 +0,0 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | ||
2 | #ifndef TOOLS_ARCH_M32R_UAPI_ASM_MMAN_FIX_H | ||
3 | #define TOOLS_ARCH_M32R_UAPI_ASM_MMAN_FIX_H | ||
4 | #include <uapi/asm-generic/mman.h> | ||
5 | /* MAP_32BIT is undefined on m32r, fix it for perf */ | ||
6 | #define MAP_32BIT 0 | ||
7 | #endif | ||