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-rw-r--r--arch/arm/boot/dts/Makefile1
-rw-r--r--arch/arm/boot/dts/animeo_ip.dts31
-rw-r--r--arch/arm/boot/dts/at91-cosino.dtsi122
-rw-r--r--arch/arm/boot/dts/at91-cosino_mega2560.dts84
-rw-r--r--arch/arm/boot/dts/at91rm9200.dtsi4
-rw-r--r--arch/arm/boot/dts/at91rm9200ek.dts57
-rw-r--r--arch/arm/boot/dts/at91sam9263.dtsi37
-rw-r--r--arch/arm/boot/dts/at91sam9263ek.dts30
-rw-r--r--arch/arm/boot/dts/at91sam9g45.dtsi67
-rw-r--r--arch/arm/boot/dts/at91sam9m10g45ek.dts29
-rw-r--r--arch/arm/boot/dts/sama5d3.dtsi405
-rw-r--r--arch/arm/boot/dts/sama5d3_can.dtsi20
-rw-r--r--arch/arm/boot/dts/sama5d3_emac.dtsi11
-rw-r--r--arch/arm/boot/dts/sama5d3_gmac.dtsi11
-rw-r--r--arch/arm/boot/dts/sama5d3_lcd.dtsi17
-rw-r--r--arch/arm/boot/dts/sama5d3_mci2.dtsi12
-rw-r--r--arch/arm/boot/dts/sama5d3_tcb1.dtsi12
-rw-r--r--arch/arm/boot/dts/sama5d3_uart.dtsi26
-rw-r--r--arch/arm/boot/dts/sama5d3xcm.dtsi17
-rw-r--r--arch/arm/boot/dts/sama5d3xdm.dtsi1
-rw-r--r--arch/arm/mach-at91/Kconfig43
-rw-r--r--arch/arm/mach-at91/Kconfig.non_dt6
-rw-r--r--arch/arm/mach-at91/Makefile2
-rw-r--r--arch/arm/mach-at91/at91rm9200.c2
-rw-r--r--arch/arm/mach-at91/at91sam9260.c2
-rw-r--r--arch/arm/mach-at91/at91sam9261.c2
-rw-r--r--arch/arm/mach-at91/at91sam9263.c2
-rw-r--r--arch/arm/mach-at91/at91sam926x_time.c14
-rw-r--r--arch/arm/mach-at91/at91sam9g45.c2
-rw-r--r--arch/arm/mach-at91/at91sam9n12.c2
-rw-r--r--arch/arm/mach-at91/at91sam9rl.c2
-rw-r--r--arch/arm/mach-at91/at91sam9x5.c2
-rw-r--r--arch/arm/mach-at91/board-dt-sama5.c10
-rw-r--r--arch/arm/mach-at91/clock.c7
-rw-r--r--arch/arm/mach-at91/generic.h3
-rw-r--r--arch/arm/mach-at91/include/mach/at91_pmc.h190
-rw-r--r--arch/arm/mach-at91/pm.c2
-rw-r--r--arch/arm/mach-at91/pm_slowclock.S2
-rw-r--r--arch/arm/mach-at91/sama5d3.c344
-rw-r--r--arch/arm/mach-at91/setup.c8
40 files changed, 1038 insertions, 603 deletions
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index d57c1a65b24f..772a30e06e48 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -30,6 +30,7 @@ dtb-$(CONFIG_ARCH_AT91) += pm9g45.dtb
30dtb-$(CONFIG_ARCH_AT91) += at91sam9n12ek.dtb 30dtb-$(CONFIG_ARCH_AT91) += at91sam9n12ek.dtb
31# sam9x5 31# sam9x5
32dtb-$(CONFIG_ARCH_AT91) += at91-ariag25.dtb 32dtb-$(CONFIG_ARCH_AT91) += at91-ariag25.dtb
33dtb-$(CONFIG_ARCH_AT91) += at91-cosino_mega2560.dtb
33dtb-$(CONFIG_ARCH_AT91) += at91sam9g15ek.dtb 34dtb-$(CONFIG_ARCH_AT91) += at91sam9g15ek.dtb
34dtb-$(CONFIG_ARCH_AT91) += at91sam9g25ek.dtb 35dtb-$(CONFIG_ARCH_AT91) += at91sam9g25ek.dtb
35dtb-$(CONFIG_ARCH_AT91) += at91sam9g35ek.dtb 36dtb-$(CONFIG_ARCH_AT91) += at91sam9g35ek.dtb
diff --git a/arch/arm/boot/dts/animeo_ip.dts b/arch/arm/boot/dts/animeo_ip.dts
index 3a1de9eb5111..3c4f6d983cbd 100644
--- a/arch/arm/boot/dts/animeo_ip.dts
+++ b/arch/arm/boot/dts/animeo_ip.dts
@@ -90,34 +90,19 @@
90 nand-on-flash-bbt; 90 nand-on-flash-bbt;
91 status = "okay"; 91 status = "okay";
92 92
93 at91bootstrap@0 { 93 barebox@0 {
94 label = "at91bootstrap";
95 reg = <0x0 0x8000>;
96 };
97
98 barebox@8000 {
99 label = "barebox"; 94 label = "barebox";
100 reg = <0x8000 0x40000>; 95 reg = <0x0 0x58000>;
101 };
102
103 bareboxenv@48000 {
104 label = "bareboxenv";
105 reg = <0x48000 0x8000>;
106 };
107
108 user_block@0x50000 {
109 label = "user_block";
110 reg = <0x50000 0xb0000>;
111 }; 96 };
112 97
113 kernel@100000 { 98 u_boot_env@58000 {
114 label = "kernel"; 99 label = "u_boot_env";
115 reg = <0x100000 0x1b0000>; 100 reg = <0x58000 0x8000>;
116 }; 101 };
117 102
118 root@2b0000 { 103 ubi@60000 {
119 label = "root"; 104 label = "ubi";
120 reg = <0x2b0000 0x1D50000>; 105 reg = <0x60000 0x1FA0000>;
121 }; 106 };
122 }; 107 };
123 108
diff --git a/arch/arm/boot/dts/at91-cosino.dtsi b/arch/arm/boot/dts/at91-cosino.dtsi
new file mode 100644
index 000000000000..2093c4d7cd6a
--- /dev/null
+++ b/arch/arm/boot/dts/at91-cosino.dtsi
@@ -0,0 +1,122 @@
1/*
2 * at91-cosino.dtsi - Device Tree file for Cosino core module
3 *
4 * Copyright (C) 2013 - Rodolfo Giometti <giometti@linux.it>
5 * HCE Engineering
6 *
7 * Derived from at91sam9x5ek.dtsi by:
8 * Copyright (C) 2012 Atmel,
9 * 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
10 *
11 * Licensed under GPLv2 or later.
12 */
13
14#include "at91sam9g35.dtsi"
15
16/ {
17 model = "HCE Cosino core module";
18 compatible = "hce,cosino", "atmel,at91sam9x5", "atmel,at91sam9";
19
20 chosen {
21 bootargs = "console=ttyS0,115200 root=/dev/mmcblk0p2 rw rootfstype=ext3 rootwait";
22 };
23
24 memory {
25 reg = <0x20000000 0x8000000>;
26 };
27
28 clocks {
29 #address-cells = <1>;
30 #size-cells = <1>;
31 ranges;
32
33 main_clock: clock@0 {
34 compatible = "atmel,osc", "fixed-clock";
35 clock-frequency = <12000000>;
36 };
37 };
38
39 ahb {
40 apb {
41 mmc0: mmc@f0008000 {
42 pinctrl-0 = <
43 &pinctrl_board_mmc0
44 &pinctrl_mmc0_slot0_clk_cmd_dat0
45 &pinctrl_mmc0_slot0_dat1_3>;
46 status = "okay";
47 slot@0 {
48 reg = <0>;
49 bus-width = <4>;
50 cd-gpios = <&pioD 15 GPIO_ACTIVE_HIGH>;
51 };
52 };
53
54 dbgu: serial@fffff200 {
55 status = "okay";
56 };
57
58 usart0: serial@f801c000 {
59 status = "okay";
60 };
61
62 i2c0: i2c@f8010000 {
63 status = "okay";
64 };
65
66 adc0: adc@f804c000 {
67 atmel,adc-clock-rate = <1000000>;
68 atmel,adc-ts-wires = <4>;
69 atmel,adc-ts-pressure-threshold = <10000>;
70 status = "okay";
71 };
72
73 pinctrl@fffff400 {
74 mmc0 {
75 pinctrl_board_mmc0: mmc0-board {
76 atmel,pins =
77 <AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD15 gpio CD pin pull up and deglitch */
78 };
79 };
80 };
81
82 watchdog@fffffe40 {
83 status = "okay";
84 };
85 };
86
87 nand0: nand@40000000 {
88 nand-bus-width = <8>;
89 nand-ecc-mode = "hw";
90 atmel,has-pmecc; /* Enable PMECC */
91 atmel,pmecc-cap = <4>;
92 atmel,pmecc-sector-size = <512>;
93 nand-on-flash-bbt;
94 status = "okay";
95
96 at91bootstrap@0 {
97 label = "at91bootstrap";
98 reg = <0x0 0x40000>;
99 };
100
101 uboot@40000 {
102 label = "u-boot";
103 reg = <0x40000 0x80000>;
104 };
105
106 ubootenv@c0000 {
107 label = "U-Boot Env";
108 reg = <0xc0000 0x140000>;
109 };
110
111 kernel@200000 {
112 label = "kernel";
113 reg = <0x200000 0x600000>;
114 };
115
116 rootfs@800000 {
117 label = "rootfs";
118 reg = <0x800000 0x0f800000>;
119 };
120 };
121 };
122};
diff --git a/arch/arm/boot/dts/at91-cosino_mega2560.dts b/arch/arm/boot/dts/at91-cosino_mega2560.dts
new file mode 100644
index 000000000000..f9415dd11f17
--- /dev/null
+++ b/arch/arm/boot/dts/at91-cosino_mega2560.dts
@@ -0,0 +1,84 @@
1/*
2 * at91-cosino_mega2560.dts - Device Tree file for Cosino board with
3 * Mega 2560 extension
4 *
5 * Copyright (C) 2013 - Rodolfo Giometti <giometti@linux.it>
6 * HCE Engineering
7 *
8 * Derived from at91sam9g35ek.dts by:
9 * Copyright (C) 2012 Atmel,
10 * 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
11 *
12 * Licensed under GPLv2 or later.
13 */
14
15/dts-v1/;
16#include "at91-cosino.dtsi"
17
18/ {
19 model = "HCE Cosino Mega 2560";
20 compatible = "hce,cosino_mega2560", "atmel,at91sam9x5", "atmel,at91sam9";
21
22 ahb {
23 apb {
24 macb0: ethernet@f802c000 {
25 phy-mode = "rmii";
26 status = "okay";
27 };
28
29 adc0: adc@f804c000 {
30 atmel,adc-clock-rate = <1000000>;
31 atmel,adc-ts-wires = <4>;
32 atmel,adc-ts-pressure-threshold = <10000>;
33 status = "okay";
34 };
35
36
37 tsadcc: tsadcc@f804c000 {
38 status = "okay";
39 };
40
41 rtc@fffffeb0 {
42 status = "okay";
43 };
44
45 usart1: serial@f8020000 {
46 status = "okay";
47 };
48
49 usart2: serial@f8024000 {
50 status = "okay";
51 };
52
53 usb2: gadget@f803c000 {
54 atmel,vbus-gpio = <&pioB 16 GPIO_ACTIVE_HIGH>;
55 status = "okay";
56 };
57
58 mmc1: mmc@f000c000 {
59 pinctrl-0 = <
60 &pinctrl_mmc1_slot0_clk_cmd_dat0
61 &pinctrl_mmc1_slot0_dat1_3>;
62 status = "okay";
63 slot@0 {
64 reg = <0>;
65 bus-width = <4>;
66 non-removable;
67 };
68 };
69 };
70
71 usb0: ohci@00600000 {
72 status = "okay";
73 num-ports = <3>;
74 atmel,vbus-gpio = <0 /* &pioD 18 GPIO_ACTIVE_LOW */
75 &pioD 19 GPIO_ACTIVE_LOW
76 &pioD 20 GPIO_ACTIVE_LOW
77 >;
78 };
79
80 usb1: ehci@00700000 {
81 status = "okay";
82 };
83 };
84};
diff --git a/arch/arm/boot/dts/at91rm9200.dtsi b/arch/arm/boot/dts/at91rm9200.dtsi
index f77065506f1e..c61b16fba79b 100644
--- a/arch/arm/boot/dts/at91rm9200.dtsi
+++ b/arch/arm/boot/dts/at91rm9200.dtsi
@@ -191,12 +191,12 @@
191 AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA18 periph A */ 191 AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA18 periph A */
192 }; 192 };
193 193
194 pinctrl_uart0_rts: uart0_rts-0 { 194 pinctrl_uart0_cts: uart0_cts-0 {
195 atmel,pins = 195 atmel,pins =
196 <AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA20 periph A */ 196 <AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA20 periph A */
197 }; 197 };
198 198
199 pinctrl_uart0_cts: uart0_cts-0 { 199 pinctrl_uart0_rts: uart0_rts-0 {
200 atmel,pins = 200 atmel,pins =
201 <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA21 periph A */ 201 <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA21 periph A */
202 }; 202 };
diff --git a/arch/arm/boot/dts/at91rm9200ek.dts b/arch/arm/boot/dts/at91rm9200ek.dts
index d2d72c3b44c4..df6b0aa0e4dd 100644
--- a/arch/arm/boot/dts/at91rm9200ek.dts
+++ b/arch/arm/boot/dts/at91rm9200ek.dts
@@ -29,10 +29,22 @@
29 29
30 ahb { 30 ahb {
31 apb { 31 apb {
32 dbgu: serial@fffff200 { 32 usb1: gadget@fffb0000 {
33 atmel,vbus-gpio = <&pioD 4 GPIO_ACTIVE_HIGH>;
34 atmel,pullup-gpio = <&pioD 5 GPIO_ACTIVE_HIGH>;
33 status = "okay"; 35 status = "okay";
34 }; 36 };
35 37
38 macb0: ethernet@fffbc000 {
39 phy-mode = "rmii";
40 status = "okay";
41
42 phy0: ethernet-phy {
43 interrupt-parent = <&pioC>;
44 interrupts = <4 IRQ_TYPE_EDGE_BOTH>;
45 };
46 };
47
36 usart1: serial@fffc4000 { 48 usart1: serial@fffc4000 {
37 pinctrl-0 = 49 pinctrl-0 =
38 <&pinctrl_uart1 50 <&pinctrl_uart1
@@ -44,16 +56,6 @@
44 status = "okay"; 56 status = "okay";
45 }; 57 };
46 58
47 macb0: ethernet@fffbc000 {
48 phy-mode = "rmii";
49 status = "okay";
50 };
51
52 usb1: gadget@fffb0000 {
53 atmel,vbus-gpio = <&pioD 4 GPIO_ACTIVE_HIGH>;
54 status = "okay";
55 };
56
57 spi0: spi@fffe0000 { 59 spi0: spi@fffe0000 {
58 status = "okay"; 60 status = "okay";
59 cs-gpios = <&pioA 3 0>, <0>, <0>, <0>; 61 cs-gpios = <&pioA 3 0>, <0>, <0>, <0>;
@@ -63,12 +65,45 @@
63 reg = <0>; 65 reg = <0>;
64 }; 66 };
65 }; 67 };
68
69 dbgu: serial@fffff200 {
70 status = "okay";
71 };
66 }; 72 };
67 73
68 usb0: ohci@00300000 { 74 usb0: ohci@00300000 {
69 num-ports = <2>; 75 num-ports = <2>;
70 status = "okay"; 76 status = "okay";
71 }; 77 };
78
79 nor_flash@10000000 {
80 compatible = "cfi-flash";
81 reg = <0x10000000 0x800000>;
82 linux,mtd-name = "physmap-flash.0";
83 bank-width = <2>;
84 #address-cells = <1>;
85 #size-cells = <1>;
86
87 barebox@0 {
88 label = "barebox";
89 reg = <0x00000 0x40000>;
90 };
91
92 bareboxenv@40000 {
93 label = "bareboxenv";
94 reg = <0x40000 0x10000>;
95 };
96
97 kernel@50000 {
98 label = "kernel";
99 reg = <0x50000 0x300000>;
100 };
101
102 root@350000 {
103 label = "root";
104 reg = <0x350000 0x4B0000>;
105 };
106 };
72 }; 107 };
73 108
74 leds { 109 leds {
diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi
index d5bd65f74602..22e255ab6963 100644
--- a/arch/arm/boot/dts/at91sam9263.dtsi
+++ b/arch/arm/boot/dts/at91sam9263.dtsi
@@ -366,6 +366,34 @@
366 }; 366 };
367 }; 367 };
368 368
369 fb {
370 pinctrl_fb: fb-0 {
371 atmel,pins =
372 <AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC1 periph A */
373 AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC2 periph A */
374 AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC3 periph A */
375 AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB9 periph B */
376 AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC6 periph A */
377 AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC7 periph A */
378 AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC8 periph A */
379 AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC9 periph A */
380 AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC10 periph A */
381 AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC11 periph A */
382 AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC14 periph A */
383 AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC15 periph A */
384 AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC16 periph A */
385 AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC12 periph B */
386 AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC18 periph A */
387 AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC19 periph A */
388 AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC22 periph A */
389 AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC23 periph A */
390 AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC24 periph A */
391 AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC17 periph B */
392 AT91_PIOC 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC26 periph A */
393 AT91_PIOC 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC27 periph A */
394 };
395 };
396
369 pioA: gpio@fffff200 { 397 pioA: gpio@fffff200 {
370 compatible = "atmel,at91rm9200-gpio"; 398 compatible = "atmel,at91rm9200-gpio";
371 reg = <0xfffff200 0x200>; 399 reg = <0xfffff200 0x200>;
@@ -549,6 +577,15 @@
549 }; 577 };
550 }; 578 };
551 579
580 fb0: fb@0x00700000 {
581 compatible = "atmel,at91sam9263-lcdc";
582 reg = <0x00700000 0x1000>;
583 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 3>;
584 pinctrl-names = "default";
585 pinctrl-0 = <&pinctrl_fb>;
586 status = "disabled";
587 };
588
552 nand0: nand@40000000 { 589 nand0: nand@40000000 {
553 compatible = "atmel,at91rm9200-nand"; 590 compatible = "atmel,at91rm9200-nand";
554 #address-cells = <1>; 591 #address-cells = <1>;
diff --git a/arch/arm/boot/dts/at91sam9263ek.dts b/arch/arm/boot/dts/at91sam9263ek.dts
index 70f835b55c0b..15009c9f2293 100644
--- a/arch/arm/boot/dts/at91sam9263ek.dts
+++ b/arch/arm/boot/dts/at91sam9263ek.dts
@@ -95,6 +95,36 @@
95 }; 95 };
96 }; 96 };
97 97
98 fb0: fb@0x00700000 {
99 display = <&display0>;
100 status = "okay";
101
102 display0: display {
103 bits-per-pixel = <16>;
104 atmel,lcdcon-backlight;
105 atmel,dmacon = <0x1>;
106 atmel,lcdcon2 = <0x80008002>;
107 atmel,guard-time = <1>;
108
109 display-timings {
110 native-mode = <&timing0>;
111 timing0: timing0 {
112 clock-frequency = <4965000>;
113 hactive = <240>;
114 vactive = <320>;
115 hback-porch = <1>;
116 hfront-porch = <33>;
117 vback-porch = <1>;
118 vfront-porch = <0>;
119 hsync-len = <5>;
120 vsync-len = <1>;
121 hsync-active = <1>;
122 vsync-active = <1>;
123 };
124 };
125 };
126 };
127
98 nand0: nand@40000000 { 128 nand0: nand@40000000 {
99 nand-bus-width = <8>; 129 nand-bus-width = <8>;
100 nand-ecc-mode = "soft"; 130 nand-ecc-mode = "soft";
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
index c3e514837074..d7af9ecb85d2 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -143,6 +143,22 @@
143 }; 143 };
144 }; 144 };
145 145
146 i2c0 {
147 pinctrl_i2c0: i2c0-0 {
148 atmel,pins =
149 <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA21 periph A TWCK0 */
150 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA20 periph A TWD0 */
151 };
152 };
153
154 i2c1 {
155 pinctrl_i2c1: i2c1-0 {
156 atmel,pins =
157 <AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB11 periph A TWCK1 */
158 AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB10 periph A TWD1 */
159 };
160 };
161
146 usart0 { 162 usart0 {
147 pinctrl_usart0: usart0-0 { 163 pinctrl_usart0: usart0-0 {
148 atmel,pins = 164 atmel,pins =
@@ -425,6 +441,42 @@
425 }; 441 };
426 }; 442 };
427 443
444 fb {
445 pinctrl_fb: fb-0 {
446 atmel,pins =
447 <AT91_PIOE 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE0 periph A */
448 AT91_PIOE 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE2 periph A */
449 AT91_PIOE 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE3 periph A */
450 AT91_PIOE 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE4 periph A */
451 AT91_PIOE 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE5 periph A */
452 AT91_PIOE 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE6 periph A */
453 AT91_PIOE 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE7 periph A */
454 AT91_PIOE 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE8 periph A */
455 AT91_PIOE 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE9 periph A */
456 AT91_PIOE 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE10 periph A */
457 AT91_PIOE 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE11 periph A */
458 AT91_PIOE 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE12 periph A */
459 AT91_PIOE 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE13 periph A */
460 AT91_PIOE 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE14 periph A */
461 AT91_PIOE 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE15 periph A */
462 AT91_PIOE 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE16 periph A */
463 AT91_PIOE 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE17 periph A */
464 AT91_PIOE 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE18 periph A */
465 AT91_PIOE 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE19 periph A */
466 AT91_PIOE 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE20 periph A */
467 AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE21 periph A */
468 AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE22 periph A */
469 AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE23 periph A */
470 AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE24 periph A */
471 AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE25 periph A */
472 AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE26 periph A */
473 AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE27 periph A */
474 AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE28 periph A */
475 AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE29 periph A */
476 AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PE30 periph A */
477 };
478 };
479
428 pioA: gpio@fffff200 { 480 pioA: gpio@fffff200 {
429 compatible = "atmel,at91rm9200-gpio"; 481 compatible = "atmel,at91rm9200-gpio";
430 reg = <0xfffff200 0x200>; 482 reg = <0xfffff200 0x200>;
@@ -542,6 +594,8 @@
542 compatible = "atmel,at91sam9g10-i2c"; 594 compatible = "atmel,at91sam9g10-i2c";
543 reg = <0xfff84000 0x100>; 595 reg = <0xfff84000 0x100>;
544 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>; 596 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>;
597 pinctrl-names = "default";
598 pinctrl-0 = <&pinctrl_i2c0>;
545 #address-cells = <1>; 599 #address-cells = <1>;
546 #size-cells = <0>; 600 #size-cells = <0>;
547 status = "disabled"; 601 status = "disabled";
@@ -551,6 +605,8 @@
551 compatible = "atmel,at91sam9g10-i2c"; 605 compatible = "atmel,at91sam9g10-i2c";
552 reg = <0xfff88000 0x100>; 606 reg = <0xfff88000 0x100>;
553 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>; 607 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>;
608 pinctrl-names = "default";
609 pinctrl-0 = <&pinctrl_i2c1>;
554 #address-cells = <1>; 610 #address-cells = <1>;
555 #size-cells = <0>; 611 #size-cells = <0>;
556 status = "disabled"; 612 status = "disabled";
@@ -618,6 +674,7 @@
618 compatible = "atmel,hsmci"; 674 compatible = "atmel,hsmci";
619 reg = <0xfff80000 0x600>; 675 reg = <0xfff80000 0x600>;
620 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>; 676 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>;
677 pinctrl-names = "default";
621 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(0)>; 678 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(0)>;
622 dma-names = "rxtx"; 679 dma-names = "rxtx";
623 #address-cells = <1>; 680 #address-cells = <1>;
@@ -629,6 +686,7 @@
629 compatible = "atmel,hsmci"; 686 compatible = "atmel,hsmci";
630 reg = <0xfffd0000 0x600>; 687 reg = <0xfffd0000 0x600>;
631 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 0>; 688 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 0>;
689 pinctrl-names = "default";
632 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(13)>; 690 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(13)>;
633 dma-names = "rxtx"; 691 dma-names = "rxtx";
634 #address-cells = <1>; 692 #address-cells = <1>;
@@ -727,6 +785,15 @@
727 }; 785 };
728 }; 786 };
729 787
788 fb0: fb@0x00500000 {
789 compatible = "atmel,at91sam9g45-lcdc";
790 reg = <0x00500000 0x1000>;
791 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 3>;
792 pinctrl-names = "default";
793 pinctrl-0 = <&pinctrl_fb>;
794 status = "disabled";
795 };
796
730 nand0: nand@40000000 { 797 nand0: nand@40000000 {
731 compatible = "atmel,at91rm9200-nand"; 798 compatible = "atmel,at91rm9200-nand";
732 #address-cells = <1>; 799 #address-cells = <1>;
diff --git a/arch/arm/boot/dts/at91sam9m10g45ek.dts b/arch/arm/boot/dts/at91sam9m10g45ek.dts
index a4b00e5c61c0..7b76dbde8c41 100644
--- a/arch/arm/boot/dts/at91sam9m10g45ek.dts
+++ b/arch/arm/boot/dts/at91sam9m10g45ek.dts
@@ -123,6 +123,35 @@
123 }; 123 };
124 }; 124 };
125 125
126 fb0: fb@0x00500000 {
127 display = <&display0>;
128 status = "okay";
129
130 display0: display {
131 bits-per-pixel = <32>;
132 atmel,lcdcon-backlight;
133 atmel,dmacon = <0x1>;
134 atmel,lcdcon2 = <0x80008002>;
135 atmel,guard-time = <9>;
136 atmel,lcd-wiring-mode = "RGB";
137
138 display-timings {
139 native-mode = <&timing0>;
140 timing0: timing0 {
141 clock-frequency = <9000000>;
142 hactive = <480>;
143 vactive = <272>;
144 hback-porch = <1>;
145 hfront-porch = <1>;
146 vback-porch = <40>;
147 vfront-porch = <1>;
148 hsync-len = <45>;
149 vsync-len = <1>;
150 };
151 };
152 };
153 };
154
126 nand0: nand@40000000 { 155 nand0: nand@40000000 {
127 nand-bus-width = <8>; 156 nand-bus-width = <8>;
128 nand-ecc-mode = "soft"; 157 nand-ecc-mode = "soft";
diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi
index 5cdaba4cea86..070c5c3a2291 100644
--- a/arch/arm/boot/dts/sama5d3.dtsi
+++ b/arch/arm/boot/dts/sama5d3.dtsi
@@ -13,6 +13,7 @@
13#include <dt-bindings/pinctrl/at91.h> 13#include <dt-bindings/pinctrl/at91.h>
14#include <dt-bindings/interrupt-controller/irq.h> 14#include <dt-bindings/interrupt-controller/irq.h>
15#include <dt-bindings/gpio/gpio.h> 15#include <dt-bindings/gpio/gpio.h>
16#include <dt-bindings/clk/at91.h>
16 17
17/ { 18/ {
18 model = "Atmel SAMA5D3 family SoC"; 19 model = "Atmel SAMA5D3 family SoC";
@@ -56,6 +57,14 @@
56 reg = <0x20000000 0x8000000>; 57 reg = <0x20000000 0x8000000>;
57 }; 58 };
58 59
60 clocks {
61 adc_op_clk: adc_op_clk{
62 compatible = "fixed-clock";
63 #clock-cells = <0>;
64 clock-frequency = <20000000>;
65 };
66 };
67
59 ahb { 68 ahb {
60 compatible = "simple-bus"; 69 compatible = "simple-bus";
61 #address-cells = <1>; 70 #address-cells = <1>;
@@ -79,6 +88,8 @@
79 status = "disabled"; 88 status = "disabled";
80 #address-cells = <1>; 89 #address-cells = <1>;
81 #size-cells = <0>; 90 #size-cells = <0>;
91 clocks = <&mci0_clk>;
92 clock-names = "mci_clk";
82 }; 93 };
83 94
84 spi0: spi@f0004000 { 95 spi0: spi@f0004000 {
@@ -92,6 +103,8 @@
92 dma-names = "tx", "rx"; 103 dma-names = "tx", "rx";
93 pinctrl-names = "default"; 104 pinctrl-names = "default";
94 pinctrl-0 = <&pinctrl_spi0>; 105 pinctrl-0 = <&pinctrl_spi0>;
106 clocks = <&spi0_clk>;
107 clock-names = "spi_clk";
95 status = "disabled"; 108 status = "disabled";
96 }; 109 };
97 110
@@ -101,6 +114,8 @@
101 interrupts = <38 IRQ_TYPE_LEVEL_HIGH 4>; 114 interrupts = <38 IRQ_TYPE_LEVEL_HIGH 4>;
102 pinctrl-names = "default"; 115 pinctrl-names = "default";
103 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; 116 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
117 clocks = <&ssc0_clk>;
118 clock-names = "pclk";
104 status = "disabled"; 119 status = "disabled";
105 }; 120 };
106 121
@@ -108,6 +123,8 @@
108 compatible = "atmel,at91sam9x5-tcb"; 123 compatible = "atmel,at91sam9x5-tcb";
109 reg = <0xf0010000 0x100>; 124 reg = <0xf0010000 0x100>;
110 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>; 125 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
126 clocks = <&tcb0_clk>;
127 clock-names = "t0_clk";
111 }; 128 };
112 129
113 i2c0: i2c@f0014000 { 130 i2c0: i2c@f0014000 {
@@ -121,6 +138,7 @@
121 pinctrl-0 = <&pinctrl_i2c0>; 138 pinctrl-0 = <&pinctrl_i2c0>;
122 #address-cells = <1>; 139 #address-cells = <1>;
123 #size-cells = <0>; 140 #size-cells = <0>;
141 clocks = <&twi0_clk>;
124 status = "disabled"; 142 status = "disabled";
125 }; 143 };
126 144
@@ -135,6 +153,7 @@
135 pinctrl-0 = <&pinctrl_i2c1>; 153 pinctrl-0 = <&pinctrl_i2c1>;
136 #address-cells = <1>; 154 #address-cells = <1>;
137 #size-cells = <0>; 155 #size-cells = <0>;
156 clocks = <&twi1_clk>;
138 status = "disabled"; 157 status = "disabled";
139 }; 158 };
140 159
@@ -144,6 +163,8 @@
144 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>; 163 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>;
145 pinctrl-names = "default"; 164 pinctrl-names = "default";
146 pinctrl-0 = <&pinctrl_usart0>; 165 pinctrl-0 = <&pinctrl_usart0>;
166 clocks = <&usart0_clk>;
167 clock-names = "usart";
147 status = "disabled"; 168 status = "disabled";
148 }; 169 };
149 170
@@ -153,6 +174,8 @@
153 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 5>; 174 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 5>;
154 pinctrl-names = "default"; 175 pinctrl-names = "default";
155 pinctrl-0 = <&pinctrl_usart1>; 176 pinctrl-0 = <&pinctrl_usart1>;
177 clocks = <&usart1_clk>;
178 clock-names = "usart";
156 status = "disabled"; 179 status = "disabled";
157 }; 180 };
158 181
@@ -174,6 +197,8 @@
174 status = "disabled"; 197 status = "disabled";
175 #address-cells = <1>; 198 #address-cells = <1>;
176 #size-cells = <0>; 199 #size-cells = <0>;
200 clocks = <&mci1_clk>;
201 clock-names = "mci_clk";
177 }; 202 };
178 203
179 spi1: spi@f8008000 { 204 spi1: spi@f8008000 {
@@ -187,6 +212,8 @@
187 dma-names = "tx", "rx"; 212 dma-names = "tx", "rx";
188 pinctrl-names = "default"; 213 pinctrl-names = "default";
189 pinctrl-0 = <&pinctrl_spi1>; 214 pinctrl-0 = <&pinctrl_spi1>;
215 clocks = <&spi1_clk>;
216 clock-names = "spi_clk";
190 status = "disabled"; 217 status = "disabled";
191 }; 218 };
192 219
@@ -196,6 +223,8 @@
196 interrupts = <39 IRQ_TYPE_LEVEL_HIGH 4>; 223 interrupts = <39 IRQ_TYPE_LEVEL_HIGH 4>;
197 pinctrl-names = "default"; 224 pinctrl-names = "default";
198 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>; 225 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
226 clocks = <&ssc1_clk>;
227 clock-names = "pclk";
199 status = "disabled"; 228 status = "disabled";
200 }; 229 };
201 230
@@ -219,6 +248,9 @@
219 &pinctrl_adc0_ad10 248 &pinctrl_adc0_ad10
220 &pinctrl_adc0_ad11 249 &pinctrl_adc0_ad11
221 >; 250 >;
251 clocks = <&adc_clk>,
252 <&adc_op_clk>;
253 clock-names = "adc_clk", "adc_op_clk";
222 atmel,adc-channel-base = <0x50>; 254 atmel,adc-channel-base = <0x50>;
223 atmel,adc-channels-used = <0xfff>; 255 atmel,adc-channels-used = <0xfff>;
224 atmel,adc-drdy-mask = <0x1000000>; 256 atmel,adc-drdy-mask = <0x1000000>;
@@ -272,8 +304,11 @@
272 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(11)>, 304 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(11)>,
273 <&dma1 2 AT91_DMA_CFG_PER_ID(12)>; 305 <&dma1 2 AT91_DMA_CFG_PER_ID(12)>;
274 dma-names = "tx", "rx"; 306 dma-names = "tx", "rx";
307 pinctrl-names = "default";
308 pinctrl-0 = <&pinctrl_i2c2>;
275 #address-cells = <1>; 309 #address-cells = <1>;
276 #size-cells = <0>; 310 #size-cells = <0>;
311 clocks = <&twi2_clk>;
277 status = "disabled"; 312 status = "disabled";
278 }; 313 };
279 314
@@ -283,6 +318,8 @@
283 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>; 318 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
284 pinctrl-names = "default"; 319 pinctrl-names = "default";
285 pinctrl-0 = <&pinctrl_usart2>; 320 pinctrl-0 = <&pinctrl_usart2>;
321 clocks = <&usart2_clk>;
322 clock-names = "usart";
286 status = "disabled"; 323 status = "disabled";
287 }; 324 };
288 325
@@ -292,25 +329,35 @@
292 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>; 329 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
293 pinctrl-names = "default"; 330 pinctrl-names = "default";
294 pinctrl-0 = <&pinctrl_usart3>; 331 pinctrl-0 = <&pinctrl_usart3>;
332 clocks = <&usart3_clk>;
333 clock-names = "usart";
295 status = "disabled"; 334 status = "disabled";
296 }; 335 };
297 336
298 sha@f8034000 { 337 sha@f8034000 {
299 compatible = "atmel,sam9g46-sha"; 338 compatible = "atmel,at91sam9g46-sha";
300 reg = <0xf8034000 0x100>; 339 reg = <0xf8034000 0x100>;
301 interrupts = <42 IRQ_TYPE_LEVEL_HIGH 0>; 340 interrupts = <42 IRQ_TYPE_LEVEL_HIGH 0>;
341 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(17)>;
342 dma-names = "tx";
302 }; 343 };
303 344
304 aes@f8038000 { 345 aes@f8038000 {
305 compatible = "atmel,sam9g46-aes"; 346 compatible = "atmel,at91sam9g46-aes";
306 reg = <0xf8038000 0x100>; 347 reg = <0xf8038000 0x100>;
307 interrupts = <43 4 0>; 348 interrupts = <43 IRQ_TYPE_LEVEL_HIGH 0>;
349 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(18)>,
350 <&dma1 2 AT91_DMA_CFG_PER_ID(19)>;
351 dma-names = "tx", "rx";
308 }; 352 };
309 353
310 tdes@f803c000 { 354 tdes@f803c000 {
311 compatible = "atmel,sam9g46-tdes"; 355 compatible = "atmel,at91sam9g46-tdes";
312 reg = <0xf803c000 0x100>; 356 reg = <0xf803c000 0x100>;
313 interrupts = <44 IRQ_TYPE_LEVEL_HIGH 0>; 357 interrupts = <44 IRQ_TYPE_LEVEL_HIGH 0>;
358 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(20)>,
359 <&dma1 2 AT91_DMA_CFG_PER_ID(21)>;
360 dma-names = "tx", "rx";
314 }; 361 };
315 362
316 dma0: dma-controller@ffffe600 { 363 dma0: dma-controller@ffffe600 {
@@ -318,6 +365,8 @@
318 reg = <0xffffe600 0x200>; 365 reg = <0xffffe600 0x200>;
319 interrupts = <30 IRQ_TYPE_LEVEL_HIGH 0>; 366 interrupts = <30 IRQ_TYPE_LEVEL_HIGH 0>;
320 #dma-cells = <2>; 367 #dma-cells = <2>;
368 clocks = <&dma0_clk>;
369 clock-names = "dma_clk";
321 }; 370 };
322 371
323 dma1: dma-controller@ffffe800 { 372 dma1: dma-controller@ffffe800 {
@@ -325,6 +374,8 @@
325 reg = <0xffffe800 0x200>; 374 reg = <0xffffe800 0x200>;
326 interrupts = <31 IRQ_TYPE_LEVEL_HIGH 0>; 375 interrupts = <31 IRQ_TYPE_LEVEL_HIGH 0>;
327 #dma-cells = <2>; 376 #dma-cells = <2>;
377 clocks = <&dma1_clk>;
378 clock-names = "dma_clk";
328 }; 379 };
329 380
330 ramc0: ramc@ffffea00 { 381 ramc0: ramc@ffffea00 {
@@ -338,6 +389,8 @@
338 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 7>; 389 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 7>;
339 pinctrl-names = "default"; 390 pinctrl-names = "default";
340 pinctrl-0 = <&pinctrl_dbgu>; 391 pinctrl-0 = <&pinctrl_dbgu>;
392 clocks = <&dbgu_clk>;
393 clock-names = "usart";
341 status = "disabled"; 394 status = "disabled";
342 }; 395 };
343 396
@@ -443,6 +496,14 @@
443 }; 496 };
444 }; 497 };
445 498
499 i2c2 {
500 pinctrl_i2c2: i2c2-0 {
501 atmel,pins =
502 <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* TWD2 pin, conflicts with LCDDAT18, ISI_D2 */
503 AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* TWCK2 pin, conflicts with LCDDAT19, ISI_D3 */
504 };
505 };
506
446 isi { 507 isi {
447 pinctrl_isi: isi-0 { 508 pinctrl_isi: isi-0 {
448 atmel,pins = 509 atmel,pins =
@@ -626,6 +687,7 @@
626 gpio-controller; 687 gpio-controller;
627 interrupt-controller; 688 interrupt-controller;
628 #interrupt-cells = <2>; 689 #interrupt-cells = <2>;
690 clocks = <&pioA_clk>;
629 }; 691 };
630 692
631 pioB: gpio@fffff400 { 693 pioB: gpio@fffff400 {
@@ -636,6 +698,7 @@
636 gpio-controller; 698 gpio-controller;
637 interrupt-controller; 699 interrupt-controller;
638 #interrupt-cells = <2>; 700 #interrupt-cells = <2>;
701 clocks = <&pioB_clk>;
639 }; 702 };
640 703
641 pioC: gpio@fffff600 { 704 pioC: gpio@fffff600 {
@@ -646,6 +709,7 @@
646 gpio-controller; 709 gpio-controller;
647 interrupt-controller; 710 interrupt-controller;
648 #interrupt-cells = <2>; 711 #interrupt-cells = <2>;
712 clocks = <&pioC_clk>;
649 }; 713 };
650 714
651 pioD: gpio@fffff800 { 715 pioD: gpio@fffff800 {
@@ -656,6 +720,7 @@
656 gpio-controller; 720 gpio-controller;
657 interrupt-controller; 721 interrupt-controller;
658 #interrupt-cells = <2>; 722 #interrupt-cells = <2>;
723 clocks = <&pioD_clk>;
659 }; 724 };
660 725
661 pioE: gpio@fffffa00 { 726 pioE: gpio@fffffa00 {
@@ -666,12 +731,334 @@
666 gpio-controller; 731 gpio-controller;
667 interrupt-controller; 732 interrupt-controller;
668 #interrupt-cells = <2>; 733 #interrupt-cells = <2>;
734 clocks = <&pioE_clk>;
669 }; 735 };
670 }; 736 };
671 737
672 pmc: pmc@fffffc00 { 738 pmc: pmc@fffffc00 {
673 compatible = "atmel,at91rm9200-pmc"; 739 compatible = "atmel,sama5d3-pmc";
674 reg = <0xfffffc00 0x120>; 740 reg = <0xfffffc00 0x120>;
741 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
742 interrupt-controller;
743 #address-cells = <1>;
744 #size-cells = <0>;
745 #interrupt-cells = <1>;
746
747 clk32k: slck {
748 compatible = "fixed-clock";
749 #clock-cells = <0>;
750 clock-frequency = <32768>;
751 };
752
753 main: mainck {
754 compatible = "atmel,at91rm9200-clk-main";
755 #clock-cells = <0>;
756 interrupt-parent = <&pmc>;
757 interrupts = <AT91_PMC_MOSCS>;
758 clocks = <&clk32k>;
759 };
760
761 plla: pllack {
762 compatible = "atmel,sama5d3-clk-pll";
763 #clock-cells = <0>;
764 interrupt-parent = <&pmc>;
765 interrupts = <AT91_PMC_LOCKA>;
766 clocks = <&main>;
767 reg = <0>;
768 atmel,clk-input-range = <8000000 50000000>;
769 #atmel,pll-clk-output-range-cells = <4>;
770 atmel,pll-clk-output-ranges = <400000000 1000000000 0 0>;
771 };
772
773 plladiv: plladivck {
774 compatible = "atmel,at91sam9x5-clk-plldiv";
775 #clock-cells = <0>;
776 clocks = <&plla>;
777 };
778
779 utmi: utmick {
780 compatible = "atmel,at91sam9x5-clk-utmi";
781 #clock-cells = <0>;
782 interrupt-parent = <&pmc>;
783 interrupts = <AT91_PMC_LOCKU>;
784 clocks = <&main>;
785 };
786
787 mck: masterck {
788 compatible = "atmel,at91sam9x5-clk-master";
789 #clock-cells = <0>;
790 interrupt-parent = <&pmc>;
791 interrupts = <AT91_PMC_MCKRDY>;
792 clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>;
793 atmel,clk-output-range = <0 166000000>;
794 atmel,clk-divisors = <1 2 4 3>;
795 };
796
797 usb: usbck {
798 compatible = "atmel,at91sam9x5-clk-usb";
799 #clock-cells = <0>;
800 clocks = <&plladiv>, <&utmi>;
801 };
802
803 prog: progck {
804 compatible = "atmel,at91sam9x5-clk-programmable";
805 #address-cells = <1>;
806 #size-cells = <0>;
807 interrupt-parent = <&pmc>;
808 clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>;
809
810 prog0: prog0 {
811 #clock-cells = <0>;
812 reg = <0>;
813 interrupts = <AT91_PMC_PCKRDY(0)>;
814 };
815
816 prog1: prog1 {
817 #clock-cells = <0>;
818 reg = <1>;
819 interrupts = <AT91_PMC_PCKRDY(1)>;
820 };
821
822 prog2: prog2 {
823 #clock-cells = <0>;
824 reg = <2>;
825 interrupts = <AT91_PMC_PCKRDY(2)>;
826 };
827 };
828
829 smd: smdclk {
830 compatible = "atmel,at91sam9x5-clk-smd";
831 #clock-cells = <0>;
832 clocks = <&plladiv>, <&utmi>;
833 };
834
835 systemck {
836 compatible = "atmel,at91rm9200-clk-system";
837 #address-cells = <1>;
838 #size-cells = <0>;
839
840 ddrck: ddrck {
841 #clock-cells = <0>;
842 reg = <2>;
843 clocks = <&mck>;
844 };
845
846 smdck: smdck {
847 #clock-cells = <0>;
848 reg = <4>;
849 clocks = <&smd>;
850 };
851
852 uhpck: uhpck {
853 #clock-cells = <0>;
854 reg = <6>;
855 clocks = <&usb>;
856 };
857
858 udpck: udpck {
859 #clock-cells = <0>;
860 reg = <7>;
861 clocks = <&usb>;
862 };
863
864 pck0: pck0 {
865 #clock-cells = <0>;
866 reg = <8>;
867 clocks = <&prog0>;
868 };
869
870 pck1: pck1 {
871 #clock-cells = <0>;
872 reg = <9>;
873 clocks = <&prog1>;
874 };
875
876 pck2: pck2 {
877 #clock-cells = <0>;
878 reg = <10>;
879 clocks = <&prog2>;
880 };
881 };
882
883 periphck {
884 compatible = "atmel,at91sam9x5-clk-peripheral";
885 #address-cells = <1>;
886 #size-cells = <0>;
887 clocks = <&mck>;
888
889 dbgu_clk: dbgu_clk {
890 #clock-cells = <0>;
891 reg = <2>;
892 };
893
894 pioA_clk: pioA_clk {
895 #clock-cells = <0>;
896 reg = <6>;
897 };
898
899 pioB_clk: pioB_clk {
900 #clock-cells = <0>;
901 reg = <7>;
902 };
903
904 pioC_clk: pioC_clk {
905 #clock-cells = <0>;
906 reg = <8>;
907 };
908
909 pioD_clk: pioD_clk {
910 #clock-cells = <0>;
911 reg = <9>;
912 };
913
914 pioE_clk: pioE_clk {
915 #clock-cells = <0>;
916 reg = <10>;
917 };
918
919 usart0_clk: usart0_clk {
920 #clock-cells = <0>;
921 reg = <12>;
922 atmel,clk-output-range = <0 66000000>;
923 };
924
925 usart1_clk: usart1_clk {
926 #clock-cells = <0>;
927 reg = <13>;
928 atmel,clk-output-range = <0 66000000>;
929 };
930
931 usart2_clk: usart2_clk {
932 #clock-cells = <0>;
933 reg = <14>;
934 atmel,clk-output-range = <0 66000000>;
935 };
936
937 usart3_clk: usart3_clk {
938 #clock-cells = <0>;
939 reg = <15>;
940 atmel,clk-output-range = <0 66000000>;
941 };
942
943 twi0_clk: twi0_clk {
944 reg = <18>;
945 #clock-cells = <0>;
946 atmel,clk-output-range = <0 16625000>;
947 };
948
949 twi1_clk: twi1_clk {
950 #clock-cells = <0>;
951 reg = <19>;
952 atmel,clk-output-range = <0 16625000>;
953 };
954
955 twi2_clk: twi2_clk {
956 #clock-cells = <0>;
957 reg = <20>;
958 atmel,clk-output-range = <0 16625000>;
959 };
960
961 mci0_clk: mci0_clk {
962 #clock-cells = <0>;
963 reg = <21>;
964 };
965
966 mci1_clk: mci1_clk {
967 #clock-cells = <0>;
968 reg = <22>;
969 };
970
971 spi0_clk: spi0_clk {
972 #clock-cells = <0>;
973 reg = <24>;
974 atmel,clk-output-range = <0 133000000>;
975 };
976
977 spi1_clk: spi1_clk {
978 #clock-cells = <0>;
979 reg = <25>;
980 atmel,clk-output-range = <0 133000000>;
981 };
982
983 tcb0_clk: tcb0_clk {
984 #clock-cells = <0>;
985 reg = <26>;
986 atmel,clk-output-range = <0 133000000>;
987 };
988
989 pwm_clk: pwm_clk {
990 #clock-cells = <0>;
991 reg = <28>;
992 };
993
994 adc_clk: adc_clk {
995 #clock-cells = <0>;
996 reg = <29>;
997 atmel,clk-output-range = <0 66000000>;
998 };
999
1000 dma0_clk: dma0_clk {
1001 #clock-cells = <0>;
1002 reg = <30>;
1003 };
1004
1005 dma1_clk: dma1_clk {
1006 #clock-cells = <0>;
1007 reg = <31>;
1008 };
1009
1010 uhphs_clk: uhphs_clk {
1011 #clock-cells = <0>;
1012 reg = <32>;
1013 };
1014
1015 udphs_clk: udphs_clk {
1016 #clock-cells = <0>;
1017 reg = <33>;
1018 };
1019
1020 isi_clk: isi_clk {
1021 #clock-cells = <0>;
1022 reg = <37>;
1023 };
1024
1025 ssc0_clk: ssc0_clk {
1026 #clock-cells = <0>;
1027 reg = <38>;
1028 atmel,clk-output-range = <0 66000000>;
1029 };
1030
1031 ssc1_clk: ssc1_clk {
1032 #clock-cells = <0>;
1033 reg = <39>;
1034 atmel,clk-output-range = <0 66000000>;
1035 };
1036
1037 sha_clk: sha_clk {
1038 #clock-cells = <0>;
1039 reg = <42>;
1040 };
1041
1042 aes_clk: aes_clk {
1043 #clock-cells = <0>;
1044 reg = <43>;
1045 };
1046
1047 tdes_clk: tdes_clk {
1048 #clock-cells = <0>;
1049 reg = <44>;
1050 };
1051
1052 trng_clk: trng_clk {
1053 #clock-cells = <0>;
1054 reg = <45>;
1055 };
1056
1057 fuse_clk: fuse_clk {
1058 #clock-cells = <0>;
1059 reg = <48>;
1060 };
1061 };
675 }; 1062 };
676 1063
677 rstc@fffffe00 { 1064 rstc@fffffe00 {
@@ -683,6 +1070,7 @@
683 compatible = "atmel,at91sam9260-pit"; 1070 compatible = "atmel,at91sam9260-pit";
684 reg = <0xfffffe30 0xf>; 1071 reg = <0xfffffe30 0xf>;
685 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>; 1072 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>;
1073 clocks = <&mck>;
686 }; 1074 };
687 1075
688 watchdog@fffffe40 { 1076 watchdog@fffffe40 {
@@ -705,6 +1093,8 @@
705 reg = <0x00500000 0x100000 1093 reg = <0x00500000 0x100000
706 0xf8030000 0x4000>; 1094 0xf8030000 0x4000>;
707 interrupts = <33 IRQ_TYPE_LEVEL_HIGH 2>; 1095 interrupts = <33 IRQ_TYPE_LEVEL_HIGH 2>;
1096 clocks = <&udphs_clk>, <&utmi>;
1097 clock-names = "pclk", "hclk";
708 status = "disabled"; 1098 status = "disabled";
709 1099
710 ep0 { 1100 ep0 {
@@ -817,6 +1207,9 @@
817 compatible = "atmel,at91rm9200-ohci", "usb-ohci"; 1207 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
818 reg = <0x00600000 0x100000>; 1208 reg = <0x00600000 0x100000>;
819 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>; 1209 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>;
1210 clocks = <&usb>, <&uhphs_clk>, <&udphs_clk>,
1211 <&uhpck>;
1212 clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
820 status = "disabled"; 1213 status = "disabled";
821 }; 1214 };
822 1215
@@ -824,6 +1217,8 @@
824 compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; 1217 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
825 reg = <0x00700000 0x100000>; 1218 reg = <0x00700000 0x100000>;
826 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>; 1219 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>;
1220 clocks = <&usb>, <&uhphs_clk>, <&uhpck>;
1221 clock-names = "usb_clk", "ehci_clk", "uhpck";
827 status = "disabled"; 1222 status = "disabled";
828 }; 1223 };
829 1224
diff --git a/arch/arm/boot/dts/sama5d3_can.dtsi b/arch/arm/boot/dts/sama5d3_can.dtsi
index 8ed3260cef66..a0775851cce5 100644
--- a/arch/arm/boot/dts/sama5d3_can.dtsi
+++ b/arch/arm/boot/dts/sama5d3_can.dtsi
@@ -32,12 +32,30 @@
32 32
33 }; 33 };
34 34
35 pmc: pmc@fffffc00 {
36 periphck {
37 can0_clk: can0_clk {
38 #clock-cells = <0>;
39 reg = <40>;
40 atmel,clk-output-range = <0 66000000>;
41 };
42
43 can1_clk: can0_clk {
44 #clock-cells = <0>;
45 reg = <41>;
46 atmel,clk-output-range = <0 66000000>;
47 };
48 };
49 };
50
35 can0: can@f000c000 { 51 can0: can@f000c000 {
36 compatible = "atmel,at91sam9x5-can"; 52 compatible = "atmel,at91sam9x5-can";
37 reg = <0xf000c000 0x300>; 53 reg = <0xf000c000 0x300>;
38 interrupts = <40 IRQ_TYPE_LEVEL_HIGH 3>; 54 interrupts = <40 IRQ_TYPE_LEVEL_HIGH 3>;
39 pinctrl-names = "default"; 55 pinctrl-names = "default";
40 pinctrl-0 = <&pinctrl_can0_rx_tx>; 56 pinctrl-0 = <&pinctrl_can0_rx_tx>;
57 clocks = <&can0_clk>;
58 clock-names = "can_clk";
41 status = "disabled"; 59 status = "disabled";
42 }; 60 };
43 61
@@ -47,6 +65,8 @@
47 interrupts = <41 IRQ_TYPE_LEVEL_HIGH 3>; 65 interrupts = <41 IRQ_TYPE_LEVEL_HIGH 3>;
48 pinctrl-names = "default"; 66 pinctrl-names = "default";
49 pinctrl-0 = <&pinctrl_can1_rx_tx>; 67 pinctrl-0 = <&pinctrl_can1_rx_tx>;
68 clocks = <&can1_clk>;
69 clock-names = "can_clk";
50 status = "disabled"; 70 status = "disabled";
51 }; 71 };
52 }; 72 };
diff --git a/arch/arm/boot/dts/sama5d3_emac.dtsi b/arch/arm/boot/dts/sama5d3_emac.dtsi
index 4d4f351f1f9f..fe2af9276312 100644
--- a/arch/arm/boot/dts/sama5d3_emac.dtsi
+++ b/arch/arm/boot/dts/sama5d3_emac.dtsi
@@ -31,12 +31,23 @@
31 }; 31 };
32 }; 32 };
33 33
34 pmc: pmc@fffffc00 {
35 periphck {
36 macb1_clk: macb1_clk {
37 #clock-cells = <0>;
38 reg = <35>;
39 };
40 };
41 };
42
34 macb1: ethernet@f802c000 { 43 macb1: ethernet@f802c000 {
35 compatible = "cdns,at32ap7000-macb", "cdns,macb"; 44 compatible = "cdns,at32ap7000-macb", "cdns,macb";
36 reg = <0xf802c000 0x100>; 45 reg = <0xf802c000 0x100>;
37 interrupts = <35 IRQ_TYPE_LEVEL_HIGH 3>; 46 interrupts = <35 IRQ_TYPE_LEVEL_HIGH 3>;
38 pinctrl-names = "default"; 47 pinctrl-names = "default";
39 pinctrl-0 = <&pinctrl_macb1_rmii>; 48 pinctrl-0 = <&pinctrl_macb1_rmii>;
49 clocks = <&macb1_clk>, <&macb1_clk>;
50 clock-names = "hclk", "pclk";
40 status = "disabled"; 51 status = "disabled";
41 }; 52 };
42 }; 53 };
diff --git a/arch/arm/boot/dts/sama5d3_gmac.dtsi b/arch/arm/boot/dts/sama5d3_gmac.dtsi
index 0ba8be30ccd8..a6cb0508762f 100644
--- a/arch/arm/boot/dts/sama5d3_gmac.dtsi
+++ b/arch/arm/boot/dts/sama5d3_gmac.dtsi
@@ -64,12 +64,23 @@
64 }; 64 };
65 }; 65 };
66 66
67 pmc: pmc@fffffc00 {
68 periphck {
69 macb0_clk: macb0_clk {
70 #clock-cells = <0>;
71 reg = <34>;
72 };
73 };
74 };
75
67 macb0: ethernet@f0028000 { 76 macb0: ethernet@f0028000 {
68 compatible = "cdns,pc302-gem", "cdns,gem"; 77 compatible = "cdns,pc302-gem", "cdns,gem";
69 reg = <0xf0028000 0x100>; 78 reg = <0xf0028000 0x100>;
70 interrupts = <34 IRQ_TYPE_LEVEL_HIGH 3>; 79 interrupts = <34 IRQ_TYPE_LEVEL_HIGH 3>;
71 pinctrl-names = "default"; 80 pinctrl-names = "default";
72 pinctrl-0 = <&pinctrl_macb0_data_rgmii &pinctrl_macb0_signal_rgmii>; 81 pinctrl-0 = <&pinctrl_macb0_data_rgmii &pinctrl_macb0_signal_rgmii>;
82 clocks = <&macb0_clk>, <&macb0_clk>;
83 clock-names = "hclk", "pclk";
73 status = "disabled"; 84 status = "disabled";
74 }; 85 };
75 }; 86 };
diff --git a/arch/arm/boot/dts/sama5d3_lcd.dtsi b/arch/arm/boot/dts/sama5d3_lcd.dtsi
index 01f52a79f8ba..85d302701565 100644
--- a/arch/arm/boot/dts/sama5d3_lcd.dtsi
+++ b/arch/arm/boot/dts/sama5d3_lcd.dtsi
@@ -50,6 +50,23 @@
50 }; 50 };
51 }; 51 };
52 }; 52 };
53
54 pmc: pmc@fffffc00 {
55 periphck {
56 lcdc_clk: lcdc_clk {
57 #clock-cells = <0>;
58 reg = <36>;
59 };
60 };
61
62 systemck {
63 lcdck: lcdck {
64 #clock-cells = <0>;
65 reg = <3>;
66 clocks = <&mck>;
67 };
68 };
69 };
53 }; 70 };
54 }; 71 };
55}; 72};
diff --git a/arch/arm/boot/dts/sama5d3_mci2.dtsi b/arch/arm/boot/dts/sama5d3_mci2.dtsi
index 38e88e39e551..b029fe7ef17a 100644
--- a/arch/arm/boot/dts/sama5d3_mci2.dtsi
+++ b/arch/arm/boot/dts/sama5d3_mci2.dtsi
@@ -9,6 +9,7 @@
9 9
10#include <dt-bindings/pinctrl/at91.h> 10#include <dt-bindings/pinctrl/at91.h>
11#include <dt-bindings/interrupt-controller/irq.h> 11#include <dt-bindings/interrupt-controller/irq.h>
12#include <dt-bindings/clk/at91.h>
12 13
13/ { 14/ {
14 ahb { 15 ahb {
@@ -30,6 +31,15 @@
30 }; 31 };
31 }; 32 };
32 33
34 pmc: pmc@fffffc00 {
35 periphck {
36 mci2_clk: mci2_clk {
37 #clock-cells = <0>;
38 reg = <23>;
39 };
40 };
41 };
42
33 mmc2: mmc@f8004000 { 43 mmc2: mmc@f8004000 {
34 compatible = "atmel,hsmci"; 44 compatible = "atmel,hsmci";
35 reg = <0xf8004000 0x600>; 45 reg = <0xf8004000 0x600>;
@@ -38,6 +48,8 @@
38 dma-names = "rxtx"; 48 dma-names = "rxtx";
39 pinctrl-names = "default"; 49 pinctrl-names = "default";
40 pinctrl-0 = <&pinctrl_mmc2_clk_cmd_dat0 &pinctrl_mmc2_dat1_3>; 50 pinctrl-0 = <&pinctrl_mmc2_clk_cmd_dat0 &pinctrl_mmc2_dat1_3>;
51 clocks = <&mci2_clk>;
52 clock-names = "mci_clk";
41 status = "disabled"; 53 status = "disabled";
42 #address-cells = <1>; 54 #address-cells = <1>;
43 #size-cells = <0>; 55 #size-cells = <0>;
diff --git a/arch/arm/boot/dts/sama5d3_tcb1.dtsi b/arch/arm/boot/dts/sama5d3_tcb1.dtsi
index 5264bb4a6998..382b04431f66 100644
--- a/arch/arm/boot/dts/sama5d3_tcb1.dtsi
+++ b/arch/arm/boot/dts/sama5d3_tcb1.dtsi
@@ -9,6 +9,7 @@
9 9
10#include <dt-bindings/pinctrl/at91.h> 10#include <dt-bindings/pinctrl/at91.h>
11#include <dt-bindings/interrupt-controller/irq.h> 11#include <dt-bindings/interrupt-controller/irq.h>
12#include <dt-bindings/clk/at91.h>
12 13
13/ { 14/ {
14 aliases { 15 aliases {
@@ -17,10 +18,21 @@
17 18
18 ahb { 19 ahb {
19 apb { 20 apb {
21 pmc: pmc@fffffc00 {
22 periphck {
23 tcb1_clk: tcb1_clk {
24 #clock-cells = <0>;
25 reg = <27>;
26 };
27 };
28 };
29
20 tcb1: timer@f8014000 { 30 tcb1: timer@f8014000 {
21 compatible = "atmel,at91sam9x5-tcb"; 31 compatible = "atmel,at91sam9x5-tcb";
22 reg = <0xf8014000 0x100>; 32 reg = <0xf8014000 0x100>;
23 interrupts = <27 IRQ_TYPE_LEVEL_HIGH 0>; 33 interrupts = <27 IRQ_TYPE_LEVEL_HIGH 0>;
34 clocks = <&tcb1_clk>;
35 clock-names = "t0_clk";
24 }; 36 };
25 }; 37 };
26 }; 38 };
diff --git a/arch/arm/boot/dts/sama5d3_uart.dtsi b/arch/arm/boot/dts/sama5d3_uart.dtsi
index 98fcb2d57446..a9fa75e41652 100644
--- a/arch/arm/boot/dts/sama5d3_uart.dtsi
+++ b/arch/arm/boot/dts/sama5d3_uart.dtsi
@@ -9,8 +9,14 @@
9 9
10#include <dt-bindings/pinctrl/at91.h> 10#include <dt-bindings/pinctrl/at91.h>
11#include <dt-bindings/interrupt-controller/irq.h> 11#include <dt-bindings/interrupt-controller/irq.h>
12#include <dt-bindings/clk/at91.h>
12 13
13/ { 14/ {
15 aliases {
16 serial5 = &uart0;
17 serial6 = &uart1;
18 };
19
14 ahb { 20 ahb {
15 apb { 21 apb {
16 pinctrl@fffff200 { 22 pinctrl@fffff200 {
@@ -31,12 +37,30 @@
31 }; 37 };
32 }; 38 };
33 39
40 pmc: pmc@fffffc00 {
41 periphck {
42 uart0_clk: uart0_clk {
43 #clock-cells = <0>;
44 reg = <16>;
45 atmel,clk-output-range = <0 66000000>;
46 };
47
48 uart1_clk: uart1_clk {
49 #clock-cells = <0>;
50 reg = <17>;
51 atmel,clk-output-range = <0 66000000>;
52 };
53 };
54 };
55
34 uart0: serial@f0024000 { 56 uart0: serial@f0024000 {
35 compatible = "atmel,at91sam9260-usart"; 57 compatible = "atmel,at91sam9260-usart";
36 reg = <0xf0024000 0x200>; 58 reg = <0xf0024000 0x200>;
37 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>; 59 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
38 pinctrl-names = "default"; 60 pinctrl-names = "default";
39 pinctrl-0 = <&pinctrl_uart0>; 61 pinctrl-0 = <&pinctrl_uart0>;
62 clocks = <&uart0_clk>;
63 clock-names = "usart";
40 status = "disabled"; 64 status = "disabled";
41 }; 65 };
42 66
@@ -46,6 +70,8 @@
46 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>; 70 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>;
47 pinctrl-names = "default"; 71 pinctrl-names = "default";
48 pinctrl-0 = <&pinctrl_uart1>; 72 pinctrl-0 = <&pinctrl_uart1>;
73 clocks = <&uart1_clk>;
74 clock-names = "usart";
49 status = "disabled"; 75 status = "disabled";
50 }; 76 };
51 }; 77 };
diff --git a/arch/arm/boot/dts/sama5d3xcm.dtsi b/arch/arm/boot/dts/sama5d3xcm.dtsi
index 726a0f35100c..f55ed072c8e6 100644
--- a/arch/arm/boot/dts/sama5d3xcm.dtsi
+++ b/arch/arm/boot/dts/sama5d3xcm.dtsi
@@ -18,17 +18,6 @@
18 reg = <0x20000000 0x20000000>; 18 reg = <0x20000000 0x20000000>;
19 }; 19 };
20 20
21 clocks {
22 #address-cells = <1>;
23 #size-cells = <1>;
24 ranges;
25
26 main_clock: clock@0 {
27 compatible = "atmel,osc", "fixed-clock";
28 clock-frequency = <12000000>;
29 };
30 };
31
32 ahb { 21 ahb {
33 apb { 22 apb {
34 spi0: spi@f0004000 { 23 spi0: spi@f0004000 {
@@ -38,6 +27,12 @@
38 macb0: ethernet@f0028000 { 27 macb0: ethernet@f0028000 {
39 phy-mode = "rgmii"; 28 phy-mode = "rgmii";
40 }; 29 };
30
31 pmc: pmc@fffffc00 {
32 main: mainck {
33 clock-frequency = <12000000>;
34 };
35 };
41 }; 36 };
42 37
43 nand0: nand@60000000 { 38 nand0: nand@60000000 {
diff --git a/arch/arm/boot/dts/sama5d3xdm.dtsi b/arch/arm/boot/dts/sama5d3xdm.dtsi
index 1c296d6b2f2a..f9bdde542ced 100644
--- a/arch/arm/boot/dts/sama5d3xdm.dtsi
+++ b/arch/arm/boot/dts/sama5d3xdm.dtsi
@@ -18,6 +18,7 @@
18 interrupts = <31 0x0>; 18 interrupts = <31 0x0>;
19 pinctrl-names = "default"; 19 pinctrl-names = "default";
20 pinctrl-0 = <&pinctrl_qt1070_irq>; 20 pinctrl-0 = <&pinctrl_qt1070_irq>;
21 wakeup-source;
21 }; 22 };
22 }; 23 };
23 24
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 699b71e7f7ec..b4f7d6ffa30b 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -1,15 +1,33 @@
1if ARCH_AT91 1if ARCH_AT91
2 2
3config HAVE_AT91_UTMI
4 bool
5
6config HAVE_AT91_USB_CLK
7 bool
8
3config HAVE_AT91_DBGU0 9config HAVE_AT91_DBGU0
4 bool 10 bool
5 11
6config HAVE_AT91_DBGU1 12config HAVE_AT91_DBGU1
7 bool 13 bool
8 14
15config AT91_USE_OLD_CLK
16 bool
17
9config AT91_PMC_UNIT 18config AT91_PMC_UNIT
10 bool 19 bool
11 default !ARCH_AT91X40 20 default !ARCH_AT91X40
12 21
22config COMMON_CLK_AT91
23 bool
24 default AT91_PMC_UNIT && USE_OF && !AT91_USE_OLD_CLK
25 select COMMON_CLK
26
27config OLD_CLK_AT91
28 bool
29 default AT91_PMC_UNIT && AT91_USE_OLD_CLK
30
13config AT91_SAM9_ALT_RESET 31config AT91_SAM9_ALT_RESET
14 bool 32 bool
15 default !ARCH_AT91X40 33 default !ARCH_AT91X40
@@ -21,6 +39,9 @@ config AT91_SAM9G45_RESET
21config AT91_SAM9_TIME 39config AT91_SAM9_TIME
22 bool 40 bool
23 41
42config HAVE_AT91_SMD
43 bool
44
24config SOC_AT91SAM9 45config SOC_AT91SAM9
25 bool 46 bool
26 select AT91_SAM9_TIME 47 select AT91_SAM9_TIME
@@ -65,6 +86,9 @@ config SOC_SAMA5D3
65 select SOC_SAMA5 86 select SOC_SAMA5
66 select HAVE_FB_ATMEL 87 select HAVE_FB_ATMEL
67 select HAVE_AT91_DBGU1 88 select HAVE_AT91_DBGU1
89 select HAVE_AT91_UTMI
90 select HAVE_AT91_SMD
91 select HAVE_AT91_USB_CLK
68 help 92 help
69 Select this if you are using one of Atmel's SAMA5D3 family SoC. 93 Select this if you are using one of Atmel's SAMA5D3 family SoC.
70 This support covers SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35. 94 This support covers SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35.
@@ -78,11 +102,15 @@ config SOC_AT91RM9200
78 select HAVE_AT91_DBGU0 102 select HAVE_AT91_DBGU0
79 select MULTI_IRQ_HANDLER 103 select MULTI_IRQ_HANDLER
80 select SPARSE_IRQ 104 select SPARSE_IRQ
105 select AT91_USE_OLD_CLK
106 select HAVE_AT91_USB_CLK
81 107
82config SOC_AT91SAM9260 108config SOC_AT91SAM9260
83 bool "AT91SAM9260, AT91SAM9XE or AT91SAM9G20" 109 bool "AT91SAM9260, AT91SAM9XE or AT91SAM9G20"
84 select HAVE_AT91_DBGU0 110 select HAVE_AT91_DBGU0
85 select SOC_AT91SAM9 111 select SOC_AT91SAM9
112 select AT91_USE_OLD_CLK
113 select HAVE_AT91_USB_CLK
86 help 114 help
87 Select this if you are using one of Atmel's AT91SAM9260, AT91SAM9XE 115 Select this if you are using one of Atmel's AT91SAM9260, AT91SAM9XE
88 or AT91SAM9G20 SoC. 116 or AT91SAM9G20 SoC.
@@ -92,6 +120,8 @@ config SOC_AT91SAM9261
92 select HAVE_AT91_DBGU0 120 select HAVE_AT91_DBGU0
93 select HAVE_FB_ATMEL 121 select HAVE_FB_ATMEL
94 select SOC_AT91SAM9 122 select SOC_AT91SAM9
123 select AT91_USE_OLD_CLK
124 select HAVE_AT91_USB_CLK
95 help 125 help
96 Select this if you are using one of Atmel's AT91SAM9261 or AT91SAM9G10 SoC. 126 Select this if you are using one of Atmel's AT91SAM9261 or AT91SAM9G10 SoC.
97 127
@@ -100,18 +130,25 @@ config SOC_AT91SAM9263
100 select HAVE_AT91_DBGU1 130 select HAVE_AT91_DBGU1
101 select HAVE_FB_ATMEL 131 select HAVE_FB_ATMEL
102 select SOC_AT91SAM9 132 select SOC_AT91SAM9
133 select AT91_USE_OLD_CLK
134 select HAVE_AT91_USB_CLK
103 135
104config SOC_AT91SAM9RL 136config SOC_AT91SAM9RL
105 bool "AT91SAM9RL" 137 bool "AT91SAM9RL"
106 select HAVE_AT91_DBGU0 138 select HAVE_AT91_DBGU0
107 select HAVE_FB_ATMEL 139 select HAVE_FB_ATMEL
108 select SOC_AT91SAM9 140 select SOC_AT91SAM9
141 select AT91_USE_OLD_CLK
142 select HAVE_AT91_UTMI
109 143
110config SOC_AT91SAM9G45 144config SOC_AT91SAM9G45
111 bool "AT91SAM9G45 or AT91SAM9M10 families" 145 bool "AT91SAM9G45 or AT91SAM9M10 families"
112 select HAVE_AT91_DBGU1 146 select HAVE_AT91_DBGU1
113 select HAVE_FB_ATMEL 147 select HAVE_FB_ATMEL
114 select SOC_AT91SAM9 148 select SOC_AT91SAM9
149 select AT91_USE_OLD_CLK
150 select HAVE_AT91_UTMI
151 select HAVE_AT91_USB_CLK
115 help 152 help
116 Select this if you are using one of Atmel's AT91SAM9G45 family SoC. 153 Select this if you are using one of Atmel's AT91SAM9G45 family SoC.
117 This support covers AT91SAM9G45, AT91SAM9G46, AT91SAM9M10 and AT91SAM9M11. 154 This support covers AT91SAM9G45, AT91SAM9G46, AT91SAM9M10 and AT91SAM9M11.
@@ -121,6 +158,10 @@ config SOC_AT91SAM9X5
121 select HAVE_AT91_DBGU0 158 select HAVE_AT91_DBGU0
122 select HAVE_FB_ATMEL 159 select HAVE_FB_ATMEL
123 select SOC_AT91SAM9 160 select SOC_AT91SAM9
161 select AT91_USE_OLD_CLK
162 select HAVE_AT91_UTMI
163 select HAVE_AT91_SMD
164 select HAVE_AT91_USB_CLK
124 help 165 help
125 Select this if you are using one of Atmel's AT91SAM9x5 family SoC. 166 Select this if you are using one of Atmel's AT91SAM9x5 family SoC.
126 This means that your SAM9 name finishes with a '5' (except if it is 167 This means that your SAM9 name finishes with a '5' (except if it is
@@ -133,6 +174,8 @@ config SOC_AT91SAM9N12
133 select HAVE_AT91_DBGU0 174 select HAVE_AT91_DBGU0
134 select HAVE_FB_ATMEL 175 select HAVE_FB_ATMEL
135 select SOC_AT91SAM9 176 select SOC_AT91SAM9
177 select AT91_USE_OLD_CLK
178 select HAVE_AT91_USB_CLK
136 help 179 help
137 Select this if you are using Atmel's AT91SAM9N12 SoC. 180 Select this if you are using Atmel's AT91SAM9N12 SoC.
138 181
diff --git a/arch/arm/mach-at91/Kconfig.non_dt b/arch/arm/mach-at91/Kconfig.non_dt
index ca900be144ce..b736b571e882 100644
--- a/arch/arm/mach-at91/Kconfig.non_dt
+++ b/arch/arm/mach-at91/Kconfig.non_dt
@@ -12,26 +12,32 @@ config ARCH_AT91_NONE
12config ARCH_AT91RM9200 12config ARCH_AT91RM9200
13 bool "AT91RM9200" 13 bool "AT91RM9200"
14 select SOC_AT91RM9200 14 select SOC_AT91RM9200
15 select AT91_USE_OLD_CLK
15 16
16config ARCH_AT91SAM9260 17config ARCH_AT91SAM9260
17 bool "AT91SAM9260 or AT91SAM9XE or AT91SAM9G20" 18 bool "AT91SAM9260 or AT91SAM9XE or AT91SAM9G20"
18 select SOC_AT91SAM9260 19 select SOC_AT91SAM9260
20 select AT91_USE_OLD_CLK
19 21
20config ARCH_AT91SAM9261 22config ARCH_AT91SAM9261
21 bool "AT91SAM9261 or AT91SAM9G10" 23 bool "AT91SAM9261 or AT91SAM9G10"
22 select SOC_AT91SAM9261 24 select SOC_AT91SAM9261
25 select AT91_USE_OLD_CLK
23 26
24config ARCH_AT91SAM9263 27config ARCH_AT91SAM9263
25 bool "AT91SAM9263" 28 bool "AT91SAM9263"
26 select SOC_AT91SAM9263 29 select SOC_AT91SAM9263
30 select AT91_USE_OLD_CLK
27 31
28config ARCH_AT91SAM9RL 32config ARCH_AT91SAM9RL
29 bool "AT91SAM9RL" 33 bool "AT91SAM9RL"
30 select SOC_AT91SAM9RL 34 select SOC_AT91SAM9RL
35 select AT91_USE_OLD_CLK
31 36
32config ARCH_AT91SAM9G45 37config ARCH_AT91SAM9G45
33 bool "AT91SAM9G45" 38 bool "AT91SAM9G45"
34 select SOC_AT91SAM9G45 39 select SOC_AT91SAM9G45
40 select AT91_USE_OLD_CLK
35 41
36config ARCH_AT91X40 42config ARCH_AT91X40
37 bool "AT91x40" 43 bool "AT91x40"
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index 90aab2d5a07f..705b38a179ec 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -7,7 +7,7 @@ obj-m :=
7obj-n := 7obj-n :=
8obj- := 8obj- :=
9 9
10obj-$(CONFIG_AT91_PMC_UNIT) += clock.o 10obj-$(CONFIG_OLD_CLK_AT91) += clock.o
11obj-$(CONFIG_AT91_SAM9_ALT_RESET) += at91sam9_alt_reset.o 11obj-$(CONFIG_AT91_SAM9_ALT_RESET) += at91sam9_alt_reset.o
12obj-$(CONFIG_AT91_SAM9G45_RESET) += at91sam9g45_reset.o 12obj-$(CONFIG_AT91_SAM9G45_RESET) += at91sam9g45_reset.o
13obj-$(CONFIG_AT91_SAM9_TIME) += at91sam926x_time.o 13obj-$(CONFIG_AT91_SAM9_TIME) += at91sam926x_time.o
diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
index 25805f2f6010..e47f5fd232f5 100644
--- a/arch/arm/mach-at91/at91rm9200.c
+++ b/arch/arm/mach-at91/at91rm9200.c
@@ -12,13 +12,13 @@
12 12
13#include <linux/module.h> 13#include <linux/module.h>
14#include <linux/reboot.h> 14#include <linux/reboot.h>
15#include <linux/clk/at91_pmc.h>
15 16
16#include <asm/irq.h> 17#include <asm/irq.h>
17#include <asm/mach/arch.h> 18#include <asm/mach/arch.h>
18#include <asm/mach/map.h> 19#include <asm/mach/map.h>
19#include <asm/system_misc.h> 20#include <asm/system_misc.h>
20#include <mach/at91rm9200.h> 21#include <mach/at91rm9200.h>
21#include <mach/at91_pmc.h>
22#include <mach/at91_st.h> 22#include <mach/at91_st.h>
23#include <mach/cpu.h> 23#include <mach/cpu.h>
24 24
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c
index d6a1fa85371d..6c821e562159 100644
--- a/arch/arm/mach-at91/at91sam9260.c
+++ b/arch/arm/mach-at91/at91sam9260.c
@@ -11,6 +11,7 @@
11 */ 11 */
12 12
13#include <linux/module.h> 13#include <linux/module.h>
14#include <linux/clk/at91_pmc.h>
14 15
15#include <asm/proc-fns.h> 16#include <asm/proc-fns.h>
16#include <asm/irq.h> 17#include <asm/irq.h>
@@ -20,7 +21,6 @@
20#include <mach/cpu.h> 21#include <mach/cpu.h>
21#include <mach/at91_dbgu.h> 22#include <mach/at91_dbgu.h>
22#include <mach/at91sam9260.h> 23#include <mach/at91sam9260.h>
23#include <mach/at91_pmc.h>
24 24
25#include "at91_aic.h" 25#include "at91_aic.h"
26#include "at91_rstc.h" 26#include "at91_rstc.h"
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c
index 23ba1d8a1531..6276b4c1acfe 100644
--- a/arch/arm/mach-at91/at91sam9261.c
+++ b/arch/arm/mach-at91/at91sam9261.c
@@ -11,6 +11,7 @@
11 */ 11 */
12 12
13#include <linux/module.h> 13#include <linux/module.h>
14#include <linux/clk/at91_pmc.h>
14 15
15#include <asm/proc-fns.h> 16#include <asm/proc-fns.h>
16#include <asm/irq.h> 17#include <asm/irq.h>
@@ -19,7 +20,6 @@
19#include <asm/system_misc.h> 20#include <asm/system_misc.h>
20#include <mach/cpu.h> 21#include <mach/cpu.h>
21#include <mach/at91sam9261.h> 22#include <mach/at91sam9261.h>
22#include <mach/at91_pmc.h>
23 23
24#include "at91_aic.h" 24#include "at91_aic.h"
25#include "at91_rstc.h" 25#include "at91_rstc.h"
diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c
index 7eccb0fc57bc..37b90f4b990c 100644
--- a/arch/arm/mach-at91/at91sam9263.c
+++ b/arch/arm/mach-at91/at91sam9263.c
@@ -11,6 +11,7 @@
11 */ 11 */
12 12
13#include <linux/module.h> 13#include <linux/module.h>
14#include <linux/clk/at91_pmc.h>
14 15
15#include <asm/proc-fns.h> 16#include <asm/proc-fns.h>
16#include <asm/irq.h> 17#include <asm/irq.h>
@@ -18,7 +19,6 @@
18#include <asm/mach/map.h> 19#include <asm/mach/map.h>
19#include <asm/system_misc.h> 20#include <asm/system_misc.h>
20#include <mach/at91sam9263.h> 21#include <mach/at91sam9263.h>
21#include <mach/at91_pmc.h>
22 22
23#include "at91_aic.h" 23#include "at91_aic.h"
24#include "at91_rstc.h" 24#include "at91_rstc.h"
diff --git a/arch/arm/mach-at91/at91sam926x_time.c b/arch/arm/mach-at91/at91sam926x_time.c
index bb392320a0dd..0f04ffe9c5a8 100644
--- a/arch/arm/mach-at91/at91sam926x_time.c
+++ b/arch/arm/mach-at91/at91sam926x_time.c
@@ -39,6 +39,7 @@
39static u32 pit_cycle; /* write-once */ 39static u32 pit_cycle; /* write-once */
40static u32 pit_cnt; /* access only w/system irq blocked */ 40static u32 pit_cnt; /* access only w/system irq blocked */
41static void __iomem *pit_base_addr __read_mostly; 41static void __iomem *pit_base_addr __read_mostly;
42static struct clk *mck;
42 43
43static inline unsigned int pit_read(unsigned int reg_offset) 44static inline unsigned int pit_read(unsigned int reg_offset)
44{ 45{
@@ -195,10 +196,14 @@ static int __init of_at91sam926x_pit_init(void)
195 if (!pit_base_addr) 196 if (!pit_base_addr)
196 goto node_err; 197 goto node_err;
197 198
199 mck = of_clk_get(np, 0);
200
198 /* Get the interrupts property */ 201 /* Get the interrupts property */
199 ret = irq_of_parse_and_map(np, 0); 202 ret = irq_of_parse_and_map(np, 0);
200 if (!ret) { 203 if (!ret) {
201 pr_crit("AT91: PIT: Unable to get IRQ from DT\n"); 204 pr_crit("AT91: PIT: Unable to get IRQ from DT\n");
205 if (!IS_ERR(mck))
206 clk_put(mck);
202 goto ioremap_err; 207 goto ioremap_err;
203 } 208 }
204 at91sam926x_pit_irq.irq = ret; 209 at91sam926x_pit_irq.irq = ret;
@@ -230,6 +235,8 @@ void __init at91sam926x_pit_init(void)
230 unsigned bits; 235 unsigned bits;
231 int ret; 236 int ret;
232 237
238 mck = ERR_PTR(-ENOENT);
239
233 /* For device tree enabled device: initialize here */ 240 /* For device tree enabled device: initialize here */
234 of_at91sam926x_pit_init(); 241 of_at91sam926x_pit_init();
235 242
@@ -237,7 +244,12 @@ void __init at91sam926x_pit_init(void)
237 * Use our actual MCK to figure out how many MCK/16 ticks per 244 * Use our actual MCK to figure out how many MCK/16 ticks per
238 * 1/HZ period (instead of a compile-time constant LATCH). 245 * 1/HZ period (instead of a compile-time constant LATCH).
239 */ 246 */
240 pit_rate = clk_get_rate(clk_get(NULL, "mck")) / 16; 247 if (IS_ERR(mck))
248 mck = clk_get(NULL, "mck");
249
250 if (IS_ERR(mck))
251 panic("AT91: PIT: Unable to get mck clk\n");
252 pit_rate = clk_get_rate(mck) / 16;
241 pit_cycle = (pit_rate + HZ/2) / HZ; 253 pit_cycle = (pit_rate + HZ/2) / HZ;
242 WARN_ON(((pit_cycle - 1) & ~AT91_PIT_PIV) != 0); 254 WARN_ON(((pit_cycle - 1) & ~AT91_PIT_PIV) != 0);
243 255
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
index 9405aa08b104..2f455ce35268 100644
--- a/arch/arm/mach-at91/at91sam9g45.c
+++ b/arch/arm/mach-at91/at91sam9g45.c
@@ -12,13 +12,13 @@
12 12
13#include <linux/module.h> 13#include <linux/module.h>
14#include <linux/dma-mapping.h> 14#include <linux/dma-mapping.h>
15#include <linux/clk/at91_pmc.h>
15 16
16#include <asm/irq.h> 17#include <asm/irq.h>
17#include <asm/mach/arch.h> 18#include <asm/mach/arch.h>
18#include <asm/mach/map.h> 19#include <asm/mach/map.h>
19#include <asm/system_misc.h> 20#include <asm/system_misc.h>
20#include <mach/at91sam9g45.h> 21#include <mach/at91sam9g45.h>
21#include <mach/at91_pmc.h>
22#include <mach/cpu.h> 22#include <mach/cpu.h>
23 23
24#include "at91_aic.h" 24#include "at91_aic.h"
diff --git a/arch/arm/mach-at91/at91sam9n12.c b/arch/arm/mach-at91/at91sam9n12.c
index 388ec3aec4b9..4ef088c62eab 100644
--- a/arch/arm/mach-at91/at91sam9n12.c
+++ b/arch/arm/mach-at91/at91sam9n12.c
@@ -8,12 +8,12 @@
8 8
9#include <linux/module.h> 9#include <linux/module.h>
10#include <linux/dma-mapping.h> 10#include <linux/dma-mapping.h>
11#include <linux/clk/at91_pmc.h>
11 12
12#include <asm/irq.h> 13#include <asm/irq.h>
13#include <asm/mach/arch.h> 14#include <asm/mach/arch.h>
14#include <asm/mach/map.h> 15#include <asm/mach/map.h>
15#include <mach/at91sam9n12.h> 16#include <mach/at91sam9n12.h>
16#include <mach/at91_pmc.h>
17#include <mach/cpu.h> 17#include <mach/cpu.h>
18 18
19#include "board.h" 19#include "board.h"
diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c
index 0750ffb7e6b1..3651517abedf 100644
--- a/arch/arm/mach-at91/at91sam9rl.c
+++ b/arch/arm/mach-at91/at91sam9rl.c
@@ -10,6 +10,7 @@
10 */ 10 */
11 11
12#include <linux/module.h> 12#include <linux/module.h>
13#include <linux/clk/at91_pmc.h>
13 14
14#include <asm/proc-fns.h> 15#include <asm/proc-fns.h>
15#include <asm/irq.h> 16#include <asm/irq.h>
@@ -19,7 +20,6 @@
19#include <mach/cpu.h> 20#include <mach/cpu.h>
20#include <mach/at91_dbgu.h> 21#include <mach/at91_dbgu.h>
21#include <mach/at91sam9rl.h> 22#include <mach/at91sam9rl.h>
22#include <mach/at91_pmc.h>
23 23
24#include "at91_aic.h" 24#include "at91_aic.h"
25#include "at91_rstc.h" 25#include "at91_rstc.h"
diff --git a/arch/arm/mach-at91/at91sam9x5.c b/arch/arm/mach-at91/at91sam9x5.c
index e8a2e075a1b8..3e8ec26e39dc 100644
--- a/arch/arm/mach-at91/at91sam9x5.c
+++ b/arch/arm/mach-at91/at91sam9x5.c
@@ -8,12 +8,12 @@
8 8
9#include <linux/module.h> 9#include <linux/module.h>
10#include <linux/dma-mapping.h> 10#include <linux/dma-mapping.h>
11#include <linux/clk/at91_pmc.h>
11 12
12#include <asm/irq.h> 13#include <asm/irq.h>
13#include <asm/mach/arch.h> 14#include <asm/mach/arch.h>
14#include <asm/mach/map.h> 15#include <asm/mach/map.h>
15#include <mach/at91sam9x5.h> 16#include <mach/at91sam9x5.h>
16#include <mach/at91_pmc.h>
17#include <mach/cpu.h> 17#include <mach/cpu.h>
18 18
19#include "board.h" 19#include "board.h"
diff --git a/arch/arm/mach-at91/board-dt-sama5.c b/arch/arm/mach-at91/board-dt-sama5.c
index bf00d15d954d..075ec0576ada 100644
--- a/arch/arm/mach-at91/board-dt-sama5.c
+++ b/arch/arm/mach-at91/board-dt-sama5.c
@@ -16,6 +16,7 @@
16#include <linux/of_irq.h> 16#include <linux/of_irq.h>
17#include <linux/of_platform.h> 17#include <linux/of_platform.h>
18#include <linux/phy.h> 18#include <linux/phy.h>
19#include <linux/clk-provider.h>
19 20
20#include <asm/setup.h> 21#include <asm/setup.h>
21#include <asm/irq.h> 22#include <asm/irq.h>
@@ -26,6 +27,13 @@
26#include "at91_aic.h" 27#include "at91_aic.h"
27#include "generic.h" 28#include "generic.h"
28 29
30static void __init sama5_dt_timer_init(void)
31{
32#if defined(CONFIG_COMMON_CLK)
33 of_clk_init(NULL);
34#endif
35 at91sam926x_pit_init();
36}
29 37
30static const struct of_device_id irq_of_match[] __initconst = { 38static const struct of_device_id irq_of_match[] __initconst = {
31 39
@@ -72,7 +80,7 @@ static const char *sama5_dt_board_compat[] __initdata = {
72 80
73DT_MACHINE_START(sama5_dt, "Atmel SAMA5 (Device Tree)") 81DT_MACHINE_START(sama5_dt, "Atmel SAMA5 (Device Tree)")
74 /* Maintainer: Atmel */ 82 /* Maintainer: Atmel */
75 .init_time = at91sam926x_pit_init, 83 .init_time = sama5_dt_timer_init,
76 .map_io = at91_map_io, 84 .map_io = at91_map_io,
77 .handle_irq = at91_aic5_handle_irq, 85 .handle_irq = at91_aic5_handle_irq,
78 .init_early = at91_dt_initialize, 86 .init_early = at91_dt_initialize,
diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c
index 6b2630a92f71..72b257944733 100644
--- a/arch/arm/mach-at91/clock.c
+++ b/arch/arm/mach-at91/clock.c
@@ -24,9 +24,9 @@
24#include <linux/clk.h> 24#include <linux/clk.h>
25#include <linux/io.h> 25#include <linux/io.h>
26#include <linux/of_address.h> 26#include <linux/of_address.h>
27#include <linux/clk/at91_pmc.h>
27 28
28#include <mach/hardware.h> 29#include <mach/hardware.h>
29#include <mach/at91_pmc.h>
30#include <mach/cpu.h> 30#include <mach/cpu.h>
31 31
32#include <asm/proc-fns.h> 32#include <asm/proc-fns.h>
@@ -884,6 +884,11 @@ static int __init at91_pmc_init(unsigned long main_clock)
884#if defined(CONFIG_OF) 884#if defined(CONFIG_OF)
885static struct of_device_id pmc_ids[] = { 885static struct of_device_id pmc_ids[] = {
886 { .compatible = "atmel,at91rm9200-pmc" }, 886 { .compatible = "atmel,at91rm9200-pmc" },
887 { .compatible = "atmel,at91sam9260-pmc" },
888 { .compatible = "atmel,at91sam9g45-pmc" },
889 { .compatible = "atmel,at91sam9n12-pmc" },
890 { .compatible = "atmel,at91sam9x5-pmc" },
891 { .compatible = "atmel,sama5d3-pmc" },
887 { /*sentinel*/ } 892 { /*sentinel*/ }
888}; 893};
889 894
diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h
index 26dee3ce9397..631fa3b8c16d 100644
--- a/arch/arm/mach-at91/generic.h
+++ b/arch/arm/mach-at91/generic.h
@@ -46,11 +46,12 @@ extern void at91sam926x_pit_init(void);
46extern void at91x40_timer_init(void); 46extern void at91x40_timer_init(void);
47 47
48 /* Clocks */ 48 /* Clocks */
49#ifdef CONFIG_AT91_PMC_UNIT 49#ifdef CONFIG_OLD_CLK_AT91
50extern int __init at91_clock_init(unsigned long main_clock); 50extern int __init at91_clock_init(unsigned long main_clock);
51extern int __init at91_dt_clock_init(void); 51extern int __init at91_dt_clock_init(void);
52#else 52#else
53static int inline at91_clock_init(unsigned long main_clock) { return 0; } 53static int inline at91_clock_init(unsigned long main_clock) { return 0; }
54static int inline at91_dt_clock_init(void) { return 0; }
54#endif 55#endif
55struct device; 56struct device;
56 57
diff --git a/arch/arm/mach-at91/include/mach/at91_pmc.h b/arch/arm/mach-at91/include/mach/at91_pmc.h
deleted file mode 100644
index c604cc69acb5..000000000000
--- a/arch/arm/mach-at91/include/mach/at91_pmc.h
+++ /dev/null
@@ -1,190 +0,0 @@
1/*
2 * arch/arm/mach-at91/include/mach/at91_pmc.h
3 *
4 * Copyright (C) 2005 Ivan Kokshaysky
5 * Copyright (C) SAN People
6 *
7 * Power Management Controller (PMC) - System peripherals registers.
8 * Based on AT91RM9200 datasheet revision E.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 */
15
16#ifndef AT91_PMC_H
17#define AT91_PMC_H
18
19#ifndef __ASSEMBLY__
20extern void __iomem *at91_pmc_base;
21
22#define at91_pmc_read(field) \
23 __raw_readl(at91_pmc_base + field)
24
25#define at91_pmc_write(field, value) \
26 __raw_writel(value, at91_pmc_base + field)
27#else
28.extern at91_pmc_base
29#endif
30
31#define AT91_PMC_SCER 0x00 /* System Clock Enable Register */
32#define AT91_PMC_SCDR 0x04 /* System Clock Disable Register */
33
34#define AT91_PMC_SCSR 0x08 /* System Clock Status Register */
35#define AT91_PMC_PCK (1 << 0) /* Processor Clock */
36#define AT91RM9200_PMC_UDP (1 << 1) /* USB Devcice Port Clock [AT91RM9200 only] */
37#define AT91RM9200_PMC_MCKUDP (1 << 2) /* USB Device Port Master Clock Automatic Disable on Suspend [AT91RM9200 only] */
38#define AT91RM9200_PMC_UHP (1 << 4) /* USB Host Port Clock [AT91RM9200 only] */
39#define AT91SAM926x_PMC_UHP (1 << 6) /* USB Host Port Clock [AT91SAM926x only] */
40#define AT91SAM926x_PMC_UDP (1 << 7) /* USB Devcice Port Clock [AT91SAM926x only] */
41#define AT91_PMC_PCK0 (1 << 8) /* Programmable Clock 0 */
42#define AT91_PMC_PCK1 (1 << 9) /* Programmable Clock 1 */
43#define AT91_PMC_PCK2 (1 << 10) /* Programmable Clock 2 */
44#define AT91_PMC_PCK3 (1 << 11) /* Programmable Clock 3 */
45#define AT91_PMC_PCK4 (1 << 12) /* Programmable Clock 4 [AT572D940HF only] */
46#define AT91_PMC_HCK0 (1 << 16) /* AHB Clock (USB host) [AT91SAM9261 only] */
47#define AT91_PMC_HCK1 (1 << 17) /* AHB Clock (LCD) [AT91SAM9261 only] */
48
49#define AT91_PMC_PCER 0x10 /* Peripheral Clock Enable Register */
50#define AT91_PMC_PCDR 0x14 /* Peripheral Clock Disable Register */
51#define AT91_PMC_PCSR 0x18 /* Peripheral Clock Status Register */
52
53#define AT91_CKGR_UCKR 0x1C /* UTMI Clock Register [some SAM9] */
54#define AT91_PMC_UPLLEN (1 << 16) /* UTMI PLL Enable */
55#define AT91_PMC_UPLLCOUNT (0xf << 20) /* UTMI PLL Start-up Time */
56#define AT91_PMC_BIASEN (1 << 24) /* UTMI BIAS Enable */
57#define AT91_PMC_BIASCOUNT (0xf << 28) /* UTMI BIAS Start-up Time */
58
59#define AT91_CKGR_MOR 0x20 /* Main Oscillator Register [not on SAM9RL] */
60#define AT91_PMC_MOSCEN (1 << 0) /* Main Oscillator Enable */
61#define AT91_PMC_OSCBYPASS (1 << 1) /* Oscillator Bypass */
62#define AT91_PMC_MOSCRCEN (1 << 3) /* Main On-Chip RC Oscillator Enable [some SAM9] */
63#define AT91_PMC_OSCOUNT (0xff << 8) /* Main Oscillator Start-up Time */
64#define AT91_PMC_KEY (0x37 << 16) /* MOR Writing Key */
65#define AT91_PMC_MOSCSEL (1 << 24) /* Main Oscillator Selection [some SAM9] */
66#define AT91_PMC_CFDEN (1 << 25) /* Clock Failure Detector Enable [some SAM9] */
67
68#define AT91_CKGR_MCFR 0x24 /* Main Clock Frequency Register */
69#define AT91_PMC_MAINF (0xffff << 0) /* Main Clock Frequency */
70#define AT91_PMC_MAINRDY (1 << 16) /* Main Clock Ready */
71
72#define AT91_CKGR_PLLAR 0x28 /* PLL A Register */
73#define AT91_CKGR_PLLBR 0x2c /* PLL B Register */
74#define AT91_PMC_DIV (0xff << 0) /* Divider */
75#define AT91_PMC_PLLCOUNT (0x3f << 8) /* PLL Counter */
76#define AT91_PMC_OUT (3 << 14) /* PLL Clock Frequency Range */
77#define AT91_PMC_MUL (0x7ff << 16) /* PLL Multiplier */
78#define AT91_PMC_MUL_GET(n) ((n) >> 16 & 0x7ff)
79#define AT91_PMC3_MUL (0x7f << 18) /* PLL Multiplier [SAMA5 only] */
80#define AT91_PMC3_MUL_GET(n) ((n) >> 18 & 0x7f)
81#define AT91_PMC_USBDIV (3 << 28) /* USB Divisor (PLLB only) */
82#define AT91_PMC_USBDIV_1 (0 << 28)
83#define AT91_PMC_USBDIV_2 (1 << 28)
84#define AT91_PMC_USBDIV_4 (2 << 28)
85#define AT91_PMC_USB96M (1 << 28) /* Divider by 2 Enable (PLLB only) */
86
87#define AT91_PMC_MCKR 0x30 /* Master Clock Register */
88#define AT91_PMC_CSS (3 << 0) /* Master Clock Selection */
89#define AT91_PMC_CSS_SLOW (0 << 0)
90#define AT91_PMC_CSS_MAIN (1 << 0)
91#define AT91_PMC_CSS_PLLA (2 << 0)
92#define AT91_PMC_CSS_PLLB (3 << 0)
93#define AT91_PMC_CSS_UPLL (3 << 0) /* [some SAM9 only] */
94#define PMC_PRES_OFFSET 2
95#define AT91_PMC_PRES (7 << PMC_PRES_OFFSET) /* Master Clock Prescaler */
96#define AT91_PMC_PRES_1 (0 << PMC_PRES_OFFSET)
97#define AT91_PMC_PRES_2 (1 << PMC_PRES_OFFSET)
98#define AT91_PMC_PRES_4 (2 << PMC_PRES_OFFSET)
99#define AT91_PMC_PRES_8 (3 << PMC_PRES_OFFSET)
100#define AT91_PMC_PRES_16 (4 << PMC_PRES_OFFSET)
101#define AT91_PMC_PRES_32 (5 << PMC_PRES_OFFSET)
102#define AT91_PMC_PRES_64 (6 << PMC_PRES_OFFSET)
103#define PMC_ALT_PRES_OFFSET 4
104#define AT91_PMC_ALT_PRES (7 << PMC_ALT_PRES_OFFSET) /* Master Clock Prescaler [alternate location] */
105#define AT91_PMC_ALT_PRES_1 (0 << PMC_ALT_PRES_OFFSET)
106#define AT91_PMC_ALT_PRES_2 (1 << PMC_ALT_PRES_OFFSET)
107#define AT91_PMC_ALT_PRES_4 (2 << PMC_ALT_PRES_OFFSET)
108#define AT91_PMC_ALT_PRES_8 (3 << PMC_ALT_PRES_OFFSET)
109#define AT91_PMC_ALT_PRES_16 (4 << PMC_ALT_PRES_OFFSET)
110#define AT91_PMC_ALT_PRES_32 (5 << PMC_ALT_PRES_OFFSET)
111#define AT91_PMC_ALT_PRES_64 (6 << PMC_ALT_PRES_OFFSET)
112#define AT91_PMC_MDIV (3 << 8) /* Master Clock Division */
113#define AT91RM9200_PMC_MDIV_1 (0 << 8) /* [AT91RM9200 only] */
114#define AT91RM9200_PMC_MDIV_2 (1 << 8)
115#define AT91RM9200_PMC_MDIV_3 (2 << 8)
116#define AT91RM9200_PMC_MDIV_4 (3 << 8)
117#define AT91SAM9_PMC_MDIV_1 (0 << 8) /* [SAM9 only] */
118#define AT91SAM9_PMC_MDIV_2 (1 << 8)
119#define AT91SAM9_PMC_MDIV_4 (2 << 8)
120#define AT91SAM9_PMC_MDIV_6 (3 << 8) /* [some SAM9 only] */
121#define AT91SAM9_PMC_MDIV_3 (3 << 8) /* [some SAM9 only] */
122#define AT91_PMC_PDIV (1 << 12) /* Processor Clock Division [some SAM9 only] */
123#define AT91_PMC_PDIV_1 (0 << 12)
124#define AT91_PMC_PDIV_2 (1 << 12)
125#define AT91_PMC_PLLADIV2 (1 << 12) /* PLLA divisor by 2 [some SAM9 only] */
126#define AT91_PMC_PLLADIV2_OFF (0 << 12)
127#define AT91_PMC_PLLADIV2_ON (1 << 12)
128
129#define AT91_PMC_USB 0x38 /* USB Clock Register [some SAM9 only] */
130#define AT91_PMC_USBS (0x1 << 0) /* USB OHCI Input clock selection */
131#define AT91_PMC_USBS_PLLA (0 << 0)
132#define AT91_PMC_USBS_UPLL (1 << 0)
133#define AT91_PMC_USBS_PLLB (1 << 0) /* [AT91SAMN12 only] */
134#define AT91_PMC_OHCIUSBDIV (0xF << 8) /* Divider for USB OHCI Clock */
135#define AT91_PMC_OHCIUSBDIV_1 (0x0 << 8)
136#define AT91_PMC_OHCIUSBDIV_2 (0x1 << 8)
137
138#define AT91_PMC_SMD 0x3c /* Soft Modem Clock Register [some SAM9 only] */
139#define AT91_PMC_SMDS (0x1 << 0) /* SMD input clock selection */
140#define AT91_PMC_SMD_DIV (0x1f << 8) /* SMD input clock divider */
141#define AT91_PMC_SMDDIV(n) (((n) << 8) & AT91_PMC_SMD_DIV)
142
143#define AT91_PMC_PCKR(n) (0x40 + ((n) * 4)) /* Programmable Clock 0-N Registers */
144#define AT91_PMC_ALT_PCKR_CSS (0x7 << 0) /* Programmable Clock Source Selection [alternate length] */
145#define AT91_PMC_CSS_MASTER (4 << 0) /* [some SAM9 only] */
146#define AT91_PMC_CSSMCK (0x1 << 8) /* CSS or Master Clock Selection */
147#define AT91_PMC_CSSMCK_CSS (0 << 8)
148#define AT91_PMC_CSSMCK_MCK (1 << 8)
149
150#define AT91_PMC_IER 0x60 /* Interrupt Enable Register */
151#define AT91_PMC_IDR 0x64 /* Interrupt Disable Register */
152#define AT91_PMC_SR 0x68 /* Status Register */
153#define AT91_PMC_MOSCS (1 << 0) /* MOSCS Flag */
154#define AT91_PMC_LOCKA (1 << 1) /* PLLA Lock */
155#define AT91_PMC_LOCKB (1 << 2) /* PLLB Lock */
156#define AT91_PMC_MCKRDY (1 << 3) /* Master Clock */
157#define AT91_PMC_LOCKU (1 << 6) /* UPLL Lock [some SAM9] */
158#define AT91_PMC_PCK0RDY (1 << 8) /* Programmable Clock 0 */
159#define AT91_PMC_PCK1RDY (1 << 9) /* Programmable Clock 1 */
160#define AT91_PMC_PCK2RDY (1 << 10) /* Programmable Clock 2 */
161#define AT91_PMC_PCK3RDY (1 << 11) /* Programmable Clock 3 */
162#define AT91_PMC_MOSCSELS (1 << 16) /* Main Oscillator Selection [some SAM9] */
163#define AT91_PMC_MOSCRCS (1 << 17) /* Main On-Chip RC [some SAM9] */
164#define AT91_PMC_CFDEV (1 << 18) /* Clock Failure Detector Event [some SAM9] */
165#define AT91_PMC_IMR 0x6c /* Interrupt Mask Register */
166
167#define AT91_PMC_PROT 0xe4 /* Write Protect Mode Register [some SAM9] */
168#define AT91_PMC_WPEN (0x1 << 0) /* Write Protect Enable */
169#define AT91_PMC_WPKEY (0xffffff << 8) /* Write Protect Key */
170#define AT91_PMC_PROTKEY (0x504d43 << 8) /* Activation Code */
171
172#define AT91_PMC_WPSR 0xe8 /* Write Protect Status Register [some SAM9] */
173#define AT91_PMC_WPVS (0x1 << 0) /* Write Protect Violation Status */
174#define AT91_PMC_WPVSRC (0xffff << 8) /* Write Protect Violation Source */
175
176#define AT91_PMC_PCER1 0x100 /* Peripheral Clock Enable Register 1 [SAMA5 only]*/
177#define AT91_PMC_PCDR1 0x104 /* Peripheral Clock Enable Register 1 */
178#define AT91_PMC_PCSR1 0x108 /* Peripheral Clock Enable Register 1 */
179
180#define AT91_PMC_PCR 0x10c /* Peripheral Control Register [some SAM9 and SAMA5] */
181#define AT91_PMC_PCR_PID (0x3f << 0) /* Peripheral ID */
182#define AT91_PMC_PCR_CMD (0x1 << 12) /* Command (read=0, write=1) */
183#define AT91_PMC_PCR_DIV(n) ((n) << 16) /* Divisor Value */
184#define AT91_PMC_PCR_DIV0 0x0 /* Peripheral clock is MCK */
185#define AT91_PMC_PCR_DIV2 0x1 /* Peripheral clock is MCK/2 */
186#define AT91_PMC_PCR_DIV4 0x2 /* Peripheral clock is MCK/4 */
187#define AT91_PMC_PCR_DIV8 0x3 /* Peripheral clock is MCK/8 */
188#define AT91_PMC_PCR_EN (0x1 << 28) /* Enable */
189
190#endif
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index 9986542e8060..d43b79f56e94 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach-at91/pm.c
@@ -19,13 +19,13 @@
19#include <linux/module.h> 19#include <linux/module.h>
20#include <linux/platform_device.h> 20#include <linux/platform_device.h>
21#include <linux/io.h> 21#include <linux/io.h>
22#include <linux/clk/at91_pmc.h>
22 23
23#include <asm/irq.h> 24#include <asm/irq.h>
24#include <linux/atomic.h> 25#include <linux/atomic.h>
25#include <asm/mach/time.h> 26#include <asm/mach/time.h>
26#include <asm/mach/irq.h> 27#include <asm/mach/irq.h>
27 28
28#include <mach/at91_pmc.h>
29#include <mach/cpu.h> 29#include <mach/cpu.h>
30 30
31#include "at91_aic.h" 31#include "at91_aic.h"
diff --git a/arch/arm/mach-at91/pm_slowclock.S b/arch/arm/mach-at91/pm_slowclock.S
index 098c28ddf025..20018779bae7 100644
--- a/arch/arm/mach-at91/pm_slowclock.S
+++ b/arch/arm/mach-at91/pm_slowclock.S
@@ -13,8 +13,8 @@
13 */ 13 */
14 14
15#include <linux/linkage.h> 15#include <linux/linkage.h>
16#include <linux/clk/at91_pmc.h>
16#include <mach/hardware.h> 17#include <mach/hardware.h>
17#include <mach/at91_pmc.h>
18#include <mach/at91_ramc.h> 18#include <mach/at91_ramc.h>
19 19
20 20
diff --git a/arch/arm/mach-at91/sama5d3.c b/arch/arm/mach-at91/sama5d3.c
index 3ea86428ee09..3d775d08de08 100644
--- a/arch/arm/mach-at91/sama5d3.c
+++ b/arch/arm/mach-at91/sama5d3.c
@@ -9,360 +9,19 @@
9 9
10#include <linux/module.h> 10#include <linux/module.h>
11#include <linux/dma-mapping.h> 11#include <linux/dma-mapping.h>
12#include <linux/clk/at91_pmc.h>
12 13
13#include <asm/irq.h> 14#include <asm/irq.h>
14#include <asm/mach/arch.h> 15#include <asm/mach/arch.h>
15#include <asm/mach/map.h> 16#include <asm/mach/map.h>
16#include <mach/sama5d3.h> 17#include <mach/sama5d3.h>
17#include <mach/at91_pmc.h>
18#include <mach/cpu.h> 18#include <mach/cpu.h>
19 19
20#include "soc.h" 20#include "soc.h"
21#include "generic.h" 21#include "generic.h"
22#include "clock.h"
23#include "sam9_smc.h" 22#include "sam9_smc.h"
24 23
25/* -------------------------------------------------------------------- 24/* --------------------------------------------------------------------
26 * Clocks
27 * -------------------------------------------------------------------- */
28
29/*
30 * The peripheral clocks.
31 */
32
33static struct clk pioA_clk = {
34 .name = "pioA_clk",
35 .pid = SAMA5D3_ID_PIOA,
36 .type = CLK_TYPE_PERIPHERAL,
37};
38static struct clk pioB_clk = {
39 .name = "pioB_clk",
40 .pid = SAMA5D3_ID_PIOB,
41 .type = CLK_TYPE_PERIPHERAL,
42};
43static struct clk pioC_clk = {
44 .name = "pioC_clk",
45 .pid = SAMA5D3_ID_PIOC,
46 .type = CLK_TYPE_PERIPHERAL,
47};
48static struct clk pioD_clk = {
49 .name = "pioD_clk",
50 .pid = SAMA5D3_ID_PIOD,
51 .type = CLK_TYPE_PERIPHERAL,
52};
53static struct clk pioE_clk = {
54 .name = "pioE_clk",
55 .pid = SAMA5D3_ID_PIOE,
56 .type = CLK_TYPE_PERIPHERAL,
57};
58static struct clk usart0_clk = {
59 .name = "usart0_clk",
60 .pid = SAMA5D3_ID_USART0,
61 .type = CLK_TYPE_PERIPHERAL,
62 .div = AT91_PMC_PCR_DIV2,
63};
64static struct clk usart1_clk = {
65 .name = "usart1_clk",
66 .pid = SAMA5D3_ID_USART1,
67 .type = CLK_TYPE_PERIPHERAL,
68 .div = AT91_PMC_PCR_DIV2,
69};
70static struct clk usart2_clk = {
71 .name = "usart2_clk",
72 .pid = SAMA5D3_ID_USART2,
73 .type = CLK_TYPE_PERIPHERAL,
74 .div = AT91_PMC_PCR_DIV2,
75};
76static struct clk usart3_clk = {
77 .name = "usart3_clk",
78 .pid = SAMA5D3_ID_USART3,
79 .type = CLK_TYPE_PERIPHERAL,
80 .div = AT91_PMC_PCR_DIV2,
81};
82static struct clk uart0_clk = {
83 .name = "uart0_clk",
84 .pid = SAMA5D3_ID_UART0,
85 .type = CLK_TYPE_PERIPHERAL,
86 .div = AT91_PMC_PCR_DIV2,
87};
88static struct clk uart1_clk = {
89 .name = "uart1_clk",
90 .pid = SAMA5D3_ID_UART1,
91 .type = CLK_TYPE_PERIPHERAL,
92 .div = AT91_PMC_PCR_DIV2,
93};
94static struct clk twi0_clk = {
95 .name = "twi0_clk",
96 .pid = SAMA5D3_ID_TWI0,
97 .type = CLK_TYPE_PERIPHERAL,
98 .div = AT91_PMC_PCR_DIV2,
99};
100static struct clk twi1_clk = {
101 .name = "twi1_clk",
102 .pid = SAMA5D3_ID_TWI1,
103 .type = CLK_TYPE_PERIPHERAL,
104 .div = AT91_PMC_PCR_DIV2,
105};
106static struct clk twi2_clk = {
107 .name = "twi2_clk",
108 .pid = SAMA5D3_ID_TWI2,
109 .type = CLK_TYPE_PERIPHERAL,
110 .div = AT91_PMC_PCR_DIV2,
111};
112static struct clk mmc0_clk = {
113 .name = "mci0_clk",
114 .pid = SAMA5D3_ID_HSMCI0,
115 .type = CLK_TYPE_PERIPHERAL,
116};
117static struct clk mmc1_clk = {
118 .name = "mci1_clk",
119 .pid = SAMA5D3_ID_HSMCI1,
120 .type = CLK_TYPE_PERIPHERAL,
121};
122static struct clk mmc2_clk = {
123 .name = "mci2_clk",
124 .pid = SAMA5D3_ID_HSMCI2,
125 .type = CLK_TYPE_PERIPHERAL,
126};
127static struct clk spi0_clk = {
128 .name = "spi0_clk",
129 .pid = SAMA5D3_ID_SPI0,
130 .type = CLK_TYPE_PERIPHERAL,
131};
132static struct clk spi1_clk = {
133 .name = "spi1_clk",
134 .pid = SAMA5D3_ID_SPI1,
135 .type = CLK_TYPE_PERIPHERAL,
136};
137static struct clk tcb0_clk = {
138 .name = "tcb0_clk",
139 .pid = SAMA5D3_ID_TC0,
140 .type = CLK_TYPE_PERIPHERAL,
141 .div = AT91_PMC_PCR_DIV2,
142};
143static struct clk tcb1_clk = {
144 .name = "tcb1_clk",
145 .pid = SAMA5D3_ID_TC1,
146 .type = CLK_TYPE_PERIPHERAL,
147 .div = AT91_PMC_PCR_DIV2,
148};
149static struct clk adc_clk = {
150 .name = "adc_clk",
151 .pid = SAMA5D3_ID_ADC,
152 .type = CLK_TYPE_PERIPHERAL,
153 .div = AT91_PMC_PCR_DIV2,
154};
155static struct clk adc_op_clk = {
156 .name = "adc_op_clk",
157 .type = CLK_TYPE_PERIPHERAL,
158 .rate_hz = 5000000,
159};
160static struct clk dma0_clk = {
161 .name = "dma0_clk",
162 .pid = SAMA5D3_ID_DMA0,
163 .type = CLK_TYPE_PERIPHERAL,
164};
165static struct clk dma1_clk = {
166 .name = "dma1_clk",
167 .pid = SAMA5D3_ID_DMA1,
168 .type = CLK_TYPE_PERIPHERAL,
169};
170static struct clk uhphs_clk = {
171 .name = "uhphs",
172 .pid = SAMA5D3_ID_UHPHS,
173 .type = CLK_TYPE_PERIPHERAL,
174};
175static struct clk udphs_clk = {
176 .name = "udphs_clk",
177 .pid = SAMA5D3_ID_UDPHS,
178 .type = CLK_TYPE_PERIPHERAL,
179};
180/* gmac only for sama5d33, sama5d34, sama5d35 */
181static struct clk macb0_clk = {
182 .name = "macb0_clk",
183 .pid = SAMA5D3_ID_GMAC,
184 .type = CLK_TYPE_PERIPHERAL,
185};
186/* emac only for sama5d31, sama5d35 */
187static struct clk macb1_clk = {
188 .name = "macb1_clk",
189 .pid = SAMA5D3_ID_EMAC,
190 .type = CLK_TYPE_PERIPHERAL,
191};
192/* lcd only for sama5d31, sama5d33, sama5d34 */
193static struct clk lcdc_clk = {
194 .name = "lcdc_clk",
195 .pid = SAMA5D3_ID_LCDC,
196 .type = CLK_TYPE_PERIPHERAL,
197};
198/* isi only for sama5d33, sama5d35 */
199static struct clk isi_clk = {
200 .name = "isi_clk",
201 .pid = SAMA5D3_ID_ISI,
202 .type = CLK_TYPE_PERIPHERAL,
203};
204static struct clk can0_clk = {
205 .name = "can0_clk",
206 .pid = SAMA5D3_ID_CAN0,
207 .type = CLK_TYPE_PERIPHERAL,
208 .div = AT91_PMC_PCR_DIV2,
209};
210static struct clk can1_clk = {
211 .name = "can1_clk",
212 .pid = SAMA5D3_ID_CAN1,
213 .type = CLK_TYPE_PERIPHERAL,
214 .div = AT91_PMC_PCR_DIV2,
215};
216static struct clk ssc0_clk = {
217 .name = "ssc0_clk",
218 .pid = SAMA5D3_ID_SSC0,
219 .type = CLK_TYPE_PERIPHERAL,
220 .div = AT91_PMC_PCR_DIV2,
221};
222static struct clk ssc1_clk = {
223 .name = "ssc1_clk",
224 .pid = SAMA5D3_ID_SSC1,
225 .type = CLK_TYPE_PERIPHERAL,
226 .div = AT91_PMC_PCR_DIV2,
227};
228static struct clk sha_clk = {
229 .name = "sha_clk",
230 .pid = SAMA5D3_ID_SHA,
231 .type = CLK_TYPE_PERIPHERAL,
232 .div = AT91_PMC_PCR_DIV8,
233};
234static struct clk aes_clk = {
235 .name = "aes_clk",
236 .pid = SAMA5D3_ID_AES,
237 .type = CLK_TYPE_PERIPHERAL,
238};
239static struct clk tdes_clk = {
240 .name = "tdes_clk",
241 .pid = SAMA5D3_ID_TDES,
242 .type = CLK_TYPE_PERIPHERAL,
243};
244
245static struct clk *periph_clocks[] __initdata = {
246 &pioA_clk,
247 &pioB_clk,
248 &pioC_clk,
249 &pioD_clk,
250 &pioE_clk,
251 &usart0_clk,
252 &usart1_clk,
253 &usart2_clk,
254 &usart3_clk,
255 &uart0_clk,
256 &uart1_clk,
257 &twi0_clk,
258 &twi1_clk,
259 &twi2_clk,
260 &mmc0_clk,
261 &mmc1_clk,
262 &mmc2_clk,
263 &spi0_clk,
264 &spi1_clk,
265 &tcb0_clk,
266 &tcb1_clk,
267 &adc_clk,
268 &adc_op_clk,
269 &dma0_clk,
270 &dma1_clk,
271 &uhphs_clk,
272 &udphs_clk,
273 &macb0_clk,
274 &macb1_clk,
275 &lcdc_clk,
276 &isi_clk,
277 &can0_clk,
278 &can1_clk,
279 &ssc0_clk,
280 &ssc1_clk,
281 &sha_clk,
282 &aes_clk,
283 &tdes_clk,
284};
285
286static struct clk pck0 = {
287 .name = "pck0",
288 .pmc_mask = AT91_PMC_PCK0,
289 .type = CLK_TYPE_PROGRAMMABLE,
290 .id = 0,
291};
292
293static struct clk pck1 = {
294 .name = "pck1",
295 .pmc_mask = AT91_PMC_PCK1,
296 .type = CLK_TYPE_PROGRAMMABLE,
297 .id = 1,
298};
299
300static struct clk pck2 = {
301 .name = "pck2",
302 .pmc_mask = AT91_PMC_PCK2,
303 .type = CLK_TYPE_PROGRAMMABLE,
304 .id = 2,
305};
306
307static struct clk_lookup periph_clocks_lookups[] = {
308 /* lookup table for DT entries */
309 CLKDEV_CON_DEV_ID("usart", "ffffee00.serial", &mck),
310 CLKDEV_CON_DEV_ID(NULL, "fffff200.gpio", &pioA_clk),
311 CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioB_clk),
312 CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioC_clk),
313 CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioD_clk),
314 CLKDEV_CON_DEV_ID(NULL, "fffffa00.gpio", &pioE_clk),
315 CLKDEV_CON_DEV_ID("usart", "f001c000.serial", &usart0_clk),
316 CLKDEV_CON_DEV_ID("usart", "f0020000.serial", &usart1_clk),
317 CLKDEV_CON_DEV_ID("usart", "f8020000.serial", &usart2_clk),
318 CLKDEV_CON_DEV_ID("usart", "f8024000.serial", &usart3_clk),
319 CLKDEV_CON_DEV_ID(NULL, "f0014000.i2c", &twi0_clk),
320 CLKDEV_CON_DEV_ID(NULL, "f0018000.i2c", &twi1_clk),
321 CLKDEV_CON_DEV_ID(NULL, "f801c000.i2c", &twi2_clk),
322 CLKDEV_CON_DEV_ID("mci_clk", "f0000000.mmc", &mmc0_clk),
323 CLKDEV_CON_DEV_ID("mci_clk", "f8000000.mmc", &mmc1_clk),
324 CLKDEV_CON_DEV_ID("mci_clk", "f8004000.mmc", &mmc2_clk),
325 CLKDEV_CON_DEV_ID("spi_clk", "f0004000.spi", &spi0_clk),
326 CLKDEV_CON_DEV_ID("spi_clk", "f8008000.spi", &spi1_clk),
327 CLKDEV_CON_DEV_ID("t0_clk", "f0010000.timer", &tcb0_clk),
328 CLKDEV_CON_DEV_ID("t0_clk", "f8014000.timer", &tcb1_clk),
329 CLKDEV_CON_DEV_ID("tsc_clk", "f8018000.tsadcc", &adc_clk),
330 CLKDEV_CON_DEV_ID("dma_clk", "ffffe600.dma-controller", &dma0_clk),
331 CLKDEV_CON_DEV_ID("dma_clk", "ffffe800.dma-controller", &dma1_clk),
332 CLKDEV_CON_DEV_ID("hclk", "600000.ohci", &uhphs_clk),
333 CLKDEV_CON_DEV_ID("ohci_clk", "600000.ohci", &uhphs_clk),
334 CLKDEV_CON_DEV_ID("ehci_clk", "700000.ehci", &uhphs_clk),
335 CLKDEV_CON_DEV_ID("pclk", "500000.gadget", &udphs_clk),
336 CLKDEV_CON_DEV_ID("hclk", "500000.gadget", &utmi_clk),
337 CLKDEV_CON_DEV_ID("hclk", "f0028000.ethernet", &macb0_clk),
338 CLKDEV_CON_DEV_ID("pclk", "f0028000.ethernet", &macb0_clk),
339 CLKDEV_CON_DEV_ID("hclk", "f802c000.ethernet", &macb1_clk),
340 CLKDEV_CON_DEV_ID("pclk", "f802c000.ethernet", &macb1_clk),
341 CLKDEV_CON_DEV_ID("pclk", "f0008000.ssc", &ssc0_clk),
342 CLKDEV_CON_DEV_ID("pclk", "f000c000.ssc", &ssc1_clk),
343 CLKDEV_CON_DEV_ID("can_clk", "f000c000.can", &can0_clk),
344 CLKDEV_CON_DEV_ID("can_clk", "f8010000.can", &can1_clk),
345 CLKDEV_CON_DEV_ID("sha_clk", "f8034000.sha", &sha_clk),
346 CLKDEV_CON_DEV_ID("aes_clk", "f8038000.aes", &aes_clk),
347 CLKDEV_CON_DEV_ID("tdes_clk", "f803c000.tdes", &tdes_clk),
348};
349
350static void __init sama5d3_register_clocks(void)
351{
352 int i;
353
354 for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
355 clk_register(periph_clocks[i]);
356
357 clkdev_add_table(periph_clocks_lookups,
358 ARRAY_SIZE(periph_clocks_lookups));
359
360 clk_register(&pck0);
361 clk_register(&pck1);
362 clk_register(&pck2);
363}
364
365/* --------------------------------------------------------------------
366 * AT91SAM9x5 processor initialization 25 * AT91SAM9x5 processor initialization
367 * -------------------------------------------------------------------- */ 26 * -------------------------------------------------------------------- */
368 27
@@ -378,6 +37,5 @@ static void __init sama5d3_initialize(void)
378 37
379AT91_SOC_START(sama5d3) 38AT91_SOC_START(sama5d3)
380 .map_io = sama5d3_map_io, 39 .map_io = sama5d3_map_io,
381 .register_clocks = sama5d3_register_clocks,
382 .init = sama5d3_initialize, 40 .init = sama5d3_initialize,
383AT91_SOC_END 41AT91_SOC_END
diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c
index 094b3459c288..7d3f7cc61081 100644
--- a/arch/arm/mach-at91/setup.c
+++ b/arch/arm/mach-at91/setup.c
@@ -11,6 +11,7 @@
11#include <linux/pm.h> 11#include <linux/pm.h>
12#include <linux/of_address.h> 12#include <linux/of_address.h>
13#include <linux/pinctrl/machine.h> 13#include <linux/pinctrl/machine.h>
14#include <linux/clk/at91_pmc.h>
14 15
15#include <asm/system_misc.h> 16#include <asm/system_misc.h>
16#include <asm/mach/map.h> 17#include <asm/mach/map.h>
@@ -18,7 +19,6 @@
18#include <mach/hardware.h> 19#include <mach/hardware.h>
19#include <mach/cpu.h> 20#include <mach/cpu.h>
20#include <mach/at91_dbgu.h> 21#include <mach/at91_dbgu.h>
21#include <mach/at91_pmc.h>
22 22
23#include "at91_shdwc.h" 23#include "at91_shdwc.h"
24#include "soc.h" 24#include "soc.h"
@@ -491,7 +491,8 @@ void __init at91rm9200_dt_initialize(void)
491 at91_dt_clock_init(); 491 at91_dt_clock_init();
492 492
493 /* Register the processor-specific clocks */ 493 /* Register the processor-specific clocks */
494 at91_boot_soc.register_clocks(); 494 if (at91_boot_soc.register_clocks)
495 at91_boot_soc.register_clocks();
495 496
496 at91_boot_soc.init(); 497 at91_boot_soc.init();
497} 498}
@@ -506,7 +507,8 @@ void __init at91_dt_initialize(void)
506 at91_dt_clock_init(); 507 at91_dt_clock_init();
507 508
508 /* Register the processor-specific clocks */ 509 /* Register the processor-specific clocks */
509 at91_boot_soc.register_clocks(); 510 if (at91_boot_soc.register_clocks)
511 at91_boot_soc.register_clocks();
510 512
511 if (at91_boot_soc.init) 513 if (at91_boot_soc.init)
512 at91_boot_soc.init(); 514 at91_boot_soc.init();
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-26 02:17:45 -0500