diff options
Diffstat (limited to 'arch/arm/boot/dts/tegra20.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/tegra20.dtsi | 167 |
1 files changed, 167 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi index f3a09d0d45bc..b8effa1cbda7 100644 --- a/arch/arm/boot/dts/tegra20.dtsi +++ b/arch/arm/boot/dts/tegra20.dtsi | |||
| @@ -4,6 +4,108 @@ | |||
| 4 | compatible = "nvidia,tegra20"; | 4 | compatible = "nvidia,tegra20"; |
| 5 | interrupt-parent = <&intc>; | 5 | interrupt-parent = <&intc>; |
| 6 | 6 | ||
| 7 | host1x { | ||
| 8 | compatible = "nvidia,tegra20-host1x", "simple-bus"; | ||
| 9 | reg = <0x50000000 0x00024000>; | ||
| 10 | interrupts = <0 65 0x04 /* mpcore syncpt */ | ||
| 11 | 0 67 0x04>; /* mpcore general */ | ||
| 12 | |||
| 13 | #address-cells = <1>; | ||
| 14 | #size-cells = <1>; | ||
| 15 | |||
| 16 | ranges = <0x54000000 0x54000000 0x04000000>; | ||
| 17 | |||
| 18 | mpe { | ||
| 19 | compatible = "nvidia,tegra20-mpe"; | ||
| 20 | reg = <0x54040000 0x00040000>; | ||
| 21 | interrupts = <0 68 0x04>; | ||
| 22 | }; | ||
| 23 | |||
| 24 | vi { | ||
| 25 | compatible = "nvidia,tegra20-vi"; | ||
| 26 | reg = <0x54080000 0x00040000>; | ||
| 27 | interrupts = <0 69 0x04>; | ||
| 28 | }; | ||
| 29 | |||
| 30 | epp { | ||
| 31 | compatible = "nvidia,tegra20-epp"; | ||
| 32 | reg = <0x540c0000 0x00040000>; | ||
| 33 | interrupts = <0 70 0x04>; | ||
| 34 | }; | ||
| 35 | |||
| 36 | isp { | ||
| 37 | compatible = "nvidia,tegra20-isp"; | ||
| 38 | reg = <0x54100000 0x00040000>; | ||
| 39 | interrupts = <0 71 0x04>; | ||
| 40 | }; | ||
| 41 | |||
| 42 | gr2d { | ||
| 43 | compatible = "nvidia,tegra20-gr2d"; | ||
| 44 | reg = <0x54140000 0x00040000>; | ||
| 45 | interrupts = <0 72 0x04>; | ||
| 46 | }; | ||
| 47 | |||
| 48 | gr3d { | ||
| 49 | compatible = "nvidia,tegra20-gr3d"; | ||
| 50 | reg = <0x54180000 0x00040000>; | ||
| 51 | }; | ||
| 52 | |||
| 53 | dc@54200000 { | ||
| 54 | compatible = "nvidia,tegra20-dc"; | ||
| 55 | reg = <0x54200000 0x00040000>; | ||
| 56 | interrupts = <0 73 0x04>; | ||
| 57 | |||
| 58 | rgb { | ||
| 59 | status = "disabled"; | ||
| 60 | }; | ||
| 61 | }; | ||
| 62 | |||
| 63 | dc@54240000 { | ||
| 64 | compatible = "nvidia,tegra20-dc"; | ||
| 65 | reg = <0x54240000 0x00040000>; | ||
| 66 | interrupts = <0 74 0x04>; | ||
| 67 | |||
| 68 | rgb { | ||
| 69 | status = "disabled"; | ||
| 70 | }; | ||
| 71 | }; | ||
| 72 | |||
| 73 | hdmi { | ||
| 74 | compatible = "nvidia,tegra20-hdmi"; | ||
| 75 | reg = <0x54280000 0x00040000>; | ||
| 76 | interrupts = <0 75 0x04>; | ||
| 77 | status = "disabled"; | ||
| 78 | }; | ||
| 79 | |||
| 80 | tvo { | ||
| 81 | compatible = "nvidia,tegra20-tvo"; | ||
| 82 | reg = <0x542c0000 0x00040000>; | ||
| 83 | interrupts = <0 76 0x04>; | ||
| 84 | status = "disabled"; | ||
| 85 | }; | ||
| 86 | |||
| 87 | dsi { | ||
| 88 | compatible = "nvidia,tegra20-dsi"; | ||
| 89 | reg = <0x54300000 0x00040000>; | ||
| 90 | status = "disabled"; | ||
| 91 | }; | ||
| 92 | }; | ||
| 93 | |||
| 94 | timer@50004600 { | ||
| 95 | compatible = "arm,cortex-a9-twd-timer"; | ||
| 96 | reg = <0x50040600 0x20>; | ||
| 97 | interrupts = <1 13 0x304>; | ||
| 98 | }; | ||
| 99 | |||
| 100 | cache-controller@50043000 { | ||
| 101 | compatible = "arm,pl310-cache"; | ||
| 102 | reg = <0x50043000 0x1000>; | ||
| 103 | arm,data-latency = <5 5 2>; | ||
| 104 | arm,tag-latency = <4 4 2>; | ||
| 105 | cache-unified; | ||
| 106 | cache-level = <2>; | ||
| 107 | }; | ||
| 108 | |||
| 7 | intc: interrupt-controller { | 109 | intc: interrupt-controller { |
| 8 | compatible = "arm,cortex-a9-gic"; | 110 | compatible = "arm,cortex-a9-gic"; |
| 9 | reg = <0x50041000 0x1000 | 111 | reg = <0x50041000 0x1000 |
| @@ -12,6 +114,15 @@ | |||
| 12 | #interrupt-cells = <3>; | 114 | #interrupt-cells = <3>; |
| 13 | }; | 115 | }; |
| 14 | 116 | ||
| 117 | timer@60005000 { | ||
| 118 | compatible = "nvidia,tegra20-timer"; | ||
| 119 | reg = <0x60005000 0x60>; | ||
| 120 | interrupts = <0 0 0x04 | ||
| 121 | 0 1 0x04 | ||
| 122 | 0 41 0x04 | ||
| 123 | 0 42 0x04>; | ||
| 124 | }; | ||
| 125 | |||
| 15 | apbdma: dma { | 126 | apbdma: dma { |
| 16 | compatible = "nvidia,tegra20-apbdma"; | 127 | compatible = "nvidia,tegra20-apbdma"; |
| 17 | reg = <0x6000a000 0x1200>; | 128 | reg = <0x6000a000 0x1200>; |
| @@ -129,6 +240,12 @@ | |||
| 129 | #pwm-cells = <2>; | 240 | #pwm-cells = <2>; |
| 130 | }; | 241 | }; |
| 131 | 242 | ||
| 243 | rtc { | ||
| 244 | compatible = "nvidia,tegra20-rtc"; | ||
| 245 | reg = <0x7000e000 0x100>; | ||
| 246 | interrupts = <0 2 0x04>; | ||
| 247 | }; | ||
| 248 | |||
| 132 | i2c@7000c000 { | 249 | i2c@7000c000 { |
| 133 | compatible = "nvidia,tegra20-i2c"; | 250 | compatible = "nvidia,tegra20-i2c"; |
| 134 | reg = <0x7000c000 0x100>; | 251 | reg = <0x7000c000 0x100>; |
| @@ -138,6 +255,16 @@ | |||
| 138 | status = "disabled"; | 255 | status = "disabled"; |
| 139 | }; | 256 | }; |
| 140 | 257 | ||
| 258 | spi@7000c380 { | ||
| 259 | compatible = "nvidia,tegra20-sflash"; | ||
| 260 | reg = <0x7000c380 0x80>; | ||
| 261 | interrupts = <0 39 0x04>; | ||
| 262 | nvidia,dma-request-selector = <&apbdma 11>; | ||
| 263 | #address-cells = <1>; | ||
| 264 | #size-cells = <0>; | ||
| 265 | status = "disabled"; | ||
| 266 | }; | ||
| 267 | |||
| 141 | i2c@7000c400 { | 268 | i2c@7000c400 { |
| 142 | compatible = "nvidia,tegra20-i2c"; | 269 | compatible = "nvidia,tegra20-i2c"; |
| 143 | reg = <0x7000c400 0x100>; | 270 | reg = <0x7000c400 0x100>; |
| @@ -165,6 +292,46 @@ | |||
| 165 | status = "disabled"; | 292 | status = "disabled"; |
| 166 | }; | 293 | }; |
| 167 | 294 | ||
| 295 | spi@7000d400 { | ||
| 296 | compatible = "nvidia,tegra20-slink"; | ||
| 297 | reg = <0x7000d400 0x200>; | ||
| 298 | interrupts = <0 59 0x04>; | ||
| 299 | nvidia,dma-request-selector = <&apbdma 15>; | ||
| 300 | #address-cells = <1>; | ||
| 301 | #size-cells = <0>; | ||
| 302 | status = "disabled"; | ||
| 303 | }; | ||
| 304 | |||
| 305 | spi@7000d600 { | ||
| 306 | compatible = "nvidia,tegra20-slink"; | ||
| 307 | reg = <0x7000d600 0x200>; | ||
| 308 | interrupts = <0 82 0x04>; | ||
| 309 | nvidia,dma-request-selector = <&apbdma 16>; | ||
| 310 | #address-cells = <1>; | ||
| 311 | #size-cells = <0>; | ||
| 312 | status = "disabled"; | ||
| 313 | }; | ||
| 314 | |||
| 315 | spi@7000d800 { | ||
| 316 | compatible = "nvidia,tegra20-slink"; | ||
| 317 | reg = <0x7000d480 0x200>; | ||
| 318 | interrupts = <0 83 0x04>; | ||
| 319 | nvidia,dma-request-selector = <&apbdma 17>; | ||
| 320 | #address-cells = <1>; | ||
| 321 | #size-cells = <0>; | ||
| 322 | status = "disabled"; | ||
| 323 | }; | ||
| 324 | |||
| 325 | spi@7000da00 { | ||
| 326 | compatible = "nvidia,tegra20-slink"; | ||
| 327 | reg = <0x7000da00 0x200>; | ||
| 328 | interrupts = <0 93 0x04>; | ||
| 329 | nvidia,dma-request-selector = <&apbdma 18>; | ||
| 330 | #address-cells = <1>; | ||
| 331 | #size-cells = <0>; | ||
| 332 | status = "disabled"; | ||
| 333 | }; | ||
| 334 | |||
| 168 | pmc { | 335 | pmc { |
| 169 | compatible = "nvidia,tegra20-pmc"; | 336 | compatible = "nvidia,tegra20-pmc"; |
| 170 | reg = <0x7000e400 0x400>; | 337 | reg = <0x7000e400 0x400>; |
