diff options
Diffstat (limited to 'arch/arm/boot/dts/at91sam9n12.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/at91sam9n12.dtsi | 251 |
1 files changed, 216 insertions, 35 deletions
diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi index 82508d68aa7e..80e29c605d4e 100644 --- a/arch/arm/boot/dts/at91sam9n12.dtsi +++ b/arch/arm/boot/dts/at91sam9n12.dtsi | |||
| @@ -28,6 +28,7 @@ | |||
| 28 | tcb1 = &tcb1; | 28 | tcb1 = &tcb1; |
| 29 | i2c0 = &i2c0; | 29 | i2c0 = &i2c0; |
| 30 | i2c1 = &i2c1; | 30 | i2c1 = &i2c1; |
| 31 | ssc0 = &ssc0; | ||
| 31 | }; | 32 | }; |
| 32 | cpus { | 33 | cpus { |
| 33 | cpu@0 { | 34 | cpu@0 { |
| @@ -84,6 +85,15 @@ | |||
| 84 | reg = <0xfffffe10 0x10>; | 85 | reg = <0xfffffe10 0x10>; |
| 85 | }; | 86 | }; |
| 86 | 87 | ||
| 88 | mmc0: mmc@f0008000 { | ||
| 89 | compatible = "atmel,hsmci"; | ||
| 90 | reg = <0xf0008000 0x600>; | ||
| 91 | interrupts = <12 4 0>; | ||
| 92 | #address-cells = <1>; | ||
| 93 | #size-cells = <0>; | ||
| 94 | status = "disabled"; | ||
| 95 | }; | ||
| 96 | |||
| 87 | tcb0: timer@f8008000 { | 97 | tcb0: timer@f8008000 { |
| 88 | compatible = "atmel,at91sam9x5-tcb"; | 98 | compatible = "atmel,at91sam9x5-tcb"; |
| 89 | reg = <0xf8008000 0x100>; | 99 | reg = <0xf8008000 0x100>; |
| @@ -102,50 +112,211 @@ | |||
| 102 | interrupts = <20 4 0>; | 112 | interrupts = <20 4 0>; |
| 103 | }; | 113 | }; |
| 104 | 114 | ||
| 105 | pioA: gpio@fffff400 { | 115 | pinctrl@fffff400 { |
| 106 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; | 116 | #address-cells = <1>; |
| 107 | reg = <0xfffff400 0x100>; | 117 | #size-cells = <1>; |
| 108 | interrupts = <2 4 1>; | 118 | compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus"; |
| 109 | #gpio-cells = <2>; | 119 | ranges = <0xfffff400 0xfffff400 0x800>; |
| 110 | gpio-controller; | ||
| 111 | interrupt-controller; | ||
| 112 | #interrupt-cells = <2>; | ||
| 113 | }; | ||
| 114 | 120 | ||
| 115 | pioB: gpio@fffff600 { | 121 | atmel,mux-mask = < |
| 116 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; | 122 | /* A B C */ |
| 117 | reg = <0xfffff600 0x100>; | 123 | 0xffffffff 0xffe07983 0x00000000 /* pioA */ |
| 118 | interrupts = <2 4 1>; | 124 | 0x00040000 0x00047e0f 0x00000000 /* pioB */ |
| 119 | #gpio-cells = <2>; | 125 | 0xfdffffff 0x07c00000 0xb83fffff /* pioC */ |
| 120 | gpio-controller; | 126 | 0x003fffff 0x003f8000 0x00000000 /* pioD */ |
| 121 | interrupt-controller; | 127 | >; |
| 122 | #interrupt-cells = <2>; | ||
| 123 | }; | ||
| 124 | 128 | ||
| 125 | pioC: gpio@fffff800 { | 129 | /* shared pinctrl settings */ |
| 126 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; | 130 | dbgu { |
| 127 | reg = <0xfffff800 0x100>; | 131 | pinctrl_dbgu: dbgu-0 { |
| 128 | interrupts = <3 4 1>; | 132 | atmel,pins = |
| 129 | #gpio-cells = <2>; | 133 | <0 9 0x1 0x0 /* PA9 periph A */ |
| 130 | gpio-controller; | 134 | 0 10 0x1 0x1>; /* PA10 periph with pullup */ |
| 131 | interrupt-controller; | 135 | }; |
| 132 | #interrupt-cells = <2>; | 136 | }; |
| 133 | }; | ||
| 134 | 137 | ||
| 135 | pioD: gpio@fffffa00 { | 138 | usart0 { |
| 136 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; | 139 | pinctrl_usart0: usart0-0 { |
| 137 | reg = <0xfffffa00 0x100>; | 140 | atmel,pins = |
| 138 | interrupts = <3 4 1>; | 141 | <0 1 0x1 0x1 /* PA1 periph A with pullup */ |
| 139 | #gpio-cells = <2>; | 142 | 0 0 0x1 0x0>; /* PA0 periph A */ |
| 140 | gpio-controller; | 143 | }; |
| 141 | interrupt-controller; | 144 | |
| 142 | #interrupt-cells = <2>; | 145 | pinctrl_usart0_rts: usart0_rts-0 { |
| 146 | atmel,pins = | ||
| 147 | <0 2 0x1 0x0>; /* PA2 periph A */ | ||
| 148 | }; | ||
| 149 | |||
| 150 | pinctrl_usart0_cts: usart0_cts-0 { | ||
| 151 | atmel,pins = | ||
| 152 | <0 3 0x1 0x0>; /* PA3 periph A */ | ||
| 153 | }; | ||
| 154 | }; | ||
| 155 | |||
| 156 | usart1 { | ||
| 157 | pinctrl_usart1: usart1-0 { | ||
| 158 | atmel,pins = | ||
| 159 | <0 6 0x1 0x1 /* PA6 periph A with pullup */ | ||
| 160 | 0 5 0x1 0x0>; /* PA5 periph A */ | ||
| 161 | }; | ||
| 162 | }; | ||
| 163 | |||
| 164 | usart2 { | ||
| 165 | pinctrl_usart2: usart2-0 { | ||
| 166 | atmel,pins = | ||
| 167 | <0 8 0x1 0x1 /* PA8 periph A with pullup */ | ||
| 168 | 0 7 0x1 0x0>; /* PA7 periph A */ | ||
| 169 | }; | ||
| 170 | |||
| 171 | pinctrl_usart2_rts: usart2_rts-0 { | ||
| 172 | atmel,pins = | ||
| 173 | <1 0 0x2 0x0>; /* PB0 periph B */ | ||
| 174 | }; | ||
| 175 | |||
| 176 | pinctrl_usart2_cts: usart2_cts-0 { | ||
| 177 | atmel,pins = | ||
| 178 | <1 1 0x2 0x0>; /* PB1 periph B */ | ||
| 179 | }; | ||
| 180 | }; | ||
| 181 | |||
| 182 | usart3 { | ||
| 183 | pinctrl_usart3: usart3-0 { | ||
| 184 | atmel,pins = | ||
| 185 | <2 23 0x2 0x1 /* PC23 periph B with pullup */ | ||
| 186 | 2 22 0x2 0x0>; /* PC22 periph B */ | ||
| 187 | }; | ||
| 188 | |||
| 189 | pinctrl_usart3_rts: usart3_rts-0 { | ||
| 190 | atmel,pins = | ||
| 191 | <2 24 0x2 0x0>; /* PC24 periph B */ | ||
| 192 | }; | ||
| 193 | |||
| 194 | pinctrl_usart3_cts: usart3_cts-0 { | ||
| 195 | atmel,pins = | ||
| 196 | <2 25 0x2 0x0>; /* PC25 periph B */ | ||
| 197 | }; | ||
| 198 | }; | ||
| 199 | |||
| 200 | uart0 { | ||
| 201 | pinctrl_uart0: uart0-0 { | ||
| 202 | atmel,pins = | ||
| 203 | <2 9 0x3 0x1 /* PC9 periph C with pullup */ | ||
| 204 | 2 8 0x3 0x0>; /* PC8 periph C */ | ||
| 205 | }; | ||
| 206 | }; | ||
| 207 | |||
| 208 | uart1 { | ||
| 209 | pinctrl_uart1: uart1-0 { | ||
| 210 | atmel,pins = | ||
| 211 | <2 16 0x3 0x1 /* PC17 periph C with pullup */ | ||
| 212 | 2 17 0x3 0x0>; /* PC16 periph C */ | ||
| 213 | }; | ||
| 214 | }; | ||
| 215 | |||
| 216 | nand { | ||
| 217 | pinctrl_nand: nand-0 { | ||
| 218 | atmel,pins = | ||
| 219 | <3 5 0x0 0x1 /* PD5 gpio RDY pin pull_up*/ | ||
| 220 | 3 4 0x0 0x1>; /* PD4 gpio enable pin pull_up */ | ||
| 221 | }; | ||
| 222 | }; | ||
| 223 | |||
| 224 | mmc0 { | ||
| 225 | pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 { | ||
| 226 | atmel,pins = | ||
| 227 | <0 17 0x1 0x0 /* PA17 periph A */ | ||
| 228 | 0 16 0x1 0x1 /* PA16 periph A with pullup */ | ||
| 229 | 0 15 0x1 0x1>; /* PA15 periph A with pullup */ | ||
| 230 | }; | ||
| 231 | |||
| 232 | pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { | ||
| 233 | atmel,pins = | ||
| 234 | <0 18 0x1 0x1 /* PA18 periph A with pullup */ | ||
| 235 | 0 19 0x1 0x1 /* PA19 periph A with pullup */ | ||
| 236 | 0 20 0x1 0x1>; /* PA20 periph A with pullup */ | ||
| 237 | }; | ||
| 238 | |||
| 239 | pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 { | ||
| 240 | atmel,pins = | ||
| 241 | <0 11 0x2 0x1 /* PA11 periph B with pullup */ | ||
| 242 | 0 12 0x2 0x1 /* PA12 periph B with pullup */ | ||
| 243 | 0 13 0x2 0x1 /* PA13 periph B with pullup */ | ||
| 244 | 0 14 0x2 0x1>; /* PA14 periph B with pullup */ | ||
| 245 | }; | ||
| 246 | }; | ||
| 247 | |||
| 248 | ssc0 { | ||
| 249 | pinctrl_ssc0_tx: ssc0_tx-0 { | ||
| 250 | atmel,pins = | ||
| 251 | <0 24 0x2 0x0 /* PA24 periph B */ | ||
| 252 | 0 25 0x2 0x0 /* PA25 periph B */ | ||
| 253 | 0 26 0x2 0x0>; /* PA26 periph B */ | ||
| 254 | }; | ||
| 255 | |||
| 256 | pinctrl_ssc0_rx: ssc0_rx-0 { | ||
| 257 | atmel,pins = | ||
| 258 | <0 27 0x2 0x0 /* PA27 periph B */ | ||
| 259 | 0 28 0x2 0x0 /* PA28 periph B */ | ||
| 260 | 0 29 0x2 0x0>; /* PA29 periph B */ | ||
| 261 | }; | ||
| 262 | }; | ||
| 263 | |||
| 264 | pioA: gpio@fffff400 { | ||
| 265 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; | ||
| 266 | reg = <0xfffff400 0x200>; | ||
| 267 | interrupts = <2 4 1>; | ||
| 268 | #gpio-cells = <2>; | ||
| 269 | gpio-controller; | ||
| 270 | interrupt-controller; | ||
| 271 | #interrupt-cells = <2>; | ||
| 272 | }; | ||
| 273 | |||
| 274 | pioB: gpio@fffff600 { | ||
| 275 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; | ||
| 276 | reg = <0xfffff600 0x200>; | ||
| 277 | interrupts = <2 4 1>; | ||
| 278 | #gpio-cells = <2>; | ||
| 279 | gpio-controller; | ||
| 280 | interrupt-controller; | ||
| 281 | #interrupt-cells = <2>; | ||
| 282 | }; | ||
| 283 | |||
| 284 | pioC: gpio@fffff800 { | ||
| 285 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; | ||
| 286 | reg = <0xfffff800 0x200>; | ||
| 287 | interrupts = <3 4 1>; | ||
| 288 | #gpio-cells = <2>; | ||
| 289 | gpio-controller; | ||
| 290 | interrupt-controller; | ||
| 291 | #interrupt-cells = <2>; | ||
| 292 | }; | ||
| 293 | |||
| 294 | pioD: gpio@fffffa00 { | ||
| 295 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; | ||
| 296 | reg = <0xfffffa00 0x200>; | ||
| 297 | interrupts = <3 4 1>; | ||
| 298 | #gpio-cells = <2>; | ||
| 299 | gpio-controller; | ||
| 300 | interrupt-controller; | ||
| 301 | #interrupt-cells = <2>; | ||
| 302 | }; | ||
| 143 | }; | 303 | }; |
| 144 | 304 | ||
| 145 | dbgu: serial@fffff200 { | 305 | dbgu: serial@fffff200 { |
| 146 | compatible = "atmel,at91sam9260-usart"; | 306 | compatible = "atmel,at91sam9260-usart"; |
| 147 | reg = <0xfffff200 0x200>; | 307 | reg = <0xfffff200 0x200>; |
| 148 | interrupts = <1 4 7>; | 308 | interrupts = <1 4 7>; |
| 309 | pinctrl-names = "default"; | ||
| 310 | pinctrl-0 = <&pinctrl_dbgu>; | ||
| 311 | status = "disabled"; | ||
| 312 | }; | ||
| 313 | |||
| 314 | ssc0: ssc@f0010000 { | ||
| 315 | compatible = "atmel,at91sam9g45-ssc"; | ||
| 316 | reg = <0xf0010000 0x4000>; | ||
| 317 | interrupts = <28 4 5>; | ||
| 318 | pinctrl-names = "default"; | ||
| 319 | pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; | ||
| 149 | status = "disabled"; | 320 | status = "disabled"; |
| 150 | }; | 321 | }; |
| 151 | 322 | ||
| @@ -155,6 +326,8 @@ | |||
| 155 | interrupts = <5 4 5>; | 326 | interrupts = <5 4 5>; |
| 156 | atmel,use-dma-rx; | 327 | atmel,use-dma-rx; |
| 157 | atmel,use-dma-tx; | 328 | atmel,use-dma-tx; |
| 329 | pinctrl-names = "default"; | ||
| 330 | pinctrl-0 = <&pinctrl_usart0>; | ||
| 158 | status = "disabled"; | 331 | status = "disabled"; |
| 159 | }; | 332 | }; |
| 160 | 333 | ||
| @@ -164,6 +337,8 @@ | |||
| 164 | interrupts = <6 4 5>; | 337 | interrupts = <6 4 5>; |
| 165 | atmel,use-dma-rx; | 338 | atmel,use-dma-rx; |
| 166 | atmel,use-dma-tx; | 339 | atmel,use-dma-tx; |
| 340 | pinctrl-names = "default"; | ||
| 341 | pinctrl-0 = <&pinctrl_usart1>; | ||
| 167 | status = "disabled"; | 342 | status = "disabled"; |
| 168 | }; | 343 | }; |
| 169 | 344 | ||
| @@ -173,6 +348,8 @@ | |||
| 173 | interrupts = <7 4 5>; | 348 | interrupts = <7 4 5>; |
| 174 | atmel,use-dma-rx; | 349 | atmel,use-dma-rx; |
| 175 | atmel,use-dma-tx; | 350 | atmel,use-dma-tx; |
| 351 | pinctrl-names = "default"; | ||
| 352 | pinctrl-0 = <&pinctrl_usart2>; | ||
| 176 | status = "disabled"; | 353 | status = "disabled"; |
| 177 | }; | 354 | }; |
| 178 | 355 | ||
| @@ -182,6 +359,8 @@ | |||
| 182 | interrupts = <8 4 5>; | 359 | interrupts = <8 4 5>; |
| 183 | atmel,use-dma-rx; | 360 | atmel,use-dma-rx; |
| 184 | atmel,use-dma-tx; | 361 | atmel,use-dma-tx; |
| 362 | pinctrl-names = "default"; | ||
| 363 | pinctrl-0 = <&pinctrl_usart3>; | ||
| 185 | status = "disabled"; | 364 | status = "disabled"; |
| 186 | }; | 365 | }; |
| 187 | 366 | ||
| @@ -215,6 +394,8 @@ | |||
| 215 | >; | 394 | >; |
| 216 | atmel,nand-addr-offset = <21>; | 395 | atmel,nand-addr-offset = <21>; |
| 217 | atmel,nand-cmd-offset = <22>; | 396 | atmel,nand-cmd-offset = <22>; |
| 397 | pinctrl-names = "default"; | ||
| 398 | pinctrl-0 = <&pinctrl_nand>; | ||
| 218 | gpios = <&pioD 5 0 | 399 | gpios = <&pioD 5 0 |
| 219 | &pioD 4 0 | 400 | &pioD 4 0 |
| 220 | 0 | 401 | 0 |
