aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/boot/dts/at91sam9263.dtsi
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/boot/dts/at91sam9263.dtsi')
-rw-r--r--arch/arm/boot/dts/at91sam9263.dtsi357
1 files changed, 313 insertions, 44 deletions
diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi
index 3e6e5c1abbf3..271d4de026e9 100644
--- a/arch/arm/boot/dts/at91sam9263.dtsi
+++ b/arch/arm/boot/dts/at91sam9263.dtsi
@@ -25,6 +25,8 @@
25 gpio4 = &pioE; 25 gpio4 = &pioE;
26 tcb0 = &tcb0; 26 tcb0 = &tcb0;
27 i2c0 = &i2c0; 27 i2c0 = &i2c0;
28 ssc0 = &ssc0;
29 ssc1 = &ssc1;
28 }; 30 };
29 cpus { 31 cpus {
30 cpu@0 { 32 cpu@0 {
@@ -89,60 +91,275 @@
89 reg = <0xfffffd10 0x10>; 91 reg = <0xfffffd10 0x10>;
90 }; 92 };
91 93
92 pioA: gpio@fffff200 { 94 pinctrl@fffff200 {
93 compatible = "atmel,at91rm9200-gpio"; 95 #address-cells = <1>;
94 reg = <0xfffff200 0x100>; 96 #size-cells = <1>;
95 interrupts = <2 4 1>; 97 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
96 #gpio-cells = <2>; 98 ranges = <0xfffff200 0xfffff200 0xa00>;
97 gpio-controller;
98 interrupt-controller;
99 #interrupt-cells = <2>;
100 };
101 99
102 pioB: gpio@fffff400 { 100 atmel,mux-mask = <
103 compatible = "atmel,at91rm9200-gpio"; 101 /* A B */
104 reg = <0xfffff400 0x100>; 102 0xfffffffb 0xffffe07f /* pioA */
105 interrupts = <3 4 1>; 103 0x0007ffff 0x39072fff /* pioB */
106 #gpio-cells = <2>; 104 0xffffffff 0x3ffffff8 /* pioC */
107 gpio-controller; 105 0xfffffbff 0xffffffff /* pioD */
108 interrupt-controller; 106 0xffe00fff 0xfbfcff00 /* pioE */
109 #interrupt-cells = <2>; 107 >;
110 };
111 108
112 pioC: gpio@fffff600 { 109 /* shared pinctrl settings */
113 compatible = "atmel,at91rm9200-gpio"; 110 dbgu {
114 reg = <0xfffff600 0x100>; 111 pinctrl_dbgu: dbgu-0 {
115 interrupts = <4 4 1>; 112 atmel,pins =
116 #gpio-cells = <2>; 113 <2 30 0x1 0x0 /* PC30 periph A */
117 gpio-controller; 114 2 31 0x1 0x1>; /* PC31 periph with pullup */
118 interrupt-controller; 115 };
119 #interrupt-cells = <2>; 116 };
120 };
121 117
122 pioD: gpio@fffff800 { 118 usart0 {
123 compatible = "atmel,at91rm9200-gpio"; 119 pinctrl_usart0: usart0-0 {
124 reg = <0xfffff800 0x100>; 120 atmel,pins =
125 interrupts = <4 4 1>; 121 <0 26 0x1 0x1 /* PA26 periph A with pullup */
126 #gpio-cells = <2>; 122 0 27 0x1 0x0>; /* PA27 periph A */
127 gpio-controller; 123 };
128 interrupt-controller;
129 #interrupt-cells = <2>;
130 };
131 124
132 pioE: gpio@fffffa00 { 125 pinctrl_usart0_rts: usart0_rts-0 {
133 compatible = "atmel,at91rm9200-gpio"; 126 atmel,pins =
134 reg = <0xfffffa00 0x100>; 127 <0 28 0x1 0x0>; /* PA28 periph A */
135 interrupts = <4 4 1>; 128 };
136 #gpio-cells = <2>; 129
137 gpio-controller; 130 pinctrl_usart0_cts: usart0_cts-0 {
138 interrupt-controller; 131 atmel,pins =
139 #interrupt-cells = <2>; 132 <0 29 0x1 0x0>; /* PA29 periph A */
133 };
134 };
135
136 usart1 {
137 pinctrl_usart1: usart1-0 {
138 atmel,pins =
139 <3 0 0x1 0x1 /* PD0 periph A with pullup */
140 3 1 0x1 0x0>; /* PD1 periph A */
141 };
142
143 pinctrl_usart1_rts: usart1_rts-0 {
144 atmel,pins =
145 <3 7 0x2 0x0>; /* PD7 periph B */
146 };
147
148 pinctrl_usart1_cts: usart1_cts-0 {
149 atmel,pins =
150 <3 8 0x2 0x0>; /* PD8 periph B */
151 };
152 };
153
154 usart2 {
155 pinctrl_usart2: usart2-0 {
156 atmel,pins =
157 <3 2 0x1 0x1 /* PD2 periph A with pullup */
158 3 3 0x1 0x0>; /* PD3 periph A */
159 };
160
161 pinctrl_usart2_rts: usart2_rts-0 {
162 atmel,pins =
163 <3 5 0x2 0x0>; /* PD5 periph B */
164 };
165
166 pinctrl_usart2_cts: usart2_cts-0 {
167 atmel,pins =
168 <4 6 0x2 0x0>; /* PD6 periph B */
169 };
170 };
171
172 nand {
173 pinctrl_nand: nand-0 {
174 atmel,pins =
175 <0 22 0x0 0x1 /* PA22 gpio RDY pin pull_up*/
176 3 15 0x0 0x1>; /* PD15 gpio enable pin pull_up */
177 };
178 };
179
180 macb {
181 pinctrl_macb_rmii: macb_rmii-0 {
182 atmel,pins =
183 <2 25 0x2 0x0 /* PC25 periph B */
184 4 21 0x1 0x0 /* PE21 periph A */
185 4 23 0x1 0x0 /* PE23 periph A */
186 4 24 0x1 0x0 /* PE24 periph A */
187 4 25 0x1 0x0 /* PE25 periph A */
188 4 26 0x1 0x0 /* PE26 periph A */
189 4 27 0x1 0x0 /* PE27 periph A */
190 4 28 0x1 0x0 /* PE28 periph A */
191 4 29 0x1 0x0 /* PE29 periph A */
192 4 30 0x1 0x0>; /* PE30 periph A */
193 };
194
195 pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
196 atmel,pins =
197 <2 20 0x2 0x0 /* PC20 periph B */
198 2 21 0x2 0x0 /* PC21 periph B */
199 2 22 0x2 0x0 /* PC22 periph B */
200 2 23 0x2 0x0 /* PC23 periph B */
201 2 24 0x2 0x0 /* PC24 periph B */
202 2 25 0x2 0x0 /* PC25 periph B */
203 2 27 0x2 0x0 /* PC27 periph B */
204 4 22 0x2 0x0>; /* PE22 periph B */
205 };
206 };
207
208 mmc0 {
209 pinctrl_mmc0_clk: mmc0_clk-0 {
210 atmel,pins =
211 <0 12 0x1 0x0>; /* PA12 periph A */
212 };
213
214 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
215 atmel,pins =
216 <0 1 0x1 0x1 /* PA1 periph A with pullup */
217 0 0 0x1 0x1>; /* PA0 periph A with pullup */
218 };
219
220 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
221 atmel,pins =
222 <0 3 0x1 0x1 /* PA3 periph A with pullup */
223 0 4 0x1 0x1 /* PA4 periph A with pullup */
224 0 5 0x1 0x1>; /* PA5 periph A with pullup */
225 };
226
227 pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
228 atmel,pins =
229 <0 16 0x1 0x1 /* PA16 periph A with pullup */
230 0 17 0x1 0x1>; /* PA17 periph A with pullup */
231 };
232
233 pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
234 atmel,pins =
235 <0 18 0x1 0x1 /* PA18 periph A with pullup */
236 0 19 0x1 0x1 /* PA19 periph A with pullup */
237 0 20 0x1 0x1>; /* PA20 periph A with pullup */
238 };
239 };
240
241 mmc1 {
242 pinctrl_mmc1_clk: mmc1_clk-0 {
243 atmel,pins =
244 <0 6 0x1 0x0>; /* PA6 periph A */
245 };
246
247 pinctrl_mmc1_slot0_cmd_dat0: mmc1_slot0_cmd_dat0-0 {
248 atmel,pins =
249 <0 7 0x1 0x1 /* PA7 periph A with pullup */
250 0 8 0x1 0x1>; /* PA8 periph A with pullup */
251 };
252
253 pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
254 atmel,pins =
255 <0 9 0x1 0x1 /* PA9 periph A with pullup */
256 0 10 0x1 0x1 /* PA10 periph A with pullup */
257 0 11 0x1 0x1>; /* PA11 periph A with pullup */
258 };
259
260 pinctrl_mmc1_slot1_cmd_dat0: mmc1_slot1_cmd_dat0-0 {
261 atmel,pins =
262 <0 21 0x1 0x1 /* PA21 periph A with pullup */
263 0 22 0x1 0x1>; /* PA22 periph A with pullup */
264 };
265
266 pinctrl_mmc1_slot1_dat1_3: mmc1_slot1_dat1_3-0 {
267 atmel,pins =
268 <0 23 0x1 0x1 /* PA23 periph A with pullup */
269 0 24 0x1 0x1 /* PA24 periph A with pullup */
270 0 25 0x1 0x1>; /* PA25 periph A with pullup */
271 };
272 };
273
274 ssc0 {
275 pinctrl_ssc0_tx: ssc0_tx-0 {
276 atmel,pins =
277 <1 0 0x2 0x0 /* PB0 periph B */
278 1 1 0x2 0x0 /* PB1 periph B */
279 1 2 0x2 0x0>; /* PB2 periph B */
280 };
281
282 pinctrl_ssc0_rx: ssc0_rx-0 {
283 atmel,pins =
284 <1 3 0x2 0x0 /* PB3 periph B */
285 1 4 0x2 0x0 /* PB4 periph B */
286 1 5 0x2 0x0>; /* PB5 periph B */
287 };
288 };
289
290 ssc1 {
291 pinctrl_ssc1_tx: ssc1_tx-0 {
292 atmel,pins =
293 <1 6 0x1 0x0 /* PB6 periph A */
294 1 7 0x1 0x0 /* PB7 periph A */
295 1 8 0x1 0x0>; /* PB8 periph A */
296 };
297
298 pinctrl_ssc1_rx: ssc1_rx-0 {
299 atmel,pins =
300 <1 9 0x1 0x0 /* PB9 periph A */
301 1 10 0x1 0x0 /* PB10 periph A */
302 1 11 0x1 0x0>; /* PB11 periph A */
303 };
304 };
305
306 pioA: gpio@fffff200 {
307 compatible = "atmel,at91rm9200-gpio";
308 reg = <0xfffff200 0x200>;
309 interrupts = <2 4 1>;
310 #gpio-cells = <2>;
311 gpio-controller;
312 interrupt-controller;
313 #interrupt-cells = <2>;
314 };
315
316 pioB: gpio@fffff400 {
317 compatible = "atmel,at91rm9200-gpio";
318 reg = <0xfffff400 0x200>;
319 interrupts = <3 4 1>;
320 #gpio-cells = <2>;
321 gpio-controller;
322 interrupt-controller;
323 #interrupt-cells = <2>;
324 };
325
326 pioC: gpio@fffff600 {
327 compatible = "atmel,at91rm9200-gpio";
328 reg = <0xfffff600 0x200>;
329 interrupts = <4 4 1>;
330 #gpio-cells = <2>;
331 gpio-controller;
332 interrupt-controller;
333 #interrupt-cells = <2>;
334 };
335
336 pioD: gpio@fffff800 {
337 compatible = "atmel,at91rm9200-gpio";
338 reg = <0xfffff800 0x200>;
339 interrupts = <4 4 1>;
340 #gpio-cells = <2>;
341 gpio-controller;
342 interrupt-controller;
343 #interrupt-cells = <2>;
344 };
345
346 pioE: gpio@fffffa00 {
347 compatible = "atmel,at91rm9200-gpio";
348 reg = <0xfffffa00 0x200>;
349 interrupts = <4 4 1>;
350 #gpio-cells = <2>;
351 gpio-controller;
352 interrupt-controller;
353 #interrupt-cells = <2>;
354 };
140 }; 355 };
141 356
142 dbgu: serial@ffffee00 { 357 dbgu: serial@ffffee00 {
143 compatible = "atmel,at91sam9260-usart"; 358 compatible = "atmel,at91sam9260-usart";
144 reg = <0xffffee00 0x200>; 359 reg = <0xffffee00 0x200>;
145 interrupts = <1 4 7>; 360 interrupts = <1 4 7>;
361 pinctrl-names = "default";
362 pinctrl-0 = <&pinctrl_dbgu>;
146 status = "disabled"; 363 status = "disabled";
147 }; 364 };
148 365
@@ -152,6 +369,8 @@
152 interrupts = <7 4 5>; 369 interrupts = <7 4 5>;
153 atmel,use-dma-rx; 370 atmel,use-dma-rx;
154 atmel,use-dma-tx; 371 atmel,use-dma-tx;
372 pinctrl-names = "default";
373 pinctrl-0 = <&pinctrl_usart0>;
155 status = "disabled"; 374 status = "disabled";
156 }; 375 };
157 376
@@ -161,6 +380,8 @@
161 interrupts = <8 4 5>; 380 interrupts = <8 4 5>;
162 atmel,use-dma-rx; 381 atmel,use-dma-rx;
163 atmel,use-dma-tx; 382 atmel,use-dma-tx;
383 pinctrl-names = "default";
384 pinctrl-0 = <&pinctrl_usart1>;
164 status = "disabled"; 385 status = "disabled";
165 }; 386 };
166 387
@@ -170,6 +391,26 @@
170 interrupts = <9 4 5>; 391 interrupts = <9 4 5>;
171 atmel,use-dma-rx; 392 atmel,use-dma-rx;
172 atmel,use-dma-tx; 393 atmel,use-dma-tx;
394 pinctrl-names = "default";
395 pinctrl-0 = <&pinctrl_usart2>;
396 status = "disabled";
397 };
398
399 ssc0: ssc@fff98000 {
400 compatible = "atmel,at91rm9200-ssc";
401 reg = <0xfff98000 0x4000>;
402 interrupts = <16 4 5>;
403 pinctrl-names = "default";
404 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
405 status = "disabled";
406 };
407
408 ssc1: ssc@fff9c000 {
409 compatible = "atmel,at91rm9200-ssc";
410 reg = <0xfff9c000 0x4000>;
411 interrupts = <17 4 5>;
412 pinctrl-names = "default";
413 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
173 status = "disabled"; 414 status = "disabled";
174 }; 415 };
175 416
@@ -177,6 +418,8 @@
177 compatible = "cdns,at32ap7000-macb", "cdns,macb"; 418 compatible = "cdns,at32ap7000-macb", "cdns,macb";
178 reg = <0xfffbc000 0x100>; 419 reg = <0xfffbc000 0x100>;
179 interrupts = <21 4 3>; 420 interrupts = <21 4 3>;
421 pinctrl-names = "default";
422 pinctrl-0 = <&pinctrl_macb_rmii>;
180 status = "disabled"; 423 status = "disabled";
181 }; 424 };
182 425
@@ -195,6 +438,30 @@
195 #size-cells = <0>; 438 #size-cells = <0>;
196 status = "disabled"; 439 status = "disabled";
197 }; 440 };
441
442 mmc0: mmc@fff80000 {
443 compatible = "atmel,hsmci";
444 reg = <0xfff80000 0x600>;
445 interrupts = <10 4 0>;
446 #address-cells = <1>;
447 #size-cells = <0>;
448 status = "disabled";
449 };
450
451 mmc1: mmc@fff84000 {
452 compatible = "atmel,hsmci";
453 reg = <0xfff84000 0x600>;
454 interrupts = <11 4 0>;
455 #address-cells = <1>;
456 #size-cells = <0>;
457 status = "disabled";
458 };
459
460 watchdog@fffffd40 {
461 compatible = "atmel,at91sam9260-wdt";
462 reg = <0xfffffd40 0x10>;
463 status = "disabled";
464 };
198 }; 465 };
199 466
200 nand0: nand@40000000 { 467 nand0: nand@40000000 {
@@ -206,6 +473,8 @@
206 >; 473 >;
207 atmel,nand-addr-offset = <21>; 474 atmel,nand-addr-offset = <21>;
208 atmel,nand-cmd-offset = <22>; 475 atmel,nand-cmd-offset = <22>;
476 pinctrl-names = "default";
477 pinctrl-0 = <&pinctrl_nand>;
209 gpios = <&pioA 22 0 478 gpios = <&pioA 22 0
210 &pioD 15 0 479 &pioD 15 0
211 0 480 0
generated by cgit v1.2.2 (git 2.25.0) at 2026-01-09 09:44:20 -0500