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-rw-r--r--arch/arc/boot/dts/abilis_tb100_dvk.dts1
-rw-r--r--arch/arc/boot/dts/abilis_tb101_dvk.dts1
-rw-r--r--arch/arc/boot/dts/axs101.dts1
-rw-r--r--arch/arc/boot/dts/axs103.dts1
-rw-r--r--arch/arc/boot/dts/axs103_idu.dts1
-rw-r--r--arch/arc/boot/dts/nsim_700.dts1
-rw-r--r--arch/arc/boot/dts/nsim_hs.dts1
-rw-r--r--arch/arc/boot/dts/nsim_hs_idu.dts1
-rw-r--r--arch/arc/boot/dts/nsimosci.dts1
-rw-r--r--arch/arc/boot/dts/nsimosci_hs.dts1
-rw-r--r--arch/arc/boot/dts/nsimosci_hs_idu.dts1
-rw-r--r--arch/arc/boot/dts/vdk_hs38.dts1
-rw-r--r--arch/arc/boot/dts/vdk_hs38_smp.dts1
-rw-r--r--arch/arc/boot/dts/zebu_hs.dts69
-rw-r--r--arch/arc/boot/dts/zebu_hs_idu.dts85
15 files changed, 167 insertions, 0 deletions
diff --git a/arch/arc/boot/dts/abilis_tb100_dvk.dts b/arch/arc/boot/dts/abilis_tb100_dvk.dts
index 3dd6ed941464..3acf04db8030 100644
--- a/arch/arc/boot/dts/abilis_tb100_dvk.dts
+++ b/arch/arc/boot/dts/abilis_tb100_dvk.dts
@@ -24,6 +24,7 @@
24/include/ "abilis_tb100.dtsi" 24/include/ "abilis_tb100.dtsi"
25 25
26/ { 26/ {
27 model = "abilis,tb100";
27 chosen { 28 chosen {
28 bootargs = "earlycon=uart8250,mmio32,0xff100000,9600n8 console=ttyS0,9600n8"; 29 bootargs = "earlycon=uart8250,mmio32,0xff100000,9600n8 console=ttyS0,9600n8";
29 }; 30 };
diff --git a/arch/arc/boot/dts/abilis_tb101_dvk.dts b/arch/arc/boot/dts/abilis_tb101_dvk.dts
index 1cf51c280f28..37d88c5dd181 100644
--- a/arch/arc/boot/dts/abilis_tb101_dvk.dts
+++ b/arch/arc/boot/dts/abilis_tb101_dvk.dts
@@ -24,6 +24,7 @@
24/include/ "abilis_tb101.dtsi" 24/include/ "abilis_tb101.dtsi"
25 25
26/ { 26/ {
27 model = "abilis,tb101";
27 chosen { 28 chosen {
28 bootargs = "earlycon=uart8250,mmio32,0xff100000,9600n8 console=ttyS0,9600n8"; 29 bootargs = "earlycon=uart8250,mmio32,0xff100000,9600n8 console=ttyS0,9600n8";
29 }; 30 };
diff --git a/arch/arc/boot/dts/axs101.dts b/arch/arc/boot/dts/axs101.dts
index 3f9b0582e734..d9b9b9dcfc4c 100644
--- a/arch/arc/boot/dts/axs101.dts
+++ b/arch/arc/boot/dts/axs101.dts
@@ -13,6 +13,7 @@
13/include/ "axs10x_mb.dtsi" 13/include/ "axs10x_mb.dtsi"
14 14
15/ { 15/ {
16 model = "snps,axs101";
16 compatible = "snps,axs101", "snps,arc-sdp"; 17 compatible = "snps,axs101", "snps,arc-sdp";
17 18
18 chosen { 19 chosen {
diff --git a/arch/arc/boot/dts/axs103.dts b/arch/arc/boot/dts/axs103.dts
index e6d0e31ea299..ec7fb277a067 100644
--- a/arch/arc/boot/dts/axs103.dts
+++ b/arch/arc/boot/dts/axs103.dts
@@ -16,6 +16,7 @@
16/include/ "axs10x_mb.dtsi" 16/include/ "axs10x_mb.dtsi"
17 17
18/ { 18/ {
19 model = "snps,axs103";
19 compatible = "snps,axs103", "snps,arc-sdp"; 20 compatible = "snps,axs103", "snps,arc-sdp";
20 21
21 chosen { 22 chosen {
diff --git a/arch/arc/boot/dts/axs103_idu.dts b/arch/arc/boot/dts/axs103_idu.dts
index f999fef5a60a..070c29782216 100644
--- a/arch/arc/boot/dts/axs103_idu.dts
+++ b/arch/arc/boot/dts/axs103_idu.dts
@@ -16,6 +16,7 @@
16/include/ "axs10x_mb.dtsi" 16/include/ "axs10x_mb.dtsi"
17 17
18/ { 18/ {
19 model = "snps,axs103-smp";
19 compatible = "snps,axs103", "snps,arc-sdp"; 20 compatible = "snps,axs103", "snps,arc-sdp";
20 21
21 chosen { 22 chosen {
diff --git a/arch/arc/boot/dts/nsim_700.dts b/arch/arc/boot/dts/nsim_700.dts
index 63970513e4ae..ce0ccd20b5bf 100644
--- a/arch/arc/boot/dts/nsim_700.dts
+++ b/arch/arc/boot/dts/nsim_700.dts
@@ -10,6 +10,7 @@
10/include/ "skeleton.dtsi" 10/include/ "skeleton.dtsi"
11 11
12/ { 12/ {
13 model = "snps,nsim";
13 compatible = "snps,nsim"; 14 compatible = "snps,nsim";
14 #address-cells = <1>; 15 #address-cells = <1>;
15 #size-cells = <1>; 16 #size-cells = <1>;
diff --git a/arch/arc/boot/dts/nsim_hs.dts b/arch/arc/boot/dts/nsim_hs.dts
index bf05fe5f67b0..3772c40c245e 100644
--- a/arch/arc/boot/dts/nsim_hs.dts
+++ b/arch/arc/boot/dts/nsim_hs.dts
@@ -10,6 +10,7 @@
10/include/ "skeleton_hs.dtsi" 10/include/ "skeleton_hs.dtsi"
11 11
12/ { 12/ {
13 model = "snps,nsim_hs";
13 compatible = "snps,nsim_hs"; 14 compatible = "snps,nsim_hs";
14 #address-cells = <2>; 15 #address-cells = <2>;
15 #size-cells = <2>; 16 #size-cells = <2>;
diff --git a/arch/arc/boot/dts/nsim_hs_idu.dts b/arch/arc/boot/dts/nsim_hs_idu.dts
index 99eabe1a2bf6..48434d7c4498 100644
--- a/arch/arc/boot/dts/nsim_hs_idu.dts
+++ b/arch/arc/boot/dts/nsim_hs_idu.dts
@@ -10,6 +10,7 @@
10/include/ "skeleton_hs_idu.dtsi" 10/include/ "skeleton_hs_idu.dtsi"
11 11
12/ { 12/ {
13 model = "snps,nsim_hs-smp";
13 compatible = "snps,nsim_hs"; 14 compatible = "snps,nsim_hs";
14 interrupt-parent = <&core_intc>; 15 interrupt-parent = <&core_intc>;
15 16
diff --git a/arch/arc/boot/dts/nsimosci.dts b/arch/arc/boot/dts/nsimosci.dts
index e659a340ca8a..bcf603142a33 100644
--- a/arch/arc/boot/dts/nsimosci.dts
+++ b/arch/arc/boot/dts/nsimosci.dts
@@ -10,6 +10,7 @@
10/include/ "skeleton.dtsi" 10/include/ "skeleton.dtsi"
11 11
12/ { 12/ {
13 model = "snps,nsimosci";
13 compatible = "snps,nsimosci"; 14 compatible = "snps,nsimosci";
14 #address-cells = <1>; 15 #address-cells = <1>;
15 #size-cells = <1>; 16 #size-cells = <1>;
diff --git a/arch/arc/boot/dts/nsimosci_hs.dts b/arch/arc/boot/dts/nsimosci_hs.dts
index 16ce5d65cfde..14a727cbf4c9 100644
--- a/arch/arc/boot/dts/nsimosci_hs.dts
+++ b/arch/arc/boot/dts/nsimosci_hs.dts
@@ -10,6 +10,7 @@
10/include/ "skeleton_hs.dtsi" 10/include/ "skeleton_hs.dtsi"
11 11
12/ { 12/ {
13 model = "snps,nsimosci_hs";
13 compatible = "snps,nsimosci_hs"; 14 compatible = "snps,nsimosci_hs";
14 #address-cells = <1>; 15 #address-cells = <1>;
15 #size-cells = <1>; 16 #size-cells = <1>;
diff --git a/arch/arc/boot/dts/nsimosci_hs_idu.dts b/arch/arc/boot/dts/nsimosci_hs_idu.dts
index ce8dfbc30c4d..cbf65b6cc7c6 100644
--- a/arch/arc/boot/dts/nsimosci_hs_idu.dts
+++ b/arch/arc/boot/dts/nsimosci_hs_idu.dts
@@ -10,6 +10,7 @@
10/include/ "skeleton_hs_idu.dtsi" 10/include/ "skeleton_hs_idu.dtsi"
11 11
12/ { 12/ {
13 model = "snps,nsimosci_hs-smp";
13 compatible = "snps,nsimosci_hs"; 14 compatible = "snps,nsimosci_hs";
14 #address-cells = <1>; 15 #address-cells = <1>;
15 #size-cells = <1>; 16 #size-cells = <1>;
diff --git a/arch/arc/boot/dts/vdk_hs38.dts b/arch/arc/boot/dts/vdk_hs38.dts
index 5d803dd2de59..3c51103f0cd0 100644
--- a/arch/arc/boot/dts/vdk_hs38.dts
+++ b/arch/arc/boot/dts/vdk_hs38.dts
@@ -13,6 +13,7 @@
13/include/ "vdk_axs10x_mb.dtsi" 13/include/ "vdk_axs10x_mb.dtsi"
14 14
15/ { 15/ {
16 model = "snps,vdk_archs";
16 compatible = "snps,axs103"; 17 compatible = "snps,axs103";
17 18
18 chosen { 19 chosen {
diff --git a/arch/arc/boot/dts/vdk_hs38_smp.dts b/arch/arc/boot/dts/vdk_hs38_smp.dts
index 2ba60c399d99..6be68001a6f0 100644
--- a/arch/arc/boot/dts/vdk_hs38_smp.dts
+++ b/arch/arc/boot/dts/vdk_hs38_smp.dts
@@ -13,6 +13,7 @@
13/include/ "vdk_axs10x_mb.dtsi" 13/include/ "vdk_axs10x_mb.dtsi"
14 14
15/ { 15/ {
16 model = "snps,vdk_archs-smp";
16 compatible = "snps,axs103"; 17 compatible = "snps,axs103";
17 18
18 chosen { 19 chosen {
diff --git a/arch/arc/boot/dts/zebu_hs.dts b/arch/arc/boot/dts/zebu_hs.dts
new file mode 100644
index 000000000000..1c1324e84965
--- /dev/null
+++ b/arch/arc/boot/dts/zebu_hs.dts
@@ -0,0 +1,69 @@
1/*
2 * Copyright (C) 2016-2014 Synopsys, Inc. (www.synopsys.com)
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8/dts-v1/;
9
10/include/ "skeleton_hs.dtsi"
11
12/ {
13 model = "snps,zebu_hs";
14 compatible = "snps,zebu_hs";
15 #address-cells = <1>;
16 #size-cells = <1>;
17 interrupt-parent = <&core_intc>;
18
19 memory {
20 device_type = "memory";
21 reg = <0x80000000 0x20000000>; /* 512 */
22 };
23
24 chosen {
25 bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=ttyS0,115200n8 debug print-fatal-signals=1";
26 };
27
28 aliases {
29 serial0 = &uart0;
30 };
31
32 fpga {
33 compatible = "simple-bus";
34 #address-cells = <1>;
35 #size-cells = <1>;
36
37 /* child and parent address space 1:1 mapped */
38 ranges;
39
40 core_clk: core_clk {
41 #clock-cells = <0>;
42 compatible = "fixed-clock";
43 clock-frequency = <50000000>;
44 };
45
46 core_intc: interrupt-controller {
47 compatible = "snps,archs-intc";
48 interrupt-controller;
49 #interrupt-cells = <1>;
50 };
51
52 uart0: serial@f0000000 {
53 compatible = "ns8250";
54 reg = <0xf0000000 0x2000>;
55 interrupts = <24>;
56 clock-frequency = <50000000>;
57 baud = <115200>;
58 reg-shift = <2>;
59 reg-io-width = <4>;
60 no-loopback-test = <1>;
61 };
62
63 arcpct0: pct {
64 compatible = "snps,archs-pct";
65 #interrupt-cells = <1>;
66 interrupts = <20>;
67 };
68 };
69};
diff --git a/arch/arc/boot/dts/zebu_hs_idu.dts b/arch/arc/boot/dts/zebu_hs_idu.dts
new file mode 100644
index 000000000000..65204b4c0f13
--- /dev/null
+++ b/arch/arc/boot/dts/zebu_hs_idu.dts
@@ -0,0 +1,85 @@
1/*
2 * Copyright (C) 2016-2014 Synopsys, Inc. (www.synopsys.com)
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8/dts-v1/;
9
10/include/ "skeleton_hs_idu.dtsi"
11
12/ {
13 model = "snps,zebu_hs-smp";
14 compatible = "snps,zebu_hs";
15 #address-cells = <1>;
16 #size-cells = <1>;
17 interrupt-parent = <&core_intc>;
18
19 memory {
20 device_type = "memory";
21 reg = <0x80000000 0x20000000>; /* 512 */
22 };
23
24 chosen {
25 bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=ttyS0,115200n8 debug";
26 };
27
28 aliases {
29 serial0 = &uart0;
30 };
31
32 fpga {
33 compatible = "simple-bus";
34 #address-cells = <1>;
35 #size-cells = <1>;
36
37 /* child and parent address space 1:1 mapped */
38 ranges;
39
40 core_clk: core_clk {
41 #clock-cells = <0>;
42 compatible = "fixed-clock";
43 clock-frequency = <50000000>; /* 50 MHZ */
44 };
45
46 core_intc: interrupt-controller {
47 compatible = "snps,archs-intc";
48 interrupt-controller;
49 #interrupt-cells = <1>;
50/* interrupts = <16 17 18 19 20 21 22 23 24 25>; */
51 };
52
53 idu_intc: idu-interrupt-controller {
54 compatible = "snps,archs-idu-intc";
55 interrupt-controller;
56 interrupt-parent = <&core_intc>;
57 /* <hwirq distribution>
58 distribution: 0=RR; 1=cpu0, 2=cpu1, 4=cpu2, 8=cpu3 */
59 #interrupt-cells = <2>;
60 interrupts = <24 25 26 27 28 29 30 31>;
61
62 };
63
64 uart0: serial@f0000000 {
65 /* compatible = "ns8250"; Doesn't use FIFOs */
66 compatible = "ns16550a";
67 reg = <0xf0000000 0x2000>;
68 interrupt-parent = <&idu_intc>;
69 /* interrupts = <0 1>; DEST=1*/
70 /* interrupts = <0 2>; DEST=2*/
71 interrupts = <0 0>; /* RR*/
72 clock-frequency = <50000000>;
73 baud = <115200>;
74 reg-shift = <2>;
75 reg-io-width = <4>;
76 no-loopback-test = <1>;
77 };
78
79 arcpct0: pct {
80 compatible = "snps,archs-pct";
81 #interrupt-cells = <1>;
82 interrupts = <20>;
83 };
84 };
85};