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-rw-r--r--arch/arc/Kconfig6
-rw-r--r--arch/arc/Makefile7
-rw-r--r--arch/arc/boot/dts/abilis_tb100_dvk.dts1
-rw-r--r--arch/arc/boot/dts/abilis_tb101_dvk.dts1
-rw-r--r--arch/arc/boot/dts/axs101.dts1
-rw-r--r--arch/arc/boot/dts/axs103.dts1
-rw-r--r--arch/arc/boot/dts/axs103_idu.dts1
-rw-r--r--arch/arc/boot/dts/nsim_700.dts1
-rw-r--r--arch/arc/boot/dts/nsim_hs.dts1
-rw-r--r--arch/arc/boot/dts/nsim_hs_idu.dts1
-rw-r--r--arch/arc/boot/dts/nsimosci.dts1
-rw-r--r--arch/arc/boot/dts/nsimosci_hs.dts1
-rw-r--r--arch/arc/boot/dts/nsimosci_hs_idu.dts1
-rw-r--r--arch/arc/boot/dts/vdk_hs38.dts1
-rw-r--r--arch/arc/boot/dts/vdk_hs38_smp.dts1
-rw-r--r--arch/arc/boot/dts/zebu_hs.dts69
-rw-r--r--arch/arc/boot/dts/zebu_hs_idu.dts85
-rw-r--r--arch/arc/configs/axs101_defconfig3
-rw-r--r--arch/arc/configs/axs103_defconfig3
-rw-r--r--arch/arc/configs/axs103_smp_defconfig3
-rw-r--r--arch/arc/configs/nsim_hs_defconfig5
-rw-r--r--arch/arc/configs/nsim_hs_smp_defconfig3
-rw-r--r--arch/arc/configs/zebu_hs_defconfig86
-rw-r--r--arch/arc/configs/zebu_hs_smp_defconfig89
-rw-r--r--arch/arc/include/asm/arcregs.h10
-rw-r--r--arch/arc/include/asm/atomic.h263
-rw-r--r--arch/arc/include/asm/cache.h2
-rw-r--r--arch/arc/include/asm/dwarf.h38
-rw-r--r--arch/arc/include/asm/elf.h3
-rw-r--r--arch/arc/include/asm/irqflags-arcv2.h2
-rw-r--r--arch/arc/include/asm/linkage.h12
-rw-r--r--arch/arc/include/asm/perf_event.h3
-rw-r--r--arch/arc/kernel/ctx_sw_asm.S3
-rw-r--r--arch/arc/kernel/entry.S24
-rw-r--r--arch/arc/kernel/intc-arcv2.c2
-rw-r--r--arch/arc/kernel/module.c19
-rw-r--r--arch/arc/kernel/perf_event.c6
-rw-r--r--arch/arc/kernel/setup.c5
-rw-r--r--arch/arc/kernel/unwind.c24
-rw-r--r--arch/arc/kernel/vmlinux.lds.S21
-rw-r--r--arch/arc/lib/memcmp.S4
-rw-r--r--arch/arc/lib/memcpy-700.S4
-rw-r--r--arch/arc/lib/memcpy-archs.S4
-rw-r--r--arch/arc/lib/memset-archs.S8
-rw-r--r--arch/arc/lib/memset.S8
-rw-r--r--arch/arc/lib/strchr-700.S4
-rw-r--r--arch/arc/lib/strcmp-archs.S4
-rw-r--r--arch/arc/lib/strcmp.S4
-rw-r--r--arch/arc/lib/strcpy-700.S4
-rw-r--r--arch/arc/lib/strlen.S4
-rw-r--r--arch/arc/mm/cache.c23
-rw-r--r--arch/arc/mm/ioremap.c2
-rw-r--r--arch/arc/plat-sim/platform.c1
53 files changed, 769 insertions, 114 deletions
diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig
index 0d3e59f56974..ecd12379e2cd 100644
--- a/arch/arc/Kconfig
+++ b/arch/arc/Kconfig
@@ -13,7 +13,7 @@ config ARC
13 select CLKSRC_OF 13 select CLKSRC_OF
14 select CLONE_BACKWARDS 14 select CLONE_BACKWARDS
15 select COMMON_CLK 15 select COMMON_CLK
16 select GENERIC_ATOMIC64 16 select GENERIC_ATOMIC64 if !ISA_ARCV2 || !(ARC_HAS_LL64 && ARC_HAS_LLSC)
17 select GENERIC_CLOCKEVENTS 17 select GENERIC_CLOCKEVENTS
18 select GENERIC_FIND_FIRST_BIT 18 select GENERIC_FIND_FIRST_BIT
19 # for now, we don't need GENERIC_IRQ_PROBE, CONFIG_GENERIC_IRQ_CHIP 19 # for now, we don't need GENERIC_IRQ_PROBE, CONFIG_GENERIC_IRQ_CHIP
@@ -353,8 +353,8 @@ endchoice
353 353
354config NODES_SHIFT 354config NODES_SHIFT
355 int "Maximum NUMA Nodes (as a power of 2)" 355 int "Maximum NUMA Nodes (as a power of 2)"
356 default "1" if !DISCONTIGMEM 356 default "0" if !DISCONTIGMEM
357 default "2" if DISCONTIGMEM 357 default "1" if DISCONTIGMEM
358 depends on NEED_MULTIPLE_NODES 358 depends on NEED_MULTIPLE_NODES
359 ---help--- 359 ---help---
360 Accessing memory beyond 1GB (with or w/o PAE) requires 2 memory 360 Accessing memory beyond 1GB (with or w/o PAE) requires 2 memory
diff --git a/arch/arc/Makefile b/arch/arc/Makefile
index 601ed173080b..aa82d13d4213 100644
--- a/arch/arc/Makefile
+++ b/arch/arc/Makefile
@@ -47,7 +47,6 @@ endif
47 47
48upto_gcc44 := $(call cc-ifversion, -le, 0404, y) 48upto_gcc44 := $(call cc-ifversion, -le, 0404, y)
49atleast_gcc44 := $(call cc-ifversion, -ge, 0404, y) 49atleast_gcc44 := $(call cc-ifversion, -ge, 0404, y)
50atleast_gcc48 := $(call cc-ifversion, -ge, 0408, y)
51 50
52cflags-$(atleast_gcc44) += -fsection-anchors 51cflags-$(atleast_gcc44) += -fsection-anchors
53 52
@@ -66,10 +65,8 @@ endif
66 65
67endif 66endif
68 67
69# By default gcc 4.8 generates dwarf4 which kernel unwinder can't grok 68cfi := $(call as-instr,.cfi_startproc\n.cfi_endproc,-DARC_DW2_UNWIND_AS_CFI)
70ifeq ($(atleast_gcc48),y) 69cflags-$(CONFIG_ARC_DW2_UNWIND) += -fasynchronous-unwind-tables $(cfi)
71cflags-$(CONFIG_ARC_DW2_UNWIND) += -gdwarf-2
72endif
73 70
74ifndef CONFIG_CC_OPTIMIZE_FOR_SIZE 71ifndef CONFIG_CC_OPTIMIZE_FOR_SIZE
75# Generic build system uses -O2, we want -O3 72# Generic build system uses -O2, we want -O3
diff --git a/arch/arc/boot/dts/abilis_tb100_dvk.dts b/arch/arc/boot/dts/abilis_tb100_dvk.dts
index 3dd6ed941464..3acf04db8030 100644
--- a/arch/arc/boot/dts/abilis_tb100_dvk.dts
+++ b/arch/arc/boot/dts/abilis_tb100_dvk.dts
@@ -24,6 +24,7 @@
24/include/ "abilis_tb100.dtsi" 24/include/ "abilis_tb100.dtsi"
25 25
26/ { 26/ {
27 model = "abilis,tb100";
27 chosen { 28 chosen {
28 bootargs = "earlycon=uart8250,mmio32,0xff100000,9600n8 console=ttyS0,9600n8"; 29 bootargs = "earlycon=uart8250,mmio32,0xff100000,9600n8 console=ttyS0,9600n8";
29 }; 30 };
diff --git a/arch/arc/boot/dts/abilis_tb101_dvk.dts b/arch/arc/boot/dts/abilis_tb101_dvk.dts
index 1cf51c280f28..37d88c5dd181 100644
--- a/arch/arc/boot/dts/abilis_tb101_dvk.dts
+++ b/arch/arc/boot/dts/abilis_tb101_dvk.dts
@@ -24,6 +24,7 @@
24/include/ "abilis_tb101.dtsi" 24/include/ "abilis_tb101.dtsi"
25 25
26/ { 26/ {
27 model = "abilis,tb101";
27 chosen { 28 chosen {
28 bootargs = "earlycon=uart8250,mmio32,0xff100000,9600n8 console=ttyS0,9600n8"; 29 bootargs = "earlycon=uart8250,mmio32,0xff100000,9600n8 console=ttyS0,9600n8";
29 }; 30 };
diff --git a/arch/arc/boot/dts/axs101.dts b/arch/arc/boot/dts/axs101.dts
index 3f9b0582e734..d9b9b9dcfc4c 100644
--- a/arch/arc/boot/dts/axs101.dts
+++ b/arch/arc/boot/dts/axs101.dts
@@ -13,6 +13,7 @@
13/include/ "axs10x_mb.dtsi" 13/include/ "axs10x_mb.dtsi"
14 14
15/ { 15/ {
16 model = "snps,axs101";
16 compatible = "snps,axs101", "snps,arc-sdp"; 17 compatible = "snps,axs101", "snps,arc-sdp";
17 18
18 chosen { 19 chosen {
diff --git a/arch/arc/boot/dts/axs103.dts b/arch/arc/boot/dts/axs103.dts
index e6d0e31ea299..ec7fb277a067 100644
--- a/arch/arc/boot/dts/axs103.dts
+++ b/arch/arc/boot/dts/axs103.dts
@@ -16,6 +16,7 @@
16/include/ "axs10x_mb.dtsi" 16/include/ "axs10x_mb.dtsi"
17 17
18/ { 18/ {
19 model = "snps,axs103";
19 compatible = "snps,axs103", "snps,arc-sdp"; 20 compatible = "snps,axs103", "snps,arc-sdp";
20 21
21 chosen { 22 chosen {
diff --git a/arch/arc/boot/dts/axs103_idu.dts b/arch/arc/boot/dts/axs103_idu.dts
index f999fef5a60a..070c29782216 100644
--- a/arch/arc/boot/dts/axs103_idu.dts
+++ b/arch/arc/boot/dts/axs103_idu.dts
@@ -16,6 +16,7 @@
16/include/ "axs10x_mb.dtsi" 16/include/ "axs10x_mb.dtsi"
17 17
18/ { 18/ {
19 model = "snps,axs103-smp";
19 compatible = "snps,axs103", "snps,arc-sdp"; 20 compatible = "snps,axs103", "snps,arc-sdp";
20 21
21 chosen { 22 chosen {
diff --git a/arch/arc/boot/dts/nsim_700.dts b/arch/arc/boot/dts/nsim_700.dts
index 63970513e4ae..ce0ccd20b5bf 100644
--- a/arch/arc/boot/dts/nsim_700.dts
+++ b/arch/arc/boot/dts/nsim_700.dts
@@ -10,6 +10,7 @@
10/include/ "skeleton.dtsi" 10/include/ "skeleton.dtsi"
11 11
12/ { 12/ {
13 model = "snps,nsim";
13 compatible = "snps,nsim"; 14 compatible = "snps,nsim";
14 #address-cells = <1>; 15 #address-cells = <1>;
15 #size-cells = <1>; 16 #size-cells = <1>;
diff --git a/arch/arc/boot/dts/nsim_hs.dts b/arch/arc/boot/dts/nsim_hs.dts
index bf05fe5f67b0..3772c40c245e 100644
--- a/arch/arc/boot/dts/nsim_hs.dts
+++ b/arch/arc/boot/dts/nsim_hs.dts
@@ -10,6 +10,7 @@
10/include/ "skeleton_hs.dtsi" 10/include/ "skeleton_hs.dtsi"
11 11
12/ { 12/ {
13 model = "snps,nsim_hs";
13 compatible = "snps,nsim_hs"; 14 compatible = "snps,nsim_hs";
14 #address-cells = <2>; 15 #address-cells = <2>;
15 #size-cells = <2>; 16 #size-cells = <2>;
diff --git a/arch/arc/boot/dts/nsim_hs_idu.dts b/arch/arc/boot/dts/nsim_hs_idu.dts
index 99eabe1a2bf6..48434d7c4498 100644
--- a/arch/arc/boot/dts/nsim_hs_idu.dts
+++ b/arch/arc/boot/dts/nsim_hs_idu.dts
@@ -10,6 +10,7 @@
10/include/ "skeleton_hs_idu.dtsi" 10/include/ "skeleton_hs_idu.dtsi"
11 11
12/ { 12/ {
13 model = "snps,nsim_hs-smp";
13 compatible = "snps,nsim_hs"; 14 compatible = "snps,nsim_hs";
14 interrupt-parent = <&core_intc>; 15 interrupt-parent = <&core_intc>;
15 16
diff --git a/arch/arc/boot/dts/nsimosci.dts b/arch/arc/boot/dts/nsimosci.dts
index e659a340ca8a..bcf603142a33 100644
--- a/arch/arc/boot/dts/nsimosci.dts
+++ b/arch/arc/boot/dts/nsimosci.dts
@@ -10,6 +10,7 @@
10/include/ "skeleton.dtsi" 10/include/ "skeleton.dtsi"
11 11
12/ { 12/ {
13 model = "snps,nsimosci";
13 compatible = "snps,nsimosci"; 14 compatible = "snps,nsimosci";
14 #address-cells = <1>; 15 #address-cells = <1>;
15 #size-cells = <1>; 16 #size-cells = <1>;
diff --git a/arch/arc/boot/dts/nsimosci_hs.dts b/arch/arc/boot/dts/nsimosci_hs.dts
index 16ce5d65cfde..14a727cbf4c9 100644
--- a/arch/arc/boot/dts/nsimosci_hs.dts
+++ b/arch/arc/boot/dts/nsimosci_hs.dts
@@ -10,6 +10,7 @@
10/include/ "skeleton_hs.dtsi" 10/include/ "skeleton_hs.dtsi"
11 11
12/ { 12/ {
13 model = "snps,nsimosci_hs";
13 compatible = "snps,nsimosci_hs"; 14 compatible = "snps,nsimosci_hs";
14 #address-cells = <1>; 15 #address-cells = <1>;
15 #size-cells = <1>; 16 #size-cells = <1>;
diff --git a/arch/arc/boot/dts/nsimosci_hs_idu.dts b/arch/arc/boot/dts/nsimosci_hs_idu.dts
index ce8dfbc30c4d..cbf65b6cc7c6 100644
--- a/arch/arc/boot/dts/nsimosci_hs_idu.dts
+++ b/arch/arc/boot/dts/nsimosci_hs_idu.dts
@@ -10,6 +10,7 @@
10/include/ "skeleton_hs_idu.dtsi" 10/include/ "skeleton_hs_idu.dtsi"
11 11
12/ { 12/ {
13 model = "snps,nsimosci_hs-smp";
13 compatible = "snps,nsimosci_hs"; 14 compatible = "snps,nsimosci_hs";
14 #address-cells = <1>; 15 #address-cells = <1>;
15 #size-cells = <1>; 16 #size-cells = <1>;
diff --git a/arch/arc/boot/dts/vdk_hs38.dts b/arch/arc/boot/dts/vdk_hs38.dts
index 5d803dd2de59..3c51103f0cd0 100644
--- a/arch/arc/boot/dts/vdk_hs38.dts
+++ b/arch/arc/boot/dts/vdk_hs38.dts
@@ -13,6 +13,7 @@
13/include/ "vdk_axs10x_mb.dtsi" 13/include/ "vdk_axs10x_mb.dtsi"
14 14
15/ { 15/ {
16 model = "snps,vdk_archs";
16 compatible = "snps,axs103"; 17 compatible = "snps,axs103";
17 18
18 chosen { 19 chosen {
diff --git a/arch/arc/boot/dts/vdk_hs38_smp.dts b/arch/arc/boot/dts/vdk_hs38_smp.dts
index 2ba60c399d99..6be68001a6f0 100644
--- a/arch/arc/boot/dts/vdk_hs38_smp.dts
+++ b/arch/arc/boot/dts/vdk_hs38_smp.dts
@@ -13,6 +13,7 @@
13/include/ "vdk_axs10x_mb.dtsi" 13/include/ "vdk_axs10x_mb.dtsi"
14 14
15/ { 15/ {
16 model = "snps,vdk_archs-smp";
16 compatible = "snps,axs103"; 17 compatible = "snps,axs103";
17 18
18 chosen { 19 chosen {
diff --git a/arch/arc/boot/dts/zebu_hs.dts b/arch/arc/boot/dts/zebu_hs.dts
new file mode 100644
index 000000000000..1c1324e84965
--- /dev/null
+++ b/arch/arc/boot/dts/zebu_hs.dts
@@ -0,0 +1,69 @@
1/*
2 * Copyright (C) 2016-2014 Synopsys, Inc. (www.synopsys.com)
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8/dts-v1/;
9
10/include/ "skeleton_hs.dtsi"
11
12/ {
13 model = "snps,zebu_hs";
14 compatible = "snps,zebu_hs";
15 #address-cells = <1>;
16 #size-cells = <1>;
17 interrupt-parent = <&core_intc>;
18
19 memory {
20 device_type = "memory";
21 reg = <0x80000000 0x20000000>; /* 512 */
22 };
23
24 chosen {
25 bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=ttyS0,115200n8 debug print-fatal-signals=1";
26 };
27
28 aliases {
29 serial0 = &uart0;
30 };
31
32 fpga {
33 compatible = "simple-bus";
34 #address-cells = <1>;
35 #size-cells = <1>;
36
37 /* child and parent address space 1:1 mapped */
38 ranges;
39
40 core_clk: core_clk {
41 #clock-cells = <0>;
42 compatible = "fixed-clock";
43 clock-frequency = <50000000>;
44 };
45
46 core_intc: interrupt-controller {
47 compatible = "snps,archs-intc";
48 interrupt-controller;
49 #interrupt-cells = <1>;
50 };
51
52 uart0: serial@f0000000 {
53 compatible = "ns8250";
54 reg = <0xf0000000 0x2000>;
55 interrupts = <24>;
56 clock-frequency = <50000000>;
57 baud = <115200>;
58 reg-shift = <2>;
59 reg-io-width = <4>;
60 no-loopback-test = <1>;
61 };
62
63 arcpct0: pct {
64 compatible = "snps,archs-pct";
65 #interrupt-cells = <1>;
66 interrupts = <20>;
67 };
68 };
69};
diff --git a/arch/arc/boot/dts/zebu_hs_idu.dts b/arch/arc/boot/dts/zebu_hs_idu.dts
new file mode 100644
index 000000000000..65204b4c0f13
--- /dev/null
+++ b/arch/arc/boot/dts/zebu_hs_idu.dts
@@ -0,0 +1,85 @@
1/*
2 * Copyright (C) 2016-2014 Synopsys, Inc. (www.synopsys.com)
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8/dts-v1/;
9
10/include/ "skeleton_hs_idu.dtsi"
11
12/ {
13 model = "snps,zebu_hs-smp";
14 compatible = "snps,zebu_hs";
15 #address-cells = <1>;
16 #size-cells = <1>;
17 interrupt-parent = <&core_intc>;
18
19 memory {
20 device_type = "memory";
21 reg = <0x80000000 0x20000000>; /* 512 */
22 };
23
24 chosen {
25 bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=ttyS0,115200n8 debug";
26 };
27
28 aliases {
29 serial0 = &uart0;
30 };
31
32 fpga {
33 compatible = "simple-bus";
34 #address-cells = <1>;
35 #size-cells = <1>;
36
37 /* child and parent address space 1:1 mapped */
38 ranges;
39
40 core_clk: core_clk {
41 #clock-cells = <0>;
42 compatible = "fixed-clock";
43 clock-frequency = <50000000>; /* 50 MHZ */
44 };
45
46 core_intc: interrupt-controller {
47 compatible = "snps,archs-intc";
48 interrupt-controller;
49 #interrupt-cells = <1>;
50/* interrupts = <16 17 18 19 20 21 22 23 24 25>; */
51 };
52
53 idu_intc: idu-interrupt-controller {
54 compatible = "snps,archs-idu-intc";
55 interrupt-controller;
56 interrupt-parent = <&core_intc>;
57 /* <hwirq distribution>
58 distribution: 0=RR; 1=cpu0, 2=cpu1, 4=cpu2, 8=cpu3 */
59 #interrupt-cells = <2>;
60 interrupts = <24 25 26 27 28 29 30 31>;
61
62 };
63
64 uart0: serial@f0000000 {
65 /* compatible = "ns8250"; Doesn't use FIFOs */
66 compatible = "ns16550a";
67 reg = <0xf0000000 0x2000>;
68 interrupt-parent = <&idu_intc>;
69 /* interrupts = <0 1>; DEST=1*/
70 /* interrupts = <0 2>; DEST=2*/
71 interrupts = <0 0>; /* RR*/
72 clock-frequency = <50000000>;
73 baud = <115200>;
74 reg-shift = <2>;
75 reg-io-width = <4>;
76 no-loopback-test = <1>;
77 };
78
79 arcpct0: pct {
80 compatible = "snps,archs-pct";
81 #interrupt-cells = <1>;
82 interrupts = <20>;
83 };
84 };
85};
diff --git a/arch/arc/configs/axs101_defconfig b/arch/arc/configs/axs101_defconfig
index 6cdffea3a914..0a0eaf09aac7 100644
--- a/arch/arc/configs/axs101_defconfig
+++ b/arch/arc/configs/axs101_defconfig
@@ -18,6 +18,9 @@ CONFIG_PERF_EVENTS=y
18# CONFIG_SLUB_DEBUG is not set 18# CONFIG_SLUB_DEBUG is not set
19# CONFIG_COMPAT_BRK is not set 19# CONFIG_COMPAT_BRK is not set
20CONFIG_MODULES=y 20CONFIG_MODULES=y
21CONFIG_MODULE_FORCE_LOAD=y
22CONFIG_MODULE_UNLOAD=y
23CONFIG_MODULE_FORCE_UNLOAD=y
21CONFIG_PARTITION_ADVANCED=y 24CONFIG_PARTITION_ADVANCED=y
22CONFIG_ARC_PLAT_AXS10X=y 25CONFIG_ARC_PLAT_AXS10X=y
23CONFIG_AXS101=y 26CONFIG_AXS101=y
diff --git a/arch/arc/configs/axs103_defconfig b/arch/arc/configs/axs103_defconfig
index 491b3b5f22bd..2233f5777a71 100644
--- a/arch/arc/configs/axs103_defconfig
+++ b/arch/arc/configs/axs103_defconfig
@@ -18,6 +18,9 @@ CONFIG_PERF_EVENTS=y
18# CONFIG_SLUB_DEBUG is not set 18# CONFIG_SLUB_DEBUG is not set
19# CONFIG_COMPAT_BRK is not set 19# CONFIG_COMPAT_BRK is not set
20CONFIG_MODULES=y 20CONFIG_MODULES=y
21CONFIG_MODULE_FORCE_LOAD=y
22CONFIG_MODULE_UNLOAD=y
23CONFIG_MODULE_FORCE_UNLOAD=y
21CONFIG_PARTITION_ADVANCED=y 24CONFIG_PARTITION_ADVANCED=y
22CONFIG_ARC_PLAT_AXS10X=y 25CONFIG_ARC_PLAT_AXS10X=y
23CONFIG_AXS103=y 26CONFIG_AXS103=y
diff --git a/arch/arc/configs/axs103_smp_defconfig b/arch/arc/configs/axs103_smp_defconfig
index b25ee73b2e79..110874705085 100644
--- a/arch/arc/configs/axs103_smp_defconfig
+++ b/arch/arc/configs/axs103_smp_defconfig
@@ -18,6 +18,9 @@ CONFIG_PERF_EVENTS=y
18# CONFIG_COMPAT_BRK is not set 18# CONFIG_COMPAT_BRK is not set
19CONFIG_SLAB=y 19CONFIG_SLAB=y
20CONFIG_MODULES=y 20CONFIG_MODULES=y
21CONFIG_MODULE_FORCE_LOAD=y
22CONFIG_MODULE_UNLOAD=y
23CONFIG_MODULE_FORCE_UNLOAD=y
21CONFIG_PARTITION_ADVANCED=y 24CONFIG_PARTITION_ADVANCED=y
22CONFIG_ARC_PLAT_AXS10X=y 25CONFIG_ARC_PLAT_AXS10X=y
23CONFIG_AXS103=y 26CONFIG_AXS103=y
diff --git a/arch/arc/configs/nsim_hs_defconfig b/arch/arc/configs/nsim_hs_defconfig
index a99dc7a3f0af..65ab9fbf83f2 100644
--- a/arch/arc/configs/nsim_hs_defconfig
+++ b/arch/arc/configs/nsim_hs_defconfig
@@ -11,13 +11,16 @@ CONFIG_NAMESPACES=y
11# CONFIG_UTS_NS is not set 11# CONFIG_UTS_NS is not set
12# CONFIG_PID_NS is not set 12# CONFIG_PID_NS is not set
13CONFIG_BLK_DEV_INITRD=y 13CONFIG_BLK_DEV_INITRD=y
14CONFIG_INITRAMFS_SOURCE="../arc_initramfs_hs/" 14CONFIG_INITRAMFS_SOURCE="../../arc_initramfs_hs/"
15CONFIG_KALLSYMS_ALL=y 15CONFIG_KALLSYMS_ALL=y
16CONFIG_EMBEDDED=y 16CONFIG_EMBEDDED=y
17# CONFIG_SLUB_DEBUG is not set 17# CONFIG_SLUB_DEBUG is not set
18# CONFIG_COMPAT_BRK is not set 18# CONFIG_COMPAT_BRK is not set
19CONFIG_KPROBES=y 19CONFIG_KPROBES=y
20CONFIG_MODULES=y 20CONFIG_MODULES=y
21CONFIG_MODULE_FORCE_LOAD=y
22CONFIG_MODULE_UNLOAD=y
23CONFIG_MODULE_FORCE_UNLOAD=y
21# CONFIG_LBDAF is not set 24# CONFIG_LBDAF is not set
22# CONFIG_BLK_DEV_BSG is not set 25# CONFIG_BLK_DEV_BSG is not set
23# CONFIG_IOSCHED_DEADLINE is not set 26# CONFIG_IOSCHED_DEADLINE is not set
diff --git a/arch/arc/configs/nsim_hs_smp_defconfig b/arch/arc/configs/nsim_hs_smp_defconfig
index 59f221fc9a41..3b3990cddbe1 100644
--- a/arch/arc/configs/nsim_hs_smp_defconfig
+++ b/arch/arc/configs/nsim_hs_smp_defconfig
@@ -16,6 +16,9 @@ CONFIG_EMBEDDED=y
16# CONFIG_COMPAT_BRK is not set 16# CONFIG_COMPAT_BRK is not set
17CONFIG_KPROBES=y 17CONFIG_KPROBES=y
18CONFIG_MODULES=y 18CONFIG_MODULES=y
19CONFIG_MODULE_FORCE_LOAD=y
20CONFIG_MODULE_UNLOAD=y
21CONFIG_MODULE_FORCE_UNLOAD=y
19# CONFIG_LBDAF is not set 22# CONFIG_LBDAF is not set
20# CONFIG_BLK_DEV_BSG is not set 23# CONFIG_BLK_DEV_BSG is not set
21# CONFIG_IOSCHED_DEADLINE is not set 24# CONFIG_IOSCHED_DEADLINE is not set
diff --git a/arch/arc/configs/zebu_hs_defconfig b/arch/arc/configs/zebu_hs_defconfig
new file mode 100644
index 000000000000..9f6166be7145
--- /dev/null
+++ b/arch/arc/configs/zebu_hs_defconfig
@@ -0,0 +1,86 @@
1CONFIG_DEFAULT_HOSTNAME="ARCLinux"
2# CONFIG_SWAP is not set
3CONFIG_SYSVIPC=y
4CONFIG_POSIX_MQUEUE=y
5# CONFIG_CROSS_MEMORY_ATTACH is not set
6CONFIG_NO_HZ_IDLE=y
7CONFIG_HIGH_RES_TIMERS=y
8CONFIG_IKCONFIG=y
9CONFIG_IKCONFIG_PROC=y
10CONFIG_NAMESPACES=y
11# CONFIG_UTS_NS is not set
12# CONFIG_PID_NS is not set
13CONFIG_BLK_DEV_INITRD=y
14CONFIG_INITRAMFS_SOURCE="../../arc_initramfs_hs/"
15CONFIG_EXPERT=y
16CONFIG_PERF_EVENTS=y
17# CONFIG_COMPAT_BRK is not set
18CONFIG_SLAB=y
19CONFIG_MODULES=y
20# CONFIG_LBDAF is not set
21# CONFIG_BLK_DEV_BSG is not set
22# CONFIG_IOSCHED_DEADLINE is not set
23# CONFIG_IOSCHED_CFQ is not set
24CONFIG_ARC_PLAT_SIM=y
25CONFIG_ISA_ARCV2=y
26CONFIG_ARC_BUILTIN_DTB_NAME="zebu_hs"
27CONFIG_PREEMPT=y
28# CONFIG_COMPACTION is not set
29CONFIG_NET=y
30CONFIG_PACKET=y
31CONFIG_PACKET_DIAG=y
32CONFIG_UNIX=y
33CONFIG_UNIX_DIAG=y
34CONFIG_NET_KEY=y
35CONFIG_INET=y
36# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
37# CONFIG_INET_XFRM_MODE_TUNNEL is not set
38# CONFIG_INET_XFRM_MODE_BEET is not set
39# CONFIG_IPV6 is not set
40# CONFIG_WIRELESS is not set
41CONFIG_DEVTMPFS=y
42# CONFIG_STANDALONE is not set
43# CONFIG_PREVENT_FIRMWARE_BUILD is not set
44# CONFIG_FIRMWARE_IN_KERNEL is not set
45# CONFIG_BLK_DEV is not set
46CONFIG_NETDEVICES=y
47# CONFIG_NET_VENDOR_ARC is not set
48# CONFIG_NET_VENDOR_BROADCOM is not set
49# CONFIG_NET_VENDOR_INTEL is not set
50# CONFIG_NET_VENDOR_MARVELL is not set
51# CONFIG_NET_VENDOR_MICREL is not set
52# CONFIG_NET_VENDOR_NATSEMI is not set
53# CONFIG_NET_VENDOR_SEEQ is not set
54# CONFIG_NET_VENDOR_STMICRO is not set
55# CONFIG_NET_VENDOR_VIA is not set
56# CONFIG_NET_VENDOR_WIZNET is not set
57# CONFIG_WLAN is not set
58CONFIG_INPUT_EVDEV=y
59CONFIG_MOUSE_PS2_TOUCHKIT=y
60# CONFIG_SERIO_SERPORT is not set
61CONFIG_SERIO_ARC_PS2=y
62# CONFIG_LEGACY_PTYS is not set
63# CONFIG_DEVKMEM is not set
64CONFIG_SERIAL_8250=y
65CONFIG_SERIAL_8250_CONSOLE=y
66CONFIG_SERIAL_8250_NR_UARTS=1
67CONFIG_SERIAL_8250_RUNTIME_UARTS=1
68CONFIG_SERIAL_8250_DW=y
69CONFIG_SERIAL_OF_PLATFORM=y
70# CONFIG_HW_RANDOM is not set
71# CONFIG_HWMON is not set
72CONFIG_FB=y
73CONFIG_FRAMEBUFFER_CONSOLE=y
74CONFIG_LOGO=y
75# CONFIG_HID is not set
76# CONFIG_USB_SUPPORT is not set
77# CONFIG_IOMMU_SUPPORT is not set
78CONFIG_EXT2_FS=y
79CONFIG_EXT2_FS_XATTR=y
80CONFIG_TMPFS=y
81# CONFIG_MISC_FILESYSTEMS is not set
82CONFIG_NFS_FS=y
83# CONFIG_ENABLE_WARN_DEPRECATED is not set
84# CONFIG_ENABLE_MUST_CHECK is not set
85CONFIG_DEBUG_MEMORY_INIT=y
86# CONFIG_DEBUG_PREEMPT is not set
diff --git a/arch/arc/configs/zebu_hs_smp_defconfig b/arch/arc/configs/zebu_hs_smp_defconfig
new file mode 100644
index 000000000000..44e9693f4257
--- /dev/null
+++ b/arch/arc/configs/zebu_hs_smp_defconfig
@@ -0,0 +1,89 @@
1CONFIG_DEFAULT_HOSTNAME="ARCLinux"
2# CONFIG_SWAP is not set
3CONFIG_SYSVIPC=y
4CONFIG_POSIX_MQUEUE=y
5# CONFIG_CROSS_MEMORY_ATTACH is not set
6CONFIG_NO_HZ_IDLE=y
7CONFIG_HIGH_RES_TIMERS=y
8CONFIG_IKCONFIG=y
9CONFIG_IKCONFIG_PROC=y
10CONFIG_NAMESPACES=y
11# CONFIG_UTS_NS is not set
12# CONFIG_PID_NS is not set
13CONFIG_BLK_DEV_INITRD=y
14CONFIG_INITRAMFS_SOURCE="../../arc_initramfs_hs/"
15CONFIG_EMBEDDED=y
16CONFIG_PERF_EVENTS=y
17# CONFIG_VM_EVENT_COUNTERS is not set
18# CONFIG_COMPAT_BRK is not set
19CONFIG_SLAB=y
20CONFIG_KPROBES=y
21CONFIG_MODULES=y
22# CONFIG_LBDAF is not set
23# CONFIG_BLK_DEV_BSG is not set
24# CONFIG_IOSCHED_DEADLINE is not set
25# CONFIG_IOSCHED_CFQ is not set
26CONFIG_ARC_PLAT_SIM=y
27CONFIG_ISA_ARCV2=y
28CONFIG_SMP=y
29CONFIG_ARC_BUILTIN_DTB_NAME="zebu_hs_idu"
30CONFIG_PREEMPT=y
31# CONFIG_COMPACTION is not set
32CONFIG_NET=y
33CONFIG_PACKET=y
34CONFIG_PACKET_DIAG=y
35CONFIG_UNIX=y
36CONFIG_UNIX_DIAG=y
37CONFIG_NET_KEY=y
38CONFIG_INET=y
39# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
40# CONFIG_INET_XFRM_MODE_TUNNEL is not set
41# CONFIG_INET_XFRM_MODE_BEET is not set
42# CONFIG_IPV6 is not set
43# CONFIG_WIRELESS is not set
44CONFIG_DEVTMPFS=y
45# CONFIG_STANDALONE is not set
46# CONFIG_PREVENT_FIRMWARE_BUILD is not set
47# CONFIG_FIRMWARE_IN_KERNEL is not set
48# CONFIG_BLK_DEV is not set
49CONFIG_NETDEVICES=y
50# CONFIG_NET_VENDOR_ARC is not set
51# CONFIG_NET_VENDOR_BROADCOM is not set
52# CONFIG_NET_VENDOR_INTEL is not set
53# CONFIG_NET_VENDOR_MARVELL is not set
54# CONFIG_NET_VENDOR_MICREL is not set
55# CONFIG_NET_VENDOR_NATSEMI is not set
56# CONFIG_NET_VENDOR_SEEQ is not set
57# CONFIG_NET_VENDOR_STMICRO is not set
58# CONFIG_NET_VENDOR_VIA is not set
59# CONFIG_NET_VENDOR_WIZNET is not set
60# CONFIG_WLAN is not set
61CONFIG_INPUT_EVDEV=y
62CONFIG_MOUSE_PS2_TOUCHKIT=y
63# CONFIG_SERIO_SERPORT is not set
64CONFIG_SERIO_ARC_PS2=y
65# CONFIG_LEGACY_PTYS is not set
66# CONFIG_DEVKMEM is not set
67CONFIG_SERIAL_8250=y
68CONFIG_SERIAL_8250_CONSOLE=y
69CONFIG_SERIAL_8250_NR_UARTS=1
70CONFIG_SERIAL_8250_RUNTIME_UARTS=1
71CONFIG_SERIAL_8250_DW=y
72CONFIG_SERIAL_OF_PLATFORM=y
73# CONFIG_HW_RANDOM is not set
74# CONFIG_HWMON is not set
75CONFIG_FB=y
76CONFIG_FRAMEBUFFER_CONSOLE=y
77CONFIG_LOGO=y
78# CONFIG_HID is not set
79# CONFIG_USB_SUPPORT is not set
80# CONFIG_IOMMU_SUPPORT is not set
81CONFIG_EXT2_FS=y
82CONFIG_EXT2_FS_XATTR=y
83CONFIG_TMPFS=y
84# CONFIG_MISC_FILESYSTEMS is not set
85CONFIG_NFS_FS=y
86# CONFIG_ENABLE_WARN_DEPRECATED is not set
87# CONFIG_ENABLE_MUST_CHECK is not set
88CONFIG_LOCKUP_DETECTOR=y
89# CONFIG_DEBUG_PREEMPT is not set
diff --git a/arch/arc/include/asm/arcregs.h b/arch/arc/include/asm/arcregs.h
index 7fbaea00a336..db25c65155cb 100644
--- a/arch/arc/include/asm/arcregs.h
+++ b/arch/arc/include/asm/arcregs.h
@@ -95,7 +95,7 @@
95/* Auxiliary registers */ 95/* Auxiliary registers */
96#define AUX_IDENTITY 4 96#define AUX_IDENTITY 4
97#define AUX_INTR_VEC_BASE 0x25 97#define AUX_INTR_VEC_BASE 0x25
98#define AUX_NON_VOL 0x5e 98#define AUX_VOL 0x5e
99 99
100/* 100/*
101 * Floating Pt Registers 101 * Floating Pt Registers
@@ -240,14 +240,6 @@ struct bcr_extn_xymem {
240#endif 240#endif
241}; 241};
242 242
243struct bcr_perip {
244#ifdef CONFIG_CPU_BIG_ENDIAN
245 unsigned int start:8, pad2:8, sz:8, ver:8;
246#else
247 unsigned int ver:8, sz:8, pad2:8, start:8;
248#endif
249};
250
251struct bcr_iccm_arcompact { 243struct bcr_iccm_arcompact {
252#ifdef CONFIG_CPU_BIG_ENDIAN 244#ifdef CONFIG_CPU_BIG_ENDIAN
253 unsigned int base:16, pad:5, sz:3, ver:8; 245 unsigned int base:16, pad:5, sz:3, ver:8;
diff --git a/arch/arc/include/asm/atomic.h b/arch/arc/include/asm/atomic.h
index 4e3c1b6b0806..b65930a49589 100644
--- a/arch/arc/include/asm/atomic.h
+++ b/arch/arc/include/asm/atomic.h
@@ -20,6 +20,7 @@
20#ifndef CONFIG_ARC_PLAT_EZNPS 20#ifndef CONFIG_ARC_PLAT_EZNPS
21 21
22#define atomic_read(v) READ_ONCE((v)->counter) 22#define atomic_read(v) READ_ONCE((v)->counter)
23#define ATOMIC_INIT(i) { (i) }
23 24
24#ifdef CONFIG_ARC_HAS_LLSC 25#ifdef CONFIG_ARC_HAS_LLSC
25 26
@@ -284,6 +285,7 @@ static inline int atomic_fetch_##op(int i, atomic_t *v) \
284ATOMIC_OPS(add, +=, CTOP_INST_AADD_DI_R2_R2_R3) 285ATOMIC_OPS(add, +=, CTOP_INST_AADD_DI_R2_R2_R3)
285#define atomic_sub(i, v) atomic_add(-(i), (v)) 286#define atomic_sub(i, v) atomic_add(-(i), (v))
286#define atomic_sub_return(i, v) atomic_add_return(-(i), (v)) 287#define atomic_sub_return(i, v) atomic_add_return(-(i), (v))
288#define atomic_fetch_sub(i, v) atomic_fetch_add(-(i), (v))
287 289
288#undef ATOMIC_OPS 290#undef ATOMIC_OPS
289#define ATOMIC_OPS(op, c_op, asm_op) \ 291#define ATOMIC_OPS(op, c_op, asm_op) \
@@ -292,6 +294,7 @@ ATOMIC_OPS(add, +=, CTOP_INST_AADD_DI_R2_R2_R3)
292 294
293ATOMIC_OPS(and, &=, CTOP_INST_AAND_DI_R2_R2_R3) 295ATOMIC_OPS(and, &=, CTOP_INST_AAND_DI_R2_R2_R3)
294#define atomic_andnot(mask, v) atomic_and(~(mask), (v)) 296#define atomic_andnot(mask, v) atomic_and(~(mask), (v))
297#define atomic_fetch_andnot(mask, v) atomic_fetch_and(~(mask), (v))
295ATOMIC_OPS(or, |=, CTOP_INST_AOR_DI_R2_R2_R3) 298ATOMIC_OPS(or, |=, CTOP_INST_AOR_DI_R2_R2_R3)
296ATOMIC_OPS(xor, ^=, CTOP_INST_AXOR_DI_R2_R2_R3) 299ATOMIC_OPS(xor, ^=, CTOP_INST_AXOR_DI_R2_R2_R3)
297 300
@@ -343,10 +346,266 @@ ATOMIC_OPS(xor, ^=, CTOP_INST_AXOR_DI_R2_R2_R3)
343 346
344#define atomic_add_negative(i, v) (atomic_add_return(i, v) < 0) 347#define atomic_add_negative(i, v) (atomic_add_return(i, v) < 0)
345 348
346#define ATOMIC_INIT(i) { (i) } 349
350#ifdef CONFIG_GENERIC_ATOMIC64
347 351
348#include <asm-generic/atomic64.h> 352#include <asm-generic/atomic64.h>
349 353
350#endif 354#else /* Kconfig ensures this is only enabled with needed h/w assist */
355
356/*
357 * ARCv2 supports 64-bit exclusive load (LLOCKD) / store (SCONDD)
358 * - The address HAS to be 64-bit aligned
359 * - There are 2 semantics involved here:
360 * = exclusive implies no interim update between load/store to same addr
361 * = both words are observed/updated together: this is guaranteed even
362 * for regular 64-bit load (LDD) / store (STD). Thus atomic64_set()
363 * is NOT required to use LLOCKD+SCONDD, STD suffices
364 */
365
366typedef struct {
367 aligned_u64 counter;
368} atomic64_t;
369
370#define ATOMIC64_INIT(a) { (a) }
371
372static inline long long atomic64_read(const atomic64_t *v)
373{
374 unsigned long long val;
375
376 __asm__ __volatile__(
377 " ldd %0, [%1] \n"
378 : "=r"(val)
379 : "r"(&v->counter));
380
381 return val;
382}
383
384static inline void atomic64_set(atomic64_t *v, long long a)
385{
386 /*
387 * This could have been a simple assignment in "C" but would need
388 * explicit volatile. Otherwise gcc optimizers could elide the store
389 * which borked atomic64 self-test
390 * In the inline asm version, memory clobber needed for exact same
391 * reason, to tell gcc about the store.
392 *
393 * This however is not needed for sibling atomic64_add() etc since both
394 * load/store are explicitly done in inline asm. As long as API is used
395 * for each access, gcc has no way to optimize away any load/store
396 */
397 __asm__ __volatile__(
398 " std %0, [%1] \n"
399 :
400 : "r"(a), "r"(&v->counter)
401 : "memory");
402}
403
404#define ATOMIC64_OP(op, op1, op2) \
405static inline void atomic64_##op(long long a, atomic64_t *v) \
406{ \
407 unsigned long long val; \
408 \
409 __asm__ __volatile__( \
410 "1: \n" \
411 " llockd %0, [%1] \n" \
412 " " #op1 " %L0, %L0, %L2 \n" \
413 " " #op2 " %H0, %H0, %H2 \n" \
414 " scondd %0, [%1] \n" \
415 " bnz 1b \n" \
416 : "=&r"(val) \
417 : "r"(&v->counter), "ir"(a) \
418 : "cc"); \
419} \
420
421#define ATOMIC64_OP_RETURN(op, op1, op2) \
422static inline long long atomic64_##op##_return(long long a, atomic64_t *v) \
423{ \
424 unsigned long long val; \
425 \
426 smp_mb(); \
427 \
428 __asm__ __volatile__( \
429 "1: \n" \
430 " llockd %0, [%1] \n" \
431 " " #op1 " %L0, %L0, %L2 \n" \
432 " " #op2 " %H0, %H0, %H2 \n" \
433 " scondd %0, [%1] \n" \
434 " bnz 1b \n" \
435 : [val] "=&r"(val) \
436 : "r"(&v->counter), "ir"(a) \
437 : "cc"); /* memory clobber comes from smp_mb() */ \
438 \
439 smp_mb(); \
440 \
441 return val; \
442}
443
444#define ATOMIC64_FETCH_OP(op, op1, op2) \
445static inline long long atomic64_fetch_##op(long long a, atomic64_t *v) \
446{ \
447 unsigned long long val, orig; \
448 \
449 smp_mb(); \
450 \
451 __asm__ __volatile__( \
452 "1: \n" \
453 " llockd %0, [%2] \n" \
454 " " #op1 " %L1, %L0, %L3 \n" \
455 " " #op2 " %H1, %H0, %H3 \n" \
456 " scondd %1, [%2] \n" \
457 " bnz 1b \n" \
458 : "=&r"(orig), "=&r"(val) \
459 : "r"(&v->counter), "ir"(a) \
460 : "cc"); /* memory clobber comes from smp_mb() */ \
461 \
462 smp_mb(); \
463 \
464 return orig; \
465}
466
467#define ATOMIC64_OPS(op, op1, op2) \
468 ATOMIC64_OP(op, op1, op2) \
469 ATOMIC64_OP_RETURN(op, op1, op2) \
470 ATOMIC64_FETCH_OP(op, op1, op2)
471
472#define atomic64_andnot atomic64_andnot
473
474ATOMIC64_OPS(add, add.f, adc)
475ATOMIC64_OPS(sub, sub.f, sbc)
476ATOMIC64_OPS(and, and, and)
477ATOMIC64_OPS(andnot, bic, bic)
478ATOMIC64_OPS(or, or, or)
479ATOMIC64_OPS(xor, xor, xor)
480
481#undef ATOMIC64_OPS
482#undef ATOMIC64_FETCH_OP
483#undef ATOMIC64_OP_RETURN
484#undef ATOMIC64_OP
485
486static inline long long
487atomic64_cmpxchg(atomic64_t *ptr, long long expected, long long new)
488{
489 long long prev;
490
491 smp_mb();
492
493 __asm__ __volatile__(
494 "1: llockd %0, [%1] \n"
495 " brne %L0, %L2, 2f \n"
496 " brne %H0, %H2, 2f \n"
497 " scondd %3, [%1] \n"
498 " bnz 1b \n"
499 "2: \n"
500 : "=&r"(prev)
501 : "r"(ptr), "ir"(expected), "r"(new)
502 : "cc"); /* memory clobber comes from smp_mb() */
503
504 smp_mb();
505
506 return prev;
507}
508
509static inline long long atomic64_xchg(atomic64_t *ptr, long long new)
510{
511 long long prev;
512
513 smp_mb();
514
515 __asm__ __volatile__(
516 "1: llockd %0, [%1] \n"
517 " scondd %2, [%1] \n"
518 " bnz 1b \n"
519 "2: \n"
520 : "=&r"(prev)
521 : "r"(ptr), "r"(new)
522 : "cc"); /* memory clobber comes from smp_mb() */
523
524 smp_mb();
525
526 return prev;
527}
528
529/**
530 * atomic64_dec_if_positive - decrement by 1 if old value positive
531 * @v: pointer of type atomic64_t
532 *
533 * The function returns the old value of *v minus 1, even if
534 * the atomic variable, v, was not decremented.
535 */
536
537static inline long long atomic64_dec_if_positive(atomic64_t *v)
538{
539 long long val;
540
541 smp_mb();
542
543 __asm__ __volatile__(
544 "1: llockd %0, [%1] \n"
545 " sub.f %L0, %L0, 1 # w0 - 1, set C on borrow\n"
546 " sub.c %H0, %H0, 1 # if C set, w1 - 1\n"
547 " brlt %H0, 0, 2f \n"
548 " scondd %0, [%1] \n"
549 " bnz 1b \n"
550 "2: \n"
551 : "=&r"(val)
552 : "r"(&v->counter)
553 : "cc"); /* memory clobber comes from smp_mb() */
554
555 smp_mb();
556
557 return val;
558}
559
560/**
561 * atomic64_add_unless - add unless the number is a given value
562 * @v: pointer of type atomic64_t
563 * @a: the amount to add to v...
564 * @u: ...unless v is equal to u.
565 *
566 * if (v != u) { v += a; ret = 1} else {ret = 0}
567 * Returns 1 iff @v was not @u (i.e. if add actually happened)
568 */
569static inline int atomic64_add_unless(atomic64_t *v, long long a, long long u)
570{
571 long long val;
572 int op_done;
573
574 smp_mb();
575
576 __asm__ __volatile__(
577 "1: llockd %0, [%2] \n"
578 " mov %1, 1 \n"
579 " brne %L0, %L4, 2f # continue to add since v != u \n"
580 " breq.d %H0, %H4, 3f # return since v == u \n"
581 " mov %1, 0 \n"
582 "2: \n"
583 " add.f %L0, %L0, %L3 \n"
584 " adc %H0, %H0, %H3 \n"
585 " scondd %0, [%2] \n"
586 " bnz 1b \n"
587 "3: \n"
588 : "=&r"(val), "=&r" (op_done)
589 : "r"(&v->counter), "r"(a), "r"(u)
590 : "cc"); /* memory clobber comes from smp_mb() */
591
592 smp_mb();
593
594 return op_done;
595}
596
597#define atomic64_add_negative(a, v) (atomic64_add_return((a), (v)) < 0)
598#define atomic64_inc(v) atomic64_add(1LL, (v))
599#define atomic64_inc_return(v) atomic64_add_return(1LL, (v))
600#define atomic64_inc_and_test(v) (atomic64_inc_return(v) == 0)
601#define atomic64_sub_and_test(a, v) (atomic64_sub_return((a), (v)) == 0)
602#define atomic64_dec(v) atomic64_sub(1LL, (v))
603#define atomic64_dec_return(v) atomic64_sub_return(1LL, (v))
604#define atomic64_dec_and_test(v) (atomic64_dec_return((v)) == 0)
605#define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1LL, 0LL)
606
607#endif /* !CONFIG_GENERIC_ATOMIC64 */
608
609#endif /* !__ASSEMBLY__ */
351 610
352#endif 611#endif
diff --git a/arch/arc/include/asm/cache.h b/arch/arc/include/asm/cache.h
index 23706c635c30..fb781e34f322 100644
--- a/arch/arc/include/asm/cache.h
+++ b/arch/arc/include/asm/cache.h
@@ -54,7 +54,7 @@ extern char *arc_cache_mumbojumbo(int cpu_id, char *buf, int len);
54extern void read_decode_cache_bcr(void); 54extern void read_decode_cache_bcr(void);
55 55
56extern int ioc_exists; 56extern int ioc_exists;
57extern unsigned long perip_base; 57extern unsigned long perip_base, perip_end;
58 58
59#endif /* !__ASSEMBLY__ */ 59#endif /* !__ASSEMBLY__ */
60 60
diff --git a/arch/arc/include/asm/dwarf.h b/arch/arc/include/asm/dwarf.h
new file mode 100644
index 000000000000..bb7bdbc59a44
--- /dev/null
+++ b/arch/arc/include/asm/dwarf.h
@@ -0,0 +1,38 @@
1/*
2 * Copyright (C) 2016-17 Synopsys, Inc. (www.synopsys.com)
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#ifndef _ASM_ARC_DWARF_H
10#define _ASM_ARC_DWARF_H
11
12#ifdef __ASSEMBLY__
13
14#ifdef ARC_DW2_UNWIND_AS_CFI
15
16#define CFI_STARTPROC .cfi_startproc
17#define CFI_ENDPROC .cfi_endproc
18#define CFI_DEF_CFA .cfi_def_cfa
19#define CFI_REGISTER .cfi_register
20#define CFI_REL_OFFSET .cfi_rel_offset
21#define CFI_UNDEFINED .cfi_undefined
22
23#else
24
25#define CFI_IGNORE #
26
27#define CFI_STARTPROC CFI_IGNORE
28#define CFI_ENDPROC CFI_IGNORE
29#define CFI_DEF_CFA CFI_IGNORE
30#define CFI_REGISTER CFI_IGNORE
31#define CFI_REL_OFFSET CFI_IGNORE
32#define CFI_UNDEFINED CFI_IGNORE
33
34#endif /* !ARC_DW2_UNWIND_AS_CFI */
35
36#endif /* __ASSEMBLY__ */
37
38#endif /* _ASM_ARC_DWARF_H */
diff --git a/arch/arc/include/asm/elf.h b/arch/arc/include/asm/elf.h
index 51a99e25fe33..7096f97a1434 100644
--- a/arch/arc/include/asm/elf.h
+++ b/arch/arc/include/asm/elf.h
@@ -23,8 +23,7 @@
23/* ARC Relocations (kernel Modules only) */ 23/* ARC Relocations (kernel Modules only) */
24#define R_ARC_32 0x4 24#define R_ARC_32 0x4
25#define R_ARC_32_ME 0x1B 25#define R_ARC_32_ME 0x1B
26#define R_ARC_S25H_PCREL 0x10 26#define R_ARC_32_PCREL 0x31
27#define R_ARC_S25W_PCREL 0x11
28 27
29/*to set parameters in the core dumps */ 28/*to set parameters in the core dumps */
30#define ELF_ARCH EM_ARCOMPACT 29#define ELF_ARCH EM_ARCOMPACT
diff --git a/arch/arc/include/asm/irqflags-arcv2.h b/arch/arc/include/asm/irqflags-arcv2.h
index d1ec7f6b31e0..e880dfa3fcd3 100644
--- a/arch/arc/include/asm/irqflags-arcv2.h
+++ b/arch/arc/include/asm/irqflags-arcv2.h
@@ -112,7 +112,7 @@ static inline long arch_local_save_flags(void)
112 */ 112 */
113 temp = (1 << 5) | 113 temp = (1 << 5) |
114 ((!!(temp & STATUS_IE_MASK)) << CLRI_STATUS_IE_BIT) | 114 ((!!(temp & STATUS_IE_MASK)) << CLRI_STATUS_IE_BIT) |
115 (temp & CLRI_STATUS_E_MASK); 115 ((temp >> 1) & CLRI_STATUS_E_MASK);
116 return temp; 116 return temp;
117} 117}
118 118
diff --git a/arch/arc/include/asm/linkage.h b/arch/arc/include/asm/linkage.h
index 5faad17118b4..b29f1a9fd6f7 100644
--- a/arch/arc/include/asm/linkage.h
+++ b/arch/arc/include/asm/linkage.h
@@ -9,6 +9,8 @@
9#ifndef __ASM_LINKAGE_H 9#ifndef __ASM_LINKAGE_H
10#define __ASM_LINKAGE_H 10#define __ASM_LINKAGE_H
11 11
12#include <asm/dwarf.h>
13
12#ifdef __ASSEMBLY__ 14#ifdef __ASSEMBLY__
13 15
14#define ASM_NL ` /* use '`' to mark new line in macro */ 16#define ASM_NL ` /* use '`' to mark new line in macro */
@@ -32,6 +34,16 @@
32#endif 34#endif
33.endm 35.endm
34 36
37#define ENTRY_CFI(name) \
38 .globl name ASM_NL \
39 ALIGN ASM_NL \
40 name: ASM_NL \
41 CFI_STARTPROC ASM_NL
42
43#define END_CFI(name) \
44 CFI_ENDPROC ASM_NL \
45 .size name, .-name
46
35#else /* !__ASSEMBLY__ */ 47#else /* !__ASSEMBLY__ */
36 48
37#ifdef CONFIG_ARC_HAS_ICCM 49#ifdef CONFIG_ARC_HAS_ICCM
diff --git a/arch/arc/include/asm/perf_event.h b/arch/arc/include/asm/perf_event.h
index 5f071762fb1c..9185541035cc 100644
--- a/arch/arc/include/asm/perf_event.h
+++ b/arch/arc/include/asm/perf_event.h
@@ -118,6 +118,9 @@ static const char * const arc_pmu_ev_hw_map[] = {
118 [PERF_COUNT_ARC_ICM] = "icm", /* I-cache Miss */ 118 [PERF_COUNT_ARC_ICM] = "icm", /* I-cache Miss */
119 [PERF_COUNT_ARC_EDTLB] = "edtlb", /* D-TLB Miss */ 119 [PERF_COUNT_ARC_EDTLB] = "edtlb", /* D-TLB Miss */
120 [PERF_COUNT_ARC_EITLB] = "eitlb", /* I-TLB Miss */ 120 [PERF_COUNT_ARC_EITLB] = "eitlb", /* I-TLB Miss */
121
122 [PERF_COUNT_HW_CACHE_REFERENCES] = "imemrdc", /* Instr: mem read cached */
123 [PERF_COUNT_HW_CACHE_MISSES] = "dclm", /* D-cache Load Miss */
121}; 124};
122 125
123#define C(_x) PERF_COUNT_HW_CACHE_##_x 126#define C(_x) PERF_COUNT_HW_CACHE_##_x
diff --git a/arch/arc/kernel/ctx_sw_asm.S b/arch/arc/kernel/ctx_sw_asm.S
index e6890b1f8650..7c1f365ef3d2 100644
--- a/arch/arc/kernel/ctx_sw_asm.S
+++ b/arch/arc/kernel/ctx_sw_asm.S
@@ -23,6 +23,7 @@
23 .global __switch_to 23 .global __switch_to
24 .type __switch_to, @function 24 .type __switch_to, @function
25__switch_to: 25__switch_to:
26 CFI_STARTPROC
26 27
27 /* Save regs on kernel mode stack of task */ 28 /* Save regs on kernel mode stack of task */
28 st.a blink, [sp, -4] 29 st.a blink, [sp, -4]
@@ -59,4 +60,4 @@ __switch_to:
59 ld.ab blink, [sp, 4] 60 ld.ab blink, [sp, 4]
60 j [blink] 61 j [blink]
61 62
62END(__switch_to) 63END_CFI(__switch_to)
diff --git a/arch/arc/kernel/entry.S b/arch/arc/kernel/entry.S
index 2efb0625331d..1eea99beecc3 100644
--- a/arch/arc/kernel/entry.S
+++ b/arch/arc/kernel/entry.S
@@ -35,7 +35,7 @@ ENTRY(sys_clone_wrapper)
35 btst r10, TIF_SYSCALL_TRACE 35 btst r10, TIF_SYSCALL_TRACE
36 bnz tracesys_exit 36 bnz tracesys_exit
37 37
38 b ret_from_system_call 38 b .Lret_from_system_call
39END(sys_clone_wrapper) 39END(sys_clone_wrapper)
40 40
41ENTRY(ret_from_fork) 41ENTRY(ret_from_fork)
@@ -61,18 +61,6 @@ ENTRY(ret_from_fork)
61 b ret_from_exception 61 b ret_from_exception
62END(ret_from_fork) 62END(ret_from_fork)
63 63
64#ifdef CONFIG_ARC_DW2_UNWIND
65; Workaround for bug 94179 (STAR ):
66; Despite -fasynchronous-unwind-tables, linker is not making dwarf2 unwinder
67; section (.debug_frame) as loadable. So we force it here.
68; This also fixes STAR 9000487933 where the prev-workaround (objcopy --setflag)
69; would not work after a clean build due to kernel build system dependencies.
70.section .debug_frame, "wa",@progbits
71
72; Reset to .text as this file is included in entry-<isa>.S
73.section .text, "ax",@progbits
74#endif
75
76;################### Non TLB Exception Handling ############################# 64;################### Non TLB Exception Handling #############################
77 65
78; --------------------------------------------- 66; ---------------------------------------------
@@ -260,20 +248,18 @@ ENTRY(EV_Trap)
260 ; syscall num shd not exceed the total system calls avail 248 ; syscall num shd not exceed the total system calls avail
261 cmp r8, NR_syscalls 249 cmp r8, NR_syscalls
262 mov.hi r0, -ENOSYS 250 mov.hi r0, -ENOSYS
263 bhi ret_from_system_call 251 bhi .Lret_from_system_call
264 252
265 ; Offset into the syscall_table and call handler 253 ; Offset into the syscall_table and call handler
266 ld.as r9,[sys_call_table, r8] 254 ld.as r9,[sys_call_table, r8]
267 jl [r9] ; Entry into Sys Call Handler 255 jl [r9] ; Entry into Sys Call Handler
268 256
269 ; fall through to ret_from_system_call 257.Lret_from_system_call:
270END(EV_Trap)
271
272ENTRY(ret_from_system_call)
273 258
274 st r0, [sp, PT_r0] ; sys call return value in pt_regs 259 st r0, [sp, PT_r0] ; sys call return value in pt_regs
275 260
276 ; fall through yet again to ret_from_exception 261 ; fall through to ret_from_exception
262END(EV_Trap)
277 263
278;############# Return from Intr/Excp/Trap (Linux Specifics) ############## 264;############# Return from Intr/Excp/Trap (Linux Specifics) ##############
279; 265;
diff --git a/arch/arc/kernel/intc-arcv2.c b/arch/arc/kernel/intc-arcv2.c
index 6c24faf48b16..62b59409a5d9 100644
--- a/arch/arc/kernel/intc-arcv2.c
+++ b/arch/arc/kernel/intc-arcv2.c
@@ -74,7 +74,7 @@ void arc_init_IRQ(void)
74 tmp = read_aux_reg(0xa); 74 tmp = read_aux_reg(0xa);
75 tmp |= STATUS_AD_MASK | (irq_prio << 1); 75 tmp |= STATUS_AD_MASK | (irq_prio << 1);
76 tmp &= ~STATUS_IE_MASK; 76 tmp &= ~STATUS_IE_MASK;
77 asm volatile("flag %0 \n"::"r"(tmp)); 77 asm volatile("kflag %0 \n"::"r"(tmp));
78} 78}
79 79
80static void arcv2_irq_mask(struct irq_data *data) 80static void arcv2_irq_mask(struct irq_data *data)
diff --git a/arch/arc/kernel/module.c b/arch/arc/kernel/module.c
index 376e04622962..9a2849756022 100644
--- a/arch/arc/kernel/module.c
+++ b/arch/arc/kernel/module.c
@@ -22,13 +22,9 @@ static inline void arc_write_me(unsigned short *addr, unsigned long value)
22 *(addr + 1) = (value & 0xffff); 22 *(addr + 1) = (value & 0xffff);
23} 23}
24 24
25/* ARC specific section quirks - before relocation loop in generic loader 25/*
26 * 26 * This gets called before relocation loop in generic loader
27 * For dwarf unwinding out of modules, this needs to 27 * Make a note of the section index of unwinding section
28 * 1. Ensure the .debug_frame is allocatable (ARC Linker bug: despite
29 * -fasynchronous-unwind-tables it doesn't).
30 * 2. Since we are iterating thru sec hdr tbl anyways, make a note of
31 * the exact section index, for later use.
32 */ 28 */
33int module_frob_arch_sections(Elf_Ehdr *hdr, Elf_Shdr *sechdrs, 29int module_frob_arch_sections(Elf_Ehdr *hdr, Elf_Shdr *sechdrs,
34 char *secstr, struct module *mod) 30 char *secstr, struct module *mod)
@@ -40,8 +36,7 @@ int module_frob_arch_sections(Elf_Ehdr *hdr, Elf_Shdr *sechdrs,
40 mod->arch.unw_info = NULL; 36 mod->arch.unw_info = NULL;
41 37
42 for (i = 1; i < hdr->e_shnum; i++) { 38 for (i = 1; i < hdr->e_shnum; i++) {
43 if (strcmp(secstr+sechdrs[i].sh_name, ".debug_frame") == 0) { 39 if (strcmp(secstr+sechdrs[i].sh_name, ".eh_frame") == 0) {
44 sechdrs[i].sh_flags |= SHF_ALLOC;
45 mod->arch.unw_sec_idx = i; 40 mod->arch.unw_sec_idx = i;
46 break; 41 break;
47 } 42 }
@@ -106,10 +101,12 @@ int apply_relocate_add(Elf32_Shdr *sechdrs,
106 */ 101 */
107 relo_type = ELF32_R_TYPE(rel_entry[i].r_info); 102 relo_type = ELF32_R_TYPE(rel_entry[i].r_info);
108 103
109 if (likely(R_ARC_32_ME == relo_type)) 104 if (likely(R_ARC_32_ME == relo_type)) /* ME ( S + A ) */
110 arc_write_me((unsigned short *)location, relocation); 105 arc_write_me((unsigned short *)location, relocation);
111 else if (R_ARC_32 == relo_type) 106 else if (R_ARC_32 == relo_type) /* ( S + A ) */
112 *((Elf32_Addr *) location) = relocation; 107 *((Elf32_Addr *) location) = relocation;
108 else if (R_ARC_32_PCREL == relo_type) /* ( S + A ) - PDATA ) */
109 *((Elf32_Addr *) location) = relocation - location;
113 else 110 else
114 goto relo_err; 111 goto relo_err;
115 112
diff --git a/arch/arc/kernel/perf_event.c b/arch/arc/kernel/perf_event.c
index 08f03d9b5b3e..2ce24e74f879 100644
--- a/arch/arc/kernel/perf_event.c
+++ b/arch/arc/kernel/perf_event.c
@@ -179,8 +179,8 @@ static int arc_pmu_event_init(struct perf_event *event)
179 if (arc_pmu->ev_hw_idx[event->attr.config] < 0) 179 if (arc_pmu->ev_hw_idx[event->attr.config] < 0)
180 return -ENOENT; 180 return -ENOENT;
181 hwc->config |= arc_pmu->ev_hw_idx[event->attr.config]; 181 hwc->config |= arc_pmu->ev_hw_idx[event->attr.config];
182 pr_debug("init event %d with h/w %d \'%s\'\n", 182 pr_debug("init event %d with h/w %08x \'%s\'\n",
183 (int) event->attr.config, (int) hwc->config, 183 (int)event->attr.config, (int)hwc->config,
184 arc_pmu_ev_hw_map[event->attr.config]); 184 arc_pmu_ev_hw_map[event->attr.config]);
185 return 0; 185 return 0;
186 186
@@ -189,6 +189,8 @@ static int arc_pmu_event_init(struct perf_event *event)
189 if (ret < 0) 189 if (ret < 0)
190 return ret; 190 return ret;
191 hwc->config |= arc_pmu->ev_hw_idx[ret]; 191 hwc->config |= arc_pmu->ev_hw_idx[ret];
192 pr_debug("init cache event with h/w %08x \'%s\'\n",
193 (int)hwc->config, arc_pmu_ev_hw_map[ret]);
192 return 0; 194 return 0;
193 default: 195 default:
194 return -ENOENT; 196 return -ENOENT;
diff --git a/arch/arc/kernel/setup.c b/arch/arc/kernel/setup.c
index f52a0d0dc462..3df7f9c72f42 100644
--- a/arch/arc/kernel/setup.c
+++ b/arch/arc/kernel/setup.c
@@ -171,6 +171,7 @@ static const struct cpuinfo_data arc_cpu_tbl[] = {
171#else 171#else
172 { {0x50, "ARC HS38 R2.0"}, 0x51}, 172 { {0x50, "ARC HS38 R2.0"}, 0x51},
173 { {0x52, "ARC HS38 R2.1"}, 0x52}, 173 { {0x52, "ARC HS38 R2.1"}, 0x52},
174 { {0x53, "ARC HS38 R3.0"}, 0x53},
174#endif 175#endif
175 { {0x00, NULL } } 176 { {0x00, NULL } }
176}; 177};
@@ -272,8 +273,8 @@ static char *arc_extn_mumbojumbo(int cpu_id, char *buf, int len)
272 FIX_PTR(cpu); 273 FIX_PTR(cpu);
273 274
274 n += scnprintf(buf + n, len - n, 275 n += scnprintf(buf + n, len - n,
275 "Vector Table\t: %#x\nUncached Base\t: %#lx\n", 276 "Vector Table\t: %#x\nPeripherals\t: %#lx:%#lx\n",
276 cpu->vec_base, perip_base); 277 cpu->vec_base, perip_base, perip_end);
277 278
278 if (cpu->extn.fpu_sp || cpu->extn.fpu_dp) 279 if (cpu->extn.fpu_sp || cpu->extn.fpu_dp)
279 n += scnprintf(buf + n, len - n, "FPU\t\t: %s%s\n", 280 n += scnprintf(buf + n, len - n, "FPU\t\t: %s%s\n",
diff --git a/arch/arc/kernel/unwind.c b/arch/arc/kernel/unwind.c
index 0587bf121d11..61fd1ce63c56 100644
--- a/arch/arc/kernel/unwind.c
+++ b/arch/arc/kernel/unwind.c
@@ -111,6 +111,8 @@ UNW_REGISTER_INFO};
111#define DW_EH_PE_indirect 0x80 111#define DW_EH_PE_indirect 0x80
112#define DW_EH_PE_omit 0xff 112#define DW_EH_PE_omit 0xff
113 113
114#define CIE_ID 0
115
114typedef unsigned long uleb128_t; 116typedef unsigned long uleb128_t;
115typedef signed long sleb128_t; 117typedef signed long sleb128_t;
116 118
@@ -232,6 +234,7 @@ void __init arc_unwind_init(void)
232 234
233static const u32 bad_cie, not_fde; 235static const u32 bad_cie, not_fde;
234static const u32 *cie_for_fde(const u32 *fde, const struct unwind_table *); 236static const u32 *cie_for_fde(const u32 *fde, const struct unwind_table *);
237static const u32 *__cie_for_fde(const u32 *fde);
235static signed fde_pointer_type(const u32 *cie); 238static signed fde_pointer_type(const u32 *cie);
236 239
237struct eh_frame_hdr_table_entry { 240struct eh_frame_hdr_table_entry {
@@ -338,10 +341,9 @@ static void init_unwind_hdr(struct unwind_table *table,
338 for (fde = table->address, tableSize = table->size, n = 0; 341 for (fde = table->address, tableSize = table->size, n = 0;
339 tableSize; 342 tableSize;
340 tableSize -= sizeof(*fde) + *fde, fde += 1 + *fde / sizeof(*fde)) { 343 tableSize -= sizeof(*fde) + *fde, fde += 1 + *fde / sizeof(*fde)) {
341 /* const u32 *cie = fde + 1 - fde[1] / sizeof(*fde); */ 344 const u32 *cie = __cie_for_fde(fde);
342 const u32 *cie = (const u32 *)(fde[1]);
343 345
344 if (fde[1] == 0xffffffff) 346 if (fde[1] == CIE_ID)
345 continue; /* this is a CIE */ 347 continue; /* this is a CIE */
346 ptr = (const u8 *)(fde + 2); 348 ptr = (const u8 *)(fde + 2);
347 header->table[n].start = read_pointer(&ptr, 349 header->table[n].start = read_pointer(&ptr,
@@ -504,6 +506,15 @@ static sleb128_t get_sleb128(const u8 **pcur, const u8 *end)
504 return value; 506 return value;
505} 507}
506 508
509static const u32 *__cie_for_fde(const u32 *fde)
510{
511 const u32 *cie;
512
513 cie = fde + 1 - fde[1] / sizeof(*fde);
514
515 return cie;
516}
517
507static const u32 *cie_for_fde(const u32 *fde, const struct unwind_table *table) 518static const u32 *cie_for_fde(const u32 *fde, const struct unwind_table *table)
508{ 519{
509 const u32 *cie; 520 const u32 *cie;
@@ -511,19 +522,18 @@ static const u32 *cie_for_fde(const u32 *fde, const struct unwind_table *table)
511 if (!*fde || (*fde & (sizeof(*fde) - 1))) 522 if (!*fde || (*fde & (sizeof(*fde) - 1)))
512 return &bad_cie; 523 return &bad_cie;
513 524
514 if (fde[1] == 0xffffffff) 525 if (fde[1] == CIE_ID)
515 return &not_fde; /* this is a CIE */ 526 return &not_fde; /* this is a CIE */
516 527
517 if ((fde[1] & (sizeof(*fde) - 1))) 528 if ((fde[1] & (sizeof(*fde) - 1)))
518/* || fde[1] > (unsigned long)(fde + 1) - (unsigned long)table->address) */ 529/* || fde[1] > (unsigned long)(fde + 1) - (unsigned long)table->address) */
519 return NULL; /* this is not a valid FDE */ 530 return NULL; /* this is not a valid FDE */
520 531
521 /* cie = fde + 1 - fde[1] / sizeof(*fde); */ 532 cie = __cie_for_fde(fde);
522 cie = (u32 *) fde[1];
523 533
524 if (*cie <= sizeof(*cie) + 4 || *cie >= fde[1] - sizeof(*fde) 534 if (*cie <= sizeof(*cie) + 4 || *cie >= fde[1] - sizeof(*fde)
525 || (*cie & (sizeof(*cie) - 1)) 535 || (*cie & (sizeof(*cie) - 1))
526 || (cie[1] != 0xffffffff)) 536 || (cie[1] != CIE_ID))
527 return NULL; /* this is not a (valid) CIE */ 537 return NULL; /* this is not a (valid) CIE */
528 return cie; 538 return cie;
529} 539}
diff --git a/arch/arc/kernel/vmlinux.lds.S b/arch/arc/kernel/vmlinux.lds.S
index 894e696bddaa..36611072305f 100644
--- a/arch/arc/kernel/vmlinux.lds.S
+++ b/arch/arc/kernel/vmlinux.lds.S
@@ -82,14 +82,6 @@ SECTIONS
82 82
83 PERCPU_SECTION(L1_CACHE_BYTES) 83 PERCPU_SECTION(L1_CACHE_BYTES)
84 84
85 /*
86 * .exit.text is discard at runtime, not link time, to deal with
87 * references from .debug_frame
88 * It will be init freed, being inside [__init_start : __init_end]
89 */
90 .exit.text : { EXIT_TEXT }
91 .exit.data : { EXIT_DATA }
92
93 . = ALIGN(PAGE_SIZE); 85 . = ALIGN(PAGE_SIZE);
94 __init_end = .; 86 __init_end = .;
95 87
@@ -120,18 +112,13 @@ SECTIONS
120 112
121#ifdef CONFIG_ARC_DW2_UNWIND 113#ifdef CONFIG_ARC_DW2_UNWIND
122 . = ALIGN(PAGE_SIZE); 114 . = ALIGN(PAGE_SIZE);
123 .debug_frame : { 115 .eh_frame : {
124 __start_unwind = .; 116 __start_unwind = .;
125 *(.debug_frame) 117 *(.eh_frame)
126 __end_unwind = .; 118 __end_unwind = .;
127 } 119 }
128 /*
129 * gcc 4.8 generates this for -fasynchonous-unwind-tables,
130 * while we still use the .debug_frame based unwinder
131 */
132 /DISCARD/ : { *(.eh_frame) }
133#else 120#else
134 /DISCARD/ : { *(.debug_frame) } 121 /DISCARD/ : { *(.eh_frame) }
135#endif 122#endif
136 123
137 NOTES 124 NOTES
@@ -148,7 +135,7 @@ SECTIONS
148 } 135 }
149 136
150#ifndef CONFIG_DEBUG_INFO 137#ifndef CONFIG_DEBUG_INFO
151 /* open-coded because we need .debug_frame seperately for unwinding */ 138 /DISCARD/ : { *(.debug_frame) }
152 /DISCARD/ : { *(.debug_aranges) } 139 /DISCARD/ : { *(.debug_aranges) }
153 /DISCARD/ : { *(.debug_pubnames) } 140 /DISCARD/ : { *(.debug_pubnames) }
154 /DISCARD/ : { *(.debug_info) } 141 /DISCARD/ : { *(.debug_info) }
diff --git a/arch/arc/lib/memcmp.S b/arch/arc/lib/memcmp.S
index a4015e7d9ab7..21a103044b70 100644
--- a/arch/arc/lib/memcmp.S
+++ b/arch/arc/lib/memcmp.S
@@ -16,7 +16,7 @@
16#define SHIFT r2 16#define SHIFT r2
17#endif 17#endif
18 18
19ENTRY(memcmp) 19ENTRY_CFI(memcmp)
20 or r12,r0,r1 20 or r12,r0,r1
21 asl_s r12,r12,30 21 asl_s r12,r12,30
22 sub r3,r2,1 22 sub r3,r2,1
@@ -149,4 +149,4 @@ ENTRY(memcmp)
149.Lnil: 149.Lnil:
150 j_s.d [blink] 150 j_s.d [blink]
151 mov r0,0 151 mov r0,0
152END(memcmp) 152END_CFI(memcmp)
diff --git a/arch/arc/lib/memcpy-700.S b/arch/arc/lib/memcpy-700.S
index 3222573e50de..ba0beccdaafd 100644
--- a/arch/arc/lib/memcpy-700.S
+++ b/arch/arc/lib/memcpy-700.S
@@ -8,7 +8,7 @@
8 8
9#include <linux/linkage.h> 9#include <linux/linkage.h>
10 10
11ENTRY(memcpy) 11ENTRY_CFI(memcpy)
12 or r3,r0,r1 12 or r3,r0,r1
13 asl_s r3,r3,30 13 asl_s r3,r3,30
14 mov_s r5,r0 14 mov_s r5,r0
@@ -63,4 +63,4 @@ ENTRY(memcpy)
63.Lendbloop: 63.Lendbloop:
64 j_s.d [blink] 64 j_s.d [blink]
65 stb r12,[r5,0] 65 stb r12,[r5,0]
66END(memcpy) 66END_CFI(memcpy)
diff --git a/arch/arc/lib/memcpy-archs.S b/arch/arc/lib/memcpy-archs.S
index f96c75edf30a..d61044dd8b58 100644
--- a/arch/arc/lib/memcpy-archs.S
+++ b/arch/arc/lib/memcpy-archs.S
@@ -40,7 +40,7 @@
40# define ZOLAND 0xF 40# define ZOLAND 0xF
41#endif 41#endif
42 42
43ENTRY(memcpy) 43ENTRY_CFI(memcpy)
44 prefetch [r1] ; Prefetch the read location 44 prefetch [r1] ; Prefetch the read location
45 prefetchw [r0] ; Prefetch the write location 45 prefetchw [r0] ; Prefetch the write location
46 mov.f 0, r2 46 mov.f 0, r2
@@ -233,4 +233,4 @@ ENTRY(memcpy)
233.Lcopybytewise_3: 233.Lcopybytewise_3:
234 j [blink] 234 j [blink]
235 235
236END(memcpy) 236END_CFI(memcpy)
diff --git a/arch/arc/lib/memset-archs.S b/arch/arc/lib/memset-archs.S
index 365b18364815..62ad4bcb841a 100644
--- a/arch/arc/lib/memset-archs.S
+++ b/arch/arc/lib/memset-archs.S
@@ -10,7 +10,7 @@
10 10
11#undef PREALLOC_NOT_AVAIL 11#undef PREALLOC_NOT_AVAIL
12 12
13ENTRY(memset) 13ENTRY_CFI(memset)
14 prefetchw [r0] ; Prefetch the write location 14 prefetchw [r0] ; Prefetch the write location
15 mov.f 0, r2 15 mov.f 0, r2
16;;; if size is zero 16;;; if size is zero
@@ -112,11 +112,11 @@ ENTRY(memset)
112 112
113 j [blink] 113 j [blink]
114 114
115END(memset) 115END_CFI(memset)
116 116
117ENTRY(memzero) 117ENTRY_CFI(memzero)
118 ; adjust bzero args to memset args 118 ; adjust bzero args to memset args
119 mov r2, r1 119 mov r2, r1
120 b.d memset ;tail call so need to tinker with blink 120 b.d memset ;tail call so need to tinker with blink
121 mov r1, 0 121 mov r1, 0
122END(memzero) 122END_CFI(memzero)
diff --git a/arch/arc/lib/memset.S b/arch/arc/lib/memset.S
index d36bd43fc98d..cf736f9aa403 100644
--- a/arch/arc/lib/memset.S
+++ b/arch/arc/lib/memset.S
@@ -10,7 +10,7 @@
10 10
11#define SMALL 7 /* Must be at least 6 to deal with alignment/loop issues. */ 11#define SMALL 7 /* Must be at least 6 to deal with alignment/loop issues. */
12 12
13ENTRY(memset) 13ENTRY_CFI(memset)
14 mov_s r4,r0 14 mov_s r4,r0
15 or r12,r0,r2 15 or r12,r0,r2
16 bmsk.f r12,r12,1 16 bmsk.f r12,r12,1
@@ -46,14 +46,14 @@ ENTRY(memset)
46 stb.ab r1,[r4,1] 46 stb.ab r1,[r4,1]
47.Ltiny_end: 47.Ltiny_end:
48 j_s [blink] 48 j_s [blink]
49END(memset) 49END_CFI(memset)
50 50
51; memzero: @r0 = mem, @r1 = size_t 51; memzero: @r0 = mem, @r1 = size_t
52; memset: @r0 = mem, @r1 = char, @r2 = size_t 52; memset: @r0 = mem, @r1 = char, @r2 = size_t
53 53
54ENTRY(memzero) 54ENTRY_CFI(memzero)
55 ; adjust bzero args to memset args 55 ; adjust bzero args to memset args
56 mov r2, r1 56 mov r2, r1
57 mov r1, 0 57 mov r1, 0
58 b memset ;tail call so need to tinker with blink 58 b memset ;tail call so need to tinker with blink
59END(memzero) 59END_CFI(memzero)
diff --git a/arch/arc/lib/strchr-700.S b/arch/arc/lib/strchr-700.S
index b725d5862107..2d300daae2ae 100644
--- a/arch/arc/lib/strchr-700.S
+++ b/arch/arc/lib/strchr-700.S
@@ -13,7 +13,7 @@
13 13
14#include <linux/linkage.h> 14#include <linux/linkage.h>
15 15
16ENTRY(strchr) 16ENTRY_CFI(strchr)
17 extb_s r1,r1 17 extb_s r1,r1
18 asl r5,r1,8 18 asl r5,r1,8
19 bmsk r2,r0,1 19 bmsk r2,r0,1
@@ -130,4 +130,4 @@ ENTRY(strchr)
130 j_s.d [blink] 130 j_s.d [blink]
131 mov.mi r0,0 131 mov.mi r0,0
132#endif /* ENDIAN */ 132#endif /* ENDIAN */
133END(strchr) 133END_CFI(strchr)
diff --git a/arch/arc/lib/strcmp-archs.S b/arch/arc/lib/strcmp-archs.S
index 4f338eec3365..fae9e82a09eb 100644
--- a/arch/arc/lib/strcmp-archs.S
+++ b/arch/arc/lib/strcmp-archs.S
@@ -8,7 +8,7 @@
8 8
9#include <linux/linkage.h> 9#include <linux/linkage.h>
10 10
11ENTRY(strcmp) 11ENTRY_CFI(strcmp)
12 or r2, r0, r1 12 or r2, r0, r1
13 bmsk_s r2, r2, 1 13 bmsk_s r2, r2, 1
14 brne r2, 0, @.Lcharloop 14 brne r2, 0, @.Lcharloop
@@ -75,4 +75,4 @@ ENTRY(strcmp)
75.Lcmpend: 75.Lcmpend:
76 j_s.d [blink] 76 j_s.d [blink]
77 sub r0, r2, r3 77 sub r0, r2, r3
78END(strcmp) 78END_CFI(strcmp)
diff --git a/arch/arc/lib/strcmp.S b/arch/arc/lib/strcmp.S
index 3544600fefe6..fb20096e5008 100644
--- a/arch/arc/lib/strcmp.S
+++ b/arch/arc/lib/strcmp.S
@@ -15,7 +15,7 @@
15 15
16#include <linux/linkage.h> 16#include <linux/linkage.h>
17 17
18ENTRY(strcmp) 18ENTRY_CFI(strcmp)
19 or r2,r0,r1 19 or r2,r0,r1
20 bmsk_s r2,r2,1 20 bmsk_s r2,r2,1
21 brne r2,0,.Lcharloop 21 brne r2,0,.Lcharloop
@@ -93,4 +93,4 @@ ENTRY(strcmp)
93.Lcmpend: 93.Lcmpend:
94 j_s.d [blink] 94 j_s.d [blink]
95 sub r0,r2,r3 95 sub r0,r2,r3
96END(strcmp) 96END_CFI(strcmp)
diff --git a/arch/arc/lib/strcpy-700.S b/arch/arc/lib/strcpy-700.S
index 8422f38e1218..6a6c1553807d 100644
--- a/arch/arc/lib/strcpy-700.S
+++ b/arch/arc/lib/strcpy-700.S
@@ -18,7 +18,7 @@
18 18
19#include <linux/linkage.h> 19#include <linux/linkage.h>
20 20
21ENTRY(strcpy) 21ENTRY_CFI(strcpy)
22 or r2,r0,r1 22 or r2,r0,r1
23 bmsk_s r2,r2,1 23 bmsk_s r2,r2,1
24 brne.d r2,0,charloop 24 brne.d r2,0,charloop
@@ -67,4 +67,4 @@ charloop:
67 brne.d r3,0,charloop 67 brne.d r3,0,charloop
68 stb.ab r3,[r10,1] 68 stb.ab r3,[r10,1]
69 j [blink] 69 j [blink]
70END(strcpy) 70END_CFI(strcpy)
diff --git a/arch/arc/lib/strlen.S b/arch/arc/lib/strlen.S
index 53cfd5685a5f..839b44b8d055 100644
--- a/arch/arc/lib/strlen.S
+++ b/arch/arc/lib/strlen.S
@@ -8,7 +8,7 @@
8 8
9#include <linux/linkage.h> 9#include <linux/linkage.h>
10 10
11ENTRY(strlen) 11ENTRY_CFI(strlen)
12 or r3,r0,7 12 or r3,r0,7
13 ld r2,[r3,-7] 13 ld r2,[r3,-7]
14 ld.a r6,[r3,-3] 14 ld.a r6,[r3,-3]
@@ -80,4 +80,4 @@ ENTRY(strlen)
80.Learly_end: 80.Learly_end:
81 b.d .Lend 81 b.d .Lend
82 sub_s.ne r1,r1,r1 82 sub_s.ne r1,r1,r1
83END(strlen) 83END_CFI(strlen)
diff --git a/arch/arc/mm/cache.c b/arch/arc/mm/cache.c
index 0b10efe3a6a7..97dddbefb86a 100644
--- a/arch/arc/mm/cache.c
+++ b/arch/arc/mm/cache.c
@@ -25,6 +25,7 @@ static int l2_line_sz;
25int ioc_exists; 25int ioc_exists;
26volatile int slc_enable = 1, ioc_enable = 1; 26volatile int slc_enable = 1, ioc_enable = 1;
27unsigned long perip_base = ARC_UNCACHED_ADDR_SPACE; /* legacy value for boot */ 27unsigned long perip_base = ARC_UNCACHED_ADDR_SPACE; /* legacy value for boot */
28unsigned long perip_end = 0xFFFFFFFF; /* legacy value */
28 29
29void (*_cache_line_loop_ic_fn)(phys_addr_t paddr, unsigned long vaddr, 30void (*_cache_line_loop_ic_fn)(phys_addr_t paddr, unsigned long vaddr,
30 unsigned long sz, const int cacheop); 31 unsigned long sz, const int cacheop);
@@ -76,7 +77,6 @@ char *arc_cache_mumbojumbo(int c, char *buf, int len)
76static void read_decode_cache_bcr_arcv2(int cpu) 77static void read_decode_cache_bcr_arcv2(int cpu)
77{ 78{
78 struct cpuinfo_arc_cache *p_slc = &cpuinfo_arc700[cpu].slc; 79 struct cpuinfo_arc_cache *p_slc = &cpuinfo_arc700[cpu].slc;
79 struct bcr_generic uncached_space;
80 struct bcr_generic sbcr; 80 struct bcr_generic sbcr;
81 81
82 struct bcr_slc_cfg { 82 struct bcr_slc_cfg {
@@ -95,6 +95,15 @@ static void read_decode_cache_bcr_arcv2(int cpu)
95#endif 95#endif
96 } cbcr; 96 } cbcr;
97 97
98 struct bcr_volatile {
99#ifdef CONFIG_CPU_BIG_ENDIAN
100 unsigned int start:4, limit:4, pad:22, order:1, disable:1;
101#else
102 unsigned int disable:1, order:1, pad:22, limit:4, start:4;
103#endif
104 } vol;
105
106
98 READ_BCR(ARC_REG_SLC_BCR, sbcr); 107 READ_BCR(ARC_REG_SLC_BCR, sbcr);
99 if (sbcr.ver) { 108 if (sbcr.ver) {
100 READ_BCR(ARC_REG_SLC_CFG, slc_cfg); 109 READ_BCR(ARC_REG_SLC_CFG, slc_cfg);
@@ -107,10 +116,14 @@ static void read_decode_cache_bcr_arcv2(int cpu)
107 if (cbcr.c && ioc_enable) 116 if (cbcr.c && ioc_enable)
108 ioc_exists = 1; 117 ioc_exists = 1;
109 118
110 /* Legacy Data Uncached BCR is deprecated from v3 onwards */ 119 /* HS 2.0 didn't have AUX_VOL */
111 READ_BCR(ARC_REG_D_UNCACH_BCR, uncached_space); 120 if (cpuinfo_arc700[cpu].core.family > 0x51) {
112 if (uncached_space.ver > 2) 121 READ_BCR(AUX_VOL, vol);
113 perip_base = read_aux_reg(AUX_NON_VOL) & 0xF0000000; 122 perip_base = vol.start << 28;
123 /* HS 3.0 has limit and strict-ordering fields */
124 if (cpuinfo_arc700[cpu].core.family > 0x52)
125 perip_end = (vol.limit << 28) - 1;
126 }
114} 127}
115 128
116void read_decode_cache_bcr(void) 129void read_decode_cache_bcr(void)
diff --git a/arch/arc/mm/ioremap.c b/arch/arc/mm/ioremap.c
index f52b7db67fd3..9881bd740ccc 100644
--- a/arch/arc/mm/ioremap.c
+++ b/arch/arc/mm/ioremap.c
@@ -19,7 +19,7 @@ static inline bool arc_uncached_addr_space(phys_addr_t paddr)
19 if (is_isa_arcompact()) { 19 if (is_isa_arcompact()) {
20 if (paddr >= ARC_UNCACHED_ADDR_SPACE) 20 if (paddr >= ARC_UNCACHED_ADDR_SPACE)
21 return true; 21 return true;
22 } else if (paddr >= perip_base && paddr <= 0xFFFFFFFF) { 22 } else if (paddr >= perip_base && paddr <= perip_end) {
23 return true; 23 return true;
24 } 24 }
25 25
diff --git a/arch/arc/plat-sim/platform.c b/arch/arc/plat-sim/platform.c
index e4fe51456808..aea87389e44b 100644
--- a/arch/arc/plat-sim/platform.c
+++ b/arch/arc/plat-sim/platform.c
@@ -24,6 +24,7 @@ static const char *simulation_compat[] __initconst = {
24 "snps,nsim_hs", 24 "snps,nsim_hs",
25 "snps,nsimosci", 25 "snps,nsimosci",
26 "snps,nsimosci_hs", 26 "snps,nsimosci_hs",
27 "snps,zebu_hs",
27 NULL, 28 NULL,
28}; 29};
29 30
generated by cgit v1.2.2 (git 2.25.0) at 2026-01-01 11:14:58 -0500