aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
-rw-r--r--arch/x86/events/intel/ds.c13
-rw-r--r--arch/x86/events/perf_event.h1
2 files changed, 12 insertions, 2 deletions
diff --git a/arch/x86/events/intel/ds.c b/arch/x86/events/intel/ds.c
index c8a243d6fc82..22ece02d01b6 100644
--- a/arch/x86/events/intel/ds.c
+++ b/arch/x86/events/intel/ds.c
@@ -269,7 +269,7 @@ static int alloc_pebs_buffer(int cpu)
269 if (!x86_pmu.pebs) 269 if (!x86_pmu.pebs)
270 return 0; 270 return 0;
271 271
272 buffer = kzalloc_node(PEBS_BUFFER_SIZE, GFP_KERNEL, node); 272 buffer = kzalloc_node(x86_pmu.pebs_buffer_size, GFP_KERNEL, node);
273 if (unlikely(!buffer)) 273 if (unlikely(!buffer))
274 return -ENOMEM; 274 return -ENOMEM;
275 275
@@ -286,7 +286,7 @@ static int alloc_pebs_buffer(int cpu)
286 per_cpu(insn_buffer, cpu) = ibuffer; 286 per_cpu(insn_buffer, cpu) = ibuffer;
287 } 287 }
288 288
289 max = PEBS_BUFFER_SIZE / x86_pmu.pebs_record_size; 289 max = x86_pmu.pebs_buffer_size / x86_pmu.pebs_record_size;
290 290
291 ds->pebs_buffer_base = (u64)(unsigned long)buffer; 291 ds->pebs_buffer_base = (u64)(unsigned long)buffer;
292 ds->pebs_index = ds->pebs_buffer_base; 292 ds->pebs_index = ds->pebs_buffer_base;
@@ -1319,6 +1319,7 @@ void __init intel_ds_init(void)
1319 1319
1320 x86_pmu.bts = boot_cpu_has(X86_FEATURE_BTS); 1320 x86_pmu.bts = boot_cpu_has(X86_FEATURE_BTS);
1321 x86_pmu.pebs = boot_cpu_has(X86_FEATURE_PEBS); 1321 x86_pmu.pebs = boot_cpu_has(X86_FEATURE_PEBS);
1322 x86_pmu.pebs_buffer_size = PEBS_BUFFER_SIZE;
1322 if (x86_pmu.pebs) { 1323 if (x86_pmu.pebs) {
1323 char pebs_type = x86_pmu.intel_cap.pebs_trap ? '+' : '-'; 1324 char pebs_type = x86_pmu.intel_cap.pebs_trap ? '+' : '-';
1324 int format = x86_pmu.intel_cap.pebs_format; 1325 int format = x86_pmu.intel_cap.pebs_format;
@@ -1327,6 +1328,14 @@ void __init intel_ds_init(void)
1327 case 0: 1328 case 0:
1328 pr_cont("PEBS fmt0%c, ", pebs_type); 1329 pr_cont("PEBS fmt0%c, ", pebs_type);
1329 x86_pmu.pebs_record_size = sizeof(struct pebs_record_core); 1330 x86_pmu.pebs_record_size = sizeof(struct pebs_record_core);
1331 /*
1332 * Using >PAGE_SIZE buffers makes the WRMSR to
1333 * PERF_GLOBAL_CTRL in intel_pmu_enable_all()
1334 * mysteriously hang on Core2.
1335 *
1336 * As a workaround, we don't do this.
1337 */
1338 x86_pmu.pebs_buffer_size = PAGE_SIZE;
1330 x86_pmu.drain_pebs = intel_pmu_drain_pebs_core; 1339 x86_pmu.drain_pebs = intel_pmu_drain_pebs_core;
1331 break; 1340 break;
1332 1341
diff --git a/arch/x86/events/perf_event.h b/arch/x86/events/perf_event.h
index 7bb61e32fb29..1ab6279fed1d 100644
--- a/arch/x86/events/perf_event.h
+++ b/arch/x86/events/perf_event.h
@@ -586,6 +586,7 @@ struct x86_pmu {
586 pebs_broken :1, 586 pebs_broken :1,
587 pebs_prec_dist :1; 587 pebs_prec_dist :1;
588 int pebs_record_size; 588 int pebs_record_size;
589 int pebs_buffer_size;
589 void (*drain_pebs)(struct pt_regs *regs); 590 void (*drain_pebs)(struct pt_regs *regs);
590 struct event_constraint *pebs_constraints; 591 struct event_constraint *pebs_constraints;
591 void (*pebs_aliases)(struct perf_event *event); 592 void (*pebs_aliases)(struct perf_event *event);