5 files changed, 13 insertions, 7 deletions

diff --git a/arch/arm/include/asm/unistd.h b/arch/arm/include/asm/unistd.h
index 7b84657fba35..194b69923389 100644
--- a/arch/arm/include/asm/unistd.h
+++ b/arch/arm/include/asm/unistd.h
@@ -19,7 +19,7 @@
  * This may need to be greater than __NR_last_syscall+1 in order to
  * account for the padding in the syscall table
  */
-#define __NR_syscalls  (392)
+#define __NR_syscalls  (396)
 
 #define __ARCH_WANT_STAT64
 #define __ARCH_WANT_SYS_GETHOSTNAME
diff --git a/arch/arm/include/uapi/asm/unistd.h b/arch/arm/include/uapi/asm/unistd.h
index 5dd2528e9e45..2cb9dc770e1d 100644
--- a/arch/arm/include/uapi/asm/unistd.h
+++ b/arch/arm/include/uapi/asm/unistd.h
@@ -418,6 +418,8 @@
 #define __NR_membarrier                 (__NR_SYSCALL_BASE+389)
 #define __NR_mlock2                     (__NR_SYSCALL_BASE+390)
 #define __NR_copy_file_range            (__NR_SYSCALL_BASE+391)
+#define __NR_preadv2                    (__NR_SYSCALL_BASE+392)
+#define __NR_pwritev2                   (__NR_SYSCALL_BASE+393)
 
 /*
  * The following SWIs are ARM private.
diff --git a/arch/arm/kernel/calls.S b/arch/arm/kernel/calls.S
index dfc7cd6851ad..703fa0f3cd8f 100644
--- a/arch/arm/kernel/calls.S
+++ b/arch/arm/kernel/calls.S
@@ -399,8 +399,10 @@
                 CALL(sys_execveat)
                 CALL(sys_userfaultfd)
                 CALL(sys_membarrier)
-                CALL(sys_mlock2)
+/* 390 */       CALL(sys_mlock2)
                 CALL(sys_copy_file_range)
+                CALL(sys_preadv2)
+                CALL(sys_pwritev2)
 #ifndef syscalls_counted
 .equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls
 #define syscalls_counted
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index 139791ed473d..a28fce0bdbbe 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -430,11 +430,13 @@ static void __init patch_aeabi_idiv(void)
         pr_info("CPU: div instructions available: patching division code\n");
 
         fn_addr = ((uintptr_t)&__aeabi_uidiv) & ~1;
+        asm ("" : "+g" (fn_addr));
         ((u32 *)fn_addr)[0] = udiv_instruction();
         ((u32 *)fn_addr)[1] = bx_lr_instruction();
         flush_icache_range(fn_addr, fn_addr + 8);
 
         fn_addr = ((uintptr_t)&__aeabi_idiv) & ~1;
+        asm ("" : "+g" (fn_addr));
         ((u32 *)fn_addr)[0] = sdiv_instruction();
         ((u32 *)fn_addr)[1] = bx_lr_instruction();
         flush_icache_range(fn_addr, fn_addr + 8);
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index 0f8963a7e7d9..6fcaac8e200f 100644
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -281,12 +281,12 @@ __v7_ca17mp_setup:
         bl      v7_invalidate_l1
         ldmia   r12, {r1-r6, lr}
 #ifdef CONFIG_SMP
+        orr     r10, r10, #(1 << 6)             @ Enable SMP/nAMP mode
         ALT_SMP(mrc     p15, 0, r0, c1, c0, 1)
-        ALT_UP(mov      r0, #(1 << 6))          @ fake it for UP
-        tst     r0, #(1 << 6)                   @ SMP/nAMP mode enabled?
-        orreq   r0, r0, #(1 << 6)               @ Enable SMP/nAMP mode
-        orreq   r0, r0, r10                     @ Enable CPU-specific SMP bits
-        mcreq   p15, 0, r0, c1, c0, 1
+        ALT_UP(mov      r0, r10)                @ fake it for UP
+        orr     r10, r10, r0                    @ Set required bits
+        teq     r10, r0                         @ Were they already set?
+        mcrne   p15, 0, r10, c1, c0, 1          @ No, update register
 #endif
         b       __v7_setup_cont