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authorLinus Torvalds <torvalds@linux-foundation.org>2016-04-10 20:48:17 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2016-04-10 20:48:17 -0400
commit08b15d13864279aae10443c48cb268d823895b14 (patch)
tree87a415daab890cd28851beb4478595aae1778cdd
parent2f422f94eea83f50755df76be8f5ff86ef89ad80 (diff)
parent208fae5c3b9431013ad7bcea07cbcee114e7d163 (diff)
Merge branch 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm
Pull ARM fixes from Russell King: "A couple of small fixes, and wiring up the new syscalls which appeared during the merge window" * 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm: ARM: 8550/1: protect idiv patching against undefined gcc behavior ARM: wire up preadv2 and pwritev2 syscalls ARM: SMP enable of cache maintanence broadcast
-rw-r--r--arch/arm/include/asm/unistd.h2
-rw-r--r--arch/arm/include/uapi/asm/unistd.h2
-rw-r--r--arch/arm/kernel/calls.S4
-rw-r--r--arch/arm/kernel/setup.c2
-rw-r--r--arch/arm/mm/proc-v7.S10
5 files changed, 13 insertions, 7 deletions
diff --git a/arch/arm/include/asm/unistd.h b/arch/arm/include/asm/unistd.h
index 7b84657fba35..194b69923389 100644
--- a/arch/arm/include/asm/unistd.h
+++ b/arch/arm/include/asm/unistd.h
@@ -19,7 +19,7 @@
19 * This may need to be greater than __NR_last_syscall+1 in order to 19 * This may need to be greater than __NR_last_syscall+1 in order to
20 * account for the padding in the syscall table 20 * account for the padding in the syscall table
21 */ 21 */
22#define __NR_syscalls (392) 22#define __NR_syscalls (396)
23 23
24#define __ARCH_WANT_STAT64 24#define __ARCH_WANT_STAT64
25#define __ARCH_WANT_SYS_GETHOSTNAME 25#define __ARCH_WANT_SYS_GETHOSTNAME
diff --git a/arch/arm/include/uapi/asm/unistd.h b/arch/arm/include/uapi/asm/unistd.h
index 5dd2528e9e45..2cb9dc770e1d 100644
--- a/arch/arm/include/uapi/asm/unistd.h
+++ b/arch/arm/include/uapi/asm/unistd.h
@@ -418,6 +418,8 @@
418#define __NR_membarrier (__NR_SYSCALL_BASE+389) 418#define __NR_membarrier (__NR_SYSCALL_BASE+389)
419#define __NR_mlock2 (__NR_SYSCALL_BASE+390) 419#define __NR_mlock2 (__NR_SYSCALL_BASE+390)
420#define __NR_copy_file_range (__NR_SYSCALL_BASE+391) 420#define __NR_copy_file_range (__NR_SYSCALL_BASE+391)
421#define __NR_preadv2 (__NR_SYSCALL_BASE+392)
422#define __NR_pwritev2 (__NR_SYSCALL_BASE+393)
421 423
422/* 424/*
423 * The following SWIs are ARM private. 425 * The following SWIs are ARM private.
diff --git a/arch/arm/kernel/calls.S b/arch/arm/kernel/calls.S
index dfc7cd6851ad..703fa0f3cd8f 100644
--- a/arch/arm/kernel/calls.S
+++ b/arch/arm/kernel/calls.S
@@ -399,8 +399,10 @@
399 CALL(sys_execveat) 399 CALL(sys_execveat)
400 CALL(sys_userfaultfd) 400 CALL(sys_userfaultfd)
401 CALL(sys_membarrier) 401 CALL(sys_membarrier)
402 CALL(sys_mlock2) 402/* 390 */ CALL(sys_mlock2)
403 CALL(sys_copy_file_range) 403 CALL(sys_copy_file_range)
404 CALL(sys_preadv2)
405 CALL(sys_pwritev2)
404#ifndef syscalls_counted 406#ifndef syscalls_counted
405.equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls 407.equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls
406#define syscalls_counted 408#define syscalls_counted
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index 139791ed473d..a28fce0bdbbe 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -430,11 +430,13 @@ static void __init patch_aeabi_idiv(void)
430 pr_info("CPU: div instructions available: patching division code\n"); 430 pr_info("CPU: div instructions available: patching division code\n");
431 431
432 fn_addr = ((uintptr_t)&__aeabi_uidiv) & ~1; 432 fn_addr = ((uintptr_t)&__aeabi_uidiv) & ~1;
433 asm ("" : "+g" (fn_addr));
433 ((u32 *)fn_addr)[0] = udiv_instruction(); 434 ((u32 *)fn_addr)[0] = udiv_instruction();
434 ((u32 *)fn_addr)[1] = bx_lr_instruction(); 435 ((u32 *)fn_addr)[1] = bx_lr_instruction();
435 flush_icache_range(fn_addr, fn_addr + 8); 436 flush_icache_range(fn_addr, fn_addr + 8);
436 437
437 fn_addr = ((uintptr_t)&__aeabi_idiv) & ~1; 438 fn_addr = ((uintptr_t)&__aeabi_idiv) & ~1;
439 asm ("" : "+g" (fn_addr));
438 ((u32 *)fn_addr)[0] = sdiv_instruction(); 440 ((u32 *)fn_addr)[0] = sdiv_instruction();
439 ((u32 *)fn_addr)[1] = bx_lr_instruction(); 441 ((u32 *)fn_addr)[1] = bx_lr_instruction();
440 flush_icache_range(fn_addr, fn_addr + 8); 442 flush_icache_range(fn_addr, fn_addr + 8);
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index 0f8963a7e7d9..6fcaac8e200f 100644
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -281,12 +281,12 @@ __v7_ca17mp_setup:
281 bl v7_invalidate_l1 281 bl v7_invalidate_l1
282 ldmia r12, {r1-r6, lr} 282 ldmia r12, {r1-r6, lr}
283#ifdef CONFIG_SMP 283#ifdef CONFIG_SMP
284 orr r10, r10, #(1 << 6) @ Enable SMP/nAMP mode
284 ALT_SMP(mrc p15, 0, r0, c1, c0, 1) 285 ALT_SMP(mrc p15, 0, r0, c1, c0, 1)
285 ALT_UP(mov r0, #(1 << 6)) @ fake it for UP 286 ALT_UP(mov r0, r10) @ fake it for UP
286 tst r0, #(1 << 6) @ SMP/nAMP mode enabled? 287 orr r10, r10, r0 @ Set required bits
287 orreq r0, r0, #(1 << 6) @ Enable SMP/nAMP mode 288 teq r10, r0 @ Were they already set?
288 orreq r0, r0, r10 @ Enable CPU-specific SMP bits 289 mcrne p15, 0, r10, c1, c0, 1 @ No, update register
289 mcreq p15, 0, r0, c1, c0, 1
290#endif 290#endif
291 b __v7_setup_cont 291 b __v7_setup_cont
292 292