diff options
author | Alex Deucher <alexander.deucher@amd.com> | 2017-07-24 23:05:20 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2017-07-25 16:37:20 -0400 |
commit | 2e2bfd90fa2b1be480a655337b2d25410323f43e (patch) | |
tree | cb32077cccb17cffab3f164814837f3a11b04a06 /drivers | |
parent | 96d78e3734da237e008de4cef85d3406dfffe500 (diff) |
drm/amdgpu/gmc8: disable legacy vga features in gmc init
Needs to be done when the MC is set up.
Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c index c9dfe15efed6..85c937b5e40b 100644 --- a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c | |||
@@ -35,6 +35,9 @@ | |||
35 | #include "oss/oss_3_0_d.h" | 35 | #include "oss/oss_3_0_d.h" |
36 | #include "oss/oss_3_0_sh_mask.h" | 36 | #include "oss/oss_3_0_sh_mask.h" |
37 | 37 | ||
38 | #include "dce/dce_10_0_d.h" | ||
39 | #include "dce/dce_10_0_sh_mask.h" | ||
40 | |||
38 | #include "vid.h" | 41 | #include "vid.h" |
39 | #include "vi.h" | 42 | #include "vi.h" |
40 | 43 | ||
@@ -438,6 +441,17 @@ static void gmc_v8_0_mc_program(struct amdgpu_device *adev) | |||
438 | if (gmc_v8_0_wait_for_idle((void *)adev)) { | 441 | if (gmc_v8_0_wait_for_idle((void *)adev)) { |
439 | dev_warn(adev->dev, "Wait for MC idle timedout !\n"); | 442 | dev_warn(adev->dev, "Wait for MC idle timedout !\n"); |
440 | } | 443 | } |
444 | if (adev->mode_info.num_crtc) { | ||
445 | /* Lockout access through VGA aperture*/ | ||
446 | tmp = RREG32(mmVGA_HDP_CONTROL); | ||
447 | tmp = REG_SET_FIELD(tmp, VGA_HDP_CONTROL, VGA_MEMORY_DISABLE, 1); | ||
448 | WREG32(mmVGA_HDP_CONTROL, tmp); | ||
449 | |||
450 | /* disable VGA render */ | ||
451 | tmp = RREG32(mmVGA_RENDER_CONTROL); | ||
452 | tmp = REG_SET_FIELD(tmp, VGA_RENDER_CONTROL, VGA_VSTATUS_CNTL, 0); | ||
453 | WREG32(mmVGA_RENDER_CONTROL, tmp); | ||
454 | } | ||
441 | /* Update configuration */ | 455 | /* Update configuration */ |
442 | WREG32(mmMC_VM_SYSTEM_APERTURE_LOW_ADDR, | 456 | WREG32(mmMC_VM_SYSTEM_APERTURE_LOW_ADDR, |
443 | adev->mc.vram_start >> 12); | 457 | adev->mc.vram_start >> 12); |