diff options
author | Alex Deucher <alexander.deucher@amd.com> | 2017-07-24 22:58:36 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2017-07-25 16:37:16 -0400 |
commit | 96d78e3734da237e008de4cef85d3406dfffe500 (patch) | |
tree | 8f374bfa74b9cce8f55e6cd624462d8e0ff0e92d /drivers | |
parent | 03ba88cfdc671354c5c81ac717b51def6b46a1cc (diff) |
drm/amdgpu/gmc7: disable legacy vga features in gmc init
Needs to be done when the MC is set up.
Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c index 21a45b403b21..4a9e84062874 100644 --- a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c | |||
@@ -37,6 +37,9 @@ | |||
37 | #include "oss/oss_2_0_d.h" | 37 | #include "oss/oss_2_0_d.h" |
38 | #include "oss/oss_2_0_sh_mask.h" | 38 | #include "oss/oss_2_0_sh_mask.h" |
39 | 39 | ||
40 | #include "dce/dce_8_0_d.h" | ||
41 | #include "dce/dce_8_0_sh_mask.h" | ||
42 | |||
40 | #include "amdgpu_atombios.h" | 43 | #include "amdgpu_atombios.h" |
41 | 44 | ||
42 | static void gmc_v7_0_set_gart_funcs(struct amdgpu_device *adev); | 45 | static void gmc_v7_0_set_gart_funcs(struct amdgpu_device *adev); |
@@ -273,6 +276,17 @@ static void gmc_v7_0_mc_program(struct amdgpu_device *adev) | |||
273 | if (gmc_v7_0_wait_for_idle((void *)adev)) { | 276 | if (gmc_v7_0_wait_for_idle((void *)adev)) { |
274 | dev_warn(adev->dev, "Wait for MC idle timedout !\n"); | 277 | dev_warn(adev->dev, "Wait for MC idle timedout !\n"); |
275 | } | 278 | } |
279 | if (adev->mode_info.num_crtc) { | ||
280 | /* Lockout access through VGA aperture*/ | ||
281 | tmp = RREG32(mmVGA_HDP_CONTROL); | ||
282 | tmp = REG_SET_FIELD(tmp, VGA_HDP_CONTROL, VGA_MEMORY_DISABLE, 1); | ||
283 | WREG32(mmVGA_HDP_CONTROL, tmp); | ||
284 | |||
285 | /* disable VGA render */ | ||
286 | tmp = RREG32(mmVGA_RENDER_CONTROL); | ||
287 | tmp = REG_SET_FIELD(tmp, VGA_RENDER_CONTROL, VGA_VSTATUS_CNTL, 0); | ||
288 | WREG32(mmVGA_RENDER_CONTROL, tmp); | ||
289 | } | ||
276 | /* Update configuration */ | 290 | /* Update configuration */ |
277 | WREG32(mmMC_VM_SYSTEM_APERTURE_LOW_ADDR, | 291 | WREG32(mmMC_VM_SYSTEM_APERTURE_LOW_ADDR, |
278 | adev->mc.vram_start >> 12); | 292 | adev->mc.vram_start >> 12); |