Merge tag 'platform-drivers-x86-v5.1-1' of git://git.infradead.org/linux-platform-drivers-x86

Pull x86 platform driver updates from Darren Hart:

 - use MODULE_DEVICE_TABLE across several wmi drivers, keeping
   wmi_device_id and MODULE_ALIAS() declarations in sync

 - add several Ideapad models to the no_hw_rfkill list

 - add support for new Mellanox platforms, including new fan and LED
   functionality

 - address Dell keyboard backlight change event and power button release
   issues

 - update dell_rbu to use appropriate memory allocation mechanisms

 - several small fixes and Ice Lake support for intel_pmc_core

 - fix a suspend regression for Cherry Trail based devices in
   intel_int0002_vgpio

 - a few other routine fixes

* tag 'platform-drivers-x86-v5.1-1' of git://git.infradead.org/linux-platform-drivers-x86: (50 commits)
  MAINTAINERS: Include mlxreg.h in Mellanox Platform Driver files
  platform/x86: ideapad-laptop: Add S130-14IGM to no_hw_rfkill list
  platform/x86: mlx-platform: Fix access mode for fan_dir attribute
  platform/x86: mlx-platform: Add UID LED for the next generation systems
  platform/x86: mlx-platform: Add extra CPLD for next generation systems
  platform/x86: wmi-bmof: use MODULE_DEVICE_TABLE() instead of MODULE_ALIAS()
  platform/x86: intel-wmi-thunderbolt: use MODULE_DEVICE_TABLE() instead of MODULE_ALIAS()
  platform/x86: huawei-wmi: use MODULE_DEVICE_TABLE() instead of MODULE_ALIAS()
  platform/x86: dell-wmi: use MODULE_DEVICE_TABLE() instead of MODULE_ALIAS()
  platform/x86: dell-wmi-descriptor: use MODULE_DEVICE_TABLE() instead of MODULE_ALIAS()
  platform/x86: dell-smbios-wmi: use MODULE_DEVICE_TABLE() instead of MODULE_ALIAS()
  platform/x86: wmi: add WMI support to MODULE_DEVICE_TABLE()
  platform/x86: wmi: move struct wmi_device_id to mod_devicetable.h
  modpost: file2alias: define size of alias
  platform/x86: touchscreen_dmi: Add info for the CHUWI Hi10 Air tablet
  platform/x86: ideapad-laptop: Add Ideapad 530S-14ARR to no_hw_rfkill list
  platform/x86: ideapad-laptop: Add Yoga C930 to no_hw_rfkill_list
  platform/x86: intel_pmc_core: Quirk to ignore XTAL shutdown
  platform/x86: intel_pmc_core: Add Package cstates residency info
  platform/x86: intel_pmc_core: Add ICL platform support
  ...

1 files changed, 105 insertions, 0 deletions

diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c
index df3fcd36776a..48fa7573e29b 100644
--- a/drivers/platform/x86/mlx-platform.c
+++ b/drivers/platform/x86/mlx-platform.c
@@ -25,6 +25,7 @@
 #define MLXPLAT_CPLD_LPC_REG_CPLD1_VER_OFFSET   0x00
 #define MLXPLAT_CPLD_LPC_REG_CPLD2_VER_OFFSET   0x01
 #define MLXPLAT_CPLD_LPC_REG_CPLD3_VER_OFFSET   0x02
+#define MLXPLAT_CPLD_LPC_REG_CPLD4_VER_OFFSET   0x03
 #define MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET 0x1d
 #define MLXPLAT_CPLD_LPC_REG_RST_CAUSE1_OFFSET  0x1e
 #define MLXPLAT_CPLD_LPC_REG_RST_CAUSE2_OFFSET  0x1f
@@ -33,6 +34,7 @@
 #define MLXPLAT_CPLD_LPC_REG_LED3_OFFSET        0x22
 #define MLXPLAT_CPLD_LPC_REG_LED4_OFFSET        0x23
 #define MLXPLAT_CPLD_LPC_REG_LED5_OFFSET        0x24
+#define MLXPLAT_CPLD_LPC_REG_FAN_DIRECTION      0x2a
 #define MLXPLAT_CPLD_LPC_REG_GP1_OFFSET         0x30
 #define MLXPLAT_CPLD_LPC_REG_WP1_OFFSET         0x31
 #define MLXPLAT_CPLD_LPC_REG_GP2_OFFSET         0x32
@@ -67,6 +69,9 @@
 #define MLXPLAT_CPLD_LPC_REG_TACHO10_OFFSET     0xee
 #define MLXPLAT_CPLD_LPC_REG_TACHO11_OFFSET     0xef
 #define MLXPLAT_CPLD_LPC_REG_TACHO12_OFFSET     0xf0
+#define MLXPLAT_CPLD_LPC_REG_FAN_CAP1_OFFSET    0xf5
+#define MLXPLAT_CPLD_LPC_REG_FAN_CAP2_OFFSET    0xf6
+#define MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET 0xf7
 #define MLXPLAT_CPLD_LPC_IO_RANGE               0x100
 #define MLXPLAT_CPLD_LPC_I2C_CH1_OFF            0xdb
 #define MLXPLAT_CPLD_LPC_I2C_CH2_OFF            0xda
@@ -584,36 +589,48 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_fan_items_data[] = {
                 .label = "fan1",
                 .reg = MLXPLAT_CPLD_LPC_REG_FAN_OFFSET,
                 .mask = BIT(0),
+                .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET,
+                .bit = BIT(0),
                 .hpdev.nr = MLXPLAT_CPLD_NR_NONE,
         },
         {
                 .label = "fan2",
                 .reg = MLXPLAT_CPLD_LPC_REG_FAN_OFFSET,
                 .mask = BIT(1),
+                .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET,
+                .bit = BIT(1),
                 .hpdev.nr = MLXPLAT_CPLD_NR_NONE,
         },
         {
                 .label = "fan3",
                 .reg = MLXPLAT_CPLD_LPC_REG_FAN_OFFSET,
                 .mask = BIT(2),
+                .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET,
+                .bit = BIT(2),
                 .hpdev.nr = MLXPLAT_CPLD_NR_NONE,
         },
         {
                 .label = "fan4",
                 .reg = MLXPLAT_CPLD_LPC_REG_FAN_OFFSET,
                 .mask = BIT(3),
+                .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET,
+                .bit = BIT(3),
                 .hpdev.nr = MLXPLAT_CPLD_NR_NONE,
         },
         {
                 .label = "fan5",
                 .reg = MLXPLAT_CPLD_LPC_REG_FAN_OFFSET,
                 .mask = BIT(4),
+                .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET,
+                .bit = BIT(4),
                 .hpdev.nr = MLXPLAT_CPLD_NR_NONE,
         },
         {
                 .label = "fan6",
                 .reg = MLXPLAT_CPLD_LPC_REG_FAN_OFFSET,
                 .mask = BIT(5),
+                .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET,
+                .bit = BIT(5),
                 .hpdev.nr = MLXPLAT_CPLD_NR_NONE,
         },
 };
@@ -816,61 +833,90 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_led_data[] = {
                 .label = "fan1:green",
                 .reg = MLXPLAT_CPLD_LPC_REG_LED2_OFFSET,
                 .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK,
+                .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET,
+                .bit = BIT(0),
         },
         {
                 .label = "fan1:orange",
                 .reg = MLXPLAT_CPLD_LPC_REG_LED2_OFFSET,
                 .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK,
+                .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET,
+                .bit = BIT(0),
         },
         {
                 .label = "fan2:green",
                 .reg = MLXPLAT_CPLD_LPC_REG_LED2_OFFSET,
                 .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK,
+                .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET,
+                .bit = BIT(1),
         },
         {
                 .label = "fan2:orange",
                 .reg = MLXPLAT_CPLD_LPC_REG_LED2_OFFSET,
                 .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK,
+                .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET,
+                .bit = BIT(1),
         },
         {
                 .label = "fan3:green",
                 .reg = MLXPLAT_CPLD_LPC_REG_LED3_OFFSET,
                 .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK,
+                .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET,
+                .bit = BIT(2),
         },
         {
                 .label = "fan3:orange",
                 .reg = MLXPLAT_CPLD_LPC_REG_LED3_OFFSET,
                 .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK,
+                .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET,
+                .bit = BIT(2),
         },
         {
                 .label = "fan4:green",
                 .reg = MLXPLAT_CPLD_LPC_REG_LED3_OFFSET,
                 .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK,
+                .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET,
+                .bit = BIT(3),
         },
         {
                 .label = "fan4:orange",
                 .reg = MLXPLAT_CPLD_LPC_REG_LED3_OFFSET,
                 .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK,
+                .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET,
+                .bit = BIT(3),
         },
         {
                 .label = "fan5:green",
                 .reg = MLXPLAT_CPLD_LPC_REG_LED4_OFFSET,
                 .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK,
+                .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET,
+                .bit = BIT(4),
         },
         {
                 .label = "fan5:orange",
                 .reg = MLXPLAT_CPLD_LPC_REG_LED4_OFFSET,
                 .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK,
+                .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET,
+                .bit = BIT(4),
         },
         {
                 .label = "fan6:green",
                 .reg = MLXPLAT_CPLD_LPC_REG_LED4_OFFSET,
                 .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK,
+                .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET,
+                .bit = BIT(5),
         },
         {
                 .label = "fan6:orange",
                 .reg = MLXPLAT_CPLD_LPC_REG_LED4_OFFSET,
                 .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK,
+                .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET,
+                .bit = BIT(5),
+        },
+        {
+                .label = "uid:blue",
+                .reg = MLXPLAT_CPLD_LPC_REG_LED5_OFFSET,
+                .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK,
         },
 };
 
@@ -1100,6 +1146,12 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = {
                 .mode = 0444,
         },
         {
+                .label = "cpld4_version",
+                .reg = MLXPLAT_CPLD_LPC_REG_CPLD4_VER_OFFSET,
+                .bit = GENMASK(7, 0),
+                .mode = 0444,
+        },
+        {
                 .label = "reset_long_pb",
                 .reg = MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET,
                 .mask = GENMASK(7, 0) & ~BIT(0),
@@ -1184,6 +1236,12 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = {
                 .bit = 1,
                 .mode = 0444,
         },
+        {
+                .label = "fan_dir",
+                .reg = MLXPLAT_CPLD_LPC_REG_FAN_DIRECTION,
+                .bit = GENMASK(7, 0),
+                .mode = 0444,
+        },
 };
 
 static struct mlxreg_core_platform_data mlxplat_default_ng_regs_io_data = {
@@ -1201,61 +1259,85 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_fan_data[] = {
                 .label = "tacho1",
                 .reg = MLXPLAT_CPLD_LPC_REG_TACHO1_OFFSET,
                 .mask = GENMASK(7, 0),
+                .capability = MLXPLAT_CPLD_LPC_REG_FAN_CAP1_OFFSET,
+                .bit = BIT(0),
         },
         {
                 .label = "tacho2",
                 .reg = MLXPLAT_CPLD_LPC_REG_TACHO2_OFFSET,
                 .mask = GENMASK(7, 0),
+                .capability = MLXPLAT_CPLD_LPC_REG_FAN_CAP1_OFFSET,
+                .bit = BIT(1),
         },
         {
                 .label = "tacho3",
                 .reg = MLXPLAT_CPLD_LPC_REG_TACHO3_OFFSET,
                 .mask = GENMASK(7, 0),
+                .capability = MLXPLAT_CPLD_LPC_REG_FAN_CAP1_OFFSET,
+                .bit = BIT(2),
         },
         {
                 .label = "tacho4",
                 .reg = MLXPLAT_CPLD_LPC_REG_TACHO4_OFFSET,
                 .mask = GENMASK(7, 0),
+                .capability = MLXPLAT_CPLD_LPC_REG_FAN_CAP1_OFFSET,
+                .bit = BIT(3),
         },
         {
                 .label = "tacho5",
                 .reg = MLXPLAT_CPLD_LPC_REG_TACHO5_OFFSET,
                 .mask = GENMASK(7, 0),
+                .capability = MLXPLAT_CPLD_LPC_REG_FAN_CAP1_OFFSET,
+                .bit = BIT(4),
         },
         {
                 .label = "tacho6",
                 .reg = MLXPLAT_CPLD_LPC_REG_TACHO6_OFFSET,
                 .mask = GENMASK(7, 0),
+                .capability = MLXPLAT_CPLD_LPC_REG_FAN_CAP1_OFFSET,
+                .bit = BIT(5),
         },
         {
                 .label = "tacho7",
                 .reg = MLXPLAT_CPLD_LPC_REG_TACHO7_OFFSET,
                 .mask = GENMASK(7, 0),
+                .capability = MLXPLAT_CPLD_LPC_REG_FAN_CAP1_OFFSET,
+                .bit = BIT(6),
         },
         {
                 .label = "tacho8",
                 .reg = MLXPLAT_CPLD_LPC_REG_TACHO8_OFFSET,
                 .mask = GENMASK(7, 0),
+                .capability = MLXPLAT_CPLD_LPC_REG_FAN_CAP1_OFFSET,
+                .bit = BIT(7),
         },
         {
                 .label = "tacho9",
                 .reg = MLXPLAT_CPLD_LPC_REG_TACHO9_OFFSET,
                 .mask = GENMASK(7, 0),
+                .capability = MLXPLAT_CPLD_LPC_REG_FAN_CAP2_OFFSET,
+                .bit = BIT(0),
         },
         {
                 .label = "tacho10",
                 .reg = MLXPLAT_CPLD_LPC_REG_TACHO10_OFFSET,
                 .mask = GENMASK(7, 0),
+                .capability = MLXPLAT_CPLD_LPC_REG_FAN_CAP2_OFFSET,
+                .bit = BIT(1),
         },
         {
                 .label = "tacho11",
                 .reg = MLXPLAT_CPLD_LPC_REG_TACHO11_OFFSET,
                 .mask = GENMASK(7, 0),
+                .capability = MLXPLAT_CPLD_LPC_REG_FAN_CAP2_OFFSET,
+                .bit = BIT(2),
         },
         {
                 .label = "tacho12",
                 .reg = MLXPLAT_CPLD_LPC_REG_TACHO12_OFFSET,
                 .mask = GENMASK(7, 0),
+                .capability = MLXPLAT_CPLD_LPC_REG_FAN_CAP2_OFFSET,
+                .bit = BIT(3),
         },
 };
 
@@ -1299,6 +1381,7 @@ static bool mlxplat_mlxcpld_readable_reg(struct device *dev, unsigned int reg)
         case MLXPLAT_CPLD_LPC_REG_CPLD1_VER_OFFSET:
         case MLXPLAT_CPLD_LPC_REG_CPLD2_VER_OFFSET:
         case MLXPLAT_CPLD_LPC_REG_CPLD3_VER_OFFSET:
+        case MLXPLAT_CPLD_LPC_REG_CPLD4_VER_OFFSET:
         case MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET:
         case MLXPLAT_CPLD_LPC_REG_RST_CAUSE1_OFFSET:
         case MLXPLAT_CPLD_LPC_REG_RST_CAUSE2_OFFSET:
@@ -1307,6 +1390,7 @@ static bool mlxplat_mlxcpld_readable_reg(struct device *dev, unsigned int reg)
         case MLXPLAT_CPLD_LPC_REG_LED3_OFFSET:
         case MLXPLAT_CPLD_LPC_REG_LED4_OFFSET:
         case MLXPLAT_CPLD_LPC_REG_LED5_OFFSET:
+        case MLXPLAT_CPLD_LPC_REG_FAN_DIRECTION:
         case MLXPLAT_CPLD_LPC_REG_GP1_OFFSET:
         case MLXPLAT_CPLD_LPC_REG_WP1_OFFSET:
         case MLXPLAT_CPLD_LPC_REG_GP2_OFFSET:
@@ -1341,6 +1425,9 @@ static bool mlxplat_mlxcpld_readable_reg(struct device *dev, unsigned int reg)
         case MLXPLAT_CPLD_LPC_REG_TACHO11_OFFSET:
         case MLXPLAT_CPLD_LPC_REG_TACHO12_OFFSET:
         case MLXPLAT_CPLD_LPC_REG_PWM_CONTROL_OFFSET:
+        case MLXPLAT_CPLD_LPC_REG_FAN_CAP1_OFFSET:
+        case MLXPLAT_CPLD_LPC_REG_FAN_CAP2_OFFSET:
+        case MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET:
                 return true;
         }
         return false;
@@ -1352,6 +1439,7 @@ static bool mlxplat_mlxcpld_volatile_reg(struct device *dev, unsigned int reg)
         case MLXPLAT_CPLD_LPC_REG_CPLD1_VER_OFFSET:
         case MLXPLAT_CPLD_LPC_REG_CPLD2_VER_OFFSET:
         case MLXPLAT_CPLD_LPC_REG_CPLD3_VER_OFFSET:
+        case MLXPLAT_CPLD_LPC_REG_CPLD4_VER_OFFSET:
         case MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET:
         case MLXPLAT_CPLD_LPC_REG_RST_CAUSE1_OFFSET:
         case MLXPLAT_CPLD_LPC_REG_RST_CAUSE2_OFFSET:
@@ -1360,6 +1448,7 @@ static bool mlxplat_mlxcpld_volatile_reg(struct device *dev, unsigned int reg)
         case MLXPLAT_CPLD_LPC_REG_LED3_OFFSET:
         case MLXPLAT_CPLD_LPC_REG_LED4_OFFSET:
         case MLXPLAT_CPLD_LPC_REG_LED5_OFFSET:
+        case MLXPLAT_CPLD_LPC_REG_FAN_DIRECTION:
         case MLXPLAT_CPLD_LPC_REG_GP1_OFFSET:
         case MLXPLAT_CPLD_LPC_REG_GP2_OFFSET:
         case MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET:
@@ -1392,6 +1481,9 @@ static bool mlxplat_mlxcpld_volatile_reg(struct device *dev, unsigned int reg)
         case MLXPLAT_CPLD_LPC_REG_TACHO11_OFFSET:
         case MLXPLAT_CPLD_LPC_REG_TACHO12_OFFSET:
         case MLXPLAT_CPLD_LPC_REG_PWM_CONTROL_OFFSET:
+        case MLXPLAT_CPLD_LPC_REG_FAN_CAP1_OFFSET:
+        case MLXPLAT_CPLD_LPC_REG_FAN_CAP2_OFFSET:
+        case MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET:
                 return true;
         }
         return false;
@@ -1614,6 +1706,13 @@ static const struct dmi_system_id mlxplat_dmi_table[] __initconst = {
                 },
         },
         {
+                .callback = mlxplat_dmi_qmb7xx_matched,
+                .matches = {
+                        DMI_MATCH(DMI_BOARD_VENDOR, "Mellanox Technologies"),
+                        DMI_MATCH(DMI_PRODUCT_NAME, "MSN38"),
+                },
+        },
+        {
                 .callback = mlxplat_dmi_default_matched,
                 .matches = {
                         DMI_MATCH(DMI_BOARD_NAME, "VMOD0001"),
@@ -1643,6 +1742,12 @@ static const struct dmi_system_id mlxplat_dmi_table[] __initconst = {
                         DMI_MATCH(DMI_BOARD_NAME, "VMOD0005"),
                 },
         },
+        {
+                .callback = mlxplat_dmi_qmb7xx_matched,
+                .matches = {
+                        DMI_MATCH(DMI_BOARD_NAME, "VMOD0007"),
+                },
+        },
         { }
 };