diff options
author | Kishon Vijay Abraham I <kishon@ti.com> | 2018-10-17 03:41:10 -0400 |
---|---|---|
committer | Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> | 2018-10-17 04:59:00 -0400 |
commit | 23fe5bd4be90099e760fe0d00665ab1e465255b3 (patch) | |
tree | dad2c94df471bd40851fc5351e5b737fc6bb38a0 /drivers/pci/controller/dwc/pci-keystone.c | |
parent | f9127db9fbadd079c6b88974001cb036057c8afc (diff) |
PCI: keystone: Cleanup ks_pcie_link_up()
ks_pcie_link_up() uses registers from the designware core to get the
status of the link. Move the register defines to pcie-designware.h
and cleanup ks_pcie_link_up().
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Diffstat (limited to 'drivers/pci/controller/dwc/pci-keystone.c')
-rw-r--r-- | drivers/pci/controller/dwc/pci-keystone.c | 11 |
1 files changed, 3 insertions, 8 deletions
diff --git a/drivers/pci/controller/dwc/pci-keystone.c b/drivers/pci/controller/dwc/pci-keystone.c index 2decbaec81a3..e181e6277323 100644 --- a/drivers/pci/controller/dwc/pci-keystone.c +++ b/drivers/pci/controller/dwc/pci-keystone.c | |||
@@ -38,8 +38,6 @@ | |||
38 | 38 | ||
39 | /* Application register defines */ | 39 | /* Application register defines */ |
40 | #define LTSSM_EN_VAL BIT(0) | 40 | #define LTSSM_EN_VAL BIT(0) |
41 | #define LTSSM_STATE_MASK 0x1f | ||
42 | #define LTSSM_STATE_L0 0x11 | ||
43 | #define DBI_CS2 BIT(5) | 41 | #define DBI_CS2 BIT(5) |
44 | #define OB_XLAT_EN_VAL BIT(1) | 42 | #define OB_XLAT_EN_VAL BIT(1) |
45 | 43 | ||
@@ -87,11 +85,7 @@ | |||
87 | #define ERR_IRQ_ENABLE_SET 0x1c8 | 85 | #define ERR_IRQ_ENABLE_SET 0x1c8 |
88 | #define ERR_IRQ_ENABLE_CLR 0x1cc | 86 | #define ERR_IRQ_ENABLE_CLR 0x1cc |
89 | 87 | ||
90 | /* Config space registers */ | ||
91 | #define DEBUG0 0x728 | ||
92 | |||
93 | #define MAX_MSI_HOST_IRQS 8 | 88 | #define MAX_MSI_HOST_IRQS 8 |
94 | |||
95 | /* PCIE controller device IDs */ | 89 | /* PCIE controller device IDs */ |
96 | #define PCIE_RC_K2HK 0xb008 | 90 | #define PCIE_RC_K2HK 0xb008 |
97 | #define PCIE_RC_K2E 0xb009 | 91 | #define PCIE_RC_K2E 0xb009 |
@@ -442,8 +436,9 @@ static int ks_pcie_link_up(struct dw_pcie *pci) | |||
442 | { | 436 | { |
443 | u32 val; | 437 | u32 val; |
444 | 438 | ||
445 | val = dw_pcie_readl_dbi(pci, DEBUG0); | 439 | val = dw_pcie_readl_dbi(pci, PCIE_PORT_DEBUG0); |
446 | return (val & LTSSM_STATE_MASK) == LTSSM_STATE_L0; | 440 | val &= PORT_LOGIC_LTSSM_STATE_MASK; |
441 | return (val == PORT_LOGIC_LTSSM_STATE_L0); | ||
447 | } | 442 | } |
448 | 443 | ||
449 | static void ks_pcie_initiate_link_train(struct keystone_pcie *ks_pcie) | 444 | static void ks_pcie_initiate_link_train(struct keystone_pcie *ks_pcie) |