diff options
author | Dennis Dalessandro <dennis.dalessandro@intel.com> | 2018-08-31 13:34:14 -0400 |
---|---|---|
committer | Bjorn Helgaas <bhelgaas@google.com> | 2018-09-11 22:44:52 -0400 |
commit | bfc456060d0cbcf6902a436d358b60cb1534668c (patch) | |
tree | 6dfffd4d832b98bba39ab0f87e67e8e39951043c /drivers/infiniband/hw/hfi1/pcie.c | |
parent | d8a5281035895cdb5ff77756eff72966ec76edd0 (diff) |
IB/hfi1,PCI: Allow bus reset while probing
Calling into the new API to reset the secondary bus results in a deadlock.
This occurs because the device/bus is already locked at probe time.
Reverting back to the old behavior while the API is improved.
Link: https://bugzilla.kernel.org/show_bug.cgi?id=200985
Fixes: c6a44ba950d1 ("PCI: Rename pci_try_reset_bus() to pci_reset_bus()")
Fixes: 409888e0966e ("IB/hfi1: Use pci_try_reset_bus() for initiating PCI Secondary Bus Reset")
Signed-off-by: Dennis Dalessandro <dennis.dalessandro@intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
Cc: Sinan Kaya <okaya@codeaurora.org>
Diffstat (limited to 'drivers/infiniband/hw/hfi1/pcie.c')
-rw-r--r-- | drivers/infiniband/hw/hfi1/pcie.c | 11 |
1 files changed, 4 insertions, 7 deletions
diff --git a/drivers/infiniband/hw/hfi1/pcie.c b/drivers/infiniband/hw/hfi1/pcie.c index eec83757d55f..6c967dde58e7 100644 --- a/drivers/infiniband/hw/hfi1/pcie.c +++ b/drivers/infiniband/hw/hfi1/pcie.c | |||
@@ -893,14 +893,11 @@ static int trigger_sbr(struct hfi1_devdata *dd) | |||
893 | } | 893 | } |
894 | 894 | ||
895 | /* | 895 | /* |
896 | * A secondary bus reset (SBR) issues a hot reset to our device. | 896 | * This is an end around to do an SBR during probe time. A new API needs |
897 | * The following routine does a 1s wait after the reset is dropped | 897 | * to be implemented to have cleaner interface but this fixes the |
898 | * per PCI Trhfa (recovery time). PCIe 3.0 section 6.6.1 - | 898 | * current brokenness |
899 | * Conventional Reset, paragraph 3, line 35 also says that a 1s | ||
900 | * delay after a reset is required. Per spec requirements, | ||
901 | * the link is either working or not after that point. | ||
902 | */ | 899 | */ |
903 | return pci_reset_bus(dev); | 900 | return pci_bridge_secondary_bus_reset(dev->bus->self); |
904 | } | 901 | } |
905 | 902 | ||
906 | /* | 903 | /* |